linux: update rockchip Linux 6.17.y patchset

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
This commit is contained in:
Christian Hewitt
2025-09-17 15:28:46 +00:00
parent 16d8875e4f
commit f490093c51
118 changed files with 3963 additions and 3669 deletions

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@@ -30,8 +30,8 @@ case "${LINUX}" in
PKG_PATCH_DIRS="raspberrypi rtlwifi/6.13 rtlwifi/6.14 rtlwifi/6.15 rtlwifi/6.17" PKG_PATCH_DIRS="raspberrypi rtlwifi/6.13 rtlwifi/6.14 rtlwifi/6.15 rtlwifi/6.17"
;; ;;
rockchip) rockchip)
PKG_VERSION="f83ec76bf285bea5727f478a68b894f5543ca76e" # 6.17-rc6 PKG_VERSION="07e27ad16399afcd693be20211b0dfae63e0615f" # 6.17-rc7
PKG_SHA256="e3fc0d538db1085d756041190b5245b49a10e9b665a633c2539ea1515c328fb6" PKG_SHA256="098609cc94a84dd05e1054d43f9a7c335a61edb06093d4f23bcdefa7be24c1ec"
PKG_URL="https://github.com/chewitt/linux/archive/${PKG_VERSION}.tar.gz" PKG_URL="https://github.com/chewitt/linux/archive/${PKG_VERSION}.tar.gz"
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz" PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
PKG_PATCH_DIRS="default rockchip rtlwifi/6.17" PKG_PATCH_DIRS="default rockchip rtlwifi/6.17"

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@@ -1,7 +1,7 @@
From e2b420ac5392f83c7998d613af6bc4da1b3af596 Mon Sep 17 00:00:00 2001 From b8b378bfe4e9d40d4e9801682147a845590da92e Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com> From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:45:18 +0000 Date: Sat, 13 Apr 2019 05:45:18 +0000
Subject: [PATCH 001/110] LOCAL: arm64: fix Kodi sysinfo CPU information Subject: [PATCH 001/113] LOCAL: arm64: fix Kodi sysinfo CPU information
This allows the CPU information to show in the Kodi sysinfo screen, e.g. This allows the CPU information to show in the Kodi sysinfo screen, e.g.

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@@ -1,7 +1,7 @@
From 65cbc57d995a081c9298f3b8e192435a5141f712 Mon Sep 17 00:00:00 2001 From 9014a9ff589593c21b9550c1f367561fcf14e0cb Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com> From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 16 Jul 2025 11:03:09 +0000 Date: Wed, 16 Jul 2025 11:03:09 +0000
Subject: [PATCH 002/110] LOCAL: arm64: dts: rockchip: rock5b: disable sdio Subject: [PATCH 002/113] LOCAL: arm64: dts: rockchip: rock5b: disable sdio
node node
Radxa ships an M2 compatible WiFi module with PCIe wired RTL8852BE Radxa ships an M2 compatible WiFi module with PCIe wired RTL8852BE

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@@ -1,7 +1,7 @@
From ce0673810ea6c224a5ea5afafd3b6c3f24011bb5 Mon Sep 17 00:00:00 2001 From 7208a81ed270156cca1df8ed6e7c4d5c2510d070 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com> From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 16 Jul 2025 05:09:07 +0000 Date: Wed, 16 Jul 2025 05:09:07 +0000
Subject: [PATCH 003/110] LOCAL: drm/rockchip: vop2: rk3588: change Subject: [PATCH 003/113] LOCAL: drm/rockchip: vop2: rk3588: change
Esmart/Cluster ordering Esmart/Cluster ordering
Order Esmart planes before Cluster planes so Kodi (which currently Order Esmart planes before Cluster planes so Kodi (which currently

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@@ -0,0 +1,95 @@
From 6c92a6c587ea30abd4eeab4e787ec537ce7f4279 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 17 Sep 2025 11:17:20 +0000
Subject: [PATCH 004/113] LOCAL: drm/rockchip: vop2: rk3568: change
Esmart/Cluster/Smart ordering
Order Esmart planes before Cluster planes and Smart planes so Kodi
(which currently lacks the ability to dymanically order planes using
zpos) can show the OSD on-top of Video rather then behind.
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 58 ++++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 42a4833a90a3..e11df91b90a6 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -594,35 +594,6 @@ static const struct vop2_video_port_data rk3568_vop_video_ports[] = {
*/
static const struct vop2_win_data rk3568_vop_win_data[] = {
{
- .name = "Smart0-win0",
- .phys_id = ROCKCHIP_VOP2_SMART0,
- .base = 0x1c00,
- .possible_vp_mask = BIT(0) | BIT(1) | BIT(2),
- .formats = formats_smart,
- .nformats = ARRAY_SIZE(formats_smart),
- .format_modifiers = format_modifiers,
- /* 0xf means this layer can't attached to this VP */
- .layer_sel_id = { 3, 3, 3, 0xf },
- .supported_rotations = DRM_MODE_REFLECT_Y,
- .type = DRM_PLANE_TYPE_PRIMARY,
- .max_upscale_factor = 8,
- .max_downscale_factor = 8,
- .dly = { 20, 47, 41 },
- }, {
- .name = "Smart1-win0",
- .phys_id = ROCKCHIP_VOP2_SMART1,
- .possible_vp_mask = BIT(0) | BIT(1) | BIT(2),
- .formats = formats_smart,
- .nformats = ARRAY_SIZE(formats_smart),
- .format_modifiers = format_modifiers,
- .base = 0x1e00,
- .layer_sel_id = { 7, 7, 7, 0xf },
- .supported_rotations = DRM_MODE_REFLECT_Y,
- .type = DRM_PLANE_TYPE_PRIMARY,
- .max_upscale_factor = 8,
- .max_downscale_factor = 8,
- .dly = { 20, 47, 41 },
- }, {
.name = "Esmart1-win0",
.phys_id = ROCKCHIP_VOP2_ESMART1,
.possible_vp_mask = BIT(0) | BIT(1) | BIT(2),
@@ -682,6 +653,35 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.max_downscale_factor = 4,
.dly = { 0, 27, 21 },
.feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER,
+ }, {
+ .name = "Smart0-win0",
+ .phys_id = ROCKCHIP_VOP2_SMART0,
+ .base = 0x1c00,
+ .possible_vp_mask = BIT(0) | BIT(1) | BIT(2),
+ .formats = formats_smart,
+ .nformats = ARRAY_SIZE(formats_smart),
+ .format_modifiers = format_modifiers,
+ /* 0xf means this layer can't attached to this VP */
+ .layer_sel_id = { 3, 3, 3, 0xf },
+ .supported_rotations = DRM_MODE_REFLECT_Y,
+ .type = DRM_PLANE_TYPE_PRIMARY,
+ .max_upscale_factor = 8,
+ .max_downscale_factor = 8,
+ .dly = { 20, 47, 41 },
+ }, {
+ .name = "Smart1-win0",
+ .phys_id = ROCKCHIP_VOP2_SMART1,
+ .possible_vp_mask = BIT(0) | BIT(1) | BIT(2),
+ .formats = formats_smart,
+ .nformats = ARRAY_SIZE(formats_smart),
+ .format_modifiers = format_modifiers,
+ .base = 0x1e00,
+ .layer_sel_id = { 7, 7, 7, 0xf },
+ .supported_rotations = DRM_MODE_REFLECT_Y,
+ .type = DRM_PLANE_TYPE_PRIMARY,
+ .max_upscale_factor = 8,
+ .max_downscale_factor = 8,
+ .dly = { 20, 47, 41 },
},
};
--
2.34.1

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@@ -1,7 +1,7 @@
From d2b936034b54c68dad7ea5a992516f00fcf25872 Mon Sep 17 00:00:00 2001 From b5292c1fca4b9523d224ac947261173f73136fd4 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Thu, 24 Jul 2025 14:10:18 -0400 Date: Thu, 24 Jul 2025 14:10:18 -0400
Subject: [PATCH 004/110] FROMGIT(6.18): media: uapi: HEVC: Add Subject: [PATCH 005/113] FROMGIT(6.18): media: uapi: HEVC: Add
v4l2_ctrl_hevc_ext_sps_[ls]t_rps controls v4l2_ctrl_hevc_ext_sps_[ls]t_rps controls
Some hardware (e.g.: Rockchip's rk3588 hevc decoder) need the Some hardware (e.g.: Rockchip's rk3588 hevc decoder) need the

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@@ -1,7 +1,7 @@
From 05f5cd65c1561cc55cf6ec54023f88466d286028 Mon Sep 17 00:00:00 2001 From 081a347e0bd349cd7c1cfcec1b0610e86f5f128c Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Thu, 24 Jul 2025 14:10:19 -0400 Date: Thu, 24 Jul 2025 14:10:19 -0400
Subject: [PATCH 005/110] FROMGIT(6.18): media: v4l2-ctrls: Add Subject: [PATCH 006/113] FROMGIT(6.18): media: v4l2-ctrls: Add
hevc_ext_sps_[ls]t_rps controls hevc_ext_sps_[ls]t_rps controls
The vdpu381 decoder found on newer Rockchip SoC need the information The vdpu381 decoder found on newer Rockchip SoC need the information

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@@ -1,7 +1,7 @@
From bc692341b1da628b580b01a9fd5ae59bf6d1da22 Mon Sep 17 00:00:00 2001 From a8c11ce34a3526c1f1bd528e700ac4ffab28a821 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Mon, 23 Jun 2025 12:07:17 -0400 Date: Mon, 23 Jun 2025 12:07:17 -0400
Subject: [PATCH 006/110] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu381 Subject: [PATCH 007/113] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu381
Video Decoders on RK3588 Video Decoders on RK3588
Add the vdpu381 Video Decoders to the rk3588-base devicetree. Add the vdpu381 Video Decoders to the rk3588-base devicetree.

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@@ -1,7 +1,7 @@
From d5f7dbd36b24426c2b826f25ebd1016ecc7ce066 Mon Sep 17 00:00:00 2001 From 720d2af42c13b1da8e9a3974697e9906d2535b6c Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Mon, 23 Jun 2025 12:07:18 -0400 Date: Mon, 23 Jun 2025 12:07:18 -0400
Subject: [PATCH 007/110] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu383 Subject: [PATCH 008/113] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu383
Video Decoder on rk3576 Video Decoder on rk3576
Add the vdpu383 Video Decoder variant to the RK3576 device tree. Add the vdpu383 Video Decoder variant to the RK3576 device tree.

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@@ -1,7 +1,7 @@
From e6f16c9515b560a3a96d73c1bcf3171adebf690f Mon Sep 17 00:00:00 2001 From bb3b472271a88205c003910c06021164934f8cc0 Mon Sep 17 00:00:00 2001
From: Anton Kirilov <anton.kirilov@arm.com> From: Anton Kirilov <anton.kirilov@arm.com>
Date: Thu, 7 Aug 2025 18:00:11 +0100 Date: Thu, 7 Aug 2025 18:00:11 +0100
Subject: [PATCH 008/110] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI Subject: [PATCH 009/113] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI
audio output for NanoPi R6C/R6S audio output for NanoPi R6C/R6S
Enable HDMI audio output for FriendlyElec NanoPi R6C/R6S boards. Enable HDMI audio output for FriendlyElec NanoPi R6C/R6S boards.

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@@ -1,7 +1,7 @@
From ff036ee4ef16c474a987237522fdfc1beab0d332 Mon Sep 17 00:00:00 2001 From aec7c78207833afedef46bae72f2596bed0c9ba0 Mon Sep 17 00:00:00 2001
From: Anton Kirilov <anton.kirilov@arm.com> From: Anton Kirilov <anton.kirilov@arm.com>
Date: Wed, 27 Aug 2025 15:22:10 +0100 Date: Wed, 27 Aug 2025 15:22:10 +0100
Subject: [PATCH 009/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU Subject: [PATCH 010/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU
on NanoPi R6C/R6S on NanoPi R6C/R6S
Enable the NPU on FriendlyElec NanoPi R6C/R6S boards. Enable the NPU on FriendlyElec NanoPi R6C/R6S boards.

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@@ -1,7 +1,7 @@
From 0a1f97d8603d3ab28fbca990d9fb3b6acab9f70f Mon Sep 17 00:00:00 2001 From 1bfa0435b166d9ab892fe5319b41afa4a34f7644 Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:28 +0200 Date: Mon, 21 Jul 2025 11:17:28 +0200
Subject: [PATCH 010/110] FROMGIT(6.18): accel/rocket: Add registers header Subject: [PATCH 011/113] FROMGIT(6.18): accel/rocket: Add registers header
A XML file was generated with the data from the TRM, and then this A XML file was generated with the data from the TRM, and then this
header was generated from it. header was generated from it.

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@@ -1,7 +1,7 @@
From 07ed07d49bf8fb709a4e06fb98b50325fa38c6b4 Mon Sep 17 00:00:00 2001 From 5d8fb8343951f599a0a4096e667e177452408beb Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:29 +0200 Date: Mon, 21 Jul 2025 11:17:29 +0200
Subject: [PATCH 011/110] FROMGIT(6.18): accel/rocket: Add a new driver for Subject: [PATCH 012/113] FROMGIT(6.18): accel/rocket: Add a new driver for
Rockchip's NPU Rockchip's NPU
This initial version supports the NPU as shipped in the RK3588 SoC and This initial version supports the NPU as shipped in the RK3588 SoC and
@@ -79,7 +79,7 @@ index 000000000000..70f97bccf100
+ +
+* RK3588 +* RK3588
diff --git a/MAINTAINERS b/MAINTAINERS diff --git a/MAINTAINERS b/MAINTAINERS
index f6206963efbf..8e1c8da14af1 100644 index 520fb4e379a3..afddc0e6dba3 100644
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -7497,6 +7497,16 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git @@ -7497,6 +7497,16 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git

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@@ -1,7 +1,7 @@
From 0bd0e1ec74a2e2fcf9bb7b0ba22bc747ad4cbb29 Mon Sep 17 00:00:00 2001 From 813a3301bcdc5ef460031f278923cac4ee2e23af Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:30 +0200 Date: Mon, 21 Jul 2025 11:17:30 +0200
Subject: [PATCH 012/110] FROMGIT(6.18): accel/rocket: Add IOCTL for BO Subject: [PATCH 013/113] FROMGIT(6.18): accel/rocket: Add IOCTL for BO
creation creation
This uses the SHMEM DRM helpers and we map right away to the CPU and NPU This uses the SHMEM DRM helpers and we map right away to the CPU and NPU

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@@ -1,7 +1,7 @@
From e316e0fb36f7c86f2153ab0c41aa352510bb851e Mon Sep 17 00:00:00 2001 From 5dbbb8b2d787514846fa3eae7a6cc71f44cecea2 Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:31 +0200 Date: Mon, 21 Jul 2025 11:17:31 +0200
Subject: [PATCH 013/110] FROMGIT(6.18): accel/rocket: Add job submission IOCTL Subject: [PATCH 014/113] FROMGIT(6.18): accel/rocket: Add job submission IOCTL
Using the DRM GPU scheduler infrastructure, with a scheduler for each Using the DRM GPU scheduler infrastructure, with a scheduler for each
core. core.

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@@ -1,7 +1,7 @@
From 931a81d1237851c708cc491fbec6bb89427e3ece Mon Sep 17 00:00:00 2001 From ac1953e73acf76881f50b99c4ab2fa32a650d9c0 Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:32 +0200 Date: Mon, 21 Jul 2025 11:17:32 +0200
Subject: [PATCH 014/110] FROMGIT(6.18): accel/rocket: Add IOCTLs for Subject: [PATCH 015/113] FROMGIT(6.18): accel/rocket: Add IOCTLs for
synchronizing memory accesses synchronizing memory accesses
The NPU cores have their own access to the memory bus, and this isn't The NPU cores have their own access to the memory bus, and this isn't

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@@ -1,7 +1,7 @@
From fcb2dac8a2a8889747b13efd52bc695c41016593 Mon Sep 17 00:00:00 2001 From 3bfdfe881fc39e2751951854267b45394633879e Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:33 +0200 Date: Mon, 21 Jul 2025 11:17:33 +0200
Subject: [PATCH 015/110] FROMGIT(6.18): dt-bindings: npu: rockchip,rknn: Add Subject: [PATCH 016/113] FROMGIT(6.18): dt-bindings: npu: rockchip,rknn: Add
bindings bindings
Add the bindings for the Neural Processing Unit IP from Rockchip. Add the bindings for the Neural Processing Unit IP from Rockchip.

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@@ -1,7 +1,7 @@
From 51c66e8a09312dfea8ef89237114aba928307fc7 Mon Sep 17 00:00:00 2001 From a76b0fbce71cb154723a0e164f4b435d9ede6f3d Mon Sep 17 00:00:00 2001
From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Date: Mon, 21 Jul 2025 11:17:34 +0200 Date: Mon, 21 Jul 2025 11:17:34 +0200
Subject: [PATCH 016/110] FROMGIT(6.18): arm64: dts: rockchip: add pd_npu label Subject: [PATCH 017/113] FROMGIT(6.18): arm64: dts: rockchip: add pd_npu label
for RK3588 power domains for RK3588 power domains
The NPU of the RK3588 has an external supply. This supply also affects The NPU of the RK3588 has an external supply. This supply also affects

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@@ -1,7 +1,7 @@
From 5bd6f7efb942d73f95ec7d384c6ef6fecdabf226 Mon Sep 17 00:00:00 2001 From 29765f5282144d4dbf1d32de6a68b0c44a46c64a Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:35 +0200 Date: Mon, 21 Jul 2025 11:17:35 +0200
Subject: [PATCH 017/110] FROMGIT(6.18): arm64: dts: rockchip: Add nodes for Subject: [PATCH 018/113] FROMGIT(6.18): arm64: dts: rockchip: Add nodes for
NPU and its MMU to rk3588-base NPU and its MMU to rk3588-base
See Chapter 36 "RKNN" from the RK3588 TRM (Part 1). See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).

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@@ -1,7 +1,7 @@
From 56a5dcf2f424197a29676adcd46cc7ffb826c4a9 Mon Sep 17 00:00:00 2001 From b59b36b24b31976982f01055372b9b522284f4f7 Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso <tomeu@tomeuvizoso.net> From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Date: Mon, 21 Jul 2025 11:17:36 +0200 Date: Mon, 21 Jul 2025 11:17:36 +0200
Subject: [PATCH 018/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU Subject: [PATCH 019/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU
on quartzpro64 on quartzpro64
Enable the nodes added in a previous commit to the rk3588s device tree. Enable the nodes added in a previous commit to the rk3588s device tree.

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@@ -1,7 +1,7 @@
From 24b189f1fb6eb178da2aeccc51dd408ebd1d74f4 Mon Sep 17 00:00:00 2001 From 4c41bac5057293ba1e191069e16299bca6734b64 Mon Sep 17 00:00:00 2001
From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Date: Mon, 21 Jul 2025 09:17:00 +0000 Date: Mon, 21 Jul 2025 09:17:00 +0000
Subject: [PATCH 019/110] FROMGIT(6.18): arm64: dts: rockchip: enable NPU on Subject: [PATCH 020/113] FROMGIT(6.18): arm64: dts: rockchip: enable NPU on
ROCK 5B/5B+/5T ROCK 5B/5B+/5T
The NPU on the ROCK5B uses the same regulator for both the sram-supply The NPU on the ROCK5B uses the same regulator for both the sram-supply

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@@ -1,7 +1,7 @@
From dbc2525099295ec6864e83016d755933fe295146 Mon Sep 17 00:00:00 2001 From c13c281a5bd4e4a8d94d01becc92d784b45c7b47 Mon Sep 17 00:00:00 2001
From: Maud Spierings <maud_spierings@hotmail.com> From: Maud Spierings <maud_spierings@hotmail.com>
Date: Sat, 23 Aug 2025 14:43:51 +0200 Date: Sat, 23 Aug 2025 14:43:51 +0200
Subject: [PATCH 020/110] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI Subject: [PATCH 021/113] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI
receiver on orangepi 5 plus receiver on orangepi 5 plus
MIME-Version: 1.0 MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset=UTF-8

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@@ -1,7 +1,7 @@
From 0d402d84d1e3afb656d6261fa53bf877c14aa996 Mon Sep 17 00:00:00 2001 From e1d82aa3b8bb263ba0203d9c42dc1644402dce45 Mon Sep 17 00:00:00 2001
From: Maud Spierings <maud_spierings@hotmail.com> From: Maud Spierings <maud_spierings@hotmail.com>
Date: Sat, 23 Aug 2025 14:43:52 +0200 Date: Sat, 23 Aug 2025 14:43:52 +0200
Subject: [PATCH 021/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU Subject: [PATCH 022/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU
on the orangepi 5 boards on the orangepi 5 boards
MIME-Version: 1.0 MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset=UTF-8

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@@ -1,7 +1,7 @@
From e57ce0b593e2b92db338700386877451af5ef286 Mon Sep 17 00:00:00 2001 From f6efd29768d6c2376cd56c0b7d88bf3abf8ab621 Mon Sep 17 00:00:00 2001
From: "kylepzak@projectinitiative.io" <kylepzak@projectinitiative.io> From: "kylepzak@projectinitiative.io" <kylepzak@projectinitiative.io>
Date: Tue, 19 Aug 2025 21:30:12 -0500 Date: Tue, 19 Aug 2025 21:30:12 -0500
Subject: [PATCH 022/110] FROMGIT(6.18): arm64: dts: rockchip: rk3588s-rock-5a: Subject: [PATCH 023/113] FROMGIT(6.18): arm64: dts: rockchip: rk3588s-rock-5a:
Add green power LED Add green power LED
The Radxa ROCK 5A board includes a green power LED that is defined in The Radxa ROCK 5A board includes a green power LED that is defined in

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@@ -1,7 +1,7 @@
From 805baf97875dfc3402c2d0921b4b7de1bc1cc851 Mon Sep 17 00:00:00 2001 From d16813b1b07478fd4c7a13015b2a2e655769d3be Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com> From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 18 Aug 2025 19:18:40 +0200 Date: Mon, 18 Aug 2025 19:18:40 +0200
Subject: [PATCH 023/110] FROMGIT(6.18): arm64: dts: rockchip: Enable RK3576 Subject: [PATCH 024/113] FROMGIT(6.18): arm64: dts: rockchip: Enable RK3576
watchdog watchdog
The RK3576 watchdog does not need any board specific resources, so The RK3576 watchdog does not need any board specific resources, so

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@@ -1,7 +1,7 @@
From e0e0e91a7ab46c827517332c71ac7641b232bbc2 Mon Sep 17 00:00:00 2001 From a2c60f67d1b9a2260d0cede6b5d4dd7ac4e6e08a Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 17:52:02 +0100 Date: Sat, 27 Feb 2021 17:52:02 +0100
Subject: [PATCH 024/110] FROMGIT(6.18): arm64: dts: rockchip: add SPDIF audio Subject: [PATCH 025/113] FROMGIT(6.18): arm64: dts: rockchip: add SPDIF audio
to Beelink A1 to Beelink A1
Add the required nodes to enable SPDIF audio output on Add the required nodes to enable SPDIF audio output on

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@@ -1,7 +1,7 @@
From c2025213c46129c162b9c2b86616df5847da5f0e Mon Sep 17 00:00:00 2001 From b936852059e45b5016707026f99e7d8b6ad86450 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 21 Aug 2021 17:04:46 +0200 Date: Sat, 21 Aug 2021 17:04:46 +0200
Subject: [PATCH 025/110] FROMGIT(6.18): arm64: dts: rockchip: add USB3 on Subject: [PATCH 026/113] FROMGIT(6.18): arm64: dts: rockchip: add USB3 on
Beelink A1 Beelink A1
Enable USB3 for the Beelink A1 set-top box. Enable USB3 for the Beelink A1 set-top box.

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@@ -1,7 +1,7 @@
From 669015f790e761358a220dc54709dc390a19b95b Mon Sep 17 00:00:00 2001 From ed0575e542fa52ce31403b3e2523a23dcfe48368 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 18:01:13 +0100 Date: Sat, 27 Feb 2021 18:01:13 +0100
Subject: [PATCH 026/110] FROMGIT(6.18): arm64: dts: rockchip: add IR receiver Subject: [PATCH 027/113] FROMGIT(6.18): arm64: dts: rockchip: add IR receiver
to rk3328-roc to rk3328-roc
Add the ir-receiver and ir pinctrl nodes to enable the IR receiver Add the ir-receiver and ir pinctrl nodes to enable the IR receiver

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@@ -1,7 +1,7 @@
From 7c979b574c428a062ddaec3a916104ce65043c87 Mon Sep 17 00:00:00 2001 From 882c66e959e66d6acc8b93f5e73b077858f61d47 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 2 Sep 2020 19:52:02 +0200 Date: Wed, 2 Sep 2020 19:52:02 +0200
Subject: [PATCH 027/110] FROMGIT(6.18): arm64: dts: rockchip: add GPU Subject: [PATCH 028/113] FROMGIT(6.18): arm64: dts: rockchip: add GPU
powerdomain, opps, and cooling to rk3328 powerdomain, opps, and cooling to rk3328
Add GPU powerdomain, opp-table, and cooling map nodes for the Mali Add GPU powerdomain, opp-table, and cooling map nodes for the Mali

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@@ -1,7 +1,7 @@
From 8ba373036e302c7ef351b851af57e6ff71c4af74 Mon Sep 17 00:00:00 2001 From 4b074bf9d6f76d7a80a54bd80b540bda6b419412 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 2 Sep 2020 19:52:02 +0200 Date: Wed, 2 Sep 2020 19:52:02 +0200
Subject: [PATCH 028/110] FROMGIT(6.18): arm64: dts: rockchip: enable the Mali Subject: [PATCH 029/113] FROMGIT(6.18): arm64: dts: rockchip: enable the Mali
GPU on RK3328 boards GPU on RK3328 boards
Add a gpu node to the rock64 board to enable the Mali GPU and Add a gpu node to the rock64 board to enable the Mali GPU and

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@@ -1,7 +1,7 @@
From c6a6443498cca81191ac1181bd4411aeb146893b Mon Sep 17 00:00:00 2001 From 1ab8f921435f1d6b63981d267582917fd5097e8f Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Tue, 2 Feb 2021 17:22:21 +0200 Date: Tue, 2 Feb 2021 17:22:21 +0200
Subject: [PATCH 029/110] FROMGIT(6.18): ARM: dts: rockchip: add HDMI audio to Subject: [PATCH 030/113] FROMGIT(6.18): ARM: dts: rockchip: add HDMI audio to
rk3288-miqi rk3288-miqi
Add the sound and i2s nodes to enable HDMI audio output on Add the sound and i2s nodes to enable HDMI audio output on

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@@ -1,7 +1,7 @@
From 641e13fef535582ac47437d54878f5e88c52db27 Mon Sep 17 00:00:00 2001 From eeb2a21bb307f837a1461ab04acb83a248bb22c3 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 21:24:15 +0100 Date: Mon, 1 Mar 2021 21:24:15 +0100
Subject: [PATCH 030/110] FROMGIT(6.18): ARM: dts: rockchip: add CEC pinctrl to Subject: [PATCH 031/113] FROMGIT(6.18): ARM: dts: rockchip: add CEC pinctrl to
rk3288-miqi rk3288-miqi
Enable CEC control on the HDMI port for MiQi. Enable CEC control on the HDMI port for MiQi.

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@@ -1,7 +1,7 @@
From da6306572e0fef5ed438d867ea40b767e4533589 Mon Sep 17 00:00:00 2001 From 3c2a1b56da4d4a137c79450977f8f66ede38235a Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se> From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 17 Feb 2019 22:14:38 +0000 Date: Sun, 17 Feb 2019 22:14:38 +0000
Subject: [PATCH 031/110] FROMLIST(v1): mmc: core: set initial signal voltage Subject: [PATCH 032/113] FROMLIST(v1): mmc: core: set initial signal voltage
on power off on power off
Some boards have SD card connectors where the power rail cannot be switched Some boards have SD card connectors where the power rail cannot be switched

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@@ -1,7 +1,7 @@
From 94d53a720aa06fd7fb86ebe87f3dc1fae1ab170e Mon Sep 17 00:00:00 2001 From e46c50bfa09554ebc5646e958789b0288a69be67 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Mon, 25 Aug 2025 17:34:40 +0200 Date: Mon, 25 Aug 2025 17:34:40 +0200
Subject: [PATCH 032/110] FROMLIST(v7): dt-bindings: vendor-prefixes: Add Subject: [PATCH 033/113] FROMLIST(v7): dt-bindings: vendor-prefixes: Add
Verisilicon Verisilicon
Verisilicon Microelectronics is a company based in Shanghai, China, Verisilicon Microelectronics is a company based in Shanghai, China,

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@@ -1,7 +1,7 @@
From b3caf49b53de106f291a65d591c7f2a0738332b0 Mon Sep 17 00:00:00 2001 From dc89a8432a8cc971cd5be8d50bb63688b247683f Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Mon, 25 Aug 2025 17:34:41 +0200 Date: Mon, 25 Aug 2025 17:34:41 +0200
Subject: [PATCH 033/110] FROMLIST(v7): dt-bindings: iommu: verisilicon: Add Subject: [PATCH 034/113] FROMLIST(v7): dt-bindings: iommu: verisilicon: Add
binding for VSI IOMMU binding for VSI IOMMU
Add a device tree binding for the Verisilicon (VSI) IOMMU. Add a device tree binding for the Verisilicon (VSI) IOMMU.

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@@ -1,7 +1,7 @@
From 5edfdf32ae4468577441665eba1cf9dbf76e508a Mon Sep 17 00:00:00 2001 From d4c6a68a8b3959e9b95be0ae460d40c588ae5f56 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Mon, 25 Aug 2025 17:34:42 +0200 Date: Mon, 25 Aug 2025 17:34:42 +0200
Subject: [PATCH 034/110] FROMLIST(v7): iommu: Add verisilicon IOMMU driver Subject: [PATCH 035/113] FROMLIST(v7): iommu: Add verisilicon IOMMU driver
The Verisilicon IOMMU hardware block can be found in combination The Verisilicon IOMMU hardware block can be found in combination
with Verisilicon hardware video codecs (encoders or decoders) on with Verisilicon hardware video codecs (encoders or decoders) on

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@@ -1,7 +1,7 @@
From 2e77e4cfca617998580231db0bfefea68729e3e3 Mon Sep 17 00:00:00 2001 From 442d76f8e5c8200cb8cc0d52f4b4a8ece58e12c7 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Mon, 25 Aug 2025 17:34:43 +0200 Date: Mon, 25 Aug 2025 17:34:43 +0200
Subject: [PATCH 035/110] FROMLIST(v7): media: verisilicon: AV1: Restore IOMMU Subject: [PATCH 036/113] FROMLIST(v7): media: verisilicon: AV1: Restore IOMMU
context before decoding a frame context before decoding a frame
AV1 is a stateless decoder and multiple AV1 bitstreams could be decoded AV1 is a stateless decoder and multiple AV1 bitstreams could be decoded

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@@ -1,7 +1,7 @@
From 673ae7d301fcfa6707a92b3346f96e119d86857e Mon Sep 17 00:00:00 2001 From bf4de699e3ee6a75443c4d31979107a6a677ec42 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Mon, 25 Aug 2025 17:34:44 +0200 Date: Mon, 25 Aug 2025 17:34:44 +0200
Subject: [PATCH 036/110] FROMLIST(v7): arm64: dts: rockchip: Add verisilicon Subject: [PATCH 037/113] FROMLIST(v7): arm64: dts: rockchip: Add verisilicon
IOMMU node on RK3588 IOMMU node on RK3588
Add the device tree node for the Verisilicon IOMMU present Add the device tree node for the Verisilicon IOMMU present

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@@ -1,7 +1,7 @@
From 63d1c224d08d3bccf107a3a3344630a814ac6e8b Mon Sep 17 00:00:00 2001 From 64bebb0ebb38e8fce7814308a1c7591076521566 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Thu, 17 Jul 2025 17:56:18 -0400 Date: Thu, 17 Jul 2025 17:56:18 -0400
Subject: [PATCH 037/110] FROMLIST(v1): drm/bridge: dw-hdmi-qp: Return 0 in Subject: [PATCH 038/113] FROMLIST(v1): drm/bridge: dw-hdmi-qp: Return 0 in
audio prepare when disconnected audio prepare when disconnected
To configure audio registers, the clock of the video port in use must be To configure audio registers, the clock of the video port in use must be

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@@ -1,7 +1,7 @@
From 9a9185a1ad5f0a3ea9d79e915f905ef47b743c84 Mon Sep 17 00:00:00 2001 From 3bdf145d17ea5487a0a0bc39ffdea1b92ea5bea1 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Thu, 26 Jun 2025 08:53:07 -0400 Date: Thu, 26 Jun 2025 08:53:07 -0400
Subject: [PATCH 038/110] FROMLIST(v1): drm/bridge: synopsys: Do not warn about Subject: [PATCH 039/113] FROMLIST(v1): drm/bridge: synopsys: Do not warn about
audio params computation audio params computation
There is no need to warn about non pre-computed values, just change it to There is no need to warn about non pre-computed values, just change it to

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@@ -1,7 +1,7 @@
From bb64767e3c5fb86eac1b2966ac21eccba3ed2ceb Mon Sep 17 00:00:00 2001 From 17eeb58cbeadedfa75674e09e01bd0b44c624c29 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com> From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Thu, 24 Jul 2025 16:31:25 +0200 Date: Thu, 24 Jul 2025 16:31:25 +0200
Subject: [PATCH 039/110] FROMLIST(v1): arm64: dts: rockchip: use MAC TX delay Subject: [PATCH 040/113] FROMLIST(v1): arm64: dts: rockchip: use MAC TX delay
for ROCK 4D for ROCK 4D
According to the Ethernet controller device tree binding "rgmii-id" According to the Ethernet controller device tree binding "rgmii-id"

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From 282e8b359334658c4fcd32c3da67021fde413069 Mon Sep 17 00:00:00 2001 From 12a84f76d413b22140e3e944099dce455eecf9eb Mon Sep 17 00:00:00 2001
From: Hide Hako <opi5plus@bcc.bai.ne.jp> From: Hide Hako <opi5plus@bcc.bai.ne.jp>
Date: Tue, 26 Aug 2025 01:44:00 +0000 Date: Tue, 26 Aug 2025 01:44:00 +0000
Subject: [PATCH 040/110] FROMLIST(v2): arm64: dts: rockchip: Fix sound output Subject: [PATCH 041/113] FROMLIST(v2): arm64: dts: rockchip: Fix sound output
from the audio jack on OrangePI5 Plus from the audio jack on OrangePI5 Plus
Currently, analog sound is not output from the audio jack. Currently, analog sound is not output from the audio jack.

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From b70df618e8c160d014bf5fea0b79024392dbca14 Mon Sep 17 00:00:00 2001 From 337495c081b07056d5de0133f6e3b6670acdf943 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com> From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Wed, 20 Aug 2025 19:40:47 +0200 Date: Wed, 20 Aug 2025 19:40:47 +0200
Subject: [PATCH 041/110] FROMLIST(v2): thermal: rockchip: unify struct Subject: [PATCH 042/113] FROMLIST(v2): thermal: rockchip: unify struct
rockchip_tsadc_chip format rockchip_tsadc_chip format
Unify all chip descriptions to the version without any empty Unify all chip descriptions to the version without any empty

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@@ -1,7 +1,7 @@
From 69a30622c1b1abe35cb257c453dfc9e1e1974fe9 Mon Sep 17 00:00:00 2001 From 54166452c61a7d21d43a50e21c21792d0d385bcf Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com> From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Wed, 20 Aug 2025 19:40:48 +0200 Date: Wed, 20 Aug 2025 19:40:48 +0200
Subject: [PATCH 042/110] FROMLIST(v2): thermal: rockchip: shut up GRF warning Subject: [PATCH 043/113] FROMLIST(v2): thermal: rockchip: shut up GRF warning
Most of the recent Rockchip devices do not have a GRF associated Most of the recent Rockchip devices do not have a GRF associated
with the tsadc IP. Let's avoid printing a warning on those devices. with the tsadc IP. Let's avoid printing a warning on those devices.

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From 2398581c3a37209c66ca731da60bb998b593fccb Mon Sep 17 00:00:00 2001 From 4e175c0b45625bda97e578684b0ddd49d5d8135d Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com> From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Wed, 20 Aug 2025 19:40:49 +0200 Date: Wed, 20 Aug 2025 19:40:49 +0200
Subject: [PATCH 043/110] FROMLIST(v2): dt-bindings: thermal: rockchip: tighten Subject: [PATCH 044/113] FROMLIST(v2): dt-bindings: thermal: rockchip: tighten
grf requirements grf requirements
Instead of having an optional rockchip,grf property, forbid using it on Instead of having an optional rockchip,grf property, forbid using it on

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From 1ebb1a9a4d278a2bfe0be2e531145663bc371347 Mon Sep 17 00:00:00 2001 From f3738d58ce76f1cc1852b4c05f897abaf27ad6a6 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se> From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 5 Sep 2025 16:19:19 +0000 Date: Fri, 5 Sep 2025 16:19:19 +0000
Subject: [PATCH 044/110] FROMLIST(v3): media: rkvdec: Add HEVC backend Subject: [PATCH 045/113] FROMLIST(v3): media: rkvdec: Add HEVC backend
The Rockchip VDEC supports the HEVC codec with the Main and Main10 The Rockchip VDEC supports the HEVC codec with the Main and Main10
Profile up to Level 5.1 High tier: 4096x2304@60 fps. Profile up to Level 5.1 High tier: 4096x2304@60 fps.

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From 2a003c3f8d0becac41d5b213f2876b7cbf38374d Mon Sep 17 00:00:00 2001 From 0f399549d6ad29ca704b040df3876442a5a1e339 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 5 Sep 2025 16:19:20 +0000 Date: Fri, 5 Sep 2025 16:19:20 +0000
Subject: [PATCH 045/110] FROMLIST(v3): media: rkvdec: Add variants support Subject: [PATCH 046/113] FROMLIST(v3): media: rkvdec: Add variants support
Different versions of the Rockchip VDEC IP exists and one way they can Different versions of the Rockchip VDEC IP exists and one way they can
differ is what decoding formats are supported. differ is what decoding formats are supported.

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From 23f2468e1177c45cb0b4e38eb9ee4139895525b1 Mon Sep 17 00:00:00 2001 From a546b39d18dbe347a8fca613e2516b5ab1455bab Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se> From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 10 Aug 2025 21:24:33 +0000 Date: Sun, 10 Aug 2025 21:24:33 +0000
Subject: [PATCH 046/110] FROMLIST(v3): media: rkvdec: Implement capability Subject: [PATCH 047/113] FROMLIST(v3): media: rkvdec: Implement capability
filtering filtering
Add filtering of coded formats and controls depending on a variant Add filtering of coded formats and controls depending on a variant

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From 4a51d808c4b8be543bd68e313c0add85060b9042 Mon Sep 17 00:00:00 2001 From 185058a4eb3e7f94ae94d2cc8aba767abbf9c391 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 10 Aug 2025 21:24:34 +0000 Date: Sun, 10 Aug 2025 21:24:34 +0000
Subject: [PATCH 047/110] FROMLIST(v3): media: rkvdec: Add RK3288 variant Subject: [PATCH 048/113] FROMLIST(v3): media: rkvdec: Add RK3288 variant
Add a RK3288 variant, a version of the Rockchip VDEC IP that only Add a RK3288 variant, a version of the Rockchip VDEC IP that only
support HEVC decoding. support HEVC decoding.

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From e41a90ac22dea18394bf08c84ad06fdf3acc627e Mon Sep 17 00:00:00 2001 From 1331c13da64a5d6d1d1549915bd1095c4049aab4 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 10 Aug 2025 21:24:35 +0000 Date: Sun, 10 Aug 2025 21:24:35 +0000
Subject: [PATCH 048/110] FROMLIST(v3): media: rkvdec: Disable QoS for HEVC and Subject: [PATCH 049/113] FROMLIST(v3): media: rkvdec: Disable QoS for HEVC and
VP9 on RK3328 VP9 on RK3328
The RK3328 VDEC has a HW quirk that require QoS to be disabled when HEVC The RK3328 VDEC has a HW quirk that require QoS to be disabled when HEVC

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From 336f77e4ca577455cb4274381cd9a1afe3a8f52f Mon Sep 17 00:00:00 2001 From ab90388d1569247b46cdec1d98085ebdb387708d Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se> From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 10 Aug 2025 21:24:36 +0000 Date: Sun, 10 Aug 2025 21:24:36 +0000
Subject: [PATCH 049/110] FROMLIST(v3): media: dt-bindings: rockchip,vdec: Add Subject: [PATCH 050/113] FROMLIST(v3): media: dt-bindings: rockchip,vdec: Add
RK3288 compatible RK3288 compatible
Add a RK3288 compatible for a version of the Rockchip VDEC IP that only Add a RK3288 compatible for a version of the Rockchip VDEC IP that only

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From b0b5ea016e22fed212d60efac498ea0fe1f32513 Mon Sep 17 00:00:00 2001 From e328a077d1580493ccb50d1ddbc4bba453faeed3 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com> From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 10 Aug 2025 21:24:37 +0000 Date: Sun, 10 Aug 2025 21:24:37 +0000
Subject: [PATCH 050/110] FROMLIST(v3): ARM: dts: rockchip: Add vdec node for Subject: [PATCH 051/113] FROMLIST(v3): ARM: dts: rockchip: Add vdec node for
RK3288 RK3288
RK3288 contains a Rockchip VDEC block that only support HEVC RK3288 contains a Rockchip VDEC block that only support HEVC

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From 348914c07b7cf6c1e363448bfd6d9d7f0b777a00 Mon Sep 17 00:00:00 2001 From 2821e9a052529c84f737797f364d8d9971234119 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:50:59 +0300 Date: Wed, 3 Sep 2025 21:50:59 +0300
Subject: [PATCH 051/110] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Add CEC support Subject: [PATCH 052/113] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Add CEC support
Add support for the CEC interface of the Synopsys DesignWare HDMI QP TX Add support for the CEC interface of the Synopsys DesignWare HDMI QP TX
controller. controller.

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From 767ba6b92dd6b409208540b8fe2e57361b20afb6 Mon Sep 17 00:00:00 2001 From 035eda4e926172e50df888a1428a8efc78f0b368 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:51:00 +0300 Date: Wed, 3 Sep 2025 21:51:00 +0300
Subject: [PATCH 052/110] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Fixup timer Subject: [PATCH 053/113] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Fixup timer
base setup base setup
Currently the TIMER_BASE_CONFIG0 register gets initialized to a fixed Currently the TIMER_BASE_CONFIG0 register gets initialized to a fixed

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@@ -1,7 +1,7 @@
From faaadd0ab0b18ee8d6b4c947557afb1945d49567 Mon Sep 17 00:00:00 2001 From 8f2aaea3a01a5aec1e345b52e8cc42cc853a3560 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:51:01 +0300 Date: Wed, 3 Sep 2025 21:51:01 +0300
Subject: [PATCH 053/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Improve error Subject: [PATCH 054/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Improve error
handling with dev_err_probe() handling with dev_err_probe()
The error handling in dw_hdmi_qp_rockchip_bind() is quite inconsistent, The error handling in dw_hdmi_qp_rockchip_bind() is quite inconsistent,

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@@ -1,7 +1,7 @@
From 37289508c78629d0c52eb70ce608a86abef4bd61 Mon Sep 17 00:00:00 2001 From 85d81d57e6a24ee6f91dde81ac6fed6746e9c1ad Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:51:02 +0300 Date: Wed, 3 Sep 2025 21:51:02 +0300
Subject: [PATCH 054/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide CEC Subject: [PATCH 055/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide CEC
IRQ in dw_hdmi_qp_plat_data IRQ in dw_hdmi_qp_plat_data
In order to support the CEC interface of the DesignWare HDMI QP IP In order to support the CEC interface of the DesignWare HDMI QP IP

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@@ -1,7 +1,7 @@
From afc0d2ce443fae831951445c9f819331815738a1 Mon Sep 17 00:00:00 2001 From f0da02912d3614742821528f3fa88b37ff01235b Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:51:03 +0300 Date: Wed, 3 Sep 2025 21:51:03 +0300
Subject: [PATCH 055/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide ref Subject: [PATCH 056/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide ref
clock rate in dw_hdmi_qp_plat_data clock rate in dw_hdmi_qp_plat_data
In order to support correct initialization of the timer base in the HDMI In order to support correct initialization of the timer base in the HDMI

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@@ -1,7 +1,7 @@
From d61b410f5cdc63be3ef904c54b48c214f4cc5459 Mon Sep 17 00:00:00 2001 From 8cb52b039896d9bba10c353cc8710301956024ac Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 3 Sep 2025 21:51:04 +0300 Date: Wed, 3 Sep 2025 21:51:04 +0300
Subject: [PATCH 056/110] FROMLIST(v4): arm64: defconfig: Enable DW HDMI QP CEC Subject: [PATCH 057/113] FROMLIST(v4): arm64: defconfig: Enable DW HDMI QP CEC
support support
Enable support for the CEC interface of the Synopsys DesignWare HDMI QP Enable support for the CEC interface of the Synopsys DesignWare HDMI QP

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@@ -1,7 +1,7 @@
From 651996954ce004107887b35583cd9c8c3ea30ad2 Mon Sep 17 00:00:00 2001 From e929fb875b5f8e89b18ef46936f60004ea69b2bf Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 25 Aug 2025 13:08:32 +0300 Date: Mon, 25 Aug 2025 13:08:32 +0300
Subject: [PATCH 057/110] FROMLIST(v2): drm/rockchip: vop2: Check bpc before Subject: [PATCH 058/113] FROMLIST(v2): drm/rockchip: vop2: Check bpc before
switching DCLK source switching DCLK source
When making use of the HDMI PHY PLL as a VOP2 DCLK source, it's output When making use of the HDMI PHY PLL as a VOP2 DCLK source, it's output

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@@ -1,7 +1,7 @@
From 597c148465e094c25109a997eff1ee17de63d3ef Mon Sep 17 00:00:00 2001 From 59f83b7f89768445c82a4785eac9807160fbec26 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 25 Aug 2025 13:08:33 +0300 Date: Mon, 25 Aug 2025 13:08:33 +0300
Subject: [PATCH 058/110] FROMLIST(v2): drm/bridge: dw-hdmi-qp: Handle platform Subject: [PATCH 059/113] FROMLIST(v2): drm/bridge: dw-hdmi-qp: Handle platform
supported formats and color depth supported formats and color depth
Extend struct dw_hdmi_qp_plat_data to include the supported display Extend struct dw_hdmi_qp_plat_data to include the supported display

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@@ -1,7 +1,7 @@
From 8dc2d1bbfacaa9848a62acd3c1efea6d2e97c8da Mon Sep 17 00:00:00 2001 From 671efd7753fe87c1cc6be0bab8a2cfaca26e7ed8 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 25 Aug 2025 13:08:34 +0300 Date: Mon, 25 Aug 2025 13:08:34 +0300
Subject: [PATCH 059/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Switch to Subject: [PATCH 060/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Switch to
phy_configure() phy_configure()
Stop relying on phy_set_bus_width() based workaround to setup the TMDS Stop relying on phy_set_bus_width() based workaround to setup the TMDS

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@@ -1,7 +1,7 @@
From 188311fd217fa841ed39d90faf1df996e9a2736a Mon Sep 17 00:00:00 2001 From e1838fe1d781997c5bdc1254089e28d880930922 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 25 Aug 2025 13:08:35 +0300 Date: Mon, 25 Aug 2025 13:08:35 +0300
Subject: [PATCH 060/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Use bit Subject: [PATCH 061/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Use bit
macros for RK3576 regs macros for RK3576 regs
For consistency and improved readability, redefine a few RK3576 specific For consistency and improved readability, redefine a few RK3576 specific

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@@ -1,7 +1,7 @@
From 2ec72fe626cc0884acd12846eebb9d45223af3e4 Mon Sep 17 00:00:00 2001 From fd66808419f9d3e093a71d73814ec1472e740ede Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 25 Aug 2025 13:08:36 +0300 Date: Mon, 25 Aug 2025 13:08:36 +0300
Subject: [PATCH 061/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Add high Subject: [PATCH 062/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Add high
color depth support color depth support
Since both RK3576 and RK3588 SoCs are capable of handling 10 bpc color Since both RK3576 and RK3588 SoCs are capable of handling 10 bpc color

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@@ -1,7 +1,7 @@
From 96cd4543bdacaa418a90fe1562b6173e6c8010cb Mon Sep 17 00:00:00 2001 From fd50358b5d74c9db6223463c474e319dd773a715 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com> From: Andy Yan <andy.yan@rock-chips.com>
Date: Fri, 18 Jul 2025 14:41:13 +0800 Date: Fri, 18 Jul 2025 14:41:13 +0800
Subject: [PATCH 062/110] FROMLIST(v1): drm/rockchip: vop2: Add delay between Subject: [PATCH 063/113] FROMLIST(v1): drm/rockchip: vop2: Add delay between
poll registers poll registers
According to the implementation of read_poll_timeout_atomic, if the According to the implementation of read_poll_timeout_atomic, if the
@@ -17,7 +17,7 @@ Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
1 file changed, 2 insertions(+), 2 deletions(-) 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 42a4833a90a3..bf771b2f2188 100644 index e11df91b90a6..928aff657d8c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2066,7 +2066,7 @@ static void rk3568_vop2_wait_for_port_mux_done(struct vop2 *vop2) @@ -2066,7 +2066,7 @@ static void rk3568_vop2_wait_for_port_mux_done(struct vop2 *vop2)

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@@ -1,7 +1,7 @@
From 436116cd76f704a2578c0f06bf8dc648639e8948 Mon Sep 17 00:00:00 2001 From a28c0ccd253ccfe71781c4874be2f82cfb5e1494 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com> From: Andy Yan <andy.yan@rock-chips.com>
Date: Fri, 18 Jul 2025 14:41:14 +0800 Date: Fri, 18 Jul 2025 14:41:14 +0800
Subject: [PATCH 063/110] FROMLIST(v1): drm/rockchip: vop2: Only wait for Subject: [PATCH 064/113] FROMLIST(v1): drm/rockchip: vop2: Only wait for
changed layer cfg done when there is pending cfgdone bits changed layer cfg done when there is pending cfgdone bits
The write of cfgdone bits always done at .atomic_flush. The write of cfgdone bits always done at .atomic_flush.
@@ -17,7 +17,7 @@ Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
1 file changed, 11 insertions(+), 2 deletions(-) 1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index bf771b2f2188..5a3d8c834ca9 100644 index 928aff657d8c..f18ddf3240ab 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2106,6 +2106,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp) @@ -2106,6 +2106,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)

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@@ -1,7 +1,7 @@
From 06085c0d6f3ade9ac6d6fe657c52090367113810 Mon Sep 17 00:00:00 2001 From 727dece5ed15a37ea74babe4c862a191316ed005 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Tue, 24 Jun 2025 14:29:38 +0200 Date: Tue, 24 Jun 2025 14:29:38 +0200
Subject: [PATCH 064/110] FROMLIST(v1): media: verisilicon: Export only needed Subject: [PATCH 065/113] FROMLIST(v1): media: verisilicon: Export only needed
pixels formats. pixels formats.
When enumerating the pixels formats check if the context When enumerating the pixels formats check if the context

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@@ -1,7 +1,7 @@
From d2762b029235ee2eae0e8967032c810a36a2032b Mon Sep 17 00:00:00 2001 From 5b54b1f6ace36d92449924078e99c7948786264e Mon Sep 17 00:00:00 2001
From: Paul Kocialkowski <paulk@sys-base.io> From: Paul Kocialkowski <paulk@sys-base.io>
Date: Thu, 28 Aug 2025 01:49:00 +0000 Date: Thu, 28 Aug 2025 01:49:00 +0000
Subject: [PATCH 065/110] FROMLIST(v2): media: verisilicon: Explicitly disable Subject: [PATCH 066/113] FROMLIST(v2): media: verisilicon: Explicitly disable
selection api ioctls for decoders selection api ioctls for decoders
Call the dedicated v4l2_disable_ioctl helper instead of manually Call the dedicated v4l2_disable_ioctl helper instead of manually

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@@ -1,7 +1,7 @@
From f68dca914c801c29aedaa9ce11e173be7e98d33b Mon Sep 17 00:00:00 2001 From 304f4b351cf11ab58cc6635fbeb350572ff06145 Mon Sep 17 00:00:00 2001
From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Date: Mon, 23 Jun 2025 18:05:29 +0200 Date: Mon, 23 Jun 2025 18:05:29 +0200
Subject: [PATCH 066/110] DETLEV(v3): bitmap: introduce hardware-specific Subject: [PATCH 067/113] DETLEV(v3): bitmap: introduce hardware-specific
bitfield operations bitfield operations
Hardware of various vendors, but very notably Rockchip, often uses Hardware of various vendors, but very notably Rockchip, often uses
@@ -35,7 +35,7 @@ Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
create mode 100644 include/linux/hw_bitfield.h create mode 100644 include/linux/hw_bitfield.h
diff --git a/MAINTAINERS b/MAINTAINERS diff --git a/MAINTAINERS b/MAINTAINERS
index 8e1c8da14af1..7e0eff6c982c 100644 index afddc0e6dba3..f544e6b390c0 100644
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -4276,6 +4276,7 @@ F: include/linux/bits.h @@ -4276,6 +4276,7 @@ F: include/linux/bits.h

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@@ -1,7 +1,7 @@
From 782a01dbdaf289bfdd63b55c67a984956239d362 Mon Sep 17 00:00:00 2001 From 70840b756a7b6da7ba727608c62f8f4acb49c348 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 27 May 2025 11:00:22 -0400 Date: Tue, 27 May 2025 11:00:22 -0400
Subject: [PATCH 067/110] DETLEV(v3): media: rkvdec: Switch to using structs Subject: [PATCH 068/113] DETLEV(v3): media: rkvdec: Switch to using structs
instead of writel instead of writel
In an effort to merge the rkvdec2 driver [1] with this one, switch from In an effort to merge the rkvdec2 driver [1] with this one, switch from

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@@ -1,7 +1,7 @@
From ef5b5f945e283a8f77f60618534dd432a26e7da0 Mon Sep 17 00:00:00 2001 From fd25bb5be59256183a78f714f6d78fee8aadde0a Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 10:34:55 -0400 Date: Tue, 10 Jun 2025 10:34:55 -0400
Subject: [PATCH 068/110] DETLEV(v3): media: rkvdec: Move cabac tables to their Subject: [PATCH 069/113] DETLEV(v3): media: rkvdec: Move cabac tables to their
own source file own source file
This is in preparation to add support for new variants that will use the This is in preparation to add support for new variants that will use the

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@@ -1,7 +1,7 @@
From cd89d3ebe664b274a09fc71641bec93ea23153f7 Mon Sep 17 00:00:00 2001 From f92e4fef12f5d0b74f35a2dcfb41cee998bd0596 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Wed, 11 Jun 2025 12:28:56 -0400 Date: Wed, 11 Jun 2025 12:28:56 -0400
Subject: [PATCH 069/110] DETLEV(v3): media: rkvdec: Use structs to represent Subject: [PATCH 070/113] DETLEV(v3): media: rkvdec: Use structs to represent
the HW RPS the HW RPS
This is in preparation to add support for other variants of the decoder. This is in preparation to add support for other variants of the decoder.

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@@ -1,7 +1,7 @@
From 69ee828d2be233b68c79c4f508d6301c5c6b46d2 Mon Sep 17 00:00:00 2001 From 2905f7b94e83ab3fa86b4b4994301d426a2f61f9 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 13:16:24 -0400 Date: Tue, 10 Jun 2025 13:16:24 -0400
Subject: [PATCH 070/110] DETLEV(v3): media: rkvdec: Move h264 functions to Subject: [PATCH 071/113] DETLEV(v3): media: rkvdec: Move h264 functions to
common file common file
This is a preparation commit to add support for new variants of the This is a preparation commit to add support for new variants of the

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@@ -1,7 +1,7 @@
From 64bf8c3a0864e3965fd98cac14c2ef78a378487e Mon Sep 17 00:00:00 2001 From f2fe86de819775aab379dbdffdcfa49bff5b1e8d Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Fri, 15 Aug 2025 17:24:37 -0400 Date: Fri, 15 Aug 2025 17:24:37 -0400
Subject: [PATCH 071/110] DETLEV(v3): media: rkvdec: Move hevc functions to Subject: [PATCH 072/113] DETLEV(v3): media: rkvdec: Move hevc functions to
common file common file
This is a preparation commit to add support for new variants of the This is a preparation commit to add support for new variants of the

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@@ -1,7 +1,7 @@
From 5c670dd3e98cf211977ad8250374c3b930c74f69 Mon Sep 17 00:00:00 2001 From b6bcd43f4184b6e127c48c88f4810a444fb6a3cf Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 14:05:08 -0400 Date: Tue, 10 Jun 2025 14:05:08 -0400
Subject: [PATCH 072/110] DETLEV(v3): media: rkvdec: Add per variant Subject: [PATCH 073/113] DETLEV(v3): media: rkvdec: Add per variant
configuration configuration
This is to prepare for adding different variants of the decoder and This is to prepare for adding different variants of the decoder and

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@@ -1,7 +1,7 @@
From 13c2fee823cc9eeffd89249f0d1514759e29ccfe Mon Sep 17 00:00:00 2001 From 7fe9eeaee3d92649de595694906140e40786451e Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 14:53:27 -0400 Date: Tue, 10 Jun 2025 14:53:27 -0400
Subject: [PATCH 073/110] DETLEV(v3): media: rkvdec: Add RCB and SRAM support Subject: [PATCH 074/113] DETLEV(v3): media: rkvdec: Add RCB and SRAM support
The RCB (Rows and Cols Buffers) are a set of buffers used by other The RCB (Rows and Cols Buffers) are a set of buffers used by other
variations of the decoder to store temporary data. variations of the decoder to store temporary data.

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@@ -1,7 +1,7 @@
From b603c6be6c6cdbf838d820baf4a882a60608ee7c Mon Sep 17 00:00:00 2001 From 1a2551d968c1a3568f11fe2dedc9d08d6f4272a2 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 15:13:46 -0400 Date: Tue, 10 Jun 2025 15:13:46 -0400
Subject: [PATCH 074/110] DETLEV(v3): media: rkvdec: Support per-variant Subject: [PATCH 075/113] DETLEV(v3): media: rkvdec: Support per-variant
interrupt handler interrupt handler
Preparation commit for supporting different variants with different Preparation commit for supporting different variants with different

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@@ -1,7 +1,7 @@
From 195838dda8a270d7d76a03b7d337f196713cc6d5 Mon Sep 17 00:00:00 2001 From 530bfe6e2e279e18f6a80186382fcb5cd89ce337 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Tue, 10 Jun 2025 16:40:09 -0400 Date: Tue, 10 Jun 2025 16:40:09 -0400
Subject: [PATCH 075/110] DETLEV(v3): media: rkvdec: Enable all clocks without Subject: [PATCH 076/113] DETLEV(v3): media: rkvdec: Enable all clocks without
naming them naming them
For other variants, the clock names and number will differ. For other variants, the clock names and number will differ.

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@@ -1,7 +1,7 @@
From af045fc82a6d6ae0bcf8a0539317771a044644d1 Mon Sep 17 00:00:00 2001 From 056194f77cd326c5db064daf90df3720b006f920 Mon Sep 17 00:00:00 2001
From: Detlev Casanova <detlev.casanova@collabora.com> From: Detlev Casanova <detlev.casanova@collabora.com>
Date: Wed, 11 Jun 2025 17:04:28 -0400 Date: Wed, 11 Jun 2025 17:04:28 -0400
Subject: [PATCH 078/110] DETLEV(v3): media: rkvdec: Add HEVC support for the Subject: [PATCH 079/113] DETLEV(v3): media: rkvdec: Add HEVC support for the
VDPU383 variant VDPU383 variant
The VDPU383 decoder is used on the RK3576 SoC and has support for HEVC. The VDPU383 decoder is used on the RK3576 SoC and has support for HEVC.

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@@ -1,7 +1,7 @@
From 2836f0010a51847c8f2a42f241d758f699190930 Mon Sep 17 00:00:00 2001 From 41e5fedc7c85557b5530b346db9f90b73658be20 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 28 Jul 2025 22:52:42 +0300 Date: Mon, 28 Jul 2025 22:52:42 +0300
Subject: [PATCH 079/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Fix Subject: [PATCH 080/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Fix
reported clock rate in high bpc mode reported clock rate in high bpc mode
When making use of the clock provider functionality, the output clock When making use of the clock provider functionality, the output clock

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@@ -1,7 +1,7 @@
From 167c040d12d9b3dc16fa4ebf28e68a887b759527 Mon Sep 17 00:00:00 2001 From 05cceaa47b83ac21458e296311c6d024418363ea Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Thu, 5 Jun 2025 20:09:27 +0300 Date: Thu, 5 Jun 2025 20:09:27 +0300
Subject: [PATCH 080/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Reduce Subject: [PATCH 081/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Reduce
ROPLL loop bandwidth ROPLL loop bandwidth
Due to its relatively low frequency, a noise stemming from the 24MHz PLL Due to its relatively low frequency, a noise stemming from the 24MHz PLL

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@@ -1,7 +1,7 @@
From 9c31071f0029afa91b2b377886797e4d6c199c17 Mon Sep 17 00:00:00 2001 From e7c818d4e5eef9dea9a7ec5697438f7cec9ecaec Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Thu, 5 Jun 2025 22:33:29 +0300 Date: Thu, 5 Jun 2025 22:33:29 +0300
Subject: [PATCH 081/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Prevent Subject: [PATCH 082/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Prevent
Inter-Pair Skew from exceeding the limits Inter-Pair Skew from exceeding the limits
Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of

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@@ -1,7 +1,7 @@
From 7c459a4883b48c84f732104b5db49fa06b712bd4 Mon Sep 17 00:00:00 2001 From 92669460ec6eb825092e949ddcdbaa73ba5774c7 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 30 May 2025 00:56:48 +0300 Date: Fri, 30 May 2025 00:56:48 +0300
Subject: [PATCH 082/110] FROMLIST(v4): phy: hdmi: Add HDMI 2.1 FRL Subject: [PATCH 083/113] FROMLIST(v4): phy: hdmi: Add HDMI 2.1 FRL
configuration options configuration options
The HDMI 2.1 specification introduced the Fixed Rate Link (FRL) mode, The HDMI 2.1 specification introduced the Fixed Rate Link (FRL) mode,

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@@ -1,7 +1,7 @@
From fd6314b174f0fccd6854f7147768daced7b1a407 Mon Sep 17 00:00:00 2001 From dc52428feeb98a29d91e3ae652040ccc1f41c29e Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 28 May 2025 13:21:49 +0300 Date: Wed, 28 May 2025 13:21:49 +0300
Subject: [PATCH 083/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Use Subject: [PATCH 084/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Use
usleep_range() instead of udelay() usleep_range() instead of udelay()
rk_hdptx_dp_reset() is allowed to sleep, hence replace the busy waiting rk_hdptx_dp_reset() is allowed to sleep, hence replace the busy waiting

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@@ -1,7 +1,7 @@
From 4a16f714180e2b7a63eda6e4bf0a8a9418f4d081 Mon Sep 17 00:00:00 2001 From ef3ff806713c94874e7d5c0e20de2c6ef4cdedc9 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 28 May 2025 13:35:01 +0300 Date: Wed, 28 May 2025 13:35:01 +0300
Subject: [PATCH 084/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Fix Subject: [PATCH 085/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Fix
coding style alignment coding style alignment
Handle a bunch of reported checkpatch.pl complaints: Handle a bunch of reported checkpatch.pl complaints:

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@@ -1,7 +1,7 @@
From 6dfe0d91db0a5c01afb03ccd6222fb3905083bb6 Mon Sep 17 00:00:00 2001 From adb8f2dd3193eca7a152c06bbc7cbef02fd8ae2a Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 4 Jun 2025 12:03:11 +0300 Date: Wed, 4 Jun 2025 12:03:11 +0300
Subject: [PATCH 085/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Subject: [PATCH 086/113] FROMLIST(v4): phy: rockchip: samsung-hdptx:
Consistently use [rk_]hdptx_[tmds_] prefixes Consistently use [rk_]hdptx_[tmds_] prefixes
Fix the naming inconsistencies for some of the functions and global Fix the naming inconsistencies for some of the functions and global

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@@ -1,7 +1,7 @@
From 502427f80bfe0b3fa3536f6dea7904e84a45e3e9 Mon Sep 17 00:00:00 2001 From 85693440805f264d814dc576ed31d75d3584fcfd Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Wed, 4 Jun 2025 10:25:49 +0300 Date: Wed, 4 Jun 2025 10:25:49 +0300
Subject: [PATCH 086/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Enable Subject: [PATCH 087/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Enable
lane output in common helper lane output in common helper
In preparation to support FRL mode, move the PHY lane output enablement In preparation to support FRL mode, move the PHY lane output enablement

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@@ -1,7 +1,7 @@
From 3c7ebf52a0cb4d6ede81b96553e3e7320c91ed4b Mon Sep 17 00:00:00 2001 From 95ff74ec584df183a1b584f93e45e91419fec0e9 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Thu, 5 Jun 2025 21:31:22 +0300 Date: Thu, 5 Jun 2025 21:31:22 +0300
Subject: [PATCH 087/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Cleanup Subject: [PATCH 088/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Cleanup
*_cmn_init_seq lists *_cmn_init_seq lists
Drop redundant reg_sequence entries from rk_hdptx_common_cmn_init_seq[], Drop redundant reg_sequence entries from rk_hdptx_common_cmn_init_seq[],

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@@ -1,7 +1,7 @@
From 01dae1b307c3e0455e9dc3b0c0ec1259c9f356a4 Mon Sep 17 00:00:00 2001 From 3fee78120b2fe4e55bad621f5adc520fe37e3519 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 6 Jun 2025 18:18:23 +0300 Date: Fri, 6 Jun 2025 18:18:23 +0300
Subject: [PATCH 088/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Compute Subject: [PATCH 089/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Compute
clk rate from PLL config clk rate from PLL config
Improve ->recalc_rate() callback of hdptx_phy_clk_ops to calculate the Improve ->recalc_rate() callback of hdptx_phy_clk_ops to calculate the

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@@ -1,7 +1,7 @@
From 9e6184b5dc7bc77e29d3e0e51f1630dd2e96920e Mon Sep 17 00:00:00 2001 From 809dafc9a1ec60907dd77324a8193fb06c5218b7 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 1 Aug 2025 17:10:15 +0300 Date: Fri, 1 Aug 2025 17:10:15 +0300
Subject: [PATCH 089/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Drop Subject: [PATCH 090/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Drop
hw_rate driver data hw_rate driver data
The ->hw_rate member of struct rk_hdptx_phy was mainly used to keep The ->hw_rate member of struct rk_hdptx_phy was mainly used to keep

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@@ -1,7 +1,7 @@
From 89aae983a503f4dde06d94d17ca403197e743957 Mon Sep 17 00:00:00 2001 From 6b6748ccc444c2128195fda4430846c885c6c5e8 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 7 Jul 2025 23:23:52 +0300 Date: Mon, 7 Jul 2025 23:23:52 +0300
Subject: [PATCH 090/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Switch to Subject: [PATCH 091/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Switch to
driver specific HDMI config driver specific HDMI config
In preparation to support the FRL operation mode which gets configured In preparation to support the FRL operation mode which gets configured

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@@ -1,7 +1,7 @@
From 4a4b1ac4f34a8f7d8002b1945b1e12d519db58d1 Mon Sep 17 00:00:00 2001 From 4f220bddc64a5c8688d0a0d3cd89e45794cd82c2 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Tue, 8 Jul 2025 12:19:37 +0300 Date: Tue, 8 Jul 2025 12:19:37 +0300
Subject: [PATCH 091/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Extend Subject: [PATCH 092/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Extend
rk_hdptx_phy_verify_hdmi_config() helper rk_hdptx_phy_verify_hdmi_config() helper
In order to facilitate introduction of HDMI 2.1 FRL support and to avoid In order to facilitate introduction of HDMI 2.1 FRL support and to avoid

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@@ -1,7 +1,7 @@
From bbf4744749da5b7ba3a5182ccc32ae0f20950e22 Mon Sep 17 00:00:00 2001 From beb48fd61bed98e7b90110e9065ca4de2e68feec Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 30 May 2025 00:58:26 +0300 Date: Fri, 30 May 2025 00:58:26 +0300
Subject: [PATCH 092/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Add HDMI Subject: [PATCH 093/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Add HDMI
2.1 FRL support 2.1 FRL support
The PHY is capable of handling four HDMI 2.1 Fixed Rate Link (FRL) The PHY is capable of handling four HDMI 2.1 Fixed Rate Link (FRL)

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@@ -1,7 +1,7 @@
From 4803a5d929496998d767e787e3c5c8ff3128fd77 Mon Sep 17 00:00:00 2001 From 8dae522a64e50919fd704ded94b3f3a900e47fc3 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Tue, 19 Aug 2025 11:21:35 +0300 Date: Tue, 19 Aug 2025 11:21:35 +0300
Subject: [PATCH 093/110] FROMLIST(v1): drm: Add CRTC background color property Subject: [PATCH 094/113] FROMLIST(v1): drm: Add CRTC background color property
Some display controllers can be hardware programmed to show non-black Some display controllers can be hardware programmed to show non-black
colors for pixels that are either not covered by any plane or are colors for pixels that are either not covered by any plane or are

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@@ -1,7 +1,7 @@
From b24b214903acb48e05f31a9575a56bad09457de0 Mon Sep 17 00:00:00 2001 From 09711bc397f384d8e0c1b400e86b24acd3136dc3 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 15 Aug 2025 18:36:54 +0300 Date: Fri, 15 Aug 2025 18:36:54 +0300
Subject: [PATCH 094/110] FROMLIST(v1): drm/rockchip: vop2: Support setting Subject: [PATCH 095/113] FROMLIST(v1): drm/rockchip: vop2: Support setting
custom background color custom background color
VOP2 allows configuring the background color of each video output port. VOP2 allows configuring the background color of each video output port.

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@@ -1,7 +1,7 @@
From 192f8d276cb81bc3508ccc104a0466c45c7cedd5 Mon Sep 17 00:00:00 2001 From f9b0dceb3122ab09d22300b8e8374466f4f16b84 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 10 Jan 2025 22:48:01 +0200 Date: Fri, 10 Jan 2025 22:48:01 +0200
Subject: [PATCH 095/110] [WIP-SCRAMB] drm/bridge: Add ->detect_ctx() hook Subject: [PATCH 096/113] [WIP-SCRAMB] drm/bridge: Add ->detect_ctx() hook
Add a ->detect() variant that also provides a drm_modeset_acquire_ctx Add a ->detect() variant that also provides a drm_modeset_acquire_ctx
reference for greater flexibility in operation, e.g. to support adding reference for greater flexibility in operation, e.g. to support adding

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@@ -1,7 +1,7 @@
From 7fecf1e0658b22b43f8914169f11b68fdd20cc22 Mon Sep 17 00:00:00 2001 From 8922aec0a2eb1a7e9705199d0154cca92f413f74 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 10 Jan 2025 23:04:23 +0200 Date: Fri, 10 Jan 2025 23:04:23 +0200
Subject: [PATCH 096/110] [WIP-SCRAMB] drm/bridge-connector: Switch from Subject: [PATCH 097/113] [WIP-SCRAMB] drm/bridge-connector: Switch from
->detect() to ->detect_ctx() ->detect() to ->detect_ctx()
In preparation to provide scrambling support to the HDMI Connector In preparation to provide scrambling support to the HDMI Connector

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@@ -1,7 +1,7 @@
From b1b2d3346cc84581f57a77c7f4d28bda6aa88c46 Mon Sep 17 00:00:00 2001 From 202d8dd729e43aaec71e87f1be3067cbb604c996 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Fri, 13 Sep 2024 17:30:35 +0300 Date: Fri, 13 Sep 2024 17:30:35 +0300
Subject: [PATCH 097/110] [WIP-SCRAMB] drm/bridge: dw-hdmi-qp: Add high TMDS Subject: [PATCH 098/113] [WIP-SCRAMB] drm/bridge: dw-hdmi-qp: Add high TMDS
clock ratio and scrambling support clock ratio and scrambling support
Enable use of HDMI 2.0 display modes, e.g. 4K@60Hz, by permitting TMDS Enable use of HDMI 2.0 display modes, e.g. 4K@60Hz, by permitting TMDS

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