mirror of
https://github.com/LibreELEC/LibreELEC.tv
synced 2025-09-24 19:46:01 +07:00
47 lines
1.9 KiB
Diff
47 lines
1.9 KiB
Diff
From 05cceaa47b83ac21458e296311c6d024418363ea Mon Sep 17 00:00:00 2001
|
|
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
|
|
Date: Thu, 5 Jun 2025 20:09:27 +0300
|
|
Subject: [PATCH 081/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Reduce
|
|
ROPLL loop bandwidth
|
|
|
|
Due to its relatively low frequency, a noise stemming from the 24MHz PLL
|
|
reference clock may traverse the low-pass loop filter of ROPLL, which
|
|
could potentially generate some HDMI flash artifacts.
|
|
|
|
Reduce ROPLL loop bandwidth in an attempt to mitigate the problem.
|
|
|
|
Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
|
|
Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
|
|
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
|
|
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
|
|
---
|
|
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
|
|
index 8adf6e84fc0b..9751f7ad00f4 100644
|
|
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
|
|
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
|
|
@@ -500,9 +500,7 @@ static const struct reg_sequence rk_hdtpx_common_cmn_init_seq[] = {
|
|
REG_SEQ0(CMN_REG(0043), 0x00),
|
|
REG_SEQ0(CMN_REG(0044), 0x46),
|
|
REG_SEQ0(CMN_REG(0045), 0x24),
|
|
- REG_SEQ0(CMN_REG(0046), 0xff),
|
|
REG_SEQ0(CMN_REG(0047), 0x00),
|
|
- REG_SEQ0(CMN_REG(0048), 0x44),
|
|
REG_SEQ0(CMN_REG(0049), 0xfa),
|
|
REG_SEQ0(CMN_REG(004a), 0x08),
|
|
REG_SEQ0(CMN_REG(004b), 0x00),
|
|
@@ -575,6 +573,8 @@ static const struct reg_sequence rk_hdtpx_tmds_cmn_init_seq[] = {
|
|
REG_SEQ0(CMN_REG(0034), 0x00),
|
|
REG_SEQ0(CMN_REG(003d), 0x40),
|
|
REG_SEQ0(CMN_REG(0042), 0x78),
|
|
+ REG_SEQ0(CMN_REG(0046), 0xdd),
|
|
+ REG_SEQ0(CMN_REG(0048), 0x11),
|
|
REG_SEQ0(CMN_REG(004e), 0x34),
|
|
REG_SEQ0(CMN_REG(005c), 0x25),
|
|
REG_SEQ0(CMN_REG(005e), 0x4f),
|
|
--
|
|
2.34.1
|
|
|