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98 lines
2.5 KiB
Diff
98 lines
2.5 KiB
Diff
From dc89a8432a8cc971cd5be8d50bb63688b247683f Mon Sep 17 00:00:00 2001
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From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
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Date: Mon, 25 Aug 2025 17:34:41 +0200
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Subject: [PATCH 034/113] FROMLIST(v7): dt-bindings: iommu: verisilicon: Add
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binding for VSI IOMMU
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Add a device tree binding for the Verisilicon (VSI) IOMMU.
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This IOMMU sits in front of hardware encoder and decoder
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blocks on SoCs using Verisilicon IP, such as the Rockchip RK3588.
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Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
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Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
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---
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.../bindings/iommu/verisilicon,iommu.yaml | 71 +++++++++++++++++++
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1 file changed, 71 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
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diff --git a/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
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new file mode 100644
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index 000000000000..d3ce9e603b61
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml
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@@ -0,0 +1,71 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Verisilicon IOMMU
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+
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+maintainers:
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+ - Benjamin Gaignard <benjamin.gaignard@collabora.com>
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+
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+description: |+
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+ A Versilicon iommu translates io virtual addresses to physical addresses for
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+ its associated video decoder.
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+
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+properties:
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+ compatible:
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+ items:
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+ - const: rockchip,rk3588-av1-iommu
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+ - const: verisilicon,iommu-1.2
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+
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+ reg:
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+ maxItems: 1
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+
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+ interrupts:
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+ maxItems: 1
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+
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+ clocks:
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+ items:
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+ - description: Core clock
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+ - description: Interface clock
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+
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+ clock-names:
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+ items:
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+ - const: core
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+ - const: iface
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+
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+ "#iommu-cells":
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+ const: 0
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+
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+ power-domains:
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+ maxItems: 1
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+
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+required:
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+ - compatible
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+ - reg
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+ - interrupts
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+ - clocks
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+ - clock-names
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+ - "#iommu-cells"
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ #include <dt-bindings/clock/rockchip,rk3588-cru.h>
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+ #include <dt-bindings/interrupt-controller/arm-gic.h>
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+
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+ bus {
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+
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+ iommu@fdca0000 {
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+ compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2";
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+ reg = <0x0 0xfdca0000 0x0 0x600>;
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+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
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+ clock-names = "core", "iface";
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+ #iommu-cells = <0>;
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+ };
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+ };
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--
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2.34.1
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