mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
Migrate Radxa Cubie A5E to mainline 6.16 (#8447)
* migrate u-boot and kernel to mainline * Add patches for 6.17 * fix compile for patches addes * Orderer patches, switch kernel config to sunxi64, recreate some patches for fix build * Update linux-sunxi64-edge.config after pm-domain & sun55i-gmac200 activate * enable wifi and bluetooth * revert linux-sunxi64-edge.config - Revert linux-sunxi64-edge.config - Add modules: CONFIG_IOMMUFD, CONFIG_SUN50I_IOMMU, CONFIG_SUN55I_PCK600. * drop sunxi-dev-6.14 and cleanup involved patches * Update radxa-cubie-a5e.csc make change proposed by igorpecovnik
This commit is contained in:
@@ -0,0 +1,44 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sat, 14 Jun 2025 19:07:52 -0400
|
||||
Subject: Add leds to Radxa Cubie A5E
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 16 ++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 0f58d92a6adc..1c56306dffa1 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -18,10 +18,26 @@ aliases {
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led-0 {
|
||||
+ label = "radxa:green:power";
|
||||
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+
|
||||
+ led-1 {
|
||||
+ label = "radxa:blue:user";
|
||||
+ gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
|
||||
+ linux,default-trigger = "default-on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
ext_osc32k: ext-osc32k-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "ext_osc32k";
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,78 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Fri, 4 Jul 2025 15:17:54 -0400
|
||||
Subject: Add wifi (mmc1) to Radxa Cubie A5E
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 28 ++++++++++
|
||||
1 file changed, 28 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 1c56306dffa1..d9bbfb916090 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -11,10 +11,11 @@ / {
|
||||
model = "Radxa Cubie A5E";
|
||||
compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
+ ethernet2 = &sdio_wifi;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
@@ -41,10 +42,20 @@ ext_osc32k: ext-osc32k-clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "ext_osc32k";
|
||||
};
|
||||
|
||||
+ reg_3v3_wifi: 3v3-wifi {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "3v3-wifi";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
reg_vcc5v: vcc5v {
|
||||
/* board wide 5V supply from the USB-C connector */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-5v";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@@ -94,10 +105,27 @@ &mmc0 {
|
||||
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&mmc1_pins {
|
||||
+ drive-strength = <40>;
|
||||
+};
|
||||
+
|
||||
+&mmc1 {
|
||||
+ bus-width = <4>;
|
||||
+ vmmc-supply = <®_3v3_wifi>;
|
||||
+ non-removable;
|
||||
+ // todo: investigate why clock above 40MHz makes data errors
|
||||
+ max-frequency = <35000000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ sdio_wifi: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
From: Mikhail Kalashnikov <iuncuim@gmail.com>
|
||||
|
||||
The Allwinner A523 SoC features the Mali-G57 MC1 GPU, which belongs
|
||||
to the Mali Valhall (v9) family. There is a power domain specifically
|
||||
for this GPU that needs to be enabled to utilize it.
|
||||
|
||||
To enable in a specific device, we need to enable the gpu node and specify
|
||||
the “mali-supply” regulator additionally in the device tree.
|
||||
|
||||
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 15 +++++++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index dd6fa22f9..d3528d498 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -108,6 +108,21 @@ soc {
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x0 0x40000000>;
|
||||
|
||||
+ gpu: gpu@1800000 {
|
||||
+ compatible = "allwinner,sun55i-a523-mali",
|
||||
+ "arm,mali-valhall-jm";
|
||||
+ reg = <0x1800000 0x10000>;
|
||||
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "job", "mmu", "gpu";
|
||||
+ clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
|
||||
+ clock-names = "core", "bus";
|
||||
+ power-domains = <&pck600 PD_GPU>;
|
||||
+ resets = <&ccu RST_BUS_GPU>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
pio: pinctrl@2000000 {
|
||||
compatible = "allwinner,sun55i-a523-pinctrl";
|
||||
reg = <0x2000000 0x800>;
|
||||
--
|
||||
2.50.0
|
||||
@@ -0,0 +1,57 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The A523 SoC family has two power controllers, one based on the existing
|
||||
PPU, and one newer one based on ARM's PCK-600.
|
||||
|
||||
Add device nodes for both of them.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 18 ++++++++++++++++++
|
||||
1 file changed, 18 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index 6f62201fd739..255e0ef98219 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -7,6 +7,8 @@
|
||||
#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
|
||||
#include <dt-bindings/reset/sun55i-a523-ccu.h>
|
||||
#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
|
||||
+#include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
|
||||
+#include <dt-bindings/power/allwinner,sun55i-a523-pck600.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
@@ -576,6 +578,14 @@ mdio0: mdio {
|
||||
};
|
||||
};
|
||||
|
||||
+ ppu: power-controller@7001400 {
|
||||
+ compatible = "allwinner,sun55i-a523-ppu";
|
||||
+ reg = <0x07001400 0x400>;
|
||||
+ clocks = <&r_ccu CLK_BUS_R_PPU1>;
|
||||
+ resets = <&r_ccu RST_BUS_R_PPU1>;
|
||||
+ #power-domain-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
r_ccu: clock-controller@7010000 {
|
||||
compatible = "allwinner,sun55i-a523-r-ccu";
|
||||
reg = <0x7010000 0x250>;
|
||||
@@ -622,6 +632,14 @@ r_i2c_pins: r-i2c-pins {
|
||||
};
|
||||
};
|
||||
|
||||
+ pck600: power-controller@7060000 {
|
||||
+ compatible = "allwinner,sun55i-a523-pck-600";
|
||||
+ reg = <0x07060000 0x8000>;
|
||||
+ clocks = <&r_ccu CLK_BUS_R_PPU0>;
|
||||
+ resets = <&r_ccu RST_BUS_R_PPU0>;
|
||||
+ #power-domain-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
r_i2c0: i2c@7081400 {
|
||||
compatible = "allwinner,sun55i-a523-i2c",
|
||||
"allwinner,sun8i-v536-i2c",
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,41 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
UART1 is normally used to connect to the Bluetooth side of a Broadcom
|
||||
WiFi+BT combo chip. The connection uses 4 pins.
|
||||
|
||||
Add pinmux nodes for UART1, one for the RX/TX pins, and one for the
|
||||
RTS/CTS pins.
|
||||
|
||||
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 14 ++++++++++++++
|
||||
1 file changed, 14 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index 4839411e51cf..cf0bc39aab04 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -168,6 +168,20 @@ uart0_pb_pins: uart0-pb-pins {
|
||||
allwinner,pinmux = <2>;
|
||||
function = "uart0";
|
||||
};
|
||||
+
|
||||
+ /omit-if-no-ref/
|
||||
+ uart1_pins: uart1-pins {
|
||||
+ pins = "PG6", "PG7";
|
||||
+ function = "uart1";
|
||||
+ allwinner,pinmux = <2>;
|
||||
+ };
|
||||
+
|
||||
+ /omit-if-no-ref/
|
||||
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
|
||||
+ pins = "PG8", "PG9";
|
||||
+ function = "uart1";
|
||||
+ allwinner,pinmux = <2>;
|
||||
+ };
|
||||
};
|
||||
|
||||
ccu: clock-controller@2001000 {
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,164 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sat, 5 Jul 2025 22:27:55 -0400
|
||||
Subject: From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 124 +++++-----
|
||||
1 file changed, 63 insertions(+), 61 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index 720580f9764c..979edfc79816 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -193,72 +193,11 @@ ccu: clock-controller@2001000 {
|
||||
"iosc", "losc-fanout";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
- mmc0: mmc@4020000 {
|
||||
- compatible = "allwinner,sun55i-a523-mmc",
|
||||
- "allwinner,sun20i-d1-mmc";
|
||||
- reg = <0x04020000 0x1000>;
|
||||
- clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
|
||||
- clock-names = "ahb", "mmc";
|
||||
- resets = <&ccu RST_BUS_MMC0>;
|
||||
- reset-names = "ahb";
|
||||
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&mmc0_pins>;
|
||||
- status = "disabled";
|
||||
-
|
||||
- max-frequency = <150000000>;
|
||||
- cap-sd-highspeed;
|
||||
- cap-mmc-highspeed;
|
||||
- cap-sdio-irq;
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
- };
|
||||
-
|
||||
- mmc1: mmc@4021000 {
|
||||
- compatible = "allwinner,sun55i-a523-mmc",
|
||||
- "allwinner,sun20i-d1-mmc";
|
||||
- reg = <0x04021000 0x1000>;
|
||||
- clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
|
||||
- clock-names = "ahb", "mmc";
|
||||
- resets = <&ccu RST_BUS_MMC1>;
|
||||
- reset-names = "ahb";
|
||||
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&mmc1_pins>;
|
||||
- status = "disabled";
|
||||
|
||||
- max-frequency = <150000000>;
|
||||
- cap-sd-highspeed;
|
||||
- cap-mmc-highspeed;
|
||||
- cap-sdio-irq;
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
- };
|
||||
-
|
||||
- mmc2: mmc@4022000 {
|
||||
- compatible = "allwinner,sun55i-a523-mmc",
|
||||
- "allwinner,sun20i-d1-mmc";
|
||||
- reg = <0x04022000 0x1000>;
|
||||
- clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
|
||||
- clock-names = "ahb", "mmc";
|
||||
- resets = <&ccu RST_BUS_MMC2>;
|
||||
- reset-names = "ahb";
|
||||
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&mmc2_pins>;
|
||||
- status = "disabled";
|
||||
-
|
||||
- max-frequency = <150000000>;
|
||||
- cap-sd-highspeed;
|
||||
- cap-mmc-highspeed;
|
||||
- cap-sdio-irq;
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
- };
|
||||
|
||||
wdt: watchdog@2050000 {
|
||||
compatible = "allwinner,sun55i-a523-wdt";
|
||||
reg = <0x2050000 0x20>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -461,10 +400,73 @@ its: msi-controller@3440000 {
|
||||
#msi-cells = <1>;
|
||||
dma-noncoherent;
|
||||
};
|
||||
};
|
||||
|
||||
+ mmc0: mmc@4020000 {
|
||||
+ compatible = "allwinner,sun55i-a523-mmc",
|
||||
+ "allwinner,sun20i-d1-mmc";
|
||||
+ reg = <0x04020000 0x1000>;
|
||||
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
|
||||
+ clock-names = "ahb", "mmc";
|
||||
+ resets = <&ccu RST_BUS_MMC0>;
|
||||
+ reset-names = "ahb";
|
||||
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mmc0_pins>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ max-frequency = <150000000>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ mmc1: mmc@4021000 {
|
||||
+ compatible = "allwinner,sun55i-a523-mmc",
|
||||
+ "allwinner,sun20i-d1-mmc";
|
||||
+ reg = <0x04021000 0x1000>;
|
||||
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
|
||||
+ clock-names = "ahb", "mmc";
|
||||
+ resets = <&ccu RST_BUS_MMC1>;
|
||||
+ reset-names = "ahb";
|
||||
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mmc1_pins>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ max-frequency = <150000000>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ mmc2: mmc@4022000 {
|
||||
+ compatible = "allwinner,sun55i-a523-mmc",
|
||||
+ "allwinner,sun20i-d1-mmc";
|
||||
+ reg = <0x04022000 0x1000>;
|
||||
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
|
||||
+ clock-names = "ahb", "mmc";
|
||||
+ resets = <&ccu RST_BUS_MMC2>;
|
||||
+ reset-names = "ahb";
|
||||
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mmc2_pins>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ max-frequency = <150000000>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
usb_otg: usb@4100000 {
|
||||
compatible = "allwinner,sun55i-a523-musb",
|
||||
"allwinner,sun8i-a33-musb";
|
||||
reg = <0x4100000 0x400>;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,59 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sat, 2 Aug 2025 00:22:05 -0400
|
||||
Subject: Subject: From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 20 +++++-----
|
||||
1 file changed, 10 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index 0136ac625605..7fbba60ec76e 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -141,20 +141,10 @@ pio: pinctrl@2000000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <3>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
|
||||
- rgmii0_pins: rgmii0-pins {
|
||||
- pins = "PH0", "PH1", "PH2", "PH3", "PH4",
|
||||
- "PH5", "PH6", "PH7", "PH9", "PH10",
|
||||
- "PH14", "PH15", "PH16", "PH17", "PH18";
|
||||
- allwinner,pinmux = <5>;
|
||||
- function = "gmac0";
|
||||
- drive-strength = <40>;
|
||||
- bias-disable;
|
||||
- };
|
||||
-
|
||||
mmc0_pins: mmc0-pins {
|
||||
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
|
||||
allwinner,pinmux = <2>;
|
||||
function = "mmc0";
|
||||
drive-strength = <30>;
|
||||
@@ -178,10 +168,20 @@ mmc2_pins: mmc2-pins {
|
||||
function = "mmc2";
|
||||
drive-strength = <30>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
+ rgmii0_pins: rgmii0-pins {
|
||||
+ pins = "PH0", "PH1", "PH2", "PH3", "PH4",
|
||||
+ "PH5", "PH6", "PH7", "PH9", "PH10",
|
||||
+ "PH14", "PH15", "PH16", "PH17", "PH18";
|
||||
+ allwinner,pinmux = <5>;
|
||||
+ function = "gmac0";
|
||||
+ drive-strength = <40>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
uart0_pb_pins: uart0-pb-pins {
|
||||
pins = "PB9", "PB10";
|
||||
allwinner,pinmux = <2>;
|
||||
function = "uart0";
|
||||
};
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The external Ethernet PHY has a reset pin that is connected to the SoC.
|
||||
It is missing from the original submission.
|
||||
|
||||
Add it to complete the description.
|
||||
|
||||
Fixes: acca163f3f51 ("arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 8bc0f2c72a24..c57ecc420aed 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -70,6 +70,9 @@ &mdio0 {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
+ reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <150000>;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,82 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sat, 5 Jul 2025 22:59:14 -0400
|
||||
Subject: From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 26 +++++++++-
|
||||
1 file changed, 24 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 76e41202ecc8..592a50436454 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -11,10 +11,11 @@ / {
|
||||
model = "Radxa Cubie A5E";
|
||||
compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
+ ethernet1 = &gmac1;
|
||||
ethernet2 = &sdio_wifi;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -82,29 +83,50 @@ &ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
phy-mode = "rgmii-id";
|
||||
- phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-handle = <&ext_rgmii0_phy>;
|
||||
phy-supply = <®_cldo3>;
|
||||
|
||||
allwinner,tx-delay-ps = <300>;
|
||||
allwinner,rx-delay-ps = <400>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&gmac1 {
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ phy-handle = <&ext_rgmii1_phy>;
|
||||
+ phy-supply = <®_cldo4>;
|
||||
+
|
||||
+ allwinner,tx-delay-ps = <300>;
|
||||
+ allwinner,rx-delay-ps = <400>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mdio0 {
|
||||
- ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ ext_rgmii0_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <150000>;
|
||||
};
|
||||
};
|
||||
|
||||
+&mdio1 {
|
||||
+ ext_rgmii1_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <150000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
vmmc-supply = <®_cldo3>;
|
||||
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,441 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The OrangePi 4A is a typical Raspberry Pi model B sized development
|
||||
board from Xunlong designed around an Allwinner T527 SoC.
|
||||
|
||||
The board has the following features:
|
||||
- Allwinner T527 SoC
|
||||
- AXP717B + AXP323 PMICs
|
||||
- Up to 4GB LPDDR4 DRAM
|
||||
- micro SD slot
|
||||
- optional eMMC module
|
||||
- M.2 slot for PCIe 2.0 x1
|
||||
- 16 MB SPI-NOR flash
|
||||
- 4x USB 2.0 type-A ports (one can be used in gadget mode)
|
||||
- 1x Gigabit ethernet w/ Motorcomm PHY (through yet to be supported GMAC200)
|
||||
- 3.5mm audio jack via internal audio codec
|
||||
- HDMI 2.0 output
|
||||
- eDP, MIPI CSI (2-lane and 4-lane) and MIPI DSI (4-lane) connectors
|
||||
- USB type-C port purely for power
|
||||
- AP6256 (Broadcom BCM4345) WiFi 5.0 + BT 5.0
|
||||
- unsoldered headers for ADC and an additional USB 2.0 host port
|
||||
- 40-pin GPIO header
|
||||
|
||||
Add a device tree for it, enabling all peripherals currently supported.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
Changes since v1:
|
||||
- Fixed regulator names for bldo3 and bldo4
|
||||
- Dropped labels for aldo1, bldo3, and bldo4, which are not really used
|
||||
- Added voltage constraints to aldo2, based on specifications from
|
||||
schematic
|
||||
- Appended "-usb-0v9" to cpusldo's regulator name
|
||||
- Added comments to explain how axp323 aldo1 and dldo1 are tied together
|
||||
|
||||
arch/arm64/boot/dts/allwinner/Makefile | 1 +
|
||||
.../dts/allwinner/sun55i-t527-orangepi-4a.dts | 383 ++++++++++++++++++
|
||||
2 files changed, 384 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
|
||||
index 773cc02a13d0..780aeba0f3a4 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/Makefile
|
||||
+++ b/arch/arm64/boot/dts/allwinner/Makefile
|
||||
@@ -57,3 +57,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
|
||||
+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-orangepi-4a.dtb
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
new file mode 100644
|
||||
index 000000000000..ff2fd8e71e03
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
@@ -0,0 +1,384 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
|
||||
+/*
|
||||
+ * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "sun55i-a523.dtsi"
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "OrangePi 4A";
|
||||
+ compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ ext_osc32k: ext-osc32k-clk {
|
||||
+ #clock-cells = <0>;
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "ext_osc32k";
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ /* PWM capable pin, but PWM isn't supported yet. */
|
||||
+ led {
|
||||
+ function = LED_FUNCTION_STATUS;
|
||||
+ color = <LED_COLOR_ID_GREEN>;
|
||||
+ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&r_pio 1 1 GPIO_ACTIVE_LOW>; /* PM1 */
|
||||
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ reg_otg_vbus: regulator-otg-vbus {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "otg-vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ gpio = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-pcie-3v3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ reg_usb_vbus: regulator-usb-vbus {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "usb-vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ gpio = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc5v: regulator-vcc5v {
|
||||
+ /* board wide 5V supply from USB type-C port */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ehci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ehci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ vmmc-supply = <®_cldo3>;
|
||||
+ cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
|
||||
+ bus-width = <4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc1 {
|
||||
+ bus-width = <4>;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ non-removable;
|
||||
+ vmmc-supply = <®_dldo1_323>;
|
||||
+ vqmmc-supply = <®_bldo1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ reg = <1>;
|
||||
+ interrupt-parent = <&r_pio>;
|
||||
+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
|
||||
+ interrupt-names = "host-wake";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc2 {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-hw-reset;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ vmmc-supply = <®_cldo3>;
|
||||
+ vqmmc-supply = <®_cldo1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ vcc-pb-supply = <®_cldo3>; /* via VCC-IO */
|
||||
+ vcc-pc-supply = <®_cldo1>;
|
||||
+ vcc-pd-supply = <®_cldo3>;
|
||||
+ vcc-pe-supply = <®_aldo2>;
|
||||
+ vcc-pf-supply = <®_cldo3>; /* VCC-IO for 3.3v; VCC-MCSI for 1.8v */
|
||||
+ vcc-pg-supply = <®_bldo1>;
|
||||
+ vcc-ph-supply = <®_cldo3>; /* via VCC-IO */
|
||||
+ vcc-pi-supply = <®_cldo3>;
|
||||
+ vcc-pj-supply = <®_cldo1>;
|
||||
+ vcc-pk-supply = <®_cldo1>;
|
||||
+};
|
||||
+
|
||||
+&r_i2c0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ axp717: pmic@35 {
|
||||
+ compatible = "x-powers,axp717";
|
||||
+ reg = <0x35>;
|
||||
+ interrupt-controller;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ interrupts-extended = <&nmi_intc 0 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ vin1-supply = <®_vcc5v>;
|
||||
+ vin2-supply = <®_vcc5v>;
|
||||
+ vin3-supply = <®_vcc5v>;
|
||||
+ vin4-supply = <®_vcc5v>;
|
||||
+ aldoin-supply = <®_vcc5v>;
|
||||
+ bldoin-supply = <®_vcc5v>;
|
||||
+ cldoin-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ /* Supplies the "little" cluster (1.4 GHz cores) */
|
||||
+ reg_dcdc1: dcdc1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <1160000>;
|
||||
+ regulator-name = "vdd-cpul";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc2: dcdc2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <920000>;
|
||||
+ regulator-max-microvolt = <920000>;
|
||||
+ regulator-name = "vdd-gpu-sys";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc3: dcdc3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1160000>;
|
||||
+ regulator-max-microvolt = <1160000>;
|
||||
+ regulator-name = "vcc-dram";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc4: dcdc4 {
|
||||
+ /* feeds 3.3V pin on GPIO header */
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vdd-io";
|
||||
+ };
|
||||
+
|
||||
+ aldo1 {
|
||||
+ /* not actually connected */
|
||||
+ regulator-name = "avdd-csi";
|
||||
+ };
|
||||
+
|
||||
+ reg_aldo2: aldo2 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pe";
|
||||
+ };
|
||||
+
|
||||
+ reg_aldo3: aldo3 {
|
||||
+ /* supplies the I2C pins for this PMIC */
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-pl-usb";
|
||||
+ };
|
||||
+
|
||||
+ reg_aldo4: aldo4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pll-dxco-avcc";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo1: bldo1 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pg-wifi";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo2: bldo2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pm-lpddr";
|
||||
+ };
|
||||
+
|
||||
+ bldo3 {
|
||||
+ /* not actually connected */
|
||||
+ regulator-name = "afvcc-csi";
|
||||
+ };
|
||||
+
|
||||
+ bldo4 {
|
||||
+ /* not actually connected */
|
||||
+ regulator-name = "dvdd-csi";
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo1: cldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-cvp-pc-lvds-mcsi-pk-efuse-pcie-edp-1v8";
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo2: cldo2 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc3v3-csi";
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo3: cldo3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-io-mmc-nand-pd-pi-usb";
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo4: cldo4 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-3v3-phy1-lcd";
|
||||
+ };
|
||||
+
|
||||
+ reg_cpusldo: cpusldo {
|
||||
+ /* supplies the management core */
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdd-cpus";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ axp323: pmic@36 {
|
||||
+ compatible = "x-powers,axp323";
|
||||
+ reg = <0x36>;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ interrupt-controller;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vin1-supply = <®_vcc5v>;
|
||||
+ vin2-supply = <®_vcc5v>;
|
||||
+ vin3-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ reg_aldo1_323: aldo1 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-wifi";
|
||||
+ };
|
||||
+
|
||||
+ reg_dldo1_323: dldo1 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-wifi2";
|
||||
+ };
|
||||
+
|
||||
+ /* Supplies the "big" cluster (1.8 GHz cores) */
|
||||
+ reg_dcdc1_323: dcdc1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
+ regulator-name = "vdd-cpub";
|
||||
+ };
|
||||
+
|
||||
+ /* DCDC2 is polyphased with DCDC1 */
|
||||
+
|
||||
+ /* Some RISC-V management core related voltage */
|
||||
+ reg_dcdc3_323: dcdc3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdd-dnr";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&r_pio {
|
||||
+/*
|
||||
+ * Specifying the supply would create a circular dependency.
|
||||
+ *
|
||||
+ * vcc-pl-supply = <®_aldo3>;
|
||||
+ */
|
||||
+ vcc-pm-supply = <®_bldo2>;
|
||||
+};
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_pb_pins>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm4345c5";
|
||||
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
+ clock-names = "lpo";
|
||||
+ vbat-supply = <®_aldo1_323>;
|
||||
+ vddio-supply = <®_bldo1>;
|
||||
+ device-wakeup-gpios = <&r_pio 1 3 GPIO_ACTIVE_HIGH>; /* PM3 */
|
||||
+ host-wakeup-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
|
||||
+ shutdown-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb_otg {
|
||||
+ /*
|
||||
+ * The OTG controller is connected to one of the type-A ports.
|
||||
+ * There is a regulator, controlled by a GPIO, to provide VBUS power
|
||||
+ * to the port, and a VBUSDET GPIO, to detect externally provided
|
||||
+ * power. But without ID or CC pins there is no real way to do a
|
||||
+ * runtime role detection.
|
||||
+ */
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbphy {
|
||||
+ usb0_vbus-supply = <®_otg_vbus>;
|
||||
+ usb0_vbus_det-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
|
||||
+ usb1_vbus-supply = <®_usb_vbus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,30 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
There is a PPU0 reset control bit in the same register as the PPU1
|
||||
reset control. This missing reset control is for the PCK-600 unit
|
||||
in the SoC. Manual tests show that the reset control indeed exists,
|
||||
and if not configured, the system will hang when the PCK-600 registers
|
||||
are accessed.
|
||||
|
||||
Add a reset entry for it at the end of the existing ones.
|
||||
|
||||
Fixes: 8cea339cfb81 ("clk: sunxi-ng: add support for the A523/T527 PRCM CCU")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
|
||||
index b5464d8083c8..70ce0ca0cb7d 100644
|
||||
--- a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
|
||||
+++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
|
||||
@@ -204,6 +204,7 @@ static struct ccu_reset_map sun55i_a523_r_ccu_resets[] = {
|
||||
[RST_BUS_R_IR_RX] = { 0x1cc, BIT(16) },
|
||||
[RST_BUS_R_RTC] = { 0x20c, BIT(16) },
|
||||
[RST_BUS_R_CPUCFG] = { 0x22c, BIT(16) },
|
||||
+ [RST_BUS_R_PPU0] = { 0x1ac, BIT(16) },
|
||||
};
|
||||
|
||||
static const struct sunxi_ccu_desc sun55i_a523_r_ccu_desc = {
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,134 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Allwinner A523 SoC family has a second Ethernet controller, called
|
||||
the GMAC200 in the BSP and T527 datasheet, and referred to as GMAC1 for
|
||||
numbering. This controller, according to BSP sources, is fully
|
||||
compatible with a slightly newer version of the Synopsys DWMAC core.
|
||||
The glue layer around the controller is the same as found around older
|
||||
DWMAC cores on Allwinner SoCs. The only slight difference is that since
|
||||
this is the second controller on the SoC, the register for the clock
|
||||
delay controls is at a different offset. Last, the integration includes
|
||||
a dedicated clock gate for the memory bus and the whole thing is put in
|
||||
a separately controllable power domain.
|
||||
|
||||
Add a compatible string entry for it, and work in the requirements for
|
||||
a second clock and a power domain.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
.../net/allwinner,sun8i-a83t-emac.yaml | 68 ++++++++++++++++++-
|
||||
1 file changed, 66 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
|
||||
index 2ac709a4c472..1058e5af92ba 100644
|
||||
--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
|
||||
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
|
||||
@@ -26,6 +26,9 @@ properties:
|
||||
- allwinner,sun50i-h616-emac0
|
||||
- allwinner,sun55i-a523-gmac0
|
||||
- const: allwinner,sun50i-a64-emac
|
||||
+ - items:
|
||||
+ - const: allwinner,sun55i-a523-gmac200
|
||||
+ - const: snps,dwmac-4.20a
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -37,14 +40,19 @@ properties:
|
||||
const: macirq
|
||||
|
||||
clocks:
|
||||
- maxItems: 1
|
||||
+ minItems: 1
|
||||
+ maxItems: 2
|
||||
|
||||
clock-names:
|
||||
- const: stmmaceth
|
||||
+ minItems: 1
|
||||
+ maxItems: 2
|
||||
|
||||
phy-supply:
|
||||
description: PHY regulator
|
||||
|
||||
+ power-domains:
|
||||
+ maxItems: 1
|
||||
+
|
||||
syscon:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
@@ -75,6 +83,7 @@ allOf:
|
||||
- allwinner,sun8i-h3-emac
|
||||
- allwinner,sun8i-v3s-emac
|
||||
- allwinner,sun50i-a64-emac
|
||||
+ - allwinner,sun55i-a523-gmac200
|
||||
|
||||
then:
|
||||
properties:
|
||||
@@ -191,6 +200,31 @@ allOf:
|
||||
- mdio-parent-bus
|
||||
- mdio@1
|
||||
|
||||
+ - if:
|
||||
+ properties:
|
||||
+ compatible:
|
||||
+ contains:
|
||||
+ const: allwinner,sun55i-a523-gmac200
|
||||
+ then:
|
||||
+ properties:
|
||||
+ clocks:
|
||||
+ minItems: 2
|
||||
+ clock-names:
|
||||
+ items:
|
||||
+ - const: stmmaceth
|
||||
+ - const: mbus
|
||||
+ required:
|
||||
+ - power-domains
|
||||
+ else:
|
||||
+ properties:
|
||||
+ clocks:
|
||||
+ maxItems: 1
|
||||
+ clock-names:
|
||||
+ items:
|
||||
+ - const: stmmaceth
|
||||
+ power-domains: false
|
||||
+
|
||||
+
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
@@ -323,4 +357,34 @@ examples:
|
||||
};
|
||||
};
|
||||
|
||||
+ - |
|
||||
+ ethernet@4510000 {
|
||||
+ compatible = "allwinner,sun55i-a523-gmac200",
|
||||
+ "snps,dwmac-4.20a";
|
||||
+ reg = <0x04510000 0x10000>;
|
||||
+ clocks = <&ccu 117>, <&ccu 79>;
|
||||
+ clock-names = "stmmaceth", "mbus";
|
||||
+ resets = <&ccu 43>;
|
||||
+ reset-names = "stmmaceth";
|
||||
+ interrupts = <0 47 4>;
|
||||
+ interrupt-names = "macirq";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii1_pins>;
|
||||
+ power-domains = <&pck600 4>;
|
||||
+ syscon = <&syscon>;
|
||||
+ phy-handle = <&ext_rgmii_phy_1>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ snps,fixed-burst;
|
||||
+ snps,axi-config = <&gmac1_stmmac_axi_setup>;
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ ext_rgmii_phy_1: ethernet-phy@1 {
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
...
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,76 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The A523 PPU is likely the same kind of hardware seen on previous SoCs.
|
||||
|
||||
The A523 PCK600, as the name suggests, is likely a customized version
|
||||
of ARM's PCK-600 power controller. Comparing the BSP driver against
|
||||
ARM's PPU datasheet shows that the basic registers line up, but
|
||||
Allwinner's hardware has some additional delay controls in the reserved
|
||||
register range. As such it is likely not fully compatible with the
|
||||
standard ARM version.
|
||||
|
||||
Document A523 PPU and PCK600 compatibles.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
.../bindings/power/allwinner,sun20i-d1-ppu.yaml | 2 ++
|
||||
.../power/allwinner,sun55i-a523-pck600.h | 15 +++++++++++++++
|
||||
.../dt-bindings/power/allwinner,sun55i-a523-ppu.h | 12 ++++++++++++
|
||||
3 files changed, 29 insertions(+)
|
||||
create mode 100644 include/dt-bindings/power/allwinner,sun55i-a523-pck600.h
|
||||
create mode 100644 include/dt-bindings/power/allwinner,sun55i-a523-ppu.h
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
|
||||
index f578be6a3bc8..b9f550994512 100644
|
||||
--- a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
|
||||
+++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
|
||||
@@ -18,6 +18,8 @@ properties:
|
||||
enum:
|
||||
- allwinner,sun20i-d1-ppu
|
||||
- allwinner,sun8i-v853-ppu
|
||||
+ - allwinner,sun55i-a523-ppu
|
||||
+ - allwinner,sun55i-a523-pck-600
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
diff --git a/include/dt-bindings/power/allwinner,sun55i-a523-pck600.h b/include/dt-bindings/power/allwinner,sun55i-a523-pck600.h
|
||||
new file mode 100644
|
||||
index 000000000000..6b3d8ea7bb69
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/power/allwinner,sun55i-a523-pck600.h
|
||||
@@ -0,0 +1,15 @@
|
||||
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_
|
||||
+#define _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_
|
||||
+
|
||||
+#define PD_VE 0
|
||||
+#define PD_GPU 1
|
||||
+#define PD_VI 2
|
||||
+#define PD_VO0 3
|
||||
+#define PD_VO1 4
|
||||
+#define PD_DE 5
|
||||
+#define PD_NAND 6
|
||||
+#define PD_PCIE 7
|
||||
+
|
||||
+#endif /* _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_ */
|
||||
diff --git a/include/dt-bindings/power/allwinner,sun55i-a523-ppu.h b/include/dt-bindings/power/allwinner,sun55i-a523-ppu.h
|
||||
new file mode 100644
|
||||
index 000000000000..bc9aba73c19a
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/power/allwinner,sun55i-a523-ppu.h
|
||||
@@ -0,0 +1,12 @@
|
||||
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_
|
||||
+#define _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_
|
||||
+
|
||||
+#define PD_DSP 0
|
||||
+#define PD_NPU 1
|
||||
+#define PD_AUDIO 2
|
||||
+#define PD_SRAM 3
|
||||
+#define PD_RISCV 4
|
||||
+
|
||||
+#endif /* _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_ */
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,29 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
There is a PPU0 reset control bit in the same register as the PPU1
|
||||
reset control. This missing reset control is for the PCK-600 unit
|
||||
in the SoC. Manual tests show that the reset control indeed exists,
|
||||
and if not configured, the system will hang when the PCK-600 registers
|
||||
are accessed.
|
||||
|
||||
Add a reset entry for it at the end of the existing ones.
|
||||
|
||||
Fixes: 52dbf84857f0 ("dt-bindings: clk: sunxi-ng: document two Allwinner A523 CCUs")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
include/dt-bindings/reset/sun55i-a523-r-ccu.h | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/include/dt-bindings/reset/sun55i-a523-r-ccu.h b/include/dt-bindings/reset/sun55i-a523-r-ccu.h
|
||||
index dd6fbb372e19..eb31ae9958d6 100644
|
||||
--- a/include/dt-bindings/reset/sun55i-a523-r-ccu.h
|
||||
+++ b/include/dt-bindings/reset/sun55i-a523-r-ccu.h
|
||||
@@ -21,5 +21,6 @@
|
||||
#define RST_BUS_R_IR_RX 12
|
||||
#define RST_BUS_R_RTC 13
|
||||
#define RST_BUS_R_CPUCFG 14
|
||||
+#define RST_BUS_R_PPU0 15
|
||||
|
||||
#endif /* _DT_BINDINGS_RST_SUN55I_A523_R_CCU_H_ */
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,38 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
On newer boards featuring the A523 SoC, the AXP323 (related to the
|
||||
AXP313) is paired with the AXP717 and serves as a secondary PMIC
|
||||
providing additional regulator outputs. However the mfd cells are all
|
||||
registered with PLATFORM_DEVID_NONE, which causes the regulator cells
|
||||
to conflict with each other.
|
||||
|
||||
Commit e37ec3218870 ("mfd: axp20x: Allow multiple regulators") attempted
|
||||
to fix this by switching to PLATFORM_DEVID_AUTO so that the device names
|
||||
would all be different, however that broke IIO channel mapping, which is
|
||||
also tied to the device names. As a result the change was later reverted.
|
||||
|
||||
Instead, here we attempt to make sure the AXP313/AXP323 regulator cell
|
||||
does not conflict by explicitly giving it an ID number. This was
|
||||
previously done for the AXP809+AXP806 pair used with the A80 SoC.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/mfd/axp20x.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
|
||||
index e9914e8a29a3..25c639b348cd 100644
|
||||
--- a/drivers/mfd/axp20x.c
|
||||
+++ b/drivers/mfd/axp20x.c
|
||||
@@ -1053,7 +1053,8 @@ static const struct mfd_cell axp152_cells[] = {
|
||||
};
|
||||
|
||||
static struct mfd_cell axp313a_cells[] = {
|
||||
- MFD_CELL_NAME("axp20x-regulator"),
|
||||
+ /* AXP323 is sometimes paired with AXP717 as sub-PMIC */
|
||||
+ MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
|
||||
MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
|
||||
};
|
||||
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,49 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Originally an explicit ID for the AXP313/AXP323 regulator was set to
|
||||
avoid a conflict with the primary AXP717 PMIC on Allwinner A523 family
|
||||
boards.
|
||||
|
||||
This didn't entirely work since on some or all of these boards, the
|
||||
interrupt line on this secondary PMIC was left unconnected, and thus
|
||||
the driver would fall back to the generic "no interrupt; only regulators"
|
||||
case, which didn't have the explicit ID set, thus undoing the intended
|
||||
fix.
|
||||
|
||||
Also set an explicit ID for the regulator cell in the no IRQ generic
|
||||
fall back case. This fixes the conflict for the AXP717 + AXP313/AXP323
|
||||
case. For the actual single PMIC with no IRQ connected case, the ID does
|
||||
not affect functionality, only the device naming of the regulator cell,
|
||||
and by extension the name and path under sysfs.
|
||||
|
||||
Fixes: 249abf9b1e25 ("mfd: axp20x: Set explicit ID for AXP313 regulator")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
|
||||
This is an alternative to
|
||||
|
||||
mfd: axp20x: Skip PEK on AXP313A/AXP323 if no interrupt line is available
|
||||
|
||||
which was deemed too fragile.
|
||||
---
|
||||
drivers/mfd/axp20x.c | 5 ++---
|
||||
1 file changed, 2 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
|
||||
index 25c639b348cd..c5f0ebae327f 100644
|
||||
--- a/drivers/mfd/axp20x.c
|
||||
+++ b/drivers/mfd/axp20x.c
|
||||
@@ -1231,9 +1231,8 @@ static const struct mfd_cell axp15060_cells[] = {
|
||||
|
||||
/* For boards that don't have IRQ line connected to SOC. */
|
||||
static const struct mfd_cell axp_regulator_only_cells[] = {
|
||||
- {
|
||||
- .name = "axp20x-regulator",
|
||||
- },
|
||||
+ /* PMIC without IRQ line may be secondary PMIC */
|
||||
+ MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
|
||||
};
|
||||
|
||||
static int axp20x_power_off(struct sys_off_data *data)
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,227 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Allwinner A523 SoC family has a second Ethernet controller, called
|
||||
the GMAC200 in the BSP and T527 datasheet, and referred to as GMAC1 for
|
||||
numbering. This controller, according to BSP sources, is fully
|
||||
compatible with a slightly newer version of the Synopsys DWMAC core.
|
||||
The glue layer around the controller is the same as found around older
|
||||
DWMAC cores on Allwinner SoCs. The only slight difference is that since
|
||||
this is the second controller on the SoC, the register for the clock
|
||||
delay controls is at a different offset. Last, the integration includes
|
||||
a dedicated clock gate for the memory bus and the whole thing is put in
|
||||
a separately controllable power domain.
|
||||
|
||||
Add a new driver for this hardware supporting the integration layer.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++
|
||||
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
|
||||
.../ethernet/stmicro/stmmac/dwmac-sun55i.c | 161 ++++++++++++++++++
|
||||
3 files changed, 174 insertions(+)
|
||||
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
|
||||
|
||||
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
|
||||
index 67fa879b1e52..38ce9a0cfb5b 100644
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
|
||||
@@ -263,6 +263,18 @@ config DWMAC_SUN8I
|
||||
stmmac device driver. This driver is used for H3/A83T/A64
|
||||
EMAC ethernet controller.
|
||||
|
||||
+config DWMAC_SUN55I
|
||||
+ tristate "Allwinner sun55i GMAC200 support"
|
||||
+ default ARCH_SUNXI
|
||||
+ depends on OF && (ARCH_SUNXI || COMPILE_TEST)
|
||||
+ select MDIO_BUS_MUX
|
||||
+ help
|
||||
+ Support for Allwinner A523/T527 GMAC200 ethernet controllers.
|
||||
+
|
||||
+ This selects Allwinner SoC glue layer support for the
|
||||
+ stmmac device driver. This driver is used for A523/T527
|
||||
+ GMAC200 ethernet controller.
|
||||
+
|
||||
config DWMAC_THEAD
|
||||
tristate "T-HEAD dwmac support"
|
||||
depends on OF && (ARCH_THEAD || COMPILE_TEST)
|
||||
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
|
||||
index b591d93f8503..51e068e26ce4 100644
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
|
||||
@@ -31,6 +31,7 @@ obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
|
||||
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
|
||||
obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
|
||||
obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o
|
||||
+obj-$(CONFIG_DWMAC_SUN55I) += dwmac-sun55i.o
|
||||
obj-$(CONFIG_DWMAC_THEAD) += dwmac-thead.o
|
||||
obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
|
||||
obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o
|
||||
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
|
||||
new file mode 100644
|
||||
index 000000000000..7fadb90e3098
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c
|
||||
@@ -0,0 +1,161 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * dwmac-sun55i.c - Allwinner sun55i GMAC200 specific glue layer
|
||||
+ *
|
||||
+ * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
|
||||
+ *
|
||||
+ * syscon parts taken from dwmac-sun8i.c, which is
|
||||
+ *
|
||||
+ * Copyright (C) 2017 Corentin Labbe <clabbe.montjoie@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/bitfield.h>
|
||||
+#include <linux/bits.h>
|
||||
+#include <linux/mfd/syscon.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/regmap.h>
|
||||
+#include <linux/regulator/consumer.h>
|
||||
+#include <linux/stmmac.h>
|
||||
+
|
||||
+#include "stmmac.h"
|
||||
+#include "stmmac_platform.h"
|
||||
+
|
||||
+#define SYSCON_REG 0x34
|
||||
+
|
||||
+/* RMII specific bits */
|
||||
+#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
|
||||
+/* Generic system control EMAC_CLK bits */
|
||||
+#define SYSCON_ETXDC_MASK GENMASK(12, 10)
|
||||
+#define SYSCON_ERXDC_MASK GENMASK(9, 5)
|
||||
+/* EMAC PHY Interface Type */
|
||||
+#define SYSCON_EPIT BIT(2) /* 1: RGMII, 0: MII */
|
||||
+#define SYSCON_ETCS_MASK GENMASK(1, 0)
|
||||
+#define SYSCON_ETCS_MII 0x0
|
||||
+#define SYSCON_ETCS_EXT_GMII 0x1
|
||||
+#define SYSCON_ETCS_INT_GMII 0x2
|
||||
+
|
||||
+#define MASK_TO_VAL(mask) ((mask) >> (__builtin_ffsll(mask) - 1))
|
||||
+
|
||||
+static int sun55i_gmac200_set_syscon(struct device *dev,
|
||||
+ struct plat_stmmacenet_data *plat)
|
||||
+{
|
||||
+ struct device_node *node = dev->of_node;
|
||||
+ struct regmap *regmap;
|
||||
+ u32 val, reg = 0;
|
||||
+
|
||||
+ regmap = syscon_regmap_lookup_by_phandle(node, "syscon");
|
||||
+ if (IS_ERR(regmap))
|
||||
+ return dev_err_probe(dev, PTR_ERR(regmap), "Unable to map syscon\n");
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
|
||||
+ if (val % 100) {
|
||||
+ dev_err(dev, "tx-delay must be a multiple of 100\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ val /= 100;
|
||||
+ dev_dbg(dev, "set tx-delay to %x\n", val);
|
||||
+ if (val > MASK_TO_VAL(SYSCON_ETXDC_MASK))
|
||||
+ return dev_err_probe(dev, -EINVAL,
|
||||
+ "Invalid TX clock delay: %d\n",
|
||||
+ val);
|
||||
+
|
||||
+ reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "allwinner,rx-delay-ps", &val)) {
|
||||
+ if (val % 100) {
|
||||
+ dev_err(dev, "rx-delay must be a multiple of 100\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ val /= 100;
|
||||
+ dev_dbg(dev, "set rx-delay to %x\n", val);
|
||||
+ if (val > MASK_TO_VAL(SYSCON_ERXDC_MASK))
|
||||
+ return dev_err_probe(dev, -EINVAL,
|
||||
+ "Invalid RX clock delay: %d\n",
|
||||
+ val);
|
||||
+
|
||||
+ reg |= FIELD_PREP(SYSCON_ERXDC_MASK, val);
|
||||
+ }
|
||||
+
|
||||
+ switch (plat->mac_interface) {
|
||||
+ case PHY_INTERFACE_MODE_MII:
|
||||
+ /* default */
|
||||
+ break;
|
||||
+ case PHY_INTERFACE_MODE_RGMII:
|
||||
+ case PHY_INTERFACE_MODE_RGMII_ID:
|
||||
+ case PHY_INTERFACE_MODE_RGMII_RXID:
|
||||
+ case PHY_INTERFACE_MODE_RGMII_TXID:
|
||||
+ reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII;
|
||||
+ break;
|
||||
+ case PHY_INTERFACE_MODE_RMII:
|
||||
+ reg |= SYSCON_RMII_EN;
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_err(dev, "Unsupported interface mode: %s",
|
||||
+ phy_modes(plat->mac_interface));
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ regmap_write(regmap, SYSCON_REG, reg);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int sun55i_gmac200_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct plat_stmmacenet_data *plat_dat;
|
||||
+ struct stmmac_resources stmmac_res;
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct clk *clk;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = stmmac_get_platform_resources(pdev, &stmmac_res);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
|
||||
+ if (IS_ERR(plat_dat))
|
||||
+ return PTR_ERR(plat_dat);
|
||||
+
|
||||
+ /* BSP disables it */
|
||||
+ plat_dat->flags |= STMMAC_FLAG_SPH_DISABLE;
|
||||
+ plat_dat->host_dma_width = 32;
|
||||
+
|
||||
+ ret = sun55i_gmac200_set_syscon(dev, plat_dat);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ clk = devm_clk_get_enabled(dev, "mbus");
|
||||
+ if (IS_ERR(clk))
|
||||
+ return dev_err_probe(dev, PTR_ERR(clk),
|
||||
+ "Failed to get or enable MBUS clock\n");
|
||||
+
|
||||
+ ret = devm_regulator_get_enable_optional(dev, "phy");
|
||||
+ if (ret)
|
||||
+ return dev_err_probe(dev, ret, "Failed to get or enable PHY supply\n");
|
||||
+
|
||||
+ return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id sun55i_gmac200_match[] = {
|
||||
+ { .compatible = "allwinner,sun55i-a523-gmac200" },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, sun55i_gmac200_match);
|
||||
+
|
||||
+static struct platform_driver sun55i_gmac200_driver = {
|
||||
+ .probe = sun55i_gmac200_probe,
|
||||
+ .driver = {
|
||||
+ .name = "sun55i-gmac200",
|
||||
+ .pm = &stmmac_pltfr_pm_ops,
|
||||
+ .of_match_table = sun55i_gmac200_match,
|
||||
+ },
|
||||
+};
|
||||
+module_platform_driver(sun55i_gmac200_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
|
||||
+MODULE_DESCRIPTION("Allwinner sun55i GMAC200 specific glue layer");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,278 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Allwinner A523 family has a second power controller, named PCK-600 in
|
||||
the datasheets and BSP. It is likely based on ARM's PCK-600 hardware
|
||||
block, with some additional delay controls. The only documentation for
|
||||
this hardware is the BSP driver. The standard registers defined in ARM's
|
||||
Power Policy Unit Architecture Specification line up. Some extra delay
|
||||
controls are found in the reserved range of registers.
|
||||
|
||||
Add a driver for this power controller. Delay control register values
|
||||
and power domain names are from the BSP driver.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/pmdomain/sunxi/Kconfig | 8 +
|
||||
drivers/pmdomain/sunxi/Makefile | 1 +
|
||||
drivers/pmdomain/sunxi/sun55i-pck600.c | 225 +++++++++++++++++++++++++
|
||||
3 files changed, 234 insertions(+)
|
||||
create mode 100644 drivers/pmdomain/sunxi/sun55i-pck600.c
|
||||
|
||||
diff --git a/drivers/pmdomain/sunxi/Kconfig b/drivers/pmdomain/sunxi/Kconfig
|
||||
index 43eecb3ea981..3e2b77cd9a2b 100644
|
||||
--- a/drivers/pmdomain/sunxi/Kconfig
|
||||
+++ b/drivers/pmdomain/sunxi/Kconfig
|
||||
@@ -18,3 +18,11 @@ config SUN50I_H6_PRCM_PPU
|
||||
Say y to enable the Allwinner H6/H616 PRCM power domain driver.
|
||||
This is required to enable the Mali GPU in the H616 SoC, it is
|
||||
optional for the H6.
|
||||
+
|
||||
+config SUN55I_PCK600
|
||||
+ bool "Allwinner A523 PCK-600 power domain driver"
|
||||
+ depends on PM
|
||||
+ select PM_GENERIC_DOMAINS
|
||||
+ help
|
||||
+ Say y to enable the PCK-600 power domain driver. This saves power
|
||||
+ when certain peripherals, such as the video engine, are idle.
|
||||
diff --git a/drivers/pmdomain/sunxi/Makefile b/drivers/pmdomain/sunxi/Makefile
|
||||
index c1343e123759..e344b232fc9f 100644
|
||||
--- a/drivers/pmdomain/sunxi/Makefile
|
||||
+++ b/drivers/pmdomain/sunxi/Makefile
|
||||
@@ -1,3 +1,4 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
obj-$(CONFIG_SUN20I_PPU) += sun20i-ppu.o
|
||||
obj-$(CONFIG_SUN50I_H6_PRCM_PPU) += sun50i-h6-prcm-ppu.o
|
||||
+obj-$(CONFIG_SUN55I_PCK600) += sun55i-pck600.o
|
||||
diff --git a/drivers/pmdomain/sunxi/sun55i-pck600.c b/drivers/pmdomain/sunxi/sun55i-pck600.c
|
||||
new file mode 100644
|
||||
index 000000000000..7248f6113665
|
||||
--- /dev/null
|
||||
+++ b/drivers/pmdomain/sunxi/sun55i-pck600.c
|
||||
@@ -0,0 +1,225 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * Allwinner PCK-600 power domain support
|
||||
+ *
|
||||
+ * Copyright (c) 2025 Chen-Yu Tsai <wens@csie.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/bitfield.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/container_of.h>
|
||||
+#include <linux/device.h>
|
||||
+#include <linux/dev_printk.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/iopoll.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/pm_domain.h>
|
||||
+#include <linux/reset.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/string_choices.h>
|
||||
+
|
||||
+#define PPU_PWPR 0x0
|
||||
+#define PPU_PWSR 0x8
|
||||
+#define PPU_DCDR0 0x170
|
||||
+#define PPU_DCDR1 0x174
|
||||
+
|
||||
+#define PPU_PWSR_PWR_STATUS GENMASK(3, 0)
|
||||
+#define PPU_POWER_MODE_ON 0x8
|
||||
+#define PPU_POWER_MODE_OFF 0x0
|
||||
+
|
||||
+#define PPU_REG_SIZE 0x1000
|
||||
+
|
||||
+struct sunxi_pck600_desc {
|
||||
+ const char * const *pd_names;
|
||||
+ unsigned int num_domains;
|
||||
+ u32 logic_power_switch0_delay_offset;
|
||||
+ u32 logic_power_switch1_delay_offset;
|
||||
+ u32 off2on_delay_offset;
|
||||
+ u32 device_ctrl0_delay;
|
||||
+ u32 device_ctrl1_delay;
|
||||
+ u32 logic_power_switch0_delay;
|
||||
+ u32 logic_power_switch1_delay;
|
||||
+ u32 off2on_delay;
|
||||
+};
|
||||
+
|
||||
+struct sunxi_pck600_pd {
|
||||
+ struct generic_pm_domain genpd;
|
||||
+ struct sunxi_pck600 *pck;
|
||||
+ void __iomem *base;
|
||||
+};
|
||||
+
|
||||
+struct sunxi_pck600 {
|
||||
+ struct device *dev;
|
||||
+ struct genpd_onecell_data genpd_data;
|
||||
+ struct sunxi_pck600_pd pds[];
|
||||
+};
|
||||
+
|
||||
+#define to_sunxi_pd(gpd) container_of(gpd, struct sunxi_pck600_pd, genpd)
|
||||
+
|
||||
+static int sunxi_pck600_pd_set_power(struct sunxi_pck600_pd *pd, bool on)
|
||||
+{
|
||||
+ struct sunxi_pck600 *pck = pd->pck;
|
||||
+ struct generic_pm_domain *genpd = &pd->genpd;
|
||||
+ int ret;
|
||||
+ u32 val, reg;
|
||||
+
|
||||
+ val = on ? PPU_POWER_MODE_ON : PPU_POWER_MODE_OFF;
|
||||
+
|
||||
+ reg = readl(pd->base + PPU_PWPR);
|
||||
+ FIELD_MODIFY(PPU_PWSR_PWR_STATUS, ®, val);
|
||||
+ writel(reg, pd->base + PPU_PWPR);
|
||||
+
|
||||
+ /* push write out to hardware */
|
||||
+ reg = readl(pd->base + PPU_PWPR);
|
||||
+
|
||||
+ ret = readl_poll_timeout_atomic(pd->base + PPU_PWSR, reg,
|
||||
+ FIELD_GET(PPU_PWSR_PWR_STATUS, reg) == val,
|
||||
+ 0, 10000);
|
||||
+ if (ret)
|
||||
+ dev_err(pck->dev, "failed to turn domain \"%s\" %s: %d\n",
|
||||
+ genpd->name, str_on_off(on), ret);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int sunxi_pck600_power_on(struct generic_pm_domain *domain)
|
||||
+{
|
||||
+ struct sunxi_pck600_pd *pd = to_sunxi_pd(domain);
|
||||
+
|
||||
+ return sunxi_pck600_pd_set_power(pd, true);
|
||||
+}
|
||||
+
|
||||
+static int sunxi_pck600_power_off(struct generic_pm_domain *domain)
|
||||
+{
|
||||
+ struct sunxi_pck600_pd *pd = to_sunxi_pd(domain);
|
||||
+
|
||||
+ return sunxi_pck600_pd_set_power(pd, false);
|
||||
+}
|
||||
+
|
||||
+static void sunxi_pck600_pd_setup(struct sunxi_pck600_pd *pd,
|
||||
+ const struct sunxi_pck600_desc *desc)
|
||||
+{
|
||||
+ writel(desc->device_ctrl0_delay, pd->base + PPU_DCDR0);
|
||||
+ writel(desc->device_ctrl1_delay, pd->base + PPU_DCDR1);
|
||||
+ writel(desc->logic_power_switch0_delay,
|
||||
+ pd->base + desc->logic_power_switch0_delay_offset);
|
||||
+ writel(desc->logic_power_switch1_delay,
|
||||
+ pd->base + desc->logic_power_switch1_delay_offset);
|
||||
+ writel(desc->off2on_delay, pd->base + desc->off2on_delay_offset);
|
||||
+}
|
||||
+
|
||||
+static int sunxi_pck600_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ const struct sunxi_pck600_desc *desc;
|
||||
+ struct genpd_onecell_data *genpds;
|
||||
+ struct sunxi_pck600 *pck;
|
||||
+ struct reset_control *rst;
|
||||
+ struct clk *clk;
|
||||
+ void __iomem *base;
|
||||
+ int i, ret;
|
||||
+
|
||||
+ desc = of_device_get_match_data(dev);
|
||||
+
|
||||
+ pck = devm_kzalloc(dev, struct_size(pck, pds, desc->num_domains), GFP_KERNEL);
|
||||
+ if (!pck)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ pck->dev = &pdev->dev;
|
||||
+ platform_set_drvdata(pdev, pck);
|
||||
+
|
||||
+ genpds = &pck->genpd_data;
|
||||
+ genpds->num_domains = desc->num_domains;
|
||||
+ genpds->domains = devm_kcalloc(dev, desc->num_domains,
|
||||
+ sizeof(*genpds->domains), GFP_KERNEL);
|
||||
+ if (!genpds->domains)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ base = devm_platform_ioremap_resource(pdev, 0);
|
||||
+ if (IS_ERR(base))
|
||||
+ return PTR_ERR(base);
|
||||
+
|
||||
+ rst = devm_reset_control_get_exclusive_released(dev, NULL);
|
||||
+ if (IS_ERR(rst))
|
||||
+ return dev_err_probe(dev, PTR_ERR(rst), "failed to get reset control\n");
|
||||
+
|
||||
+ clk = devm_clk_get_enabled(dev, NULL);
|
||||
+ if (IS_ERR(clk))
|
||||
+ return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
|
||||
+
|
||||
+ for (i = 0; i < desc->num_domains; i++) {
|
||||
+ struct sunxi_pck600_pd *pd = &pck->pds[i];
|
||||
+
|
||||
+ pd->genpd.name = desc->pd_names[i];
|
||||
+ pd->genpd.power_off = sunxi_pck600_power_off;
|
||||
+ pd->genpd.power_on = sunxi_pck600_power_on;
|
||||
+ pd->base = base + PPU_REG_SIZE * i;
|
||||
+
|
||||
+ sunxi_pck600_pd_setup(pd, desc);
|
||||
+ ret = pm_genpd_init(&pd->genpd, NULL, false);
|
||||
+ if (ret) {
|
||||
+ dev_err_probe(dev, ret, "failed to initialize power domain\n");
|
||||
+ goto err_remove_pds;
|
||||
+ }
|
||||
+
|
||||
+ genpds->domains[i] = &pd->genpd;
|
||||
+ }
|
||||
+
|
||||
+ ret = of_genpd_add_provider_onecell(dev_of_node(dev), genpds);
|
||||
+ if (ret) {
|
||||
+ dev_err_probe(dev, ret, "failed to add PD provider\n");
|
||||
+ goto err_remove_pds;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_remove_pds:
|
||||
+ for (i--; i >= 0; i--)
|
||||
+ pm_genpd_remove(genpds->domains[i]);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static const char * const sun55i_a523_pck600_pd_names[] = {
|
||||
+ "VE", "GPU", "VI", "VO0", "VO1", "DE", "NAND", "PCIE"
|
||||
+};
|
||||
+
|
||||
+static const struct sunxi_pck600_desc sun55i_a523_pck600_desc = {
|
||||
+ .pd_names = sun55i_a523_pck600_pd_names,
|
||||
+ .num_domains = ARRAY_SIZE(sun55i_a523_pck600_pd_names),
|
||||
+ .logic_power_switch0_delay_offset = 0xc00,
|
||||
+ .logic_power_switch1_delay_offset = 0xc04,
|
||||
+ .off2on_delay_offset = 0xc10,
|
||||
+ .device_ctrl0_delay = 0xffffff,
|
||||
+ .device_ctrl1_delay = 0xffff,
|
||||
+ .logic_power_switch0_delay = 0x8080808,
|
||||
+ .logic_power_switch1_delay = 0x808,
|
||||
+ .off2on_delay = 0x8
|
||||
+};
|
||||
+
|
||||
+static const struct of_device_id sunxi_pck600_of_match[] = {
|
||||
+ {
|
||||
+ .compatible = "allwinner,sun55i-a523-pck-600",
|
||||
+ .data = &sun55i_a523_pck600_desc,
|
||||
+ },
|
||||
+ {}
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, sunxi_pck600_of_match);
|
||||
+
|
||||
+static struct platform_driver sunxi_pck600_driver = {
|
||||
+ .probe = sunxi_pck600_probe,
|
||||
+ .driver = {
|
||||
+ .name = "sunxi-pck-600",
|
||||
+ .of_match_table = sunxi_pck600_of_match,
|
||||
+ /* Power domains cannot be removed if in use. */
|
||||
+ .suppress_bind_attrs = true,
|
||||
+ },
|
||||
+};
|
||||
+module_platform_driver(sunxi_pck600_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("Allwinner PCK-600 power domain driver");
|
||||
+MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,48 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
A523 has a PPU like the one in the Allwinner D1 SoC.
|
||||
|
||||
Add a compatible entry and a list of power domain names for it.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/pmdomain/sunxi/sun20i-ppu.c | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
|
||||
diff --git a/drivers/pmdomain/sunxi/sun20i-ppu.c b/drivers/pmdomain/sunxi/sun20i-ppu.c
|
||||
index 9f002748d224..b65876a68cc1 100644
|
||||
--- a/drivers/pmdomain/sunxi/sun20i-ppu.c
|
||||
+++ b/drivers/pmdomain/sunxi/sun20i-ppu.c
|
||||
@@ -193,6 +193,19 @@ static const struct sun20i_ppu_desc sun8i_v853_ppu_desc = {
|
||||
.num_domains = ARRAY_SIZE(sun8i_v853_ppu_pd_names),
|
||||
};
|
||||
|
||||
+static const char *const sun55i_a523_ppu_pd_names[] = {
|
||||
+ "DSP",
|
||||
+ "NPU",
|
||||
+ "AUDIO",
|
||||
+ "SRAM",
|
||||
+ "RISCV",
|
||||
+};
|
||||
+
|
||||
+static const struct sun20i_ppu_desc sun55i_a523_ppu_desc = {
|
||||
+ .names = sun55i_a523_ppu_pd_names,
|
||||
+ .num_domains = ARRAY_SIZE(sun55i_a523_ppu_pd_names),
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id sun20i_ppu_of_match[] = {
|
||||
{
|
||||
.compatible = "allwinner,sun20i-d1-ppu",
|
||||
@@ -202,6 +215,10 @@ static const struct of_device_id sun20i_ppu_of_match[] = {
|
||||
.compatible = "allwinner,sun8i-v853-ppu",
|
||||
.data = &sun8i_v853_ppu_desc,
|
||||
},
|
||||
+ {
|
||||
+ .compatible = "allwinner,sun55i-a523-ppu",
|
||||
+ .data = &sun55i_a523_ppu_desc,
|
||||
+ },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sun20i_ppu_of_match);
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,135 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sun, 6 Jul 2025 00:31:46 -0400
|
||||
Subject: From: iuncuim <iuncuim@gmail.com> Date: Mon, 7 Apr 2025 03:28:37
|
||||
+0300 Subject: [PATCH] regulator: axp20x: force polyphase setup for axp323
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 3 ++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 3 ++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 3 ++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 3 ++
|
||||
drivers/regulator/axp20x-regulator.c | 19 ++++++++++
|
||||
5 files changed, 31 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index f7a6221d02c2..369bde1556ff 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -330,10 +330,13 @@ reg_dcdc1_323: dcdc1 {
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-name = "vdd-cpub";
|
||||
};
|
||||
|
||||
/* DCDC2 is polyphased with DCDC1 */
|
||||
+ reg_dcdc2_323: dcdc2 {
|
||||
+ x-powers,polyphased;
|
||||
+ };
|
||||
|
||||
/* RISC-V management core supply */
|
||||
reg_dcdc3_323: dcdc3 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
index 0d7fb419c9b4..5732088add32 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
@@ -253,10 +253,13 @@ reg_dcdc1_323: dcdc1 {
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-name = "vdd-cpub";
|
||||
};
|
||||
|
||||
/* DCDC2 is polyphased with DCDC1 */
|
||||
+ reg_dcdc2_323: dcdc2 {
|
||||
+ x-powers,polyphased;
|
||||
+ };
|
||||
|
||||
reg_dcdc3_323: dcdc3 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
index 4f2366b3624a..bd1ebb15bb3e 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
@@ -283,10 +283,13 @@ reg_dcdc1_323: dcdc1 {
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-name = "vdd-cpub";
|
||||
};
|
||||
|
||||
/* DCDC2 is polyphased with DCDC1 */
|
||||
+ reg_dcdc2_323: dcdc2 {
|
||||
+ x-powers,polyphased;
|
||||
+ };
|
||||
|
||||
/* Some RISC-V management core related voltage */
|
||||
reg_dcdc3_323: dcdc3 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
index d1ffc9faec80..fb7933091edf 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
@@ -321,10 +321,13 @@ reg_dcdc1_323: dcdc1 {
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-name = "vdd-cpub";
|
||||
};
|
||||
|
||||
/* DCDC2 is polyphased with DCDC1 */
|
||||
+ reg_dcdc2_323: dcdc2 {
|
||||
+ x-powers,polyphased;
|
||||
+ };
|
||||
|
||||
/* Some RISC-V management core related voltage */
|
||||
reg_dcdc3_323: dcdc3 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
|
||||
index da891415efc0..2e2d35d31ce6 100644
|
||||
--- a/drivers/regulator/axp20x-regulator.c
|
||||
+++ b/drivers/regulator/axp20x-regulator.c
|
||||
@@ -1479,10 +1479,23 @@ static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 work
|
||||
}
|
||||
|
||||
return regmap_update_bits(rdev->regmap, reg, mask, workmode);
|
||||
}
|
||||
|
||||
+static void axp20x_set_polyphased(struct axp20x_dev *axp20x, int id)
|
||||
+{
|
||||
+ switch (axp20x->variant) {
|
||||
+ case AXP323_ID:
|
||||
+ switch (id) {
|
||||
+ case AXP313A_DCDC2:
|
||||
+ regmap_write(axp20x->regmap, AXP323_DCDC_MODE_CTRL2, BIT(1));
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ }
|
||||
+}
|
||||
/*
|
||||
* This function checks whether a regulator is part of a poly-phase
|
||||
* output setup based on the registers settings. Returns true if it is.
|
||||
*/
|
||||
static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
|
||||
@@ -1702,10 +1715,16 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
|
||||
if (axp20x_set_dcdc_workmode(rdev, i, workmode))
|
||||
dev_err(&pdev->dev, "Failed to set workmode on %s\n",
|
||||
rdev->desc->name);
|
||||
}
|
||||
|
||||
+ /*
|
||||
+ * Currently only the AXP323 needs to force dual phase setup.
|
||||
+ */
|
||||
+ if (of_property_read_bool(rdev->dev.of_node,"x-powers,polyphased"))
|
||||
+ axp20x_set_polyphased(axp20x, i);
|
||||
+
|
||||
/*
|
||||
* Save AXP22X DCDC1 / DCDC5 / AXP15060 ALDO1 regulator names for later.
|
||||
*/
|
||||
if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
|
||||
(regulators == axp809_regulators && i == AXP809_DCDC1) ||
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The A523 has two Ethernet controllers. So in the system controller
|
||||
address space, there are two registers for Ethernet clock delays,
|
||||
one for each controller.
|
||||
|
||||
Add a new entry for the A523 system controller that allows access to
|
||||
the second register.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/soc/sunxi/sunxi_sram.c | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
|
||||
index 08e264ea0697..4f8d510b7e1e 100644
|
||||
--- a/drivers/soc/sunxi/sunxi_sram.c
|
||||
+++ b/drivers/soc/sunxi/sunxi_sram.c
|
||||
@@ -320,6 +320,10 @@ static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = {
|
||||
.has_ths_offset = true,
|
||||
};
|
||||
|
||||
+static const struct sunxi_sramc_variant sun55i_a523_sramc_variant = {
|
||||
+ .num_emac_clocks = 2,
|
||||
+};
|
||||
+
|
||||
#define SUNXI_SRAM_THS_OFFSET_REG 0x0
|
||||
#define SUNXI_SRAM_EMAC_CLOCK_REG 0x30
|
||||
#define SUNXI_SYS_LDO_CTRL_REG 0x150
|
||||
@@ -440,6 +444,10 @@ static const struct of_device_id sunxi_sram_dt_match[] = {
|
||||
.compatible = "allwinner,sun50i-h616-system-control",
|
||||
.data = &sun50i_h616_sramc_variant,
|
||||
},
|
||||
+ {
|
||||
+ .compatible = "allwinner,sun55i-a523-system-control",
|
||||
+ .data = &sun55i_a523_sramc_variant,
|
||||
+ },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,44 @@
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Until now, if the system controller had a ethernet controller glue layer
|
||||
control register, a limited access regmap would be registered and tied
|
||||
to the system controller struct device for the ethernet driver to use.
|
||||
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
drivers/soc/sunxi/sunxi_sram.c | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
|
||||
index 4f8d510b7e1e..63c23bdffa78 100644
|
||||
--- a/drivers/soc/sunxi/sunxi_sram.c
|
||||
+++ b/drivers/soc/sunxi/sunxi_sram.c
|
||||
@@ -12,6 +12,7 @@
|
||||
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/io.h>
|
||||
+#include <linux/mfd/syscon.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
@@ -377,6 +378,7 @@ static int __init sunxi_sram_probe(struct platform_device *pdev)
|
||||
const struct sunxi_sramc_variant *variant;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct regmap *regmap;
|
||||
+ int ret;
|
||||
|
||||
sram_dev = &pdev->dev;
|
||||
|
||||
@@ -394,6 +396,10 @@ static int __init sunxi_sram_probe(struct platform_device *pdev)
|
||||
regmap = devm_regmap_init_mmio(dev, base, &sunxi_sram_regmap_config);
|
||||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
+
|
||||
+ ret = of_syscon_register_regmap(dev->of_node, regmap);
|
||||
+ if (IS_ERR(ret))
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
of_platform_populate(dev->of_node, NULL, NULL, dev);
|
||||
--
|
||||
2.39.5
|
||||
@@ -0,0 +1,96 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sun, 6 Jul 2025 00:12:02 -0400
|
||||
Subject: From: Mikhail Kalashnikov <iuncuim@gmail.com>
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 5 +++++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 5 +++++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 5 +++++
|
||||
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 5 +++++
|
||||
4 files changed, 20 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 592a50436454..f7a6221d02c2 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -103,10 +103,15 @@ &gmac1 {
|
||||
allwinner,rx-delay-ps = <400>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdc2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mdio0 {
|
||||
ext_rgmii0_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
index 59db103546f6..0d7fb419c9b4 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts
|
||||
@@ -52,10 +52,15 @@ &ehci0 {
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdc2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
vmmc-supply = <®_vcc3v3>;
|
||||
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
index 142177c1f737..4f2366b3624a 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
|
||||
@@ -74,10 +74,15 @@ &gmac0 {
|
||||
allwinner,rx-delay-ps = <300>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdc2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mdio0 {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
index ff2fd8e71e03..d1ffc9faec80 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
|
||||
@@ -93,10 +93,15 @@ &ehci0 {
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdc2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
vmmc-supply = <®_cldo3>;
|
||||
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,94 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Sat, 2 Aug 2025 00:36:05 -0400
|
||||
Subject: Subject: From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 55 ++++++++++
|
||||
1 file changed, 55 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
index 7fbba60ec76e..50bebaa67d32 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
|
||||
@@ -178,10 +178,20 @@ rgmii0_pins: rgmii0-pins {
|
||||
function = "gmac0";
|
||||
drive-strength = <40>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
+ rgmii1_pins: rgmii1-pins {
|
||||
+ pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4",
|
||||
+ "PJ5", "PJ6", "PJ7", "PJ8", "PJ9",
|
||||
+ "PJ11", "PJ12", "PJ13", "PJ14", "PJ15";
|
||||
+ allwinner,pinmux = <5>;
|
||||
+ function = "gmac1";
|
||||
+ drive-strength = <40>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
uart0_pb_pins: uart0-pb-pins {
|
||||
pins = "PB9", "PB10";
|
||||
allwinner,pinmux = <2>;
|
||||
function = "uart0";
|
||||
};
|
||||
@@ -593,10 +603,55 @@ mdio0: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
+ gmac1: ethernet@4510000 {
|
||||
+ compatible = "allwinner,sun55i-a523-gmac200",
|
||||
+ "snps,dwmac-4.20a";
|
||||
+ reg = <0x04510000 0x10000>;
|
||||
+ clocks = <&ccu CLK_BUS_EMAC1>, <&ccu CLK_MBUS_EMAC1>;
|
||||
+ clock-names = "stmmaceth", "mbus";
|
||||
+ resets = <&ccu RST_BUS_EMAC1>;
|
||||
+ reset-names = "stmmaceth";
|
||||
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "macirq";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii1_pins>;
|
||||
+ power-domains = <&pck600 PD_VO1>;
|
||||
+ syscon = <&syscon>;
|
||||
+ snps,fixed-burst;
|
||||
+ snps,axi-config = <&gmac1_stmmac_axi_setup>;
|
||||
+ snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
|
||||
+ snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ mdio1: mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1_mtl_rx_setup: rx-queues-config {
|
||||
+ snps,rx-queues-to-use = <1>;
|
||||
+
|
||||
+ queue0 {};
|
||||
+ };
|
||||
+
|
||||
+ gmac1_stmmac_axi_setup: stmmac-axi-config {
|
||||
+ snps,wr_osr_lmt = <0xf>;
|
||||
+ snps,rd_osr_lmt = <0xf>;
|
||||
+ snps,blen = <256 128 64 32 16 8 4>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1_mtl_tx_setup: tx_queues-config {
|
||||
+ snps,tx-queues-to-use = <1>;
|
||||
+
|
||||
+ queue0 {};
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
ppu: power-controller@7001400 {
|
||||
compatible = "allwinner,sun55i-a523-ppu";
|
||||
reg = <0x07001400 0x400>;
|
||||
clocks = <&r_ccu CLK_BUS_R_PPU1>;
|
||||
resets = <&r_ccu RST_BUS_R_PPU1>;
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
@@ -0,0 +1,48 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Juan Sanchez <juanesf91@gmail.com>
|
||||
Date: Tue, 5 Aug 2025 14:55:52 -0400
|
||||
Subject: Enable uart1 (bluetooth) on Radxa Cubie A5E
|
||||
|
||||
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
index 369bde1556ff..37585cac6648 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
|
||||
@@ -14,10 +14,11 @@ / {
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
ethernet1 = &gmac1;
|
||||
ethernet2 = &sdio_wifi;
|
||||
serial0 = &uart0;
|
||||
+ serial1 = &uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
@@ -360,10 +361,18 @@ &uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pb_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+/* Bluetooth */
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&usb_otg {
|
||||
/*
|
||||
* The USB-C port is the primary power supply, so in this configuration
|
||||
* relies on the other end of the USB cable to supply the VBUS power.
|
||||
* So use this port in peripheral mode.
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
Reference in New Issue
Block a user