Files
build/patch/kernel/archive/sunxi-6.16/06-arm64-dts-allwinner-a523-Move-rgmii0-pins-to-correct-location.patch
juanesf 83f33fa122 Migrate Radxa Cubie A5E to mainline 6.16 (#8447)
* migrate u-boot and kernel to mainline

* Add patches for 6.17

* fix compile for patches addes

* Orderer patches, switch kernel config to sunxi64, recreate some patches for fix build

* Update linux-sunxi64-edge.config after pm-domain & sun55i-gmac200 activate

* enable wifi and bluetooth

* revert linux-sunxi64-edge.config

- Revert linux-sunxi64-edge.config
- Add modules: CONFIG_IOMMUFD, CONFIG_SUN50I_IOMMU, CONFIG_SUN55I_PCK600.

* drop sunxi-dev-6.14 and cleanup involved patches

* Update radxa-cubie-a5e.csc

make change proposed by igorpecovnik
2025-08-07 22:17:15 +02:00

60 lines
2.0 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Juan Sanchez <juanesf91@gmail.com>
Date: Sat, 2 Aug 2025 00:22:05 -0400
Subject: Subject: From: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Juan Sanchez <juanesf91@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 20 +++++-----
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 0136ac625605..7fbba60ec76e 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -141,20 +141,10 @@ pio: pinctrl@2000000 {
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
- rgmii0_pins: rgmii0-pins {
- pins = "PH0", "PH1", "PH2", "PH3", "PH4",
- "PH5", "PH6", "PH7", "PH9", "PH10",
- "PH14", "PH15", "PH16", "PH17", "PH18";
- allwinner,pinmux = <5>;
- function = "gmac0";
- drive-strength = <40>;
- bias-disable;
- };
-
mmc0_pins: mmc0-pins {
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
allwinner,pinmux = <2>;
function = "mmc0";
drive-strength = <30>;
@@ -178,10 +168,20 @@ mmc2_pins: mmc2-pins {
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
};
+ rgmii0_pins: rgmii0-pins {
+ pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+ "PH5", "PH6", "PH7", "PH9", "PH10",
+ "PH14", "PH15", "PH16", "PH17", "PH18";
+ allwinner,pinmux = <5>;
+ function = "gmac0";
+ drive-strength = <40>;
+ bias-disable;
+ };
+
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;
function = "uart0";
};
--
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