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83f33fa122
* migrate u-boot and kernel to mainline * Add patches for 6.17 * fix compile for patches addes * Orderer patches, switch kernel config to sunxi64, recreate some patches for fix build * Update linux-sunxi64-edge.config after pm-domain & sun55i-gmac200 activate * enable wifi and bluetooth * revert linux-sunxi64-edge.config - Revert linux-sunxi64-edge.config - Add modules: CONFIG_IOMMUFD, CONFIG_SUN50I_IOMMU, CONFIG_SUN55I_PCK600. * drop sunxi-dev-6.14 and cleanup involved patches * Update radxa-cubie-a5e.csc make change proposed by igorpecovnik
42 lines
1.1 KiB
Diff
42 lines
1.1 KiB
Diff
From: Chen-Yu Tsai <wens@csie.org>
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UART1 is normally used to connect to the Bluetooth side of a Broadcom
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WiFi+BT combo chip. The connection uses 4 pins.
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Add pinmux nodes for UART1, one for the RX/TX pins, and one for the
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RTS/CTS pins.
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Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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---
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arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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index 4839411e51cf..cf0bc39aab04 100644
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--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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@@ -168,6 +168,20 @@ uart0_pb_pins: uart0-pb-pins {
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allwinner,pinmux = <2>;
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function = "uart0";
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};
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+
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+ /omit-if-no-ref/
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+ uart1_pins: uart1-pins {
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+ pins = "PG6", "PG7";
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+ function = "uart1";
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+ allwinner,pinmux = <2>;
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+ };
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+
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+ /omit-if-no-ref/
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+ uart1_rts_cts_pins: uart1-rts-cts-pins {
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+ pins = "PG8", "PG9";
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+ function = "uart1";
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+ allwinner,pinmux = <2>;
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+ };
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};
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ccu: clock-controller@2001000 {
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--
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2.39.5
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