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sunxi-6.13: Fix emac0, mdio0 for cip rtl8211F operation
Remove unused nodes that can be added using an overlay.
This commit is contained in:
@@ -1,13 +1,13 @@
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From 65f6f6ed38bc3aae4790c198b4ed2f527ddcbe2e Mon Sep 17 00:00:00 2001
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From 7b908ec5809ba4bfb8d7f310fcbfe93feeb2e8f4 Mon Sep 17 00:00:00 2001
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From: The-going <48602507+The-going@users.noreply.github.com>
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Date: Mon, 10 Feb 2025 13:34:14 +0300
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Subject: arm64: allwinner: Add sun50i-h618-bananapi-m4-berry support
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---
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arch/arm64/boot/dts/allwinner/Makefile | 1 +
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.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 42 ++
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.../sun50i-h618-bananapi-m4-berry.dts | 432 ++++++++++++++++++
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3 files changed, 475 insertions(+)
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.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 4 +-
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.../sun50i-h618-bananapi-m4-berry.dts | 305 ++++++++++++++++++
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3 files changed, 308 insertions(+), 2 deletions(-)
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create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
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diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
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@@ -23,64 +23,26 @@ index a676c57aad1d..a34f2dbcc9b4 100644
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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index 624bc0e95295..5685d929cf0b 100644
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index 624bc0e95295..281c363e429d 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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@@ -565,6 +565,48 @@ pwm5_pin: pwm5-pin {
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bias-pull-up;
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@@ -402,8 +402,8 @@ pio: pinctrl@300b000 {
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ext_rgmii_pins: rgmii-pins {
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pins = "PI0", "PI1", "PI2", "PI3", "PI4",
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"PI5", "PI7", "PI8", "PI9", "PI10",
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- "PI11", "PI12", "PI13", "PI14", "PI15",
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- "PI16";
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+ "PI11", "PI12", "PI13", "PI14", "PI15";
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+ /* "PI16" Managed by mdio */
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function = "emac0";
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drive-strength = <40>;
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};
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+ /omit-if-no-ref/
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+ pwm1_pg_pin: pwm1-pg-pin {
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+ pins = "PG19";
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+ function = "pwm1";
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm1_ph_pin: pwm1-ph-pin {
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+ pins = "PH3";
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+ function = "pwm1";
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm1_pi_pin: pwm1-pi-pin {
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+ pins = "PI11";
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+ function = "pwm1";
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm2_ph_pin: pwm2-ph-pin {
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+ pins = "PH2";
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+ function = "pwm2";
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm3_ph_pin: pwm3-ph-pin {
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+ pins = "PH0";
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+ function = "pwm3";
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+ };
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+
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+ /omit-if-no-ref/
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+ pwm4_ph_pin: pwm4-ph-pin {
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+ pins = "PH1";
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+ function = "pwm4";
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+ };
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+
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+ pwm5_pin: pwm5-pin {
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+ pins = "PA12";
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+ function = "pwm5";
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+ bias-pull-up;
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+ };
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+
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/omit-if-no-ref/
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spi0_pins: spi0-pins {
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pins = "PC0", "PC2", "PC4";
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
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new file mode 100644
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index 000000000000..5c5fdd9a5fe1
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index 000000000000..29869f39de97
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
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@@ -0,0 +1,432 @@
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@@ -0,0 +1,305 @@
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+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+/*
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+ * Copyright (C) 2020 Arm Ltd.
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@@ -143,12 +105,6 @@ index 000000000000..5c5fdd9a5fe1
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+ };
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+ };
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+
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+ wifi_usb {
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+ compatible = "usb-wifi";
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+ status = "okay";
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+ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */
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+ };
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+
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+ reg_vcc5v: vcc5v {
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+ /* board wide 5V supply directly from the USB-C socket */
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+ compatible = "regulator-fixed";
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@@ -196,67 +152,12 @@ index 000000000000..5c5fdd9a5fe1
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+ vin-supply = <®_vcc5v>;
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+ };
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+
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+ ac200_pwm_clk: ac200_clk {
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+ compatible = "pwm-clock";
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+ #clock-cells = <0>;
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+ // pwm5 period_ns = 500 > 334 for select 24M clock.
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+ pwms = <&pwm 5 500 0>;
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+ clock-frequency = <2000000>;
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+ wifi_usb {
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+ compatible = "usb-wifi";
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+ status = "okay";
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+ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */
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+ };
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+
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+ soc {
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+ pwm: pwm@300a000 {
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+ compatible = "allwinner,sun50i-h616-pwm";
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+ reg = <0x0300a000 0x400>;
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+ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
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+ clock-names = "mod", "bus";
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+ resets = <&ccu RST_BUS_PWM>;
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+ pwm-number = <6>;
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+ pwm-base = <0x0>;
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+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>,
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+ <&pwm3>, <&pwm4>, <&pwm5>;
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+ #pwm-cells = <3>;
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+ status = "okay";
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+ };
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+
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+ pwm0: pwm0@0300a000 {
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+ compatible = "allwinner,sunxi-pwm0";
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+ pinctrl-names = "default";
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+ };
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+
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+ pwm1: pwm1@0300a000 {
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+ compatible = "allwinner,sunxi-pwm1";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm1_ph_pin>;
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+ };
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+
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+ pwm2: pwm2@0300a000 {
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+ compatible = "allwinner,sunxi-pwm2";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm2_ph_pin>;
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+ };
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+
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+ pwm3: pwm3@0300a000 {
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+ compatible = "allwinner,sunxi-pwm3";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm3_ph_pin>;
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+ };
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+
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+ pwm4: pwm4@0300a000 {
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+ compatible = "allwinner,sunxi-pwm4";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm4_ph_pin>;
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+ };
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+
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+ pwm5: pwm5@0300a000 {
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+ compatible = "allwinner,sunxi-pwm5";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm5_pin>;
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+ clk_bypass_output = <0x1>;
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+ status = "okay";
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+ };
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+ };
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+};
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+
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+&cpu0 {
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@@ -318,9 +219,9 @@ index 000000000000..5c5fdd9a5fe1
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+};
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+
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+&emac0 {
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+ compatible = "allwinner,sun50i-h616-emac0";
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+ compatible = "allwinner,sun50i-h616-emac";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ext_rgmii_pins>;
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+ pinctrl-0 = <&ext_rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ phy-supply = <®_gmac_3v3>;
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@@ -332,24 +233,17 @@ index 000000000000..5c5fdd9a5fe1
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+
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+&mdio0 {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ /* rtl8211F compatible string for mdio and phy */
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+ compatible = "ethernet-phy-id001c.c916";
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+ reg = <1>;
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+ reset-assert-us = <20000>;
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+ reset-deassert-us = <100000>;
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+ reset-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */
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+ };
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+};
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+
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+&emac1 {
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+ compatible = "allwinner,sunxi-gmac";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rmii_pins>;
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+ phy-mode = "rmii";
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+ phy-handle = <&rmii_phy>;
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+ phy-supply = <®_dldo1>;
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+ allwinner,rx-delay-ps = <3100>;
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+ allwinner,tx-delay-ps = <700>;
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+ phy-rst;
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+ gmac-power0;
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+ gmac-power1;
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+ gmac-power2;
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+ status = "disabled";
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+};
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+
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@@ -425,71 +319,12 @@ index 000000000000..5c5fdd9a5fe1
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ status = "disabled";
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+};
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+
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+&i2c2 {
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+ status = "disabled";
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+};
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+
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+&i2c3 {
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+ status = "okay";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c3_pa_pins>;
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+
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+ ac200_x: mfd@10 {
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+ compatible = "x-powers,ac200-sunxi";
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+ reg = <0x10>;
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+ clocks = <&ac200_pwm_clk>;
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+ // ephy id
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+ nvmem-cells = <&ephy_calibration>;
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+ nvmem-cell-names = "calibration";
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+
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+ ac200_ephy: phy {
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+ compatible = "x-powers,ac200-ephy-sunxi";
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+ status = "okay";
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+ };
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+ };
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+};
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+
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+&i2c4 {
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+ status = "disabled";
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+};
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+
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
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+ status = "disabled";
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+};
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+
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+&uart2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart2_ph_pins>;
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+ status = "disabled";
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+};
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+
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+&uart5 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart5_pins>;
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+ status = "disabled";
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+};
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+
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+&spi1 {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>;
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+
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+ spidev@1 {
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+ compatible = "rohm,dh2228fv";
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+ status = "okay";
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+ reg = <1>;
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+ spi-max-frequency = <1000000>;
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+ };
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+};
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+
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+&codec {
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+ allwinner,audio-routing =
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+ "Line Out", "LINEOUT";
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