diff --git a/patch/kernel/archive/sunxi-6.13/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch b/patch/kernel/archive/sunxi-6.13/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch index e1f7658cc..41da8c14f 100644 --- a/patch/kernel/archive/sunxi-6.13/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch +++ b/patch/kernel/archive/sunxi-6.13/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch @@ -1,13 +1,13 @@ -From 65f6f6ed38bc3aae4790c198b4ed2f527ddcbe2e Mon Sep 17 00:00:00 2001 +From 7b908ec5809ba4bfb8d7f310fcbfe93feeb2e8f4 Mon Sep 17 00:00:00 2001 From: The-going <48602507+The-going@users.noreply.github.com> Date: Mon, 10 Feb 2025 13:34:14 +0300 Subject: arm64: allwinner: Add sun50i-h618-bananapi-m4-berry support --- arch/arm64/boot/dts/allwinner/Makefile | 1 + - .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 42 ++ - .../sun50i-h618-bananapi-m4-berry.dts | 432 ++++++++++++++++++ - 3 files changed, 475 insertions(+) + .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 4 +- + .../sun50i-h618-bananapi-m4-berry.dts | 305 ++++++++++++++++++ + 3 files changed, 308 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile @@ -23,64 +23,26 @@ index a676c57aad1d..a34f2dbcc9b4 100644 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -index 624bc0e95295..5685d929cf0b 100644 +index 624bc0e95295..281c363e429d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -565,6 +565,48 @@ pwm5_pin: pwm5-pin { - bias-pull-up; +@@ -402,8 +402,8 @@ pio: pinctrl@300b000 { + ext_rgmii_pins: rgmii-pins { + pins = "PI0", "PI1", "PI2", "PI3", "PI4", + "PI5", "PI7", "PI8", "PI9", "PI10", +- "PI11", "PI12", "PI13", "PI14", "PI15", +- "PI16"; ++ "PI11", "PI12", "PI13", "PI14", "PI15"; ++ /* "PI16" Managed by mdio */ + function = "emac0"; + drive-strength = <40>; }; - -+ /omit-if-no-ref/ -+ pwm1_pg_pin: pwm1-pg-pin { -+ pins = "PG19"; -+ function = "pwm1"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm1_ph_pin: pwm1-ph-pin { -+ pins = "PH3"; -+ function = "pwm1"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm1_pi_pin: pwm1-pi-pin { -+ pins = "PI11"; -+ function = "pwm1"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm2_ph_pin: pwm2-ph-pin { -+ pins = "PH2"; -+ function = "pwm2"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm3_ph_pin: pwm3-ph-pin { -+ pins = "PH0"; -+ function = "pwm3"; -+ }; -+ -+ /omit-if-no-ref/ -+ pwm4_ph_pin: pwm4-ph-pin { -+ pins = "PH1"; -+ function = "pwm4"; -+ }; -+ -+ pwm5_pin: pwm5-pin { -+ pins = "PA12"; -+ function = "pwm5"; -+ bias-pull-up; -+ }; -+ - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC0", "PC2", "PC4"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts new file mode 100644 -index 000000000000..5c5fdd9a5fe1 +index 000000000000..29869f39de97 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts -@@ -0,0 +1,432 @@ +@@ -0,0 +1,305 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2020 Arm Ltd. @@ -143,12 +105,6 @@ index 000000000000..5c5fdd9a5fe1 + }; + }; + -+ wifi_usb { -+ compatible = "usb-wifi"; -+ status = "okay"; -+ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */ -+ }; -+ + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; @@ -196,67 +152,12 @@ index 000000000000..5c5fdd9a5fe1 + vin-supply = <®_vcc5v>; + }; + -+ ac200_pwm_clk: ac200_clk { -+ compatible = "pwm-clock"; -+ #clock-cells = <0>; -+ // pwm5 period_ns = 500 > 334 for select 24M clock. -+ pwms = <&pwm 5 500 0>; -+ clock-frequency = <2000000>; ++ wifi_usb { ++ compatible = "usb-wifi"; + status = "okay"; ++ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */ + }; + -+ soc { -+ pwm: pwm@300a000 { -+ compatible = "allwinner,sun50i-h616-pwm"; -+ reg = <0x0300a000 0x400>; -+ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; -+ clock-names = "mod", "bus"; -+ resets = <&ccu RST_BUS_PWM>; -+ pwm-number = <6>; -+ pwm-base = <0x0>; -+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, -+ <&pwm3>, <&pwm4>, <&pwm5>; -+ #pwm-cells = <3>; -+ status = "okay"; -+ }; -+ -+ pwm0: pwm0@0300a000 { -+ compatible = "allwinner,sunxi-pwm0"; -+ pinctrl-names = "default"; -+ }; -+ -+ pwm1: pwm1@0300a000 { -+ compatible = "allwinner,sunxi-pwm1"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm1_ph_pin>; -+ }; -+ -+ pwm2: pwm2@0300a000 { -+ compatible = "allwinner,sunxi-pwm2"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm2_ph_pin>; -+ }; -+ -+ pwm3: pwm3@0300a000 { -+ compatible = "allwinner,sunxi-pwm3"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm3_ph_pin>; -+ }; -+ -+ pwm4: pwm4@0300a000 { -+ compatible = "allwinner,sunxi-pwm4"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm4_ph_pin>; -+ }; -+ -+ pwm5: pwm5@0300a000 { -+ compatible = "allwinner,sunxi-pwm5"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm5_pin>; -+ clk_bypass_output = <0x1>; -+ status = "okay"; -+ }; -+ }; +}; + +&cpu0 { @@ -318,9 +219,9 @@ index 000000000000..5c5fdd9a5fe1 +}; + +&emac0 { -+ compatible = "allwinner,sun50i-h616-emac0"; ++ compatible = "allwinner,sun50i-h616-emac"; + pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; ++ pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_gmac_3v3>; @@ -332,24 +233,17 @@ index 000000000000..5c5fdd9a5fe1 + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; ++ /* rtl8211F compatible string for mdio and phy */ ++ compatible = "ethernet-phy-id001c.c916"; + reg = <1>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */ + }; +}; + +&emac1 { + compatible = "allwinner,sunxi-gmac"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rmii_pins>; -+ phy-mode = "rmii"; -+ phy-handle = <&rmii_phy>; -+ phy-supply = <®_dldo1>; -+ allwinner,rx-delay-ps = <3100>; -+ allwinner,tx-delay-ps = <700>; -+ phy-rst; -+ gmac-power0; -+ gmac-power1; -+ gmac-power2; + status = "disabled"; +}; + @@ -425,71 +319,12 @@ index 000000000000..5c5fdd9a5fe1 + status = "okay"; +}; + -+&i2c1 { -+ status = "disabled"; -+}; -+ -+&i2c2 { -+ status = "disabled"; -+}; -+ -+&i2c3 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c3_pa_pins>; -+ -+ ac200_x: mfd@10 { -+ compatible = "x-powers,ac200-sunxi"; -+ reg = <0x10>; -+ clocks = <&ac200_pwm_clk>; -+ // ephy id -+ nvmem-cells = <&ephy_calibration>; -+ nvmem-cell-names = "calibration"; -+ -+ ac200_ephy: phy { -+ compatible = "x-powers,ac200-ephy-sunxi"; -+ status = "okay"; -+ }; -+ }; -+}; -+ -+&i2c4 { -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ status = "disabled"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_ph_pins>; -+ status = "disabled"; -+}; -+ +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins>; + status = "disabled"; +}; + -+&spi1 { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; -+ -+ spidev@1 { -+ compatible = "rohm,dh2228fv"; -+ status = "okay"; -+ reg = <1>; -+ spi-max-frequency = <1000000>; -+ }; -+}; -+ +&codec { + allwinner,audio-routing = + "Line Out", "LINEOUT";