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e31992ae7c
When patches outside the series are in the target folder
KERNELPATCHDIR = "archive/sunxi- $ {KERNEL _ MAJOR _ MINOR}"
they create problems for all other patches in the series
and are difficult to move to the new kernel version because
they are not properly designed.
Move the patches to a separate development folder until
the design is fixed so that we can add them to the series.
135 lines
3.9 KiB
Diff
135 lines
3.9 KiB
Diff
From: Chen-Yu Tsai <wens@csie.org>
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The Allwinner A523 SoC family has a second Ethernet controller, called
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the GMAC200 in the BSP and T527 datasheet, and referred to as GMAC1 for
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numbering. This controller, according to BSP sources, is fully
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compatible with a slightly newer version of the Synopsys DWMAC core.
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The glue layer around the controller is the same as found around older
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DWMAC cores on Allwinner SoCs. The only slight difference is that since
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this is the second controller on the SoC, the register for the clock
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delay controls is at a different offset. Last, the integration includes
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a dedicated clock gate for the memory bus and the whole thing is put in
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a separately controllable power domain.
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Add a compatible string entry for it, and work in the requirements for
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a second clock and a power domain.
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Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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---
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.../net/allwinner,sun8i-a83t-emac.yaml | 68 ++++++++++++++++++-
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1 file changed, 66 insertions(+), 2 deletions(-)
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diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
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index 2ac709a4c472..1058e5af92ba 100644
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--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
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+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
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@@ -26,6 +26,9 @@ properties:
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- allwinner,sun50i-h616-emac0
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- allwinner,sun55i-a523-gmac0
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- const: allwinner,sun50i-a64-emac
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+ - items:
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+ - const: allwinner,sun55i-a523-gmac200
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+ - const: snps,dwmac-4.20a
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reg:
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maxItems: 1
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@@ -37,14 +40,19 @@ properties:
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const: macirq
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clocks:
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- maxItems: 1
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+ minItems: 1
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+ maxItems: 2
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clock-names:
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- const: stmmaceth
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+ minItems: 1
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+ maxItems: 2
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phy-supply:
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description: PHY regulator
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+ power-domains:
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+ maxItems: 1
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+
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syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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@@ -75,6 +83,7 @@ allOf:
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- allwinner,sun8i-h3-emac
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- allwinner,sun8i-v3s-emac
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- allwinner,sun50i-a64-emac
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+ - allwinner,sun55i-a523-gmac200
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then:
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properties:
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@@ -191,6 +200,31 @@ allOf:
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- mdio-parent-bus
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- mdio@1
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+ - if:
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+ properties:
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+ compatible:
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+ contains:
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+ const: allwinner,sun55i-a523-gmac200
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+ then:
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+ properties:
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+ clocks:
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+ minItems: 2
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+ clock-names:
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+ items:
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+ - const: stmmaceth
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+ - const: mbus
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+ required:
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+ - power-domains
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+ else:
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+ properties:
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+ clocks:
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+ maxItems: 1
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+ clock-names:
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+ items:
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+ - const: stmmaceth
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+ power-domains: false
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+
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+
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unevaluatedProperties: false
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examples:
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@@ -323,4 +357,34 @@ examples:
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};
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};
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+ - |
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+ ethernet@4510000 {
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+ compatible = "allwinner,sun55i-a523-gmac200",
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+ "snps,dwmac-4.20a";
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+ reg = <0x04510000 0x10000>;
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+ clocks = <&ccu 117>, <&ccu 79>;
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+ clock-names = "stmmaceth", "mbus";
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+ resets = <&ccu 43>;
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+ reset-names = "stmmaceth";
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+ interrupts = <0 47 4>;
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+ interrupt-names = "macirq";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii1_pins>;
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+ power-domains = <&pck600 4>;
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+ syscon = <&syscon>;
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+ phy-handle = <&ext_rgmii_phy_1>;
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+ phy-mode = "rgmii-id";
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+ snps,fixed-burst;
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+ snps,axi-config = <&gmac1_stmmac_axi_setup>;
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ext_rgmii_phy_1: ethernet-phy@1 {
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+ reg = <1>;
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+ };
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+ };
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+ };
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...
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--
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2.39.5
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