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* Add MXQ target. Copy HDMI fix from odroid-c1. * meson8, MXQ: add boot from usb support, configurable dtb * MXQ: remove boot logo Built-in U-BOOT is used, so the logo will not be displayed anyway. * meson: kernel update: legacy -> 6.6, current -> 6.12 * Change Odroid C1 and Onecloud to community supported as build now passes --------- Co-authored-by: Igor Pecovnik <igor@armbian.com>
84 lines
3.1 KiB
Diff
84 lines
3.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sat, 25 Apr 2020 21:53:21 +0200
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Subject: drm/meson: Use a separate list of supported formats for 32-bit SoCs
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The VIU_OSD1_CTRL_STAT2 and VIU_OSD2_CTRL_STAT2 registers on
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Meson8/Meson8b/Meson8m2 don't have the following bits:
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- replaced_alpha_en in bit [14]
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- replaced_alpha in bits [13:6]
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This results in formats with X component (currently DRM_FORMAT_XRGB8888
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and DRM_FORMAT_XBGR8888 are supported on GXBB and later) are not
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supported. Depending on the application this may work (kmscube for
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example - which seems to properly set 0xff as alpha component), but
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there's other examples (Kodi for example) where there are alpha blending
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issues because the alpha value is not defined (and thus some random
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value).
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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drivers/gpu/drm/meson/meson_plane.c | 30 +++++++++-
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1 file changed, 27 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
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index 111111111111..222222222222 100644
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--- a/drivers/gpu/drm/meson/meson_plane.c
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+++ b/drivers/gpu/drm/meson/meson_plane.c
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@@ -471,7 +471,20 @@ static const struct drm_plane_funcs meson_plane_funcs = {
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.format_mod_supported = meson_plane_format_mod_supported,
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};
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-static const uint32_t supported_drm_formats[] = {
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+/*
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+ * X components (for example in DRM_FORMAT_XRGB8888 and DRM_FORMAT_XBGR8888)
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+ * are not supported because these older SoC's are lacking the OSD_REPLACE_EN
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+ * bit to replace the X alpha component with a static value, leaving the alpha
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+ * component in an undefined state.
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+ */
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+static const uint32_t supported_drm_formats_m8[] = {
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+ DRM_FORMAT_ARGB8888,
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+ DRM_FORMAT_ABGR8888,
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+ DRM_FORMAT_RGB888,
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+ DRM_FORMAT_RGB565,
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+};
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+
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+static const uint32_t supported_drm_formats_gx[] = {
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB8888,
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@@ -533,6 +546,8 @@ int meson_plane_create(struct meson_drm *priv)
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{
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struct meson_plane *meson_plane;
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struct drm_plane *plane;
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+ unsigned int num_drm_formats;
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+ const uint32_t *drm_formats;
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const uint64_t *format_modifiers = format_modifiers_default;
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int ret;
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@@ -549,10 +564,19 @@ int meson_plane_create(struct meson_drm *priv)
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else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
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format_modifiers = format_modifiers_afbc_g12a;
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+ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8) ||
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+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8B) ||
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+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8M2)) {
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+ drm_formats = supported_drm_formats_m8;
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+ num_drm_formats = ARRAY_SIZE(supported_drm_formats_m8);
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+ } else {
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+ drm_formats = supported_drm_formats_gx;
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+ num_drm_formats = ARRAY_SIZE(supported_drm_formats_gx);
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+ }
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+
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ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
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&meson_plane_funcs,
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- supported_drm_formats,
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- ARRAY_SIZE(supported_drm_formats),
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+ drm_formats, num_drm_formats,
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format_modifiers,
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DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
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if (ret) {
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--
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Armbian
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