meson: kernel update: legacy -> 6.6, current -> 6.12 (#7801)

* Add MXQ target. Copy HDMI fix from odroid-c1.
* meson8, MXQ: add boot from usb support, configurable dtb
* MXQ: remove boot logo
Built-in U-BOOT is used, so the logo will not be displayed anyway.
* meson: kernel update: legacy -> 6.6, current -> 6.12
* Change Odroid C1 and Onecloud to community supported as build now passes
---------
Co-authored-by: Igor Pecovnik <igor@armbian.com>
This commit is contained in:
Dominik Wójt
2025-02-08 23:08:34 +01:00
committed by GitHub
parent 880c8a9a22
commit 5b29f4dd4b
66 changed files with 106 additions and 5202 deletions

View File

@@ -2,7 +2,7 @@
BOARD_NAME="MXQ"
BOARDFAMILY="meson8b"
BOARD_MAINTAINER=""
KERNEL_TARGET="current,edge"
KERNEL_TARGET="legacy,current"
KERNEL_TEST_TARGET="current"
BOOTCONFIG="none"
BOOTSCRIPT="boot-aml-s805-mxq.cmd:boot.cmd"

View File

@@ -2,7 +2,7 @@
BOARD_NAME="Odroid C1"
BOARDFAMILY="meson8b"
BOARD_MAINTAINER="juanlufont"
KERNEL_TARGET="current,edge"
KERNEL_TARGET="legacy,current"
KERNEL_TEST_TARGET="current"
BOOTDIR='u-boot-odroidc1'

View File

@@ -2,7 +2,7 @@
BOARD_NAME="OneCloud"
BOARDFAMILY="meson8b"
BOARD_MAINTAINER="hzyitc"
KERNEL_TARGET="current,edge"
KERNEL_TARGET="legacy,current"
KERNEL_TEST_TARGET="current"
BOOTCONFIG="none"
BOOTSCRIPT="boot-onecloud.cmd:boot.cmd"

View File

@@ -34,13 +34,13 @@ CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_MISC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
CONFIG_KEXEC=y
# CONFIG_CRASH_DUMP is not set
CONFIG_ARCH_MESON=y
CONFIG_ARM_THUMBEE=y
CONFIG_PL310_ERRATA_588369=y
@@ -82,6 +82,7 @@ CONFIG_PARTITION_ADVANCED=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_BINFMT_MISC=m
CONFIG_CMA=y
CONFIG_CMA_AREAS=7
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m
@@ -342,7 +343,6 @@ CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NFT_DUP_IPV6=m
@@ -392,7 +392,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_LOG=m
CONFIG_BRIDGE_EBT_NFLOG=m
CONFIG_BPFILTER=y
CONFIG_IP_DCCP=m
CONFIG_RDS=m
CONFIG_RDS_TCP=m
@@ -417,9 +416,6 @@ CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
CONFIG_LLC2=m
CONFIG_ATALK=m
CONFIG_DEV_APPLETALK=m
CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y
CONFIG_X25=m
CONFIG_LAPB=m
CONFIG_PHONET=m
@@ -491,7 +487,6 @@ CONFIG_NET_ACT_GACT=m
CONFIG_GACT_PROB=y
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_SAMPLE=m
CONFIG_NET_ACT_IPT=m
CONFIG_NET_ACT_NAT=m
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_ACT_SIMP=m
@@ -567,8 +562,10 @@ CONFIG_BT_ATH3K=m
CONFIG_BT_MTKSDIO=m
CONFIG_BT_MTKUART=m
CONFIG_BT_VIRTIO=m
CONFIG_BT_NXPUART=m
CONFIG_AF_RXRPC_IPV6=y
CONFIG_AF_RXRPC_INJECT_LOSS=y
CONFIG_AF_RXRPC_INJECT_RX_DELAY=y
CONFIG_AF_RXRPC_DEBUG=y
CONFIG_RXKAD=y
CONFIG_CFG80211=m
@@ -580,10 +577,9 @@ CONFIG_MAC80211_DEBUGFS=y
CONFIG_RFKILL=m
CONFIG_RFKILL_INPUT=y
CONFIG_RFKILL_GPIO=m
CONFIG_PAGE_POOL_STATS=y
CONFIG_PCI=y
# CONFIG_PCIEASPM is not set
CONFIG_PCI_MSI=y
# CONFIG_VGA_ARB is not set
CONFIG_PCI_HOST_GENERIC=y
# CONFIG_PCI_MESON is not set
CONFIG_UEVENT_HELPER=y
@@ -601,6 +597,7 @@ CONFIG_OF_OVERLAY=y
CONFIG_ZRAM=m
CONFIG_ZRAM_WRITEBACK=y
CONFIG_ZRAM_MEMORY_TRACKING=y
CONFIG_ZRAM_MULTI_COMP=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_DRBD=m
CONFIG_DRBD_FAULT_INJECTION=y
@@ -630,9 +627,6 @@ CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_SATA_MV=y
CONFIG_MD=y
CONFIG_MD_LINEAR=m
CONFIG_MD_MULTIPATH=m
CONFIG_MD_FAULTY=m
CONFIG_BCACHE=m
CONFIG_BCACHE_ASYNC_REGISTRATION=y
CONFIG_BLK_DEV_DM=m
@@ -746,6 +740,7 @@ CONFIG_DWMAC_DWC_QOS_ETH=y
# CONFIG_NET_VENDOR_XILINX is not set
CONFIG_REALTEK_PHY=y
# CONFIG_MDIO_BUS_MUX_MESON_G12A is not set
# CONFIG_MDIO_BUS_MUX_MESON_GXL is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
@@ -769,6 +764,7 @@ CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m
CONFIG_USB_LAN78XX=m
CONFIG_USB_USBNET=m
CONFIG_USB_NET_CDC_EEM=m
CONFIG_USB_NET_HUAWEI_CDC_NCM=m
CONFIG_USB_NET_CDC_MBIM=m
@@ -780,6 +776,7 @@ CONFIG_USB_NET_SMSC95XX=m
CONFIG_USB_NET_GL620A=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_USB_NET_RNDIS_HOST=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_EPSON2888=y
@@ -847,6 +844,14 @@ CONFIG_RTL8192CU=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
CONFIG_RTW88=m
CONFIG_RTW88_8822BS=m
CONFIG_RTW88_8822BU=m
CONFIG_RTW88_8822CS=m
CONFIG_RTW88_8822CU=m
CONFIG_RTW88_8723DS=m
CONFIG_RTW88_8723DU=m
CONFIG_RTW88_8821CS=m
CONFIG_RTW88_8821CU=m
CONFIG_RTW89=m
CONFIG_RSI_91X=m
# CONFIG_RSI_DEBUGFS is not set
@@ -861,7 +866,6 @@ CONFIG_WL12XX=m
CONFIG_WL18XX=m
CONFIG_WLCORE_SPI=m
CONFIG_WLCORE_SDIO=m
CONFIG_RTL8723DU=m
CONFIG_RTL8723DS=m
CONFIG_RTL8822BU=m
CONFIG_RTL8821CU=m
@@ -869,9 +873,7 @@ CONFIG_88XXAU=m
CONFIG_RTL8192EU=m
CONFIG_RTL8189FS=m
CONFIG_RTL8189ES=m
CONFIG_USB_ZD1201=m
CONFIG_ZD1211RW=m
CONFIG_USB_NET_RNDIS_WLAN=m
CONFIG_VIRT_WIFI=m
CONFIG_NETDEVSIM=m
CONFIG_NET_FAILOVER=y
@@ -888,7 +890,6 @@ CONFIG_MOUSE_SYNAPTICS_USB=m
CONFIG_SERIAL_MESON=y
CONFIG_SERIAL_MESON_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_ARM_SMCCC_TRNG is not set
@@ -1109,11 +1110,13 @@ CONFIG_VIDEO_VICODEC=m
CONFIG_VIDEO_VIMC=m
CONFIG_VIDEO_VIVID=m
CONFIG_VIDEO_VIVID_CEC=y
CONFIG_DVB_MB86A16=m
CONFIG_VIDEO_VISL=m
CONFIG_VISL_DEBUGFS=y
CONFIG_DRM=y
CONFIG_DRM_MALI_DISPLAY=y
# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set
CONFIG_DRM_MESON=y
# CONFIG_DRM_MESON_DW_MIPI_DSI is not set
CONFIG_DRM_LIMA=y
CONFIG_FB=y
CONFIG_FB_SIMPLE=y
@@ -1121,10 +1124,10 @@ CONFIG_FB_MODE_HELPERS=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_DYNAMIC_MINORS=y
# CONFIG_SND_PCI is not set
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_USB_AUDIO_MIDI_V2=y
CONFIG_SND_USB_UA101=m
CONFIG_SND_USB_CAIAQ=m
CONFIG_SND_USB_CAIAQ_INPUT=y
@@ -1136,10 +1139,11 @@ CONFIG_SND_USB_PODHD=m
CONFIG_SND_USB_TONEPORT=m
CONFIG_SND_USB_VARIAX=m
CONFIG_SND_SOC=m
CONFIG_SND_MESON_AIU=m
CONFIG_SND_MESON_GX_SOUND_CARD=m
# CONFIG_SND_SOC_MESON_T9015 is not set
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD=m
# CONFIG_I2C_HID is not set
CONFIG_USB_LED_TRIG=y
CONFIG_USB_ULPI_BUS=y
CONFIG_USB_CONN_GPIO=y
@@ -1246,6 +1250,7 @@ CONFIG_USB_LD=m
CONFIG_USB_TRANCEVIBRATOR=m
CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_ONBOARD_DEV=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_U_SERIAL_CONSOLE=y
@@ -1265,6 +1270,7 @@ CONFIG_USB_CONFIGFS_F_UAC1=y
CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
CONFIG_USB_CONFIGFS_F_UAC2=y
CONFIG_USB_CONFIGFS_F_MIDI=y
CONFIG_USB_CONFIGFS_F_MIDI2=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_UVC=y
CONFIG_USB_CONFIGFS_F_PRINTER=y
@@ -1314,7 +1320,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=y
CONFIG_LEDS_TRIGGER_PATTERN=y
CONFIG_LEDS_TRIGGER_AUDIO=y
CONFIG_LEDS_TRIGGER_TTY=y
CONFIG_EDAC=y
CONFIG_RTC_CLASS=y
@@ -1394,6 +1399,7 @@ CONFIG_XFS_POSIX_ACL=y
CONFIG_XFS_RT=y
CONFIG_XFS_ONLINE_SCRUB=y
CONFIG_XFS_ONLINE_REPAIR=y
CONFIG_XFS_DEBUG=y
CONFIG_GFS2_FS=y
CONFIG_OCFS2_FS=y
CONFIG_OCFS2_DEBUG_FS=y
@@ -1419,7 +1425,7 @@ CONFIG_VIRTIO_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_FSCACHE=y
CONFIG_FSCACHE_STATS=y
CONFIG_CACHEFILES=y
CONFIG_CACHEFILES=m
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
@@ -1428,14 +1434,13 @@ CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_EXFAT_FS=y
CONFIG_NTFS_FS=y
CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=y
CONFIG_NTFS3_LZX_XPRESS=y
CONFIG_NTFS3_FS_POSIX_ACL=y
CONFIG_NTFS_FS=y
CONFIG_PROC_CHILDREN=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_QUOTA=y
CONFIG_ORANGEFS_FS=m
CONFIG_ADFS_FS=m
CONFIG_AFFS_FS=m
@@ -1448,6 +1453,7 @@ CONFIG_BFS_FS=m
CONFIG_EFS_FS=m
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=m
CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@@ -1471,7 +1477,11 @@ CONFIG_SYSV_FS=m
CONFIG_UFS_FS=m
CONFIG_EROFS_FS=m
CONFIG_EROFS_FS_ZIP_LZMA=y
CONFIG_EROFS_FS_ZIP_DEFLATE=y
CONFIG_EROFS_FS_PCPU_KTHREAD=y
# CONFIG_EROFS_FS_PCPU_KTHREAD_HIPRI is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
@@ -1479,15 +1489,19 @@ CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_NFS_V4_1_MIGRATION=y
CONFIG_ROOT_NFS=y
CONFIG_NFS_FSCACHE=y
CONFIG_NFSD=m
CONFIG_NFSD_V2=y
CONFIG_NFSD_V2_ACL=y
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_BLOCKLAYOUT=y
CONFIG_NFSD_SCSILAYOUT=y
CONFIG_NFSD_FLEXFILELAYOUT=y
CONFIG_NFSD_V4_2_INTER_SSC=y
# CONFIG_NFSD_LEGACY_CLIENT_TRACKING is not set
CONFIG_RPCSEC_GSS_KRB5=m
CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA=y
CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2=y
CONFIG_SUNRPC_DEBUG=y
CONFIG_CEPH_FS=m
CONFIG_CEPH_FSCACHE=y
@@ -1585,13 +1599,10 @@ CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_ADIANTUM=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_CFB=m
CONFIG_CRYPTO_CTS=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HCTR2=m
CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_OFB=m
CONFIG_CRYPTO_XTS=m
CONFIG_CRYPTO_AEGIS128=m
CONFIG_CRYPTO_CHACHA20POLY1305=m
@@ -1616,7 +1627,6 @@ CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m
CONFIG_CRYPTO_STATS=y
CONFIG_CRYPTO_GHASH_ARM_CE=m
CONFIG_CRYPTO_NHPOLY1305_NEON=m
CONFIG_CRYPTO_BLAKE2B_NEON=m
@@ -1638,11 +1648,11 @@ CONFIG_SYSTEM_BLACKLIST_KEYRING=y
CONFIG_PACKING=y
CONFIG_PRIME_NUMBERS=m
CONFIG_CRC4=m
CONFIG_CRC8=m
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO_DWARF5=y
CONFIG_DEBUG_INFO_BTF=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_FTRACE_SYSCALLS=y

View File

@@ -34,13 +34,13 @@ CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_MISC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
CONFIG_KEXEC=y
# CONFIG_CRASH_DUMP is not set
CONFIG_ARCH_MESON=y
CONFIG_ARM_THUMBEE=y
CONFIG_PL310_ERRATA_588369=y
@@ -82,7 +82,6 @@ CONFIG_PARTITION_ADVANCED=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_BINFMT_MISC=m
CONFIG_CMA=y
CONFIG_CMA_AREAS=7
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m
@@ -343,6 +342,7 @@ CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NFT_DUP_IPV6=m
@@ -392,6 +392,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_LOG=m
CONFIG_BRIDGE_EBT_NFLOG=m
CONFIG_BPFILTER=y
CONFIG_IP_DCCP=m
CONFIG_RDS=m
CONFIG_RDS_TCP=m
@@ -416,6 +417,9 @@ CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
CONFIG_LLC2=m
CONFIG_ATALK=m
CONFIG_DEV_APPLETALK=m
CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y
CONFIG_X25=m
CONFIG_LAPB=m
CONFIG_PHONET=m
@@ -487,6 +491,7 @@ CONFIG_NET_ACT_GACT=m
CONFIG_GACT_PROB=y
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_SAMPLE=m
CONFIG_NET_ACT_IPT=m
CONFIG_NET_ACT_NAT=m
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_ACT_SIMP=m
@@ -562,10 +567,8 @@ CONFIG_BT_ATH3K=m
CONFIG_BT_MTKSDIO=m
CONFIG_BT_MTKUART=m
CONFIG_BT_VIRTIO=m
CONFIG_BT_NXPUART=m
CONFIG_AF_RXRPC_IPV6=y
CONFIG_AF_RXRPC_INJECT_LOSS=y
CONFIG_AF_RXRPC_INJECT_RX_DELAY=y
CONFIG_AF_RXRPC_DEBUG=y
CONFIG_RXKAD=y
CONFIG_CFG80211=m
@@ -577,9 +580,10 @@ CONFIG_MAC80211_DEBUGFS=y
CONFIG_RFKILL=m
CONFIG_RFKILL_INPUT=y
CONFIG_RFKILL_GPIO=m
CONFIG_PAGE_POOL_STATS=y
CONFIG_PCI=y
# CONFIG_PCIEASPM is not set
CONFIG_PCI_MSI=y
# CONFIG_VGA_ARB is not set
CONFIG_PCI_HOST_GENERIC=y
# CONFIG_PCI_MESON is not set
CONFIG_UEVENT_HELPER=y
@@ -597,7 +601,6 @@ CONFIG_OF_OVERLAY=y
CONFIG_ZRAM=m
CONFIG_ZRAM_WRITEBACK=y
CONFIG_ZRAM_MEMORY_TRACKING=y
CONFIG_ZRAM_MULTI_COMP=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_DRBD=m
CONFIG_DRBD_FAULT_INJECTION=y
@@ -627,6 +630,9 @@ CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_SATA_MV=y
CONFIG_MD=y
CONFIG_MD_LINEAR=m
CONFIG_MD_MULTIPATH=m
CONFIG_MD_FAULTY=m
CONFIG_BCACHE=m
CONFIG_BCACHE_ASYNC_REGISTRATION=y
CONFIG_BLK_DEV_DM=m
@@ -740,7 +746,6 @@ CONFIG_DWMAC_DWC_QOS_ETH=y
# CONFIG_NET_VENDOR_XILINX is not set
CONFIG_REALTEK_PHY=y
# CONFIG_MDIO_BUS_MUX_MESON_G12A is not set
# CONFIG_MDIO_BUS_MUX_MESON_GXL is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
@@ -764,7 +769,6 @@ CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m
CONFIG_USB_LAN78XX=m
CONFIG_USB_USBNET=m
CONFIG_USB_NET_CDC_EEM=m
CONFIG_USB_NET_HUAWEI_CDC_NCM=m
CONFIG_USB_NET_CDC_MBIM=m
@@ -776,7 +780,6 @@ CONFIG_USB_NET_SMSC95XX=m
CONFIG_USB_NET_GL620A=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_USB_NET_RNDIS_HOST=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_EPSON2888=y
@@ -844,14 +847,6 @@ CONFIG_RTL8192CU=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
CONFIG_RTW88=m
CONFIG_RTW88_8822BS=m
CONFIG_RTW88_8822BU=m
CONFIG_RTW88_8822CS=m
CONFIG_RTW88_8822CU=m
CONFIG_RTW88_8723DS=m
CONFIG_RTW88_8723DU=m
CONFIG_RTW88_8821CS=m
CONFIG_RTW88_8821CU=m
CONFIG_RTW89=m
CONFIG_RSI_91X=m
# CONFIG_RSI_DEBUGFS is not set
@@ -866,6 +861,7 @@ CONFIG_WL12XX=m
CONFIG_WL18XX=m
CONFIG_WLCORE_SPI=m
CONFIG_WLCORE_SDIO=m
CONFIG_RTL8723DU=m
CONFIG_RTL8723DS=m
CONFIG_RTL8822BU=m
CONFIG_RTL8821CU=m
@@ -873,7 +869,9 @@ CONFIG_88XXAU=m
CONFIG_RTL8192EU=m
CONFIG_RTL8189FS=m
CONFIG_RTL8189ES=m
CONFIG_USB_ZD1201=m
CONFIG_ZD1211RW=m
CONFIG_USB_NET_RNDIS_WLAN=m
CONFIG_VIRT_WIFI=m
CONFIG_NETDEVSIM=m
CONFIG_NET_FAILOVER=y
@@ -890,6 +888,7 @@ CONFIG_MOUSE_SYNAPTICS_USB=m
CONFIG_SERIAL_MESON=y
CONFIG_SERIAL_MESON_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_ARM_SMCCC_TRNG is not set
@@ -1110,13 +1109,11 @@ CONFIG_VIDEO_VICODEC=m
CONFIG_VIDEO_VIMC=m
CONFIG_VIDEO_VIVID=m
CONFIG_VIDEO_VIVID_CEC=y
CONFIG_VIDEO_VISL=m
CONFIG_VISL_DEBUGFS=y
CONFIG_DVB_MB86A16=m
CONFIG_DRM=y
CONFIG_DRM_MALI_DISPLAY=y
# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set
CONFIG_DRM_MESON=y
# CONFIG_DRM_MESON_DW_MIPI_DSI is not set
CONFIG_DRM_LIMA=y
CONFIG_FB=y
CONFIG_FB_SIMPLE=y
@@ -1124,10 +1121,10 @@ CONFIG_FB_MODE_HELPERS=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_DYNAMIC_MINORS=y
# CONFIG_SND_PCI is not set
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_USB_AUDIO_MIDI_V2=y
CONFIG_SND_USB_UA101=m
CONFIG_SND_USB_CAIAQ=m
CONFIG_SND_USB_CAIAQ_INPUT=y
@@ -1139,11 +1136,10 @@ CONFIG_SND_USB_PODHD=m
CONFIG_SND_USB_TONEPORT=m
CONFIG_SND_USB_VARIAX=m
CONFIG_SND_SOC=m
CONFIG_SND_MESON_GX_SOUND_CARD=m
CONFIG_SND_MESON_AIU=m
# CONFIG_SND_SOC_MESON_T9015 is not set
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD=m
# CONFIG_I2C_HID is not set
CONFIG_USB_LED_TRIG=y
CONFIG_USB_ULPI_BUS=y
CONFIG_USB_CONN_GPIO=y
@@ -1250,7 +1246,6 @@ CONFIG_USB_LD=m
CONFIG_USB_TRANCEVIBRATOR=m
CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_ONBOARD_DEV=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_U_SERIAL_CONSOLE=y
@@ -1270,7 +1265,6 @@ CONFIG_USB_CONFIGFS_F_UAC1=y
CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
CONFIG_USB_CONFIGFS_F_UAC2=y
CONFIG_USB_CONFIGFS_F_MIDI=y
CONFIG_USB_CONFIGFS_F_MIDI2=y
CONFIG_USB_CONFIGFS_F_HID=y
CONFIG_USB_CONFIGFS_F_UVC=y
CONFIG_USB_CONFIGFS_F_PRINTER=y
@@ -1320,6 +1314,7 @@ CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=y
CONFIG_LEDS_TRIGGER_PATTERN=y
CONFIG_LEDS_TRIGGER_AUDIO=y
CONFIG_LEDS_TRIGGER_TTY=y
CONFIG_EDAC=y
CONFIG_RTC_CLASS=y
@@ -1399,7 +1394,6 @@ CONFIG_XFS_POSIX_ACL=y
CONFIG_XFS_RT=y
CONFIG_XFS_ONLINE_SCRUB=y
CONFIG_XFS_ONLINE_REPAIR=y
CONFIG_XFS_DEBUG=y
CONFIG_GFS2_FS=y
CONFIG_OCFS2_FS=y
CONFIG_OCFS2_DEBUG_FS=y
@@ -1425,7 +1419,7 @@ CONFIG_VIRTIO_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_FSCACHE=y
CONFIG_FSCACHE_STATS=y
CONFIG_CACHEFILES=m
CONFIG_CACHEFILES=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
@@ -1434,13 +1428,14 @@ CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_EXFAT_FS=y
CONFIG_NTFS_FS=y
CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=y
CONFIG_NTFS3_LZX_XPRESS=y
CONFIG_NTFS3_FS_POSIX_ACL=y
CONFIG_NTFS_FS=y
CONFIG_PROC_CHILDREN=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_QUOTA=y
CONFIG_ORANGEFS_FS=m
CONFIG_ADFS_FS=m
CONFIG_AFFS_FS=m
@@ -1453,7 +1448,6 @@ CONFIG_BFS_FS=m
CONFIG_EFS_FS=m
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=m
CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@@ -1477,11 +1471,7 @@ CONFIG_SYSV_FS=m
CONFIG_UFS_FS=m
CONFIG_EROFS_FS=m
CONFIG_EROFS_FS_ZIP_LZMA=y
CONFIG_EROFS_FS_ZIP_DEFLATE=y
CONFIG_EROFS_FS_PCPU_KTHREAD=y
# CONFIG_EROFS_FS_PCPU_KTHREAD_HIPRI is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
@@ -1489,19 +1479,15 @@ CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_NFS_V4_1_MIGRATION=y
CONFIG_ROOT_NFS=y
CONFIG_NFS_FSCACHE=y
CONFIG_NFSD=m
CONFIG_NFSD_V2=y
CONFIG_NFSD_V2_ACL=y
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_BLOCKLAYOUT=y
CONFIG_NFSD_SCSILAYOUT=y
CONFIG_NFSD_FLEXFILELAYOUT=y
CONFIG_NFSD_V4_2_INTER_SSC=y
# CONFIG_NFSD_LEGACY_CLIENT_TRACKING is not set
CONFIG_RPCSEC_GSS_KRB5=m
CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA=y
CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2=y
CONFIG_SUNRPC_DEBUG=y
CONFIG_CEPH_FS=m
CONFIG_CEPH_FSCACHE=y
@@ -1599,10 +1585,13 @@ CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_ADIANTUM=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_CFB=m
CONFIG_CRYPTO_CTS=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HCTR2=m
CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_OFB=m
CONFIG_CRYPTO_XTS=m
CONFIG_CRYPTO_AEGIS128=m
CONFIG_CRYPTO_CHACHA20POLY1305=m
@@ -1627,6 +1616,7 @@ CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m
CONFIG_CRYPTO_STATS=y
CONFIG_CRYPTO_GHASH_ARM_CE=m
CONFIG_CRYPTO_NHPOLY1305_NEON=m
CONFIG_CRYPTO_BLAKE2B_NEON=m
@@ -1648,11 +1638,11 @@ CONFIG_SYSTEM_BLACKLIST_KEYRING=y
CONFIG_PACKING=y
CONFIG_PRIME_NUMBERS=m
CONFIG_CRC4=m
CONFIG_CRC8=m
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO_DWARF5=y
CONFIG_DEBUG_INFO_BTF=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_FTRACE_SYSCALLS=y

View File

@@ -24,15 +24,11 @@ SKIP_BOOTSPLASH="yes"
case $BRANCH in
legacy)
declare -g KERNEL_MAJOR_MINOR="6.1"
;;
current)
declare -g KERNEL_MAJOR_MINOR="6.6"
;;
edge)
declare -g KERNEL_MAJOR_MINOR="6.10"
current)
declare -g KERNEL_MAJOR_MINOR="6.12"
;;
esac

View File

@@ -1,22 +0,0 @@
meson8/meson8b/meson8m2: drm: Forcefully enable XRGB format
---
drivers/gpu/drm/meson/meson_plane.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index 27e39577218..027b2fe7ff8 100644
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -483,6 +483,8 @@ static const struct drm_plane_funcs meson_plane_funcs = {
static const uint32_t supported_drm_formats_m8[] = {
DRM_FORMAT_ARGB8888,
DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
DRM_FORMAT_RGB888,
DRM_FORMAT_RGB565,
};
--
2.34.1

View File

@@ -1,74 +0,0 @@
Revert "mmc: core: Set HS clock speed before sending HS CMD13"
This reverts commit 4bc31edebde51fcf8ad0794763b8679a7ecb5ec0.
---
drivers/mmc/core/mmc.c | 23 ++++-------------------
1 file changed, 4 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 89cd48fcec7..a776ac64154 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1391,17 +1391,13 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
- /*
- * Bump to HS timing and frequency. Some cards don't handle
- * SEND_STATUS reliably at the initial frequency.
- */
mmc_set_timing(host, MMC_TIMING_MMC_HS);
- mmc_set_bus_speed(card);
-
err = mmc_switch_status(card, true);
if (err)
goto out_err;
+ mmc_set_clock(host, card->ext_csd.hs_max_dtr);
+
/* Switch card to DDR with strobe bit */
val = EXT_CSD_DDR_BUS_WIDTH_8 | EXT_CSD_BUS_WIDTH_STROBE;
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@@ -1459,7 +1455,7 @@ static int mmc_select_hs400es(struct mmc_card *card)
static int mmc_select_hs200(struct mmc_card *card)
{
struct mmc_host *host = card->host;
- unsigned int old_timing, old_signal_voltage, old_clock;
+ unsigned int old_timing, old_signal_voltage;
int err = -EINVAL;
u8 val;
@@ -1490,17 +1486,8 @@ static int mmc_select_hs200(struct mmc_card *card)
false, true, MMC_CMD_RETRIES);
if (err)
goto err;
-
- /*
- * Bump to HS timing and frequency. Some cards don't handle
- * SEND_STATUS reliably at the initial frequency.
- * NB: We can't move to full (HS200) speeds until after we've
- * successfully switched over.
- */
old_timing = host->ios.timing;
- old_clock = host->ios.clock;
mmc_set_timing(host, MMC_TIMING_MMC_HS200);
- mmc_set_clock(card->host, card->ext_csd.hs_max_dtr);
/*
* For HS200, CRC errors are not a reliable way to know the
@@ -1513,10 +1500,8 @@ static int mmc_select_hs200(struct mmc_card *card)
* mmc_select_timing() assumes timing has not changed if
* it is a switch error.
*/
- if (err == -EBADMSG) {
- mmc_set_clock(host, old_clock);
+ if (err == -EBADMSG)
mmc_set_timing(host, old_timing);
- }
}
err:
if (err) {
--
2.34.1

View File

@@ -1,35 +0,0 @@
Revert "pwm: meson: modify and simplify calculation in meson_pwm_get_state"
This reverts commit 6b9352f3f8a1a35faf0efc1ad1807ee303467796.
---
drivers/pwm/pwm-meson.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 33107204a951..1d0b69d08cdd 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -351,8 +351,18 @@ static int meson_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
channel->lo = FIELD_GET(PWM_LOW_MASK, value);
channel->hi = FIELD_GET(PWM_HIGH_MASK, value);
- state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->lo + channel->hi);
- state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
+ if (channel->lo == 0) {
+ state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
+ state->duty_cycle = state->period;
+ } else if (channel->lo >= channel->hi) {
+ state->period = meson_pwm_cnt_to_ns(chip, pwm,
+ channel->lo + channel->hi);
+ state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm,
+ channel->hi);
+ } else {
+ state->period = 0;
+ state->duty_cycle = 0;
+ }
state->polarity = PWM_POLARITY_NORMAL;
--
2.34.1

View File

@@ -1,107 +0,0 @@
From 9e961c5c05f0b90d1fde647c996077c84d198157 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 20 Mar 2020 15:17:51 +0100
Subject: [PATCH 57/89] ARM: dts: meson8b: odroid-c1: enable HDMI for the
Odroid-C1 - WiP
WiP
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 59 ++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 04356bc639f..3359255f8d6 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -32,6 +32,17 @@ emmc_pwrseq: emmc-pwrseq {
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
blue {
@@ -93,6 +104,38 @@ rtc32k_xtal: rtc32k-xtal-clk {
#clock-cells = <0>;
};
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "ODROID-C1";
+
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-rates = <294912000>,
+ <270950400>;
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx 0>;
+ };
+ };
+ };
+
vcc_1v8: regulator-vcc-1v8 {
/*
* RICHTEK RT9179 configured for a fixed output voltage of
@@ -187,6 +230,10 @@ vdd_rtc: regulator-vdd-rtc {
};
};
+&aiu {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vcck>;
};
@@ -296,6 +343,18 @@ usb-hub {
};
};
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
&ir_receiver {
status = "okay";
pinctrl-0 = <&ir_recv_pins>;
--
2.25.1

View File

@@ -1,443 +0,0 @@
From 7ee5e1ab3026c8011af1e49d7930bdcf782c3c56 Mon Sep 17 00:00:00 2001
From: hzy <hzyitc@outlook.com>
Date: Sat, 1 Apr 2023 13:24:42 +0800
Subject: [PATCH 1/2] ARM: dts: meson8b: Add DTS for Xunlei Onecloud
Signed-off-by: hzy <hzyitc@outlook.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/meson8b-onecloud.dts | 410 +++++++++++++++++++++++++
2 files changed, 411 insertions(+)
create mode 100644 arch/arm/boot/dts/meson8b-onecloud.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6aa7dc4d..e3a3577b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -401,6 +401,7 @@ dtb-$(CONFIG_MACH_MESON8) += \
meson8b-ec100.dtb \
meson8b-mxq.dtb \
meson8b-odroidc1.dtb \
+ meson8b-onecloud.dtb \
meson8m2-mxiii-plus.dtb
dtb-$(CONFIG_ARCH_MMP) += \
pxa168-aspenite.dtb \
diff --git a/arch/arm/boot/dts/meson8b-onecloud.dts b/arch/arm/boot/dts/meson8b-onecloud.dts
new file mode 100644
index 00000000..1fa5420f
--- /dev/null
+++ b/arch/arm/boot/dts/meson8b-onecloud.dts
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Author: hzy <hzyitc@outlook.com>
+ */
+
+/dts-v1/;
+
+#include "meson8b.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Xunlei OneCloud";
+ compatible = "xunlei,onecloud", "amlogic,meson8b";
+
+ aliases {
+ serial0 = &uart_AO;
+ mmc0 = &sd_card_slot;
+ mmc1 = &sdhc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x40000000 0x40000000>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ button {
+ // compatible = "gpio-keys-polled";
+ // poll-interval = <100>;
+
+ compatible = "gpio-keys";
+
+ autorepeat;
+
+ reset-button {
+ label = "reset";
+ linux,code = <BTN_0>;
+
+ // gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>; // GPIOAO 5
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ red {
+ label = "onecloud:red:alive";
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+
+ default-state = "on";
+ linux,default-trigger = "default-on";
+ };
+
+ green {
+ label = "onecloud:green:alive";
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+
+ default-state = "off";
+ linux,default-trigger = "mmc1";
+ };
+
+ blue {
+ label = "onecloud:blue:alive";
+ gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+
+ default-state = "off";
+ linux,default-trigger = "usb-host";
+ };
+ };
+
+ p12v: regulator-p12v {
+ compatible = "regulator-fixed";
+
+ regulator-name = "P12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc_5v: regulator-vcc-5v {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VCC5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ vin-supply = <&p12v>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc-3v3 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VCC3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ vin-supply = <&p12v>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc-1v8 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VCC1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ vin-supply = <&p12v>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_ddr: regulator-vcc-ddr {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VCC_DDR";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+
+ vin-supply = <&vcc_3v3>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_core: regulator-vcc-core {
+ compatible = "pwm-regulator";
+
+ regulator-name = "VCC_CORE";
+
+ // +---------------------------------------------------+
+ // | The actual mapping in phyical |
+ // +------+--------+--------+--------+--------+--------+
+ // | | 100% | 60% | 30% | 10% | 0% |
+ // +------+--------+--------+--------+--------+--------+
+ // | V1.0 | 677mV | 857mV | 992mV | 1082mV | 1127mV |
+ // | V1.3 | 1116mV | 1121mV | 1125mV | 1128mV | 1129mV |
+ // +------+--------+--------+--------+--------+--------+
+ //
+ // According to meson8b.dtsi, the CPU should be able to
+ // run at 504MHz with 870mV. But this regulator supplies
+ // not only CPU but also GPU. And according to the users'
+ // tests on V1.0, we need such higher voltages.
+
+ pwms = <&pwm_cd 1 12001 0>; // PWM_D
+ pwm-dutycycle-range = <10 0>;
+ regulator-min-microvolt = <860000>;
+ regulator-max-microvolt = <1140000>;
+
+ pwm-supply = <&p12v>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_cd {
+ status = "okay";
+ pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>, <&xtal>;
+ clock-names = "clkin0", "clkin1";
+};
+
+&cpu0 {
+ cpu-supply = <&vcc_core>;
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcc_1v8>;
+};
+
+&mali {
+ // commented to allow cpufreq tweaking
+ // mali-supply = <&vcc_core>;
+};
+
+&gpio {
+ gpio-line-names =
+ /* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
+ /* 1 */ "WIFI_SDIO_D1 PIN19 (GPIOX_1)",
+ /* 2 */ "WIFI_SDIO_D2 PIN14 (GPIOX_2)",
+ /* 3 */ "WIFI_SDIO_D3 PIN15 (GPIOX_3)",
+ /* 4 */ "WIFI_PCM_DIN PIN27 (GPIOX_4)",
+ /* 5 */ "WIFI_PCM_DOUT PIN25 (GPIOX_5)",
+ /* 6 */ "WIFI_PCM_SYNC PIN28 (GPIOX_6)",
+ /* 7 */ "WIFI_PCM_CLK PIN26 (GPIOX_7)",
+ /* 8 */ "WIFI_SDIO_CLK PIN17_Resistor (GPIOX_8)",
+ /* 9 */ "WIFI_SDIO_CMD PIN16 (GPIOX_9)",
+ /* 10 */ "GPIOX_10",
+ /* 11 */ "WIFI PIN12 (GPIOX_11)",
+ /* 12 */ "WIFI_UART_RX PIN43 (GPIOX_16)",
+ /* 13 */ "WIFI_UART_TX PIN42 (GPIOX_17)",
+ /* 14 */ "WIFI_UART_RTS PIN41_Resistor (GPIOX_18)",
+ /* 15 */ "WIFI_UART_CTS PIN44 (GPIOX_19)",
+ /* 16 */ "WIFI PIN34 (GPIOX_20)",
+ /* 17 */ "WIFI_WAKE PIN13 (GPIOX_21)",
+
+ /* 18 */ "Resistor_TopOf_LED (GPIOY_0)",
+ /* 19 */ "GPIOY_1",
+ /* 20 */ "GPIOY_3",
+ /* 21 */ "GPIOY_6",
+ /* 22 */ "GPIOY_7",
+ /* 23 */ "GPIOY_8",
+ /* 24 */ "GPIOY_9",
+ /* 25 */ "GPIOY_10",
+ /* 26 */ "GPIOY_11",
+ /* 27 */ "GPIOY_12",
+ /* 28 */ "Left_BottomOf_CPU (GPIOY_13)",
+ /* 29 */ "Right_BottomOf_CPU (GPIOY_14)",
+
+ /* 30 */ "GPIODV_9 (PWM_C)",
+ /* 31 */ "GPIODV_24",
+ /* 32 */ "GPIODV_25",
+ /* 33 */ "GPIODV_26",
+ /* 34 */ "GPIODV_27",
+ /* 35 */ "VCC_CPU_PWM (GPIODV_28)",
+ /* 36 */ "GPIODV_29",
+
+ /* 37 */ "HDMI_HPD (GPIOH_0)",
+ /* 38 */ "HDMI_SDA (GPIOH_1)",
+ /* 39 */ "HDMI_SCL (GPIOH_2)",
+ /* 40 */ "ETH_PHY_INTR (GPIOH_3)",
+ /* 41 */ "ETH_PHY_nRST (GPIOH_4)",
+ /* 42 */ "ETH_TXD1 (GPIOH_5)",
+ /* 43 */ "ETH_TXD0 (GPIOH_6)",
+ /* 44 */ "ETH_TXD3 (GPIOH_7)",
+ /* 45 */ "ETH_TXD2 (GPIOH_8)",
+ /* 46 */ "ETH_TX_CLK (GPIOH_9)",
+
+ /* 47 */ "SDCARD_D1 (CARD_0)",
+ /* 48 */ "SDCARD_D0 (CARD_1)",
+ /* 49 */ "SDCARD_CLK (CARD_2)",
+ /* 50 */ "SDCARD_CMD (CARD_3)",
+ /* 51 */ "SDCARD_D3 (CARD_4)",
+ /* 52 */ "SDCARD_D2 (CARD_5)",
+ /* 53 */ "SDCARD_CD (CARD_6)",
+
+ /* 54 */ "EMMC_D0 (BOOT_0)",
+ /* 55 */ "EMMC_D1 (BOOT_1)",
+ /* 56 */ "EMMC_D2 (BOOT_2)",
+ /* 57 */ "EMMC_D3 (BOOT_3)",
+ /* 58 */ "EMMC_D4 (BOOT_4)",
+ /* 59 */ "EMMC_D5 (BOOT_5)",
+ /* 60 */ "EMMC_D6 (BOOT_6)",
+ /* 61 */ "EMMC_D7 (BOOT_7)",
+ /* 62 */ "EMMC_CLK (BOOT_8)",
+ /* 63 */ "EMMC_nRST (BOOT_9)",
+ /* 64 */ "EMMC_CMD (BOOT_10)",
+ /* 65 */ "BOOT_11",
+ /* 66 */ "BOOT_12",
+ /* 67 */ "BOOT_13",
+ /* 68 */ "BOOT_14",
+ /* 69 */ "BOOT_15",
+ /* 70 */ "BOOT_16",
+ /* 71 */ "BOOT_17",
+ /* 72 */ "BOOT_18",
+
+ /* 73 */ "ETH_RXD1 (DIF_0_P)",
+ /* 74 */ "ETH_RXD0 (DIF_0_N)",
+ /* 75 */ "ETH_RX_DV (DIF_1_P)",
+ /* 76 */ "ETH_RX_CLK (DIF_1_N)",
+ /* 77 */ "ETH_RXD3 (DIF_2_P)",
+ /* 78 */ "ETH_RXD2 (DIF_2_N)",
+ /* 79 */ "ETH_TX_EN (DIF_3_P)",
+ /* 80 */ "ETH_REF_CLK (DIF_3_N)",
+ /* 81 */ "ETH_MDC (DIF_4_P)",
+ /* 82 */ "ETH_MDIO_EN (DIF_4_N)";
+};
+
+&gpio_ao {
+ gpio-line-names =
+ /* 0 */ "UART TX (GPIOAO_0)",
+ /* 1 */ "UART RX (GPIOAO_1)",
+ /* 2 */ "RED_LED (GPIOAO_2)",
+ /* 3 */ "GREEN_LED (GPIOAO_3)",
+ /* 4 */ "BLUE_LED (GPIOAO_4)",
+ /* 5 */ "BUTTON (GPIOAO_5)",
+ /* 6 */ "GPIOAO_6",
+ /* 7 */ "IR_IN (GPIOAO_7)",
+ /* 8 */ "GPIOAO_8",
+ /* 9 */ "GPIOAO_9",
+ /* 10 */ "GPIOAO_10",
+ /* 11 */ "GPIOAO_11",
+ /* 12 */ "GPIOAO_12",
+ /* 13 */ "GPIOAO_13",
+
+ /* 14 */ "GPIO_BSD_EN",
+ /* 15 */ "GPIO_TEST_N";
+};
+
+// eMMC
+&sdhc {
+ status = "okay";
+
+ pinctrl-0 = <&sdxc_c_pins>;
+ pinctrl-names = "default";
+
+ non-removable;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ // vqmmc-supply = <&vcc_3v3>;
+};
+
+&sdio {
+ status = "okay";
+
+ pinctrl-0 = <&sd_b_pins>;
+ pinctrl-names = "default";
+
+ // SD card
+ sd_card_slot: slot@1 {
+ compatible = "mmc-slot";
+ reg = <1>;
+ status = "okay";
+
+ bus-width = <4>;
+ no-sdio;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+
+ vmmc-supply = <&vcc_3v3>;
+ // vqmmc-supply = <&vcc_3v3>;
+ };
+};
+
+&ethmac {
+ status = "okay";
+
+ pinctrl-0 = <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&eth_phy>;
+ phy-mode = "rgmii-rxid";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ // Realtek RTL8211F (0x001cc916)
+ eth_phy: ethernet-phy@0 {
+ reg = <0>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>; // GPIOH 3
+ };
+ };
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "otg";
+ usb-role-switch;
+ role-switch-default-mode = "host";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&ir_receiver {
+ status = "okay";
+ pinctrl-0 = <&ir_recv_pins>;
+ pinctrl-names = "default";
+};
--
2.34.1

View File

@@ -24,7 +24,7 @@ index 111111111111..222222222222 100644
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
@@ -620,6 +621,19 @@ static int dwc2_driver_probe(struct platform_device *dev)
@@ -622,6 +623,19 @@ static int dwc2_driver_probe(struct platform_device *dev)
}
}
#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */

View File

@@ -25,7 +25,7 @@ diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig
index 111111111111..222222222222 100644
--- a/drivers/gpu/drm/meson/Kconfig
+++ b/drivers/gpu/drm/meson/Kconfig
@@ -10,6 +10,7 @@ config DRM_MESON
@@ -12,6 +12,7 @@ config DRM_MESON
select REGMAP_MMIO
select MESON_CANVAS
select CEC_CORE if CEC_NOTIFIER

View File

@@ -18,7 +18,7 @@ diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/dev
index 111111111111..222222222222 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -216,6 +216,7 @@ properties:
@@ -222,6 +222,7 @@ properties:
- allwinner,sun9i-a80-smp
- allwinner,sun8i-a83t-smp
- amlogic,meson8-smp

View File

@@ -18,7 +18,7 @@ diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig
index 111111111111..222222222222 100644
--- a/drivers/gpu/drm/meson/Kconfig
+++ b/drivers/gpu/drm/meson/Kconfig
@@ -25,3 +25,13 @@ config DRM_MESON_DW_MIPI_DSI
@@ -27,3 +27,13 @@ config DRM_MESON_DW_MIPI_DSI
default y if DRM_MESON
select DRM_DW_MIPI_DSI
select GENERIC_PHY_MIPI_DPHY

View File

@@ -1,19 +1,19 @@
From c358aa892b4f6f12114ad516b3ce5393f3f6d60a Mon Sep 17 00:00:00 2001
From: hzy <hzyitc@outlook.com>
Date: Sat, 1 Apr 2023 10:26:14 +0800
Subject: [PATCH 2/2] ARM: dts: meson8b: onecloud: Support HDMI
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Dominik=20W=C3=B3jt?= <domin144@o2.pl>
Date: Tue, 29 Oct 2024 19:31:00 +0100
Subject: meson8b-mxq: add HDMI support
Signed-off-by: hzy <hzyitc@outlook.com>
Copied from 0066-ARM-dts-meson8b-odroid-c1-enable-HDMI-for-the-Odroid.patch
---
arch/arm/boot/dts/meson8b-onecloud.dts | 58 ++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
arch/arm/boot/dts/amlogic/meson8b-mxq.dts | 60 ++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-onecloud.dts b/arch/arm/boot/dts/meson8b-onecloud.dts
index 1fa5420f..6ed19522 100644
--- a/arch/arm/boot/dts/meson8b-onecloud.dts
+++ b/arch/arm/boot/dts/meson8b-onecloud.dts
@@ -80,6 +80,48 @@ blue {
};
diff --git a/arch/arm/boot/dts/amlogic/meson8b-mxq.dts b/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
+++ b/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
@@ -27,6 +27,50 @@ memory {
reg = <0x40000000 0x40000000>;
};
+ hdmi-connector {
@@ -27,8 +27,10 @@ index 1fa5420f..6ed19522 100644
+ };
+ };
+
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "ODROID-C1";
+
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
@@ -58,24 +60,17 @@ index 1fa5420f..6ed19522 100644
+ };
+ };
+
p12v: regulator-p12v {
compatible = "regulator-fixed";
vcck: regulator-vcck {
compatible = "pwm-regulator";
@@ -199,6 +241,10 @@ &mali {
// mali-supply = <&vcc_core>;
@@ -91,6 +135,22 @@ vddee: regulator-vddee {
};
};
+&aiu {
+ status = "okay";
+};
+
&gpio {
gpio-line-names =
/* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
@@ -403,6 +449,18 @@ &usb1_phy {
status = "okay";
};
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
@@ -88,9 +83,9 @@ index 1fa5420f..6ed19522 100644
+ };
+};
+
&ir_receiver {
status = "okay";
pinctrl-0 = <&ir_recv_pins>;
&cpu0 {
cpu-supply = <&vcck>;
};
--
2.34.1
Armbian

View File

@@ -12,7 +12,7 @@ diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 111111111111..222222222222 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1401,17 +1401,13 @@ static int mmc_select_hs400es(struct mmc_card *card)
@@ -1387,17 +1387,13 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
@@ -32,7 +32,7 @@ index 111111111111..222222222222 100644
/* Switch card to DDR with strobe bit */
val = EXT_CSD_DDR_BUS_WIDTH_8 | EXT_CSD_BUS_WIDTH_STROBE;
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@@ -1469,7 +1465,7 @@ static int mmc_select_hs400es(struct mmc_card *card)
@@ -1455,7 +1451,7 @@ static int mmc_select_hs400es(struct mmc_card *card)
static int mmc_select_hs200(struct mmc_card *card)
{
struct mmc_host *host = card->host;
@@ -41,7 +41,7 @@ index 111111111111..222222222222 100644
int err = -EINVAL;
u8 val;
@@ -1500,17 +1496,8 @@ static int mmc_select_hs200(struct mmc_card *card)
@@ -1486,17 +1482,8 @@ static int mmc_select_hs200(struct mmc_card *card)
false, true, MMC_CMD_RETRIES);
if (err)
goto err;
@@ -59,7 +59,7 @@ index 111111111111..222222222222 100644
/*
* For HS200, CRC errors are not a reliable way to know the
@@ -1523,10 +1510,8 @@ static int mmc_select_hs200(struct mmc_card *card)
@@ -1509,10 +1496,8 @@ static int mmc_select_hs200(struct mmc_card *card)
* mmc_select_timing() assumes timing has not changed if
* it is a switch error.
*/