RESEND - Add initial support for Orangepi 5 Ultra (#7902)

* Create rk3588-orangepi-5-ultra.dts

* Create orangepi5-ultra.csc

* fixups

* add notes

* fix u-boot compilation

* Update to v7 patch series

https://patchwork.kernel.org/project/linux-arm-kernel/cover/20250222193332.1761-1-honyuenkwun@gmail.com/

* Update rk3588-orangepi-5-ultra.dts

While I don't fully understand either the `kernel-dtb` command nor the dt syntax itself for some reason the `nophandles` version stripped more than actually phandles. Lets see what happens this way.

* Delete patch/kernel/integrate-6.15/0001-tools-Makefile-remove-pci-target.patch

* disable OPTEE

c81f89ca90
This commit is contained in:
Werner
2025-03-08 19:10:34 +00:00
committed by GitHub
parent f64b9f15d3
commit fe49bf5e94
5 changed files with 5601 additions and 0 deletions

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# Rockchip RK3588 octa core whatever fixme
BOARD_NAME="Orange Pi 5 Ultra"
BOARDFAMILY="rockchip-rk3588"
BOARD_MAINTAINER=""
BOOTCONFIG="orangepi-5-ultra-rk3588_defconfig" # vendor name, not standard, see hook below, set BOOT_SOC below to compensate
BOOT_SOC="rk3588"
KERNEL_TARGET="current,edge"
KERNEL_TEST_TARGET="current,edge"
FULL_DESKTOP="yes"
BOOT_LOGO="desktop"
BOOT_FDT_FILE="rockchip/rk3588-orangepi-5-ultra.dtb"
BOOT_SCENARIO="spl-blobs"
BOOT_SUPPORT_SPI="yes"
BOOT_SPI_RKSPI_LOADER="yes"
IMAGE_PARTITION_TABLE="gpt"
#enable_extension "bcmdhd"
BCMDHD_TYPE="sdio"
# for testing purpose only. needs adaption to mainline once this makes it into 6.15 or .16
function post_family_config_branch_edge__orangepi5-ultra_use_custom_source() {
KERNEL_MAJOR_MINOR="6.14" # Major and minor versions of this kernel.
KERNELSOURCE='https://github.com/jimmyhon/linux.git'
KERNELBRANCH='branch:integrate-6.15'
KERNELPATCHDIR='integrate-6.15'
EXTRAWIFI=no # due to absence of our own fixups 3rd party wifi drivers break
}
function post_family_tweaks__orangepi5ultra_naming_audios() {
display_alert "$BOARD" "Renaming orangepi5ultra audios" "info"
mkdir -p $SDCARD/etc/udev/rules.d/
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi0-sound", ENV{SOUND_DESCRIPTION}="HDMI0 Audio"' > $SDCARD/etc/udev/rules.d/90-naming-audios.rules
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi1-sound", ENV{SOUND_DESCRIPTION}="HDMI1 Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules
echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-es8388-sound", ENV{SOUND_DESCRIPTION}="ES8388 Audio"' >> $SDCARD/etc/udev/rules.d/90-naming-audios.rules
return 0
}
function post_family_tweaks_bsp__orangepi5ultra_bluetooth() {
display_alert "$BOARD" "Installing ap6611s-bluetooth.service" "info"
# Bluetooth on this board is handled by a Broadcom (AP6611S) chip and requires
# a custom brcm_patchram_plus binary, plus a systemd service to run it at boot time
install -m 755 $SRC/packages/bsp/rk3399/brcm_patchram_plus_rk3399 $destination/usr/bin
cp $SRC/packages/bsp/rk3399/rk3399-bluetooth.service $destination/lib/systemd/system/ap6611s-bluetooth.service
# Reuse the service file, ttyS0 -> ttyS7; BCM4345C5.hcd -> SYN43711A0.hcd
sed -i 's/ttyS0/ttyS7/g' $destination/lib/systemd/system/ap6611s-bluetooth.service
sed -i 's/BCM4345C5.hcd/SYN43711A0.hcd/g' $destination/lib/systemd/system/ap6611s-bluetooth.service
return 0
}
function post_family_tweaks__orangepi5ultra_enable_bluetooth_service() {
display_alert "$BOARD" "Enabling ap6611s-bluetooth.service" "info"
chroot_sdcard systemctl enable ap6611s-bluetooth.service
return 0
}

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config: # This is file 'patch/kernel/archive/rockchip64-6.8/0000.patching_config.yaml'
# Just some info stuff; not used by the patching scripts
name: integrate-6.15
kind: kernel
type: mainline # or: vendor
branch: linux-6.14.y
last-known-good-tag: v6.14
maintainers:
- { github: rpardini, name: Ricardo Pardini, email: ricardo@pardini.net, armbian-forum: rpardini }
- { github: paolosabatino, name: Paolo Sabatino, email: paolo.sabatino@gmail.com, armbian-forum: jock }
# .dts files in these directories will be copied as-is to the build tree; later ones overwrite earlier ones.
# This is meant to provide a way to "add a board DTS" without having to null-patch them in.
dts-directories:
- { source: "dt", target: "arch/arm64/boot/dts/rockchip" }
# every file in these directories will be copied as-is to the build tree; later ones overwrite earlier ones
# This is meant as a way to have overlays, bare, in a directory, without having to null-patch them in.
# @TODO need a solution to auto-Makefile the overlays as well
overlay-directories:
- { source: "overlay", target: "arch/arm64/boot/dts/rockchip/overlay" }
# the Makefile in each of these directories will be magically patched to include the dts files copied
# or patched-in; overlay subdir will be included "-y" if it exists.
# No more Makefile patching needed, yay!
auto-patch-dt-makefile:
- { directory: "arch/arm64/boot/dts/rockchip", config-var: "CONFIG_ARCH_ROCKCHIP" }
# configuration for when applying patches to git / auto-rewriting patches (development cycle helpers)
patches-to-git:
do-not-commit-files:
- "MAINTAINERS" # constant churn, drop them. sorry.
- "Documentation/devicetree/bindings/arm/rockchip.yaml" # constant churn, conflicts on every bump, drop it. sorry.
do-not-commit-regexes: # Python-style regexes
- "^arch/([a-zA-Z0-9]+)/boot/dts/([a-zA-Z0-9]+)/Makefile$" # ignore DT Makefile patches, we've an auto-patcher now

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CONFIG_ARM=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_FIT_IMAGE=y
CONFIG_ROCKCHIP_HWID_DTB=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_USING_KERNEL_DTB_V2=y
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_LOADER_INI="RK3588MINIALL.ini"
CONFIG_TRUST_INI="RK3588TRUST.ini"
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_EVB_RK3588=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-ultra"
CONFIG_DEFAULT_FDT_FILE="rk3588-orangepi-5-ultra"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_HW_CRYPTO=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_FIT_HW_CRYPTO=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_ANDROID_AVB=y
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
CONFIG_SPL_MMC_WRITE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_ATF=y
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DTIMG=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTP_BOOTM=y
CONFIG_CMD_TFTP_FLASH=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MTD_BLK=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DTB_MINIMUM=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_NET_TFTP_VARS is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SARADC_ROCKCHIP is not set
CONFIG_SARADC_ROCKCHIP_V2=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_SCMI=y
CONFIG_SPL_CLK_SCMI=y
CONFIG_DM_CRYPTO=y
CONFIG_SPL_DM_CRYPTO=y
CONFIG_ROCKCHIP_CRYPTO_V2=y
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_SPL_SCMI_FIRMWARE=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_GPIO_V2=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_DM_KEY=y
CONFIG_ADC_KEY=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MISC_DECOMPRESS=y
CONFIG_SPL_MISC_DECOMPRESS=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_MTD_BLK=y
CONFIG_MTD_DEVICE=y
CONFIG_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_DWC_ETH_QOS=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_SPI_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK860X=y
CONFIG_REGULATOR_RK806=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_ROCKCHIP_SDRAM_COMMON=y
CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
CONFIG_DM_RESET=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RESET_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_LIB_RAND=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_N_SIZE=0x200
CONFIG_RSA_E_SIZE=0x10
CONFIG_RSA_C_SIZE=0x20
CONFIG_LZ4=y
CONFIG_ERRNO_STR=y
# CONFIG_EFI_LOADER is not set
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_RK_AVB_LIBAVB_USER=y
CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
CONFIG_SYS_PROMPT="opi# "
CONFIG_MTD_BLK_U_BOOT_OFFS=0x400
CONFIG_ROCKCHIP_EMMC_IOMUX=y

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd
*
*/
/dts-v1/;
#include "rk3588.dtsi"
#include "rk3588-u-boot.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "RK3588 Orange Pi 5 Ultra";
compatible = "rockchip,rk3588-orangepi-5-ultra", "rockchip,rk3588";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
u-boot,dm-pre-reloc;
status = "okay";
volumeup-key {
u-boot,dm-pre-reloc;
linux,code = <KEY_VOLUMEUP>;
label = "volume up";
press-threshold-microvolt = <1750>;
};
};
vcc5v0_sys: vcc5v0-sys {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_host: vcc5v0-host {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
regulator-always-on;
vin-supply = <&vcc5v0_sys>;
};
};
&u2phy0 {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy0_otg {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy1 {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy1_otg {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy2 {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy2_host {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy3 {
u-boot,dm-pre-reloc;
status = "okay";
};
&u2phy3_host {
u-boot,dm-pre-reloc;
status = "okay";
};
&usb_host0_ehci {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc800000 0x0 0x40000>;
interrupts = <0 215 4>;
clocks = <&cru 413>, <&cru 414>, <&u2phy2>;
clock-names = "usbhost", "arbiter", "utmi";
companion = <&usb_host0_ohci>;
phys = <&u2phy2_host>;
phy-names = "usb2-phy";
power-domains = <&power 31>;
status = "okay";
};
&usb_host0_ohci {
u-boot,dm-pre-reloc;
compatible = "generic-ohci";
reg = <0x0 0xfc840000 0x0 0x40000>;
interrupts = <0 216 4>;
clocks = <&cru 413>, <&cru 414>, <&u2phy2>;
clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy2_host>;
phy-names = "usb2-phy";
power-domains = <&power 31>;
status = "okay";
};
&usb_host1_ehci {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc880000 0x0 0x40000>;
interrupts = <0 218 4>;
clocks = <&cru 415>, <&cru 416>, <&u2phy3>;
clock-names = "usbhost", "arbiter", "utmi";
companion = <&usb_host1_ohci>;
phys = <&u2phy3_host>;
phy-names = "usb2-phy";
power-domains = <&power 31>;
status = "okay";
};
&usb_host1_ohci {
u-boot,dm-pre-reloc;
compatible = "generic-ohci";
reg = <0x0 0xfc8c0000 0x0 0x40000>;
interrupts = <0 219 4>;
clocks = <&cru 415>, <&cru 416>, <&u2phy3>;
clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy3_host>;
phy-names = "usb2-phy";
power-domains = <&power 31>;
status = "okay";
};
&pcie3x4 {
u-boot,dm-pre-reloc;
vpcie3v3-supply = <&vcc3v3_pcie30>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie30phy {
u-boot,dm-pre-reloc;
status = "okay";
};
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins &fspim2_cs1>;
};