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Update sopine64 lpddr3 voltage patch for upstream changes

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This commit is contained in:
Ryan Sundberg
2019-04-05 06:30:57 +00:00
parent 5ade4bef7f
commit f0c96a6607
1 changed files with 17 additions and 15 deletions
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32
patch/atf/atf-sunxi64/board_pine64so/set-lpddr3-dram-voltage.patch
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@@ -1,19 +1,21 @@
diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c
index db79047..fb1b108 100644
index 71ccafa3..e592c029 100644
--- a/plat/sun50iw1p1/sunxi_power.c
+++ b/plat/sun50iw1p1/sunxi_power.c
@@ -261,12 +261,8 @@ static int pmic_setup(void)
* changes. This should be further confined once we are able to
* reliably detect a Pine64 board.
*/
- ret = sunxi_pmic_read(0x24); /* read DCDC5 register */
- if ((ret & 0x7f) == 0x26) { /* check for 1.24V value */
- NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n");
- sunxi_pmic_write(0x24, 0x2c);
- }
-
+ sunxi_pmic_write(0x24, 0x25);
@@ -252,6 +252,16 @@ static int pmic_setup(const char *dt_name)
ret = 0x2c;
}
}
+
sunxi_pmic_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */
sunxi_pmic_write(0x16, 0x12); /* DLDO2 = VCC2V5_EDP voltage = 2.5V */
+ /** Ditto for sopine64 */
+ if (!strcmp(dt_name, "sun50i-a64-sopine-baseboard")) {
+ if (ret == 0x26) { /* check for 1.24V value */
+ NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.20V\n");
+ sunxi_pmic_write(0x24, 0x25);
+ ret = 0x25;
+ }
+ }
+
/* reg 24h: DCDC5: 0.80-1.12V: 10mv/step, 1.14-1.84V: 20mv/step */
if (ret > 0x20)
ret = ((ret - 0x20) * 2) + 112;