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rockchip64: add sdmmc_ext node, mmc reset properties and otg usb fix to u-boot

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This commit is contained in:
Paolo Sabatino
2022-06-19 16:45:51 +00:00
committed by Paolo
parent 0e44d7b46b
commit d4daf41404
3 changed files with 96 additions and 0 deletions
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46
patch/u-boot/u-boot-rockchip64/rk3328-resets-for-mmc-controllers.patch Normal file
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@@ -0,0 +1,46 @@
From 91b83f2920631e3104fd5691bde107e39a98feee Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Fri, 5 Nov 2021 16:03:11 +0000
Subject: [PATCH 1/2] rk3328: resets for mmc controllers
---
arch/arm/dts/rk3328.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 945387e5..3314d5e4 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -859,6 +859,8 @@
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ resets = <&cru SRST_MMC0>;
+ reset-names = "reset";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
@@ -871,6 +873,8 @@
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ resets = <&cru SRST_SDIO>;
+ reset-names = "reset";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
@@ -883,8 +887,11 @@
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ resets = <&cru SRST_EMMC>;
+ reset-names = "reset";
fifo-depth = <0x100>;
max-frequency = <150000000>;
+
status = "disabled";
};
--
2.30.2

37
patch/u-boot/u-boot-rockchip64/rk3328-sdmmc_ext-node.patch Normal file
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@@ -0,0 +1,37 @@
From 073b28838387a4f7c5947d7a3f07d326f13b72f4 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Fri, 5 Nov 2021 16:03:53 +0000
Subject: [PATCH 2/2] rk3328: sdmmc_ext node
---
arch/arm/dts/rk3328.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 3314d5e4..a1fedc56 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -895,6 +895,20 @@
status = "disabled";
};
+ sdmmc_ext: dwmmc@ff5f0000 {
+ compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x0 0xff5f0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ fifo-depth = <0x100>;
+ max-frequency = <150000000>;
+ resets = <&cru SRST_SDMMCEXT>;
+ reset-names = "reset";
+ status = "disabled";
+ };
+
gmac2io: ethernet@ff540000 {
compatible = "rockchip,rk3328-gmac";
reg = <0x0 0xff540000 0x0 0x10000>;
--
2.30.2

13
patch/u-boot/u-boot-rockchip64/zzz-usb-otg-fix.patch Normal file
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@@ -0,0 +1,13 @@
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index cefe9d83..f7288203 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -440,6 +440,8 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
writel(usbcfg, &regs->gusbcfg);
+ mdelay(10);
+
/* Program the GAHBCFG Register. */
switch (readl(&regs->ghwcfg2) & DWC2_HWCFG2_ARCHITECTURE_MASK) {
case DWC2_HWCFG2_ARCHITECTURE_SLAVE_ONLY: