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Fix mvebu current pwm timer patch (#4275)
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@@ -317,45 +317,14 @@ index bad399e3f..d3fdaf177 100644
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}
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static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -817,26 +899,20 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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@@ -902,6 +902,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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void __iomem *base;
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u32 offset;
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u32 set;
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+ enum mvebu_pwm_ctrl ctrl_set;
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- if (of_device_is_compatible(mvchip->chip.of_node,
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- "marvell,armada-370-gpio")) {
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- /*
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- * There are only two sets of PWM configuration registers for
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- * all the GPIO lines on those SoCs which this driver reserves
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- * for the first two GPIO chips. So if the resource is missing
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- * we can't treat it as an error.
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- */
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- if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"))
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- return 0;
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- offset = 0;
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- } else if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) {
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- int ret = of_property_read_u32(dev->of_node,
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- "marvell,pwm-offset", &offset);
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- if (ret < 0)
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- return 0;
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- } else {
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+ if (!of_device_is_compatible(mvchip->chip.of_node,
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+ "marvell,armada-370-gpio"))
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+ return 0;
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+
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+ /*
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+ * There are only two sets of PWM configuration registers for
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+ * all the GPIO lines on those SoCs which this driver reserves
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+ * for the first two GPIO chips. So if the resource is missing
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+ * we can't treat it as an error.
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+ */
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+ if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"))
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return 0;
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- }
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if (IS_ERR(mvchip->clk))
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return PTR_ERR(mvchip->clk);
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if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) {
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int ret = of_property_read_u32(dev->of_node,
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@@ -844,54 +920,39 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
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mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
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if (!mvpwm)
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