JDM170/build
1
0
Fork 0
mirror of https://github.com/armbian/build synced 2025-09-24 19:47:06 +07:00
Code Issues Packages Projects Releases Wiki Activity

rockchip: move u-boot to v2022.04 for tinkerboard and xt-q8l-v10

Browse Source
This commit is contained in:
Paolo Sabatino
2022-04-10 09:58:03 +00:00
committed by Paolo
parent 0777be9e75
commit b87e8085fb
5 changed files with 154 additions and 350 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
config/sources/families/rockchip.conf
View File

@@ -6,10 +6,8 @@ UBOOT_TARGET_MAP=";;$SRC/packages/blobs/rockchip/rk3288_boot.bin u-boot-rockchip
BOOTDELAY=1
if [[ $BOARD == miqi ]]; then
BOOTBRANCH='tag:v2017.11'
elif [[ $BOARD == xt-q8l-v10 ]]; then
BOOTBRANCH='tag:v2021.01'
else
BOOTBRANCH='tag:v2022.01'
BOOTBRANCH='tag:v2022.04'
fi
SERIALCON=ttyS2

162
patch/u-boot/u-boot-rockchip/board_xt-q8l-v10/u-boot-1000-enable-rockchip-efuse-for-rk3288-rk322x-rk3328-v2021.04.patch.disabled → patch/u-boot/u-boot-rockchip/board_xt-q8l-v10/u-boot-1000-enable-rockchip-efuse-for-rk322x-rk3288-and-rk3328.patch
View File

@@ -1,14 +1,46 @@
From 4eaea4d482ef3b8f995d2928d9cc9f3661222cf5 Mon Sep 17 00:00:00 2001
From 768ff9ab40cc54e03895a46a4818d36dec150cac Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Mon, 5 Apr 2021 12:20:52 +0000
Subject: [PATCH] enable rockchip efuse for rk3288, rk322x, rk3328
Date: Sun, 4 Apr 2021 10:29:29 +0000
Subject: [PATCH] Enable rockchip efuse for rk322x, rk3288 and rk3328
---
arch/arm/dts/rk3288.dtsi | 3 +-
arch/arm/mach-rockchip/misc.c | 1 +
drivers/misc/rockchip-efuse.c | 142 +++++++++++++++++++++++++++++++++-
3 files changed, 140 insertions(+), 6 deletions(-)
arch/arm/dts/rk322x.dtsi | 14 +++
arch/arm/dts/rk3288.dtsi | 3 +-
configs/evb-rk3229_defconfig | 3 +
configs/evb-rk3328_defconfig | 3 +
configs/miqi-rk3288_defconfig | 2 +
configs/rock64-rk3328_defconfig | 2 +
configs/tinker-rk3288_defconfig | 1 +
configs/tinker-s-rk3288_defconfig | 1 +
drivers/misc/rockchip-efuse.c | 142 ++++++++++++++++++++++++-
include/dt-bindings/clock/rk3228-cru.h | 4 +
10 files changed, 169 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 4a8be5dabb..255e3a7a28 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -212,6 +212,20 @@
status = "disabled";
};
+ efuse: efuse@11040000 {
+ compatible = "rockchip,rk3228-efuse", "rockchip,rk3288-efuse";
+ reg = <0x11040000 0x20>;
+ clocks = <&cru PCLK_EFUSE_256>;
+ clock-names = "pclk_efuse";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* Data cells */
+ cpu_id: cpu_id@7 {
+ reg = <0x7 0x10>;
+ };
+ };
+
i2c0: i2c@11050000 {
compatible = "rockchip,rk3228-i2c";
reg = <0x11050000 0x1000>;
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 22bb06cec5..381391360c 100644
--- a/arch/arm/dts/rk3288.dtsi
@@ -23,18 +55,95 @@ index 22bb06cec5..381391360c 100644
};
gic: interrupt-controller@ffc01000 {
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index 87eebd9872..eb7c2ec992 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -18,6 +18,7 @@
#include <misc.h>
#include <u-boot/crc.h>
#include <u-boot/sha256.h>
+#include <hash.h>
#include <asm/arch-rockchip/misc.h>
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index e708ed4909..e3ba0651fd 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -49,6 +49,8 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MTD=y
@@ -68,3 +70,4 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_TPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_MISC_INIT_R=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 9cbfeb0279..f0acfd8abd 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
+CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -56,6 +57,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=20000000
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 234ced5ab0..3d42e93866 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -49,6 +49,8 @@ CONFIG_SPL_CLK=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MTD=y
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index cb79cea821..dacb57165e 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -57,6 +57,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=20000000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 8686a66d13..b7dc845451 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -52,6 +52,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 22714833cc..19aa314164 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -53,6 +53,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0a..0fcbcfc69a 100644
--- a/drivers/misc/rockchip-efuse.c
@@ -233,6 +342,21 @@ index 083ee65e0a..0fcbcfc69a 100644
{}
};
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 1217d5239f..13b2f4e4a4 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -67,6 +67,10 @@
#define PCLK_GPIO1 321
#define PCLK_GPIO2 322
#define PCLK_GPIO3 323
+#define PCLK_VIO_H2P 324
+#define PCLK_HDCP 325
+#define PCLK_EFUSE_1024 326
+#define PCLK_EFUSE_256 327
#define PCLK_GRF 329
#define PCLK_I2C0 332
#define PCLK_I2C1 333
--
2.25.1

294
patch/u-boot/u-boot-rockchip/board_xt-q8l-v10/u-boot-1000-rockchip.patch
View File

@@ -1,294 +0,0 @@
From e54b3dfd77c4f72064fd62dd69f8bcc010ed0ef0 Mon Sep 17 00:00:00 2001
From: Francis Fan <francis.fan@rock-chips.com>
Date: Tue, 7 Nov 2017 17:50:11 +0800
Subject: [PATCH 1/3] rockchip: efuse: Support rk322x non-secure efuse.
Change-Id: Ia25df975d21d7c97cf090f0d374074c2c5cd1a58
Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 75 +++++++++++++++++++++++++++++++++--
1 file changed, 71 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2520c6a38e..36edf8d53d 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -27,6 +27,17 @@
#define RK3399_STROBE BIT(1)
#define RK3399_CSB BIT(0)
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK 0x3ff
+#define RK3288_NFUSES 32
+#define RK3288_BYTES_PER_FUSE 1
+#define RK3288_PGENB BIT(3)
+#define RK3288_LOAD BIT(2)
+#define RK3288_STROBE BIT(1)
+#define RK3288_CSB BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
struct rockchip_efuse_regs {
u32 ctrl; /* 0x00 efuse control register */
u32 dout; /* 0x04 efuse data out register */
@@ -53,7 +64,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
*/
struct udevice *dev;
- u8 fuses[128];
+ u8 fuses[128] = {0};
int ret;
/* retrieve the device */
@@ -77,7 +88,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
}
U_BOOT_CMD(
- rk3399_dump_efuses, 1, 1, dump_efuses,
+ rockchip_dump_efuses, 1, 1, dump_efuses,
"Dump the content of the efuses",
""
);
@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ u8 *buffer = buf;
+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+ if (size > (max_size - offset))
+ size = max_size - offset;
+
+ /* Switch to read mode */
+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+ udelay(1);
+
+ while (size--) {
+ writel(readl(&efuse->ctrl) &
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
+ &efuse->ctrl);
+ /* set addr */
+ writel(readl(&efuse->ctrl) |
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+ &efuse->ctrl);
+ udelay(1);
+ /* strobe low to high */
+ writel(readl(&efuse->ctrl) |
+ RK3288_STROBE, &efuse->ctrl);
+ ndelay(60);
+ /* read data */
+ *buffer++ = readl(&efuse->dout);
+ /* reset strobe to low */
+ writel(readl(&efuse->ctrl) &
+ (~RK3288_STROBE), &efuse->ctrl);
+ udelay(1);
+ }
+
+ /* Switch to standby mode */
+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+ return 0;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+ EFUSE_READ efuse_read = NULL;
+
+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+ if (!efuse_read)
+ return -ENOSYS;
+
+ return (*efuse_read)(dev, offset, buf, size);
}
static const struct misc_ops rockchip_efuse_ops = {
@@ -146,7 +206,14 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
}
static const struct udevice_id rockchip_efuse_ids[] = {
- { .compatible = "rockchip,rk3399-efuse" },
+ {
+ .compatible = "rockchip,rk3288-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3399-efuse",
+ .data = (ulong)&rockchip_rk3399_efuse_read,
+ },
{}
};
From d2794118b9ddbe8e76da4249d2de393476337e5b Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 2 Aug 2018 20:33:16 +0800
Subject: [PATCH 2/3] rockchip: efuse: support rk3328 non-secure efuse
Change-Id: Ie74764ef946b79c2e9f73e9082c1cb8bbc288abb
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 66 +++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 36edf8d53d..f2d362cef8 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -36,6 +36,13 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT 0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENB BIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
struct rockchip_efuse_regs {
@@ -46,6 +53,10 @@ struct rockchip_efuse_regs {
u32 jtag_pass; /* 0x10 JTAG password */
u32 strobe_finish_ctrl;
/* 0x14 efuse strobe finish control register */
+ u32 int_status;/* 0x18 */
+ u32 reserved; /* 0x1c */
+ u32 dout2; /* 0x20 */
+ u32 auto_ctrl; /* 0x24 */
};
struct rockchip_efuse_platdata {
@@ -181,6 +192,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buffer;
+ int ret = 0, i = 0, j = 0;
+
+ /* Max non-secure Byte */
+ if (size > 32)
+ size = 32;
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += 96;
+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_offset = offset % RK3399_BYTES_PER_FUSE;
+ addr_len = addr_end - addr_start;
+
+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+ if (!buffer)
+ return -ENOMEM;
+
+ for (j = 0; j < addr_len; j++) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ &efuse->auto_ctrl);
+ udelay(5);
+ status = readl(&efuse->int_status);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(&efuse->dout2);
+ writel(RK3328_INT_FINISH, &efuse->int_status);
+
+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+ i += RK3399_BYTES_PER_FUSE;
+ }
+ memcpy(buf, buffer + addr_offset, size);
+err:
+ free(buffer);
+
+ return ret;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -210,6 +272,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3288-efuse",
.data = (ulong)&rockchip_rk3288_efuse_read,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (ulong)&rockchip_rk3328_efuse_read,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (ulong)&rockchip_rk3399_efuse_read,
From 81fd1a75139801213cd29af46df7b282648f4559 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 23 Jan 2020 21:09:38 +0000
Subject: [PATCH 3/3] WIP: rockchip: get serial and ethaddr from efuse
---
arch/arm/dts/rk3288.dtsi | 3 +--
arch/arm/dts/rk3328.dtsi | 14 ++++++++++++++
configs/evb-rk3328_defconfig | 3 +++
configs/evb-rk3399_defconfig | 2 ++
configs/miqi-rk3288_defconfig | 2 ++
configs/rock64-rk3328_defconfig | 2 ++
configs/tinker-rk3288_defconfig | 1 +
configs/tinker-s-rk3288_defconfig | 1 +
8 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 866fc08215..b0d1b2f90a 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -910,8 +910,7 @@
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
- reg = <0xffb40000 0x10000>;
- status = "disabled";
+ reg = <0xffb40000 0x20>;
};
gic: interrupt-controller@ffc01000 {
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index 6dbb9bde..3d551431 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -16,6 +16,7 @@
#include <misc.h>
#include <u-boot/crc.h>
#include <u-boot/sha256.h>
+#include <hash.h>
#include <asm/arch-rockchip/misc.h>
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2520c6a3..0e2cab02 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -14,6 +14,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#include <misc.h>
+#include <stdlib.h>
#define RK3399_A_SHIFT 16
#define RK3399_A_MASK 0x3ff

26
patch/u-boot/u-boot-rockchip/board_xt-q8l-v10/u-boot-1004-fix-signed-unsigned-comparison-causing-massive-heada.patch
View File

@@ -1,26 +0,0 @@
From 3f12642b5947ee63e1e6fe08df558206d1b4daff Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sat, 3 Apr 2021 19:38:20 +0000
Subject: [PATCH] Fix signed/unsigned comparison causing massive headache on
gcc-arm >= 8.0 due to valid images being unable to boot
---
drivers/core/lists.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index e06e4e853d..c355f0752f 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -58,7 +58,7 @@ static int bind_drivers_pass(struct udevice *parent, bool pre_reloc_only)
const int n_ents = ll_entry_count(struct driver_info, driver_info);
bool missing_parent = false;
int result = 0;
- uint idx;
+ int idx;
/*
* Do one iteration through the driver_info records. For of-platdata,
--
2.25.1

18
patch/u-boot/u-boot-rockchip/board_xt-q8l-v10/xt-q8l-v10-defconfig.patch
View File

@@ -1,26 +1,28 @@
diff --git a/configs/xt-q8l-v10-rk3288_defconfig b/configs/xt-q8l-v10-rk3288_defconfig
new file mode 100644
index 0000000000..7dbefe26b7
index 00000000..182451c6
--- /dev/null
+++ b/configs/xt-q8l-v10-rk3288_defconfig
@@ -0,0 +1,95 @@
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x10000000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-xt-q8l-v10"
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_XT_Q8L_V10_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-xt-q8l-v10"
+CONFIG_DEBUG_UART=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYS_LOAD_ADDR=0x03000000
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_BOOTDELAY=1
+CONFIG_USE_PREBOOT=y
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
@@ -57,7 +59,6 @@ index 0000000000..7dbefe26b7
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEYBOARD=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
@@ -78,18 +79,19 @@ index 0000000000..7dbefe26b7
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y