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Add Radxa Zero initial support (#3128)
* Add support for Radxa Zero u-boot: new patch based on v2021.04 kernel: use patches sent to kernel list by chewitt Tested with minimal build and cinnamon desktop: - SD/eMMC, ok - USB3, works in USB 2 mode - HDMI, ok - WiFi/BT, ok Signed-off-by: Jack Ma <jack@radxa.com> * Add build targets * Cleanup and set min speed to 666000 * Change to WIP target Support status undetermined Co-authored-by: Jack Ma <jack@radxa.com>
This commit is contained in:
Igor Pečovnik
10
config/boards/radxa-zero.wip
Normal file
10
config/boards/radxa-zero.wip
Normal file
@@ -0,0 +1,10 @@
|
||||
# Amlogic S905Y2 512MB/1GB/2GB/4GB RAM eMMC USB3 WiFi BT
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BOARD_NAME="Radxa Zero"
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BOARDFAMILY="meson-g12a"
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BOOTCONFIG="radxa-zero_config"
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CPUMIN=6660000
|
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CPUMAX=1800000
|
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KERNEL_TARGET="current,edge"
|
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FULL_DESKTOP="yes"
|
||||
FORCE_BOOTSCRIPT_UPDATE="yes"
|
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BOOT_LOGO="desktop"
|
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@@ -238,7 +238,7 @@ family_tweaks_bsp()
|
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EndSection
|
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EOF
|
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;;
|
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"odroidn2" | "odroidc4" | "khadas-vim2" | "odroidhc4" | "khadas-vim3" | "khadas-vim3l" )
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"odroidn2" | "odroidc4" | "khadas-vim2" | "odroidhc4" | "khadas-vim3" | "khadas-vim3l" | "radxa-zero" )
|
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cat <<-EOF > "$destination"/etc/X11/xorg.conf
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Section "Device"
|
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Identifier "DRM Graphics Acclerated"
|
||||
|
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12
config/sources/families/meson-g12a.conf
Normal file
12
config/sources/families/meson-g12a.conf
Normal file
@@ -0,0 +1,12 @@
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source "${BASH_SOURCE%/*}/include/meson64_common.inc"
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ASOUND_STATE="asound.state.meson64"
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CPUMIN=1000000
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CPUMAX=1800000
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GOVERNOR=ondemand
|
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uboot_custom_postprocess() {
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if [[ $BOARD == radxa-zero ]]; then
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uboot_g12_postprocess "$SRC"/cache/sources/amlogic-boot-fip/radxa-zero g12a
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fi
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}
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@@ -265,6 +265,8 @@ rockpi-s edge hirsute minimal
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# Rockpi E
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rockpi-e edge hirsute cli beta yes
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# Radxa Zero
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radxa-zero edge hirsute cli beta yes
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# Rock64pro
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rockpro64 edge hirsute cli beta yes
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@@ -827,6 +827,15 @@ rockpi-e current focal cli s
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rockpi-e edge hirsute cli stable yes
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# Radxa Zero
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radxa-zero current buster cli stable yes
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radxa-zero current focal cli stable yes
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radxa-zero edge bullseye cli stable yes
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radxa-zero edge hirsute cli stable yes
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radxa-zero current focal desktop stable yes xfce config_base 3dsupport,browsers,chat,desktop_tools,editors,email,internet,multimedia,office,programming,remote_desktop
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radxa-zero edge hirsute desktop stable yes xfce config_base 3dsupport,browsers,chat,desktop_tools,editors,email,internet,multimedia,office,programming,remote_desktop
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|
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# Rockpi N10
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rockpi-n10 current buster cli stable yes
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rockpi-n10 current bullseye cli stable yes
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@@ -0,0 +1,96 @@
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This revets 103a5348c22c3fca8b96c735a9e353b8a0801842
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Revert is required hack to get ap6256 wifi working ok on Amlogic.
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Propper fix will be added soon...
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Milion thx for Neil Armstrong for helping with this!
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diff -Naur linux-5.13.5-old/drivers/mmc/host/meson-gx-mmc.c linux-5.13.5-new/drivers/mmc/host/meson-gx-mmc.c
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--- linux-5.13.5-old/drivers/mmc/host/meson-gx-mmc.c 2021-07-25 14:37:37.000000000 +0200
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+++ linux-5.13.5-new/drivers/mmc/host/meson-gx-mmc.c 2021-07-26 14:45:59.626665204 +0200
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@@ -165,7 +165,6 @@
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unsigned int bounce_buf_size;
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void *bounce_buf;
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- void __iomem *bounce_iomem_buf;
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dma_addr_t bounce_dma_addr;
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struct sd_emmc_desc *descs;
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dma_addr_t descs_dma_addr;
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@@ -746,47 +745,6 @@
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writel(start, host->regs + SD_EMMC_START);
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}
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-/* local sg copy to buffer version with _to/fromio usage for dram_access_quirk */
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-static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data,
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- size_t buflen, bool to_buffer)
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-{
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- unsigned int sg_flags = SG_MITER_ATOMIC;
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- struct scatterlist *sgl = data->sg;
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- unsigned int nents = data->sg_len;
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- struct sg_mapping_iter miter;
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- unsigned int offset = 0;
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-
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- if (to_buffer)
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- sg_flags |= SG_MITER_FROM_SG;
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- else
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- sg_flags |= SG_MITER_TO_SG;
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-
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- sg_miter_start(&miter, sgl, nents, sg_flags);
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-
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- while ((offset < buflen) && sg_miter_next(&miter)) {
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- unsigned int len;
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-
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- len = min(miter.length, buflen - offset);
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-
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- /* When dram_access_quirk, the bounce buffer is a iomem mapping */
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- if (host->dram_access_quirk) {
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- if (to_buffer)
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- memcpy_toio(host->bounce_iomem_buf + offset, miter.addr, len);
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- else
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- memcpy_fromio(miter.addr, host->bounce_iomem_buf + offset, len);
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- } else {
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- if (to_buffer)
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- memcpy(host->bounce_buf + offset, miter.addr, len);
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- else
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- memcpy(miter.addr, host->bounce_buf + offset, len);
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- }
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-
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- offset += len;
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- }
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-
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- sg_miter_stop(&miter);
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-}
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-
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static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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{
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struct meson_host *host = mmc_priv(mmc);
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@@ -830,7 +788,8 @@
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if (data->flags & MMC_DATA_WRITE) {
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cmd_cfg |= CMD_CFG_DATA_WR;
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WARN_ON(xfer_bytes > host->bounce_buf_size);
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- meson_mmc_copy_buffer(host, data, xfer_bytes, true);
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+ sg_copy_to_buffer(data->sg, data->sg_len,
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+ host->bounce_buf, xfer_bytes);
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dma_wmb();
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}
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@@ -999,7 +958,8 @@
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if (meson_mmc_bounce_buf_read(data)) {
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xfer_bytes = data->blksz * data->blocks;
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WARN_ON(xfer_bytes > host->bounce_buf_size);
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- meson_mmc_copy_buffer(host, data, xfer_bytes, false);
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+ sg_copy_from_buffer(data->sg, data->sg_len,
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+ host->bounce_buf, xfer_bytes);
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}
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next_cmd = meson_mmc_get_next_command(cmd);
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@@ -1219,7 +1179,7 @@
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* instead of the DDR memory
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*/
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host->bounce_buf_size = SD_EMMC_SRAM_DATA_BUF_LEN;
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- host->bounce_iomem_buf = host->regs + SD_EMMC_SRAM_DATA_BUF_OFF;
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+ host->bounce_buf = host->regs + SD_EMMC_SRAM_DATA_BUF_OFF;
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host->bounce_dma_addr = res->start + SD_EMMC_SRAM_DATA_BUF_OFF;
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} else {
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/* data bounce buffer */
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@@ -0,0 +1,590 @@
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Radxa Zero is a small form-factor SBC with an Amlogic S905Y2 chip.
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Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
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---
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Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
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index 6423377710ee..67dccdd9a5a4 100644
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--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
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+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
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@@ -141,6 +141,7 @@ properties:
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- enum:
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- amediatech,x96-max
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- amlogic,u200
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+ - radxa,zero
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- seirobotics,sei510
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- const: amlogic,g12a
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Mon, 09 Aug 2021 06:10:55 -0700 (PDT)
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From: Christian Hewitt <christianshewitt@gmail.com>
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To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
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Kevin Hilman <khilman@baylibre.com>, devicetree@vger.kernel.org,
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Cc: Christian Hewitt <christianshewitt@gmail.com>
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Subject: [PATCH 2/2] arm64: dts: amlogic: add support for Radxa Zero
|
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Date: Mon, 9 Aug 2021 13:10:47 +0000
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||||
Radxa Zero is a small form factor SBC based on the Amlogic S905Y2
|
||||
chipset that ships in a number of RAM/eMMC configurations:
|
||||
|
||||
Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436
|
||||
wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB
|
||||
eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
|
||||
|
||||
- Amlogic S905Y2 quad-core Cortex-A53
|
||||
- Mali G31-MP2 GPU
|
||||
- HDMI 2.1 output (micro)
|
||||
- 1x USB 2.0 port - Type C (OTG)
|
||||
- 1x USB 3.0 port - Type C (Host)
|
||||
- 1x micro SD Card slot
|
||||
- 40 Pin GPIO header
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 1 +
|
||||
.../dts/amlogic/meson-g12a-radxa-zero.dts | 418 ++++++++++++++++++
|
||||
2 files changed, 419 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index faa0a79a34f5..be308361e2f1 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -1,5 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-g12a-radxa-zero.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
new file mode 100644
|
||||
index 000000000000..d44d3881d9b9
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
@@ -0,0 +1,418 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12a.dtsi"
|
||||
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "radxa,zero", "amlogic,g12a";
|
||||
+ model = "Radxa Zero";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ cvbs-connector {
|
||||
+ status = "disabled";
|
||||
+ compatible = "composite-video-connector";
|
||||
+
|
||||
+ port {
|
||||
+ cvbs_connector_in: endpoint {
|
||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ flash_1v8: regulator-flash_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "FLASH_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ dc_in: regulator-dc_in {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "DC_IN";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: regulator-vcc_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_5v: regulator-vcc_5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&dc_in>;
|
||||
+
|
||||
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
|
||||
+ enable-active-low;
|
||||
+ };
|
||||
+
|
||||
+ vddao_1v8: regulator-vddao_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&dc_in>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddcpu: regulator-vddcpu {
|
||||
+ compatible = "pwm-regulator";
|
||||
+
|
||||
+ regulator-name = "VDDCPU";
|
||||
+ regulator-min-microvolt = <721000>;
|
||||
+ regulator-max-microvolt = <1022000>;
|
||||
+
|
||||
+ vin-supply = <&dc_in>;
|
||||
+
|
||||
+ pwms = <&pwm_AO_cd 1 1250 0>;
|
||||
+ pwm-dutycycle-range = <100 0>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "RADXA-ZERO";
|
||||
+ audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ pinctrl-0 = <&cec_ao_a_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "disabled";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cecb_AO {
|
||||
+ pinctrl-0 = <&cec_ao_b_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cvbs_vdac_port {
|
||||
+ cvbs_vdac_out: endpoint {
|
||||
+ remote-endpoint = <&cvbs_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&vcc_5v>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_AO_cd {
|
||||
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin1";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddao_1v8>;
|
||||
+};
|
||||
+
|
||||
+/* SDIO */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ sd-uhs-sdr50;
|
||||
+ max-frequency = <100000000>;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddao_1v8>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ interrupts = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
|
||||
+ interrupt-names = "host-wake";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_c_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <100000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddao_3v3>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ max-frequency = <200000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&flash_1v8>;
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ max-speed = <2000000>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
@@ -0,0 +1,729 @@
|
||||
From cda2a9f4f2bc6eae3b98d84c7fe119ba730070de Mon Sep 17 00:00:00 2001
|
||||
From: Jack Ma <jack@radxa.com>
|
||||
Date: Wed, 11 Aug 2021 16:26:25 +0800
|
||||
Subject: [PATCH] Add support for Radxa Zero
|
||||
|
||||
Signed-off-by: Jack Ma <jack@radxa.com>
|
||||
---
|
||||
arch/arm/dts/Makefile | 1 +
|
||||
.../arm/dts/meson-g12a-radxa-zero-u-boot.dtsi | 7 +
|
||||
arch/arm/dts/meson-g12a-radxa-zero.dts | 537 ++++++++++++++++++
|
||||
board/amlogic/radxa-zero/Makefile | 6 +
|
||||
board/amlogic/radxa-zero/radxa-zero.c | 24 +
|
||||
configs/radxa-zero_defconfig | 90 +++
|
||||
6 files changed, 665 insertions(+)
|
||||
create mode 100644 arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
|
||||
create mode 100644 arch/arm/dts/meson-g12a-radxa-zero.dts
|
||||
create mode 100644 board/amlogic/radxa-zero/Makefile
|
||||
create mode 100644 board/amlogic/radxa-zero/radxa-zero.c
|
||||
create mode 100644 configs/radxa-zero_defconfig
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index c6710826..809ecd0e 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -168,6 +168,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
|
||||
meson-gxm-wetek-core2.dtb \
|
||||
meson-axg-s400.dtb \
|
||||
meson-g12a-u200.dtb \
|
||||
+ meson-g12a-radxa-zero.dtb \
|
||||
meson-g12a-sei510.dtb \
|
||||
meson-g12b-gtking.dtb \
|
||||
meson-g12b-gtking-pro.dtb \
|
||||
diff --git a/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 00000000..236f2468
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
|
||||
@@ -0,0 +1,7 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-g12-common-u-boot.dtsi"
|
||||
diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts
|
||||
new file mode 100644
|
||||
index 00000000..9345d63f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12a-radxa-zero.dts
|
||||
@@ -0,0 +1,537 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12a.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "radxa,zero", "amlogic,g12a";
|
||||
+ model = "Radxa Zero";
|
||||
+
|
||||
+ adc_keys {
|
||||
+ compatible = "adc-keys";
|
||||
+ io-channels = <&saradc 0>;
|
||||
+ io-channel-names = "buttons";
|
||||
+ keyup-threshold-microvolt = <1800000>;
|
||||
+
|
||||
+ button-onoff {
|
||||
+ label = "On/Off";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ press-threshold-microvolt = <1700000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ };
|
||||
+
|
||||
+ mono_dac: audio-codec-0 {
|
||||
+ compatible = "maxim,max98357a";
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ sound-name-prefix = "U16";
|
||||
+ sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ dmics: audio-codec-1 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "dmic-codec";
|
||||
+ num-channels = <2>;
|
||||
+ wakeup-delay-ms = <50>;
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "MIC";
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ ao_5v: regulator-ao_5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "AO_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&dc_in>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ dc_in: regulator-dc_in {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "DC_IN";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ emmc_1v8: regulator-emmc_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "EMMC_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&dc_in>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3_t: regultor-vddao_3v3_t {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3_T";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ vddcpu: regulator-vddcpu {
|
||||
+ /*
|
||||
+ * SY8120B1ABC DC/DC Regulator.
|
||||
+ */
|
||||
+ compatible = "pwm-regulator";
|
||||
+
|
||||
+ regulator-name = "VDDCPU";
|
||||
+ regulator-min-microvolt = <721000>;
|
||||
+ regulator-max-microvolt = <1022000>;
|
||||
+
|
||||
+ vin-supply = <&dc_in>;
|
||||
+
|
||||
+ pwms = <&pwm_AO_cd 1 1250 0>;
|
||||
+ pwm-dutycycle-range = <100 0>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao1v8: regulator-vddio_ao1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reserved-memory {
|
||||
+ /* TEE Reserved Memory */
|
||||
+ bl32_reserved: bl32@5000000 {
|
||||
+ reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
+ no-map;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "G12A-SEI510";
|
||||
+ audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
|
||||
+ <&tdmin_a>, <&tdmin_b>;
|
||||
+ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
|
||||
+ "TDMOUT_A IN 1", "FRDDR_B OUT 0",
|
||||
+ "TDMOUT_A IN 2", "FRDDR_C OUT 0",
|
||||
+ "TDM_A Playback", "TDMOUT_A OUT",
|
||||
+ "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "TODDR_A IN 4", "PDM Capture",
|
||||
+ "TODDR_B IN 4", "PDM Capture",
|
||||
+ "TODDR_C IN 4", "PDM Capture",
|
||||
+ "TDMIN_A IN 0", "TDM_A Capture",
|
||||
+ "TDMIN_A IN 3", "TDM_A Loopback",
|
||||
+ "TDMIN_B IN 0", "TDM_A Capture",
|
||||
+ "TDMIN_B IN 3", "TDM_A Loopback",
|
||||
+ "TDMIN_A IN 1", "TDM_B Capture",
|
||||
+ "TDMIN_A IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_B IN 1", "TDM_B Capture",
|
||||
+ "TDMIN_B IN 4", "TDM_B Loopback",
|
||||
+ "TODDR_A IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_B IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_C IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_A IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_B IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_C IN 1", "TDMIN_B OUT";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&toddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&toddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&toddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* internal speaker interface */
|
||||
+ dai-link-6 {
|
||||
+ sound-dai = <&tdmif_a>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&mono_dac>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-7 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* internal digital mics */
|
||||
+ dai-link-8 {
|
||||
+ sound-dai = <&pdm>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&dmics>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* hdmi glue */
|
||||
+ dai-link-9 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ pinctrl-0 = <&cec_ao_a_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "disabled";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cecb_AO {
|
||||
+ pinctrl-0 = <&cec_ao_b_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vddcpu>;
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_AO_cd {
|
||||
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin1";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
+&pdm {
|
||||
+ pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
|
||||
+ <&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
|
||||
+ <&pdm_dclk_z_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddio_ao1v8>;
|
||||
+};
|
||||
+
|
||||
+/* SDIO */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ sd-uhs-sdr50;
|
||||
+ max-frequency = <100000000>;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_ao1v8>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_c_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddao_3v3>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&emmc_1v8>;
|
||||
+};
|
||||
+
|
||||
+&tdmif_a {
|
||||
+ pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+
|
||||
+ assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
|
||||
+ <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
|
||||
+ assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
|
||||
+ <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
|
||||
+ assigned-clock-rates = <0>, <0>;
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ max-speed = <2000000>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ vbat-supply = <&vddao_3v3>;
|
||||
+ vddio-supply = <&vddio_ao1v8>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
diff --git a/board/amlogic/radxa-zero/Makefile b/board/amlogic/radxa-zero/Makefile
|
||||
new file mode 100644
|
||||
index 00000000..9dd34804
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/radxa-zero/Makefile
|
||||
@@ -0,0 +1,6 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+# (C) Copyright 2021 Radxa Limited
|
||||
+# Author: Jack Ma <jack@radxa.com>
|
||||
+
|
||||
+obj-y := radxa-zero.o
|
||||
diff --git a/board/amlogic/radxa-zero/radxa-zero.c b/board/amlogic/radxa-zero/radxa-zero.c
|
||||
new file mode 100644
|
||||
index 00000000..a2c23d62
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/radxa-zero/radxa-zero.c
|
||||
@@ -0,0 +1,24 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * Copyright (C) 2021 Radxa Limited
|
||||
+ * Author: Jack Ma <jack@radxa.com>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <env.h>
|
||||
+#include <env_internal.h>
|
||||
+#include <init.h>
|
||||
+#include <net.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/arch/axg.h>
|
||||
+#include <asm/arch/sm.h>
|
||||
+#include <asm/arch/eth.h>
|
||||
+#include <asm/arch/mem.h>
|
||||
+
|
||||
+int misc_init_r(void)
|
||||
+{
|
||||
+ env_set("serial#", "AMLG12A-RADXA-ZERO");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
|
||||
new file mode 100644
|
||||
index 00000000..5c253f09
|
||||
--- /dev/null
|
||||
+++ b/configs/radxa-zero_defconfig
|
||||
@@ -0,0 +1,90 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SYS_BOARD="radxa-zero"
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x10000
|
||||
+CONFIG_ENV_OFFSET=0xFFFF0000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_MESON_G12A=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" radxazero"
|
||||
+# CONFIG_PSCI_RESET is not set
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_USE_PREBOOT=y
|
||||
+CONFIG_PREBOOT="run load_logo"
|
||||
+# CONFIG_CONSOLE_MUX is not set
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+CONFIG_AVB_VERIFY=y
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+CONFIG_CMD_ADTIMG=y
|
||||
+CONFIG_CMD_ABOOTIMG=y
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_BCB=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_BMP=y
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_CMD_AVB=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_ENV_IS_IN_MMC=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_SYS_MMC_ENV_DEV=2
|
||||
+CONFIG_SYS_MMC_ENV_PART=1
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
+CONFIG_FASTBOOT_BUF_ADDR=0x6000000
|
||||
+CONFIG_FASTBOOT_FLASH=y
|
||||
+CONFIG_FASTBOOT_FLASH_CUSTOM=y
|
||||
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
|
||||
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
+# CONFIG_INPUT is not set
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+# CONFIG_NETDEVICES is not set
|
||||
+CONFIG_MESON_G12A_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_G12A=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_SPLASH_SCREEN=y
|
||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
+CONFIG_VIDEO_BMP_RLE8=y
|
||||
+CONFIG_BMP_16BPP=y
|
||||
+CONFIG_BMP_24BPP=y
|
||||
+CONFIG_BMP_32BPP=y
|
||||
+CONFIG_LIBAVB=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.25.1
|
||||
|
||||
Reference in New Issue
Block a user