Patches: add current(6.1) & edge(6.2) patch for BigTreeTech CB1

Signed-off-by: Alan.Ma from BigTreeTech tech@biqu3d.com
2025-09-24 19:47:06 +07:00 · 2023-05-29 16:53:47 +08:00
parent b8b11f4f7f
commit 9d69bb1da6
23 changed files with 4798 additions and 5 deletions
--- a/config/boards/bigtreetech-cb1.conf
+++ b/config/boards/bigtreetech-cb1.conf
@@ -4,7 +4,7 @@ BOARDFAMILY="sun50iw9-btt"
 BOOTCONFIG="bigtreetech_cb1_defconfig"
 DEFAULT_CONSOLE="serial"
 SERIALCON="ttyS0"
-KERNEL_TARGET="legacy"
+KERNEL_TARGET="legacy,current,edge"
 FORCE_BOOTSCRIPT_UPDATE="yes"
 BOOTFS_TYPE="fat"
 BOOT_FS_LABEL="BOOT"
--- a/config/kernel/linux-sunxi64-current.config
+++ b/config/kernel/linux-sunxi64-current.config
@@ -3037,7 +3037,7 @@ CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y
 # CONFIG_TOUCHSCREEN_TSC_SERIO is not set
 # CONFIG_TOUCHSCREEN_TSC2004 is not set
 # CONFIG_TOUCHSCREEN_TSC2005 is not set
-# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_TOUCHSCREEN_TSC2007=m
 # CONFIG_TOUCHSCREEN_RM_TS is not set
 CONFIG_TOUCHSCREEN_SILEAD=m
 # CONFIG_TOUCHSCREEN_SIS_I2C is not set
@@ -6062,7 +6062,8 @@ CONFIG_SCSI_UFSHCD=m
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 # CONFIG_LEDS_CLASS_FLASH is not set
-# CONFIG_LEDS_CLASS_MULTICOLOR is not set
+CONFIG_LEDS_CLASS_MULTICOLOR=m
+CONFIG_LEDS_WS2812=m
 # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set

 #
@@ -6445,6 +6446,7 @@ CONFIG_FB_TFT_SSD1331=m
 CONFIG_FB_TFT_SSD1351=m
 CONFIG_FB_TFT_ST7735R=m
 CONFIG_FB_TFT_ST7789V=m
+CONFIG_FB_TFT_ST7796S=m
 CONFIG_FB_TFT_TINYLCD=m
 CONFIG_FB_TFT_TLS8204=m
 CONFIG_FB_TFT_UC1611=m
--- a/config/kernel/linux-sunxi64-edge.config
+++ b/config/kernel/linux-sunxi64-edge.config
@@ -3052,7 +3052,7 @@ CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y
 # CONFIG_TOUCHSCREEN_TSC_SERIO is not set
 # CONFIG_TOUCHSCREEN_TSC2004 is not set
 # CONFIG_TOUCHSCREEN_TSC2005 is not set
-# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_TOUCHSCREEN_TSC2007=m
 # CONFIG_TOUCHSCREEN_RM_TS is not set
 CONFIG_TOUCHSCREEN_SILEAD=m
 # CONFIG_TOUCHSCREEN_SIS_I2C is not set
@@ -6094,7 +6094,8 @@ CONFIG_SCSI_UFSHCD=m
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 # CONFIG_LEDS_CLASS_FLASH is not set
-# CONFIG_LEDS_CLASS_MULTICOLOR is not set
+CONFIG_LEDS_CLASS_MULTICOLOR=m
+CONFIG_LEDS_WS2812=m
 # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set

 #
@@ -6478,6 +6479,7 @@ CONFIG_FB_TFT_SSD1331=m
 CONFIG_FB_TFT_SSD1351=m
 CONFIG_FB_TFT_ST7735R=m
 CONFIG_FB_TFT_ST7789V=m
+CONFIG_FB_TFT_ST7796S=m
 CONFIG_FB_TFT_TINYLCD=m
 CONFIG_FB_TFT_TLS8204=m
 CONFIG_FB_TFT_UC1611=m
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
@@ -0,0 +1,497 @@
+From 0480784b475fe2af7f06ce980583b8c875d2bc5a Mon Sep 17 00:00:00 2001
+From: Your Name <you@example.com>
+Date: Tue, 30 May 2023 12:04:55 +0800
+Subject: [PATCH] cb1-overlay
+
+---
+ arch/arm64/boot/dts/allwinner/overlay/Makefile |  15 +++++++++++++--
+ .../overlay/sun50i-h616-fixup.scr-cmd          | 110 ++++++++++++++++++
+ .../dts/allwinner/overlay/sun50i-h616-ir.dts   |  13 +++
+ .../allwinner/overlay/sun50i-h616-light.dts    |  27 +++++
+ .../allwinner/overlay/sun50i-h616-mcp2515.dts  |  18 +++
+ .../overlay/sun50i-h616-spi-spidev.dts         |  42 +++++++
+ .../overlay/sun50i-h616-spidev0_0.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_0.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_1.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_2.dts          |  28 +++++
+ .../overlay/sun50i-h616-tft35_spi.dts          |  33 ++++++
+ .../allwinner/overlay/sun50i-h616-ws2812.dts   |  13 +++
+ 12 files changed, 383 insertions(+), 2 deletions(-)
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
+index 7cabe8f42c5a..e19b987e3b03 100644
+--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
+@@ -47,12 +47,23 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
+ 	sun50i-h6-uart1.dtbo \
+ 	sun50i-h6-uart2.dtbo \
+ 	sun50i-h6-uart3.dtbo \
+-	sun50i-h6-w1-gpio.dtbo
+	sun50i-h6-w1-gpio.dtbo \
+	sun50i-h616-spi-spidev.dtbo \
+	sun50i-h616-spidev0_0.dtbo \
+	sun50i-h616-spidev1_0.dtbo \
+	sun50i-h616-spidev1_1.dtbo \
+	sun50i-h616-spidev1_2.dtbo \
+	sun50i-h616-ir.dtbo \
+	sun50i-h616-tft35_spi.dtbo \
+	sun50i-h616-mcp2515.dtbo \
+	sun50i-h616-ws2812.dtbo \
+	sun50i-h616-light.dtbo
+ 
+ scr-$(CONFIG_ARCH_SUNXI) += \
+ 	sun50i-a64-fixup.scr \
+ 	sun50i-h5-fixup.scr \
+-	sun50i-h6-fixup.scr
+	sun50i-h6-fixup.scr \
+	sun50i-h616-fixup.scr
+ 
+ dtbotxt-$(CONFIG_ARCH_SUNXI) += \
+ 	README.sun50i-a64-overlays \
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+new file mode 100755
+index 000000000000..2bde77cb082d
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+@@ -0,0 +1,110 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
+# setexpr test_var ${tmp_bank} - A
+# works only for hex numbers (A-F)
+
+setenv decompose_pin 'setexpr tmp_bank sub "P(C|G|H|I)\\d+" "\\1";
+setexpr tmp_pin sub "P\\S(\\d+)" "\\1";
+test "${tmp_bank}" = "C" && setenv tmp_bank 2;
+test "${tmp_bank}" = "G" && setenv tmp_bank 6'
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8;
+
+if test -n "${param_spinor_spi_bus}"; then
+	test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay"
+	if test -n "${param_spinor_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+	fi
+	if test "${param_spinor_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_spidev_spi_bus}"; then
+	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spidev status "okay"
+	if test -n "${param_spidev_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+	fi
+	if test "${param_spidev_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spidev reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+	setenv tmp_bank "${param_pps_pin}"
+	setenv tmp_pin "${param_pps_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/pps_pins pins "${param_pps_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_pps_falling_edge}" = "1"; then
+	fdt set /pps@0 assert-falling-edge
+fi
+
+for f in ${overlays}; do
+	if test "${f}" = "pwm34"; then
+		setenv bootargs_new ""
+		for arg in ${bootargs}; do
+			if test "${arg}" = "console=ttyS0,115200"; then
+				echo "Warning: Disabling ttyS0 console due to enabled PWM3 and PWM4 overlay"
+			else
+				setenv bootargs_new "${bootargs_new} ${arg}"
+			fi
+		done
+		setenv bootargs "${bootargs_new}"
+	fi
+done
+
+if test -n "${param_w1_pin}"; then
+	setenv tmp_bank "${param_w1_pin}"
+	setenv tmp_pin "${param_w1_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/w1_pins pins "${param_w1_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_w1_pin_int_pullup}" = "1"; then
+	fdt set /soc/pinctrl@300b000/w1_pins bias-pull-up
+fi
+
+if test "${param_uart1_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart1-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart1-rts-cts-pins phandle
+	fdt set /soc/serial@5000400 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000400 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000400 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart2_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart2-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart2-rts-cts-pins phandle
+	fdt set /soc/serial@5000800 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000800 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000800 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart3_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart3-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart3-rts-cts-pins phandle
+	fdt set /soc/serial@5000c00 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000c00 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000c00 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+new file mode 100755
+index 000000000000..825433add1c3
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&ir>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+new file mode 100755
+index 000000000000..5010ea6a57b5
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+@@ -0,0 +1,27 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&i2c_gpio>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&uart0>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+    fragment@2 {
+		target = <&pwm>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+new file mode 100755
+index 000000000000..64841956e568
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+    fragment@0 {
+		target = <&spi1>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&can>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+new file mode 100755
+index 000000000000..e0ceed71965f
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+@@ -0,0 +1,42 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi0 = "/soc/spi@5010000";
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&spi1>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+new file mode 100755
+index 000000000000..a5a89707c3dd
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi0 = "/soc/spi@5010000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev0_0: spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+new file mode 100755
+index 000000000000..20a0486442cc
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_0: spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+new file mode 100755
+index 000000000000..a9ae45e84063
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_1: spidev@1 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <1>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+new file mode 100755
+index 000000000000..efe5a8949b3a
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_2: spidev@2 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <2>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+new file mode 100755
+index 000000000000..e96582bcbed5
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+@@ -0,0 +1,33 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c_gpio>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&spi1>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@2 {
+		target = <&tft_35>;
+		__overlay__ {
+            status = "okay";
+            spi-max-frequency = <12500000>;
+		};
+	};
+
+    fragment@3 {
+		target = <&tft_tp>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+new file mode 100755
+index 000000000000..4e43907cb0ce
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&ws2812>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
+-- 
+2.34.1
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
@@ -0,0 +1,452 @@
+From 7251864d480d2d59779f7eed72d5b87175727914 Mon Sep 17 00:00:00 2001
+From: Your Name <you@example.com>
+Date: Tue, 30 May 2023 10:18:55 +0800
+Subject: [PATCH] add bigtreetech-cb1 dts
+
+---
+ arch/arm64/boot/dts/allwinner/Makefile        |   2 +
+ .../sun50i-h616-bigtreetech-cb1-emmc.dts      |  44 +++
+ .../sun50i-h616-bigtreetech-cb1-sd.dts        |  35 ++
+ .../sun50i-h616-bigtreetech-cb1.dtsi          | 326 ++++++++++++++++++
+ 4 files changed, 407 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index 92a30f72fb47..8a07fb03e884 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -51,5 +51,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-emmc.dtb
+ 
+ subdir-y	:= $(dts-dirs) overlay
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+new file mode 100644
+index 000000000000..f878c23f1d90
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+&mmc2 {
+	vmmc-supply = <&reg_dldo1>;
+
+	no-1-8-v;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&ws2812 {
+	gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */
+};
+
+&i2c_gpio {
+	gpios = <&pio 8 6 GPIO_ACTIVE_HIGH>, /* SDA PI6 */
+			<&pio 8 4 GPIO_ACTIVE_HIGH>; /* SCL PI4 */
+};
+
+&can0_pin_irq {
+	pins = "PI3";
+};
+
+&can {
+	interrupts = <8 3 0x08>; /* PI3 IRQ_TYPE_LEVEL_LOW */
+};
+
+&tft_35 {
+	dc-gpios  = <&pio 8 15 GPIO_ACTIVE_HIGH>; /* PI15 */
+};
+
+&spi1 {
+	cs-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>, /* PI5 */
+			   <&pio 8 14 GPIO_ACTIVE_HIGH>, /* PI14 */
+			   <&pio 8 7 GPIO_ACTIVE_HIGH>; /* PI7 */
+};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+new file mode 100644
+index 000000000000..e18dd854d74b
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+&ws2812 {
+	gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */
+};
+
+&i2c_gpio {
+	gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>, /* SDA PC12 */
+			<&pio 2 10 GPIO_ACTIVE_HIGH>; /* SCL PC10 */
+};
+
+&can0_pin_irq {
+	pins = "PC9";
+};
+
+&can {
+	interrupts = <2 9 0x08>; /* PC9 IRQ_TYPE_LEVEL_LOW */
+};
+
+&tft_35 {
+	dc-gpios  = <&pio 2 14 GPIO_ACTIVE_HIGH>; /* PC14 */
+};
+
+&spi1 {
+	cs-gpios = <&pio 2 11 GPIO_ACTIVE_HIGH>, /* PC11 */
+			   <&pio 2 7 GPIO_ACTIVE_HIGH>, /* PC7 */
+			   <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+new file mode 100644
+index 000000000000..c80cc830c321
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "BigTreeTech CB1";
+	compatible = "bigtreetech,cb1", "allwinner,sun50i-h616";
+
+	aliases {
+		ethernet0 = &emac1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		act_led: led-0 {
+			gpios = <&pio 7 5 GPIO_ACTIVE_LOW>; /* PH5 */
+			linux,default-trigger = "heartbeat";
+		};
+
+		gpio_1 {
+			function = "wifi_power";
+			gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+			default-state = "on";
+		};
+
+		gpio_2 {
+			function = "wifi_wake";
+			gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */
+			default-state = "on";
+		};
+	};
+
+	reg_vcc5v: regulator-vcc5v {
+		/* board wide 5V supply directly from the USB-C socket */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		enable-active-high;
+	};
+
+	reg_vcc33_wifi: vcc33-wifi {
+		/* Always on 3.3V regulator for WiFi and BT */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc33-wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc5v>;
+	};
+
+	reg_vcc_wifi_io: vcc-wifi-io {
+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-wifi-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc33_wifi>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rtc 1>;
+		clock-names = "osc32k-out";
+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;  /* PG18 */
+		post-power-on-delay-ms = <200>;
+	};
+
+	ws2812: ws2812 {
+		compatible = "rgb-ws2812";
+		pinctrl-names = "default";
+		rgb_cnt = <2>;
+		rgb_value = <0x010000 0x010000>;
+		status = "disabled";
+	};
+
+	i2c_gpio: i2c-gpio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "i2c-gpio";
+		status = "disabled";
+
+		i2c-gpio,delay-us = <3>; /* 100 kHz */
+
+		tft_tp: ns2009@48 {
+			compatible = "ti,tsc2007";
+			reg = <0x48>;
+			status = "disabled";
+			ti,x-plate-ohms = <660>;
+			ti,rt-thr = <3000>;
+			ti,fuzzx = <32>;
+			ti,fuzzy = <16>;
+			i2c,ignore-nak = <1>;
+		};
+
+		light: bh1750@5c {
+			compatible = "rohm,bh1750";
+			reg = <0x5c>;
+			status = "disabled";
+		};
+	};
+
+	mcp2515_clock: mcp2515_clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency  = <12000000>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_dldo1>;
+	broken-cd;
+	bus-width = <4>;
+	max-frequency = <50000000>;
+	status = "okay";
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc33_wifi>;
+	vqmmc-supply = <&reg_vcc_wifi_io>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	max-frequency = <25000000>;
+	non-removable;
+	mmc-ddr-1_8v;
+	status = "okay";
+};
+
+&pio {
+	can0_pin_irq: can0_pin_irq {
+		function = "irq";
+		bias-pull-up;
+	};
+};
+
+&spi1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins>;
+
+	can: mcp2515@0 {
+		status = "disabled";
+		compatible = "microchip,mcp2515";
+		reg = <0x0>;
+		clocks = <&mcp2515_clock>;
+		spi-max-frequency = <12500000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&can0_pin_irq>;
+		interrupt-parent = <&pio>;
+		vdd-supply = <&reg_vcc33_wifi>;
+		xceiver-supply = <&reg_vcc33_wifi>;
+	};
+
+	tft_35: st7789v@1 {
+		status = "disabled";
+		compatible = "sitronix,st7796s";
+		reg = <1>;
+		spi-max-frequency =<12500000>;
+		fps =<60>;
+		buswidth = <8>;
+		rotate =<0>;
+		width = <480>;
+		height = <320>;
+		bpp = <24>;
+		bgr;
+		regwidth = <8>;
+		debug = <0x00>;	 //0x20 show fps
+		txbuflen = <307200>;
+		spi-cpol;
+		spi-cpha;
+	};
+};
+
+&r_i2c {
+	status = "okay";
+
+	axp313a: pmic@36 {
+		compatible = "x-powers,axp313a";
+		reg = <0x36>;
+		wakeup-source;
+
+		regulators{
+			reg_dcdc1: dcdc1 {
+				regulator-name = "axp313a-dcdc1";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dcdc2: dcdc2 {
+				regulator-name = "axp313a-dcdc2";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1540000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-ramp-delay = <200>;
+				regulator-always-on;
+			};
+
+			reg_dcdc3: dcdc3 {
+				regulator-name = "axp313a-dcdc3";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1840000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_aldo1: ldo1 {
+				regulator-name = "axp313a-aldo1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dldo1: ldo2 {
+				regulator-name = "axp313a-dldo1";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&reg_dcdc3>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+&usbphy {
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+};
+
+&ohci3 {
+	status = "okay";
+};
+
+&usbotg {
+	/*
+	 * PHY0 pins are connected to a USB-C socket, but a role switch
+	 * is not implemented: both CC pins are pulled to GND.
+	 * The VBUS pins power the device, so a fixed peripheral mode
+	 * is the best choice.
+	 * The board can be powered via GPIOs, in this case port0 *can*
+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
+	 * then provided by the GPIOs. Any user of this setup would
+	 * need to adjust the DT accordingly: dr_mode set to "host",
+	 * enabling OHCI0 and EHCI0.
+	 */
+	dr_mode = "peripheral";
+	status = "okay";
+};
+-- 
+2.34.1
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-pmic-add-axp313a.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-pmic-add-axp313a.patch
@@ -0,0 +1,323 @@
+From 42429a6a2113030e8c05f49971844fc7b716d297 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Wed, 18 Jan 2023 21:25:56 +0100
+Subject: [PATCH 03/13] axp20x: Add support for AXP313a PMIC
+
+The X-Powers AXP313a is a PMIC used on some devices with the Allwinner
+H616 or H313 SoC.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ .../bindings/mfd/x-powers,axp152.yaml         |  1 +
+ drivers/mfd/axp20x-i2c.c                      |  2 +
+ drivers/mfd/axp20x.c                          | 61 +++++++++++++++++++
+ drivers/regulator/axp20x-regulator.c          | 60 ++++++++++++++++++
+ include/linux/mfd/axp20x.h                    | 32 ++++++++++
+ 5 files changed, 156 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+index b7a8747d5fa0..e2241cd28445 100644
+--- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+@@ -88,6 +88,7 @@ properties:
+           - x-powers,axp209
+           - x-powers,axp221
+           - x-powers,axp223
+          - x-powers,axp313a
+           - x-powers,axp803
+           - x-powers,axp806
+           - x-powers,axp809
+diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c
+index 8fd6727dc30a..ad1855b3f3e7 100644
+--- a/drivers/mfd/axp20x-i2c.c
+++ b/drivers/mfd/axp20x-i2c.c
+@@ -64,6 +64,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
+ 	{ .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
+ 	{ .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
+ 	{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
+	{ .compatible = "x-powers,axp313a", .data = (void *)AXP313A_ID},
+ 	{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
+ 	{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
+ 	{ },
+@@ -77,6 +78,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
+ 	{ "axp209", 0 },
+ 	{ "axp221", 0 },
+ 	{ "axp223", 0 },
+	{ "axp313a", 0 },
+ 	{ "axp803", 0 },
+ 	{ "axp806", 0 },
+ 	{ },
+diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
+index 880c41fa7021..dbf1d6321dc1 100644
+--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
+@@ -39,6 +39,7 @@ static const char * const axp20x_model_names[] = {
+ 	"AXP221",
+ 	"AXP223",
+ 	"AXP288",
+	"AXP313a",
+ 	"AXP803",
+ 	"AXP806",
+ 	"AXP809",
+@@ -154,6 +155,24 @@ static const struct regmap_range axp806_writeable_ranges[] = {
+ 	regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
+ };
+ 
+static const struct regmap_range axp313a_writeable_ranges[] = {
+	regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
+};
+
+static const struct regmap_range axp313a_volatile_ranges[] = {
+	regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
+};
+
+static const struct regmap_access_table axp313a_writeable_table = {
+	.yes_ranges = axp313a_writeable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
+};
+
+static const struct regmap_access_table axp313a_volatile_table = {
+	.yes_ranges = axp313a_volatile_ranges,
+	.n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
+};
+
+ static const struct regmap_range axp806_volatile_ranges[] = {
+ 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
+ };
+@@ -272,6 +291,15 @@ static const struct regmap_config axp288_regmap_config = {
+ 	.cache_type	= REGCACHE_RBTREE,
+ };
+ 
+static const struct regmap_config axp313a_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+	.wr_table = &axp313a_writeable_table,
+	.volatile_table = &axp313a_volatile_table,
+	.max_register = AXP313A_IRQ_STATE,
+	.cache_type = REGCACHE_RBTREE,
+};
+
+ static const struct regmap_config axp806_regmap_config = {
+ 	.reg_bits	= 8,
+ 	.val_bits	= 8,
+@@ -415,6 +443,16 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
+ 	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
+ };
+ 
+static const struct regmap_irq axp313a_regmap_irqs[] = {
+	INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE,		0, 7),
+	INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE,		0, 6),
+	INIT_REGMAP_IRQ(AXP313A, PEK_SHORT,		0, 5),
+	INIT_REGMAP_IRQ(AXP313A, PEK_LONG,		0, 4),
+	INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW,		0, 3),
+	INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW,		0, 2),
+	INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH,		0, 0),
+};
+
+ static const struct regmap_irq axp803_regmap_irqs[] = {
+ 	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
+ 	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
+@@ -552,6 +590,17 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
+ 
+ };
+ 
+static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
+	.name			= "axp313a_irq_chip",
+	.status_base		= AXP313A_IRQ_STATE,
+	.ack_base		= AXP313A_IRQ_STATE,
+	.unmask_base		= AXP313A_IRQ_EN,
+	.init_ack_masked	= true,
+	.irqs			= axp313a_regmap_irqs,
+	.num_irqs		= ARRAY_SIZE(axp313a_regmap_irqs),
+	.num_regs		= 1,
+};
+
+ static const struct regmap_irq_chip axp803_regmap_irq_chip = {
+ 	.name			= "axp803",
+ 	.status_base		= AXP20X_IRQ1_STATE,
+@@ -683,6 +732,12 @@ static const struct mfd_cell axp152_cells[] = {
+ 	},
+ };
+ 
+static struct mfd_cell axp313a_cells[] = {
+	{
+		.name = "axp20x-regulator",
+	},
+};
+
+ static const struct resource axp288_adc_resources[] = {
+ 	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
+ };
+@@ -900,6 +955,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
+ 		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
+ 		axp20x->irq_flags = IRQF_TRIGGER_LOW;
+ 		break;
+	case AXP313A_ID:
+		axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
+		axp20x->cells = axp313a_cells;
+		axp20x->regmap_cfg = &axp313a_regmap_config;
+		axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
+		break;
+ 	case AXP803_ID:
+ 		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
+ 		axp20x->cells = axp803_cells;
+diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
+index d260c442b788..3087bc98694f 100644
+--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
+@@ -134,6 +134,11 @@
+ #define AXP22X_PWR_OUT_DLDO4_MASK	BIT_MASK(6)
+ #define AXP22X_PWR_OUT_ALDO3_MASK	BIT_MASK(7)
+ 
+#define AXP313A_DCDC1_NUM_VOLTAGES	107
+#define AXP313A_DCDC23_NUM_VOLTAGES	88
+#define AXP313A_DCDC_V_OUT_MASK		GENMASK(6, 0)
+#define AXP313A_LDO_V_OUT_MASK		GENMASK(4, 0)
+
+ #define AXP803_PWR_OUT_DCDC1_MASK	BIT_MASK(0)
+ #define AXP803_PWR_OUT_DCDC2_MASK	BIT_MASK(1)
+ #define AXP803_PWR_OUT_DCDC3_MASK	BIT_MASK(2)
+@@ -638,6 +643,48 @@ static const struct regulator_desc axp22x_drivevbus_regulator = {
+ 	.ops		= &axp20x_ops_sw,
+ };
+ 
+static const struct linear_range axp313a_dcdc1_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0,  70,  10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71,  87,  20000),
+	REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000),
+};
+
+static const struct linear_range axp313a_dcdc2_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0, 70, 10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000),
+};
+
+/*
+ * This is deviating from the datasheet. The values here are taken from the
+ * BSP driver and have been confirmed by measurements.
+ */
+static const struct linear_range axp313a_dcdc3_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0,  70, 10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000),
+};
+
+static const struct regulator_desc axp313a_regulators[] = {
+	AXP_DESC_RANGES(AXP313A, DCDC1, "dcdc1", "vin1",
+			axp313a_dcdc1_ranges, AXP313A_DCDC1_NUM_VOLTAGES,
+			AXP313A_DCDC1_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(0)),
+	AXP_DESC_RANGES(AXP313A, DCDC2, "dcdc2", "vin2",
+			axp313a_dcdc2_ranges, AXP313A_DCDC23_NUM_VOLTAGES,
+			AXP313A_DCDC2_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(1)),
+	AXP_DESC_RANGES(AXP313A, DCDC3, "dcdc3", "vin3",
+			axp313a_dcdc3_ranges, AXP313A_DCDC23_NUM_VOLTAGES,
+			AXP313A_DCDC3_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(2)),
+	AXP_DESC(AXP313A, LDO1, "ldo1", "vin1", 500, 3500, 100,
+		 AXP313A_ALDO1_CONRTOL, AXP313A_LDO_V_OUT_MASK,
+		 AXP313A_OUTPUT_CONTROL, BIT(3)),
+	AXP_DESC(AXP313A, LDO2, "ldo2", "vin1", 500, 3500, 100,
+		 AXP313A_DLDO1_CONRTOL, AXP313A_LDO_V_OUT_MASK,
+		 AXP313A_OUTPUT_CONTROL, BIT(4)),
+	AXP_DESC_FIXED(AXP313A, RTC_LDO, "rtc-ldo", "vin1", 1800),
+};
+
+ /* DCDC ranges shared with AXP813 */
+ static const struct linear_range axp803_dcdc234_ranges[] = {
+ 	REGULATOR_LINEAR_RANGE(500000,
+@@ -1040,6 +1087,15 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
+ 		def = 3000;
+ 		step = 150;
+ 		break;
+	case AXP313A_ID:
+		/* The DCDC PWM frequency seems to be fixed to 3 MHz. */
+		if (dcdcfreq != 3000000) {
+			dev_err(&pdev->dev,
+				"DCDC frequency on AXP313a is fixed to 3 MHz.\n");
+			return -EINVAL;
+		}
+
+		return 0;
+ 	default:
+ 		dev_err(&pdev->dev,
+ 			"Setting DCDC frequency for unsupported AXP variant\n");
+@@ -1232,6 +1288,10 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
+ 		drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
+ 						  "x-powers,drive-vbus-en");
+ 		break;
+	case AXP313A_ID:
+		regulators = axp313a_regulators;
+		nregulators = AXP313A_REG_ID_MAX;
+		break;
+ 	case AXP803_ID:
+ 		regulators = axp803_regulators;
+ 		nregulators = AXP803_REG_ID_MAX;
+diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
+index 9ab0e2fca7ea..78fa5b2b2010 100644
+--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
+@@ -17,6 +17,7 @@ enum axp20x_variants {
+ 	AXP221_ID,
+ 	AXP223_ID,
+ 	AXP288_ID,
+	AXP313A_ID,
+ 	AXP803_ID,
+ 	AXP806_ID,
+ 	AXP809_ID,
+@@ -91,6 +92,17 @@ enum axp20x_variants {
+ #define AXP22X_ALDO3_V_OUT		0x2a
+ #define AXP22X_CHRG_CTRL3		0x35
+ 
+#define AXP313A_ON_INDICATE		0x00
+#define AXP313A_OUTPUT_CONTROL		0x10
+#define AXP313A_DCDC1_CONRTOL		0x13
+#define AXP313A_DCDC2_CONRTOL		0x14
+#define AXP313A_DCDC3_CONRTOL		0x15
+#define AXP313A_ALDO1_CONRTOL		0x16
+#define AXP313A_DLDO1_CONRTOL		0x17
+#define AXP313A_OUTPUT_MONITOR		0x1d
+#define AXP313A_IRQ_EN			0x20
+#define AXP313A_IRQ_STATE		0x21
+
+ #define AXP806_STARTUP_SRC		0x00
+ #define AXP806_CHIP_ID			0x03
+ #define AXP806_PWR_OUT_CTRL1		0x10
+@@ -322,6 +334,16 @@ enum {
+ 	AXP22X_REG_ID_MAX,
+ };
+ 
+enum {
+	AXP313A_DCDC1 = 0,
+	AXP313A_DCDC2,
+	AXP313A_DCDC3,
+	AXP313A_LDO1,
+	AXP313A_LDO2,
+	AXP313A_RTC_LDO,
+	AXP313A_REG_ID_MAX,
+};
+
+ enum {
+ 	AXP806_DCDCA = 0,
+ 	AXP806_DCDCB,
+@@ -545,6 +567,16 @@ enum axp288_irqs {
+ 	AXP288_IRQ_BC_USB_CHNG,
+ };
+ 
+enum axp313a_irqs {
+	AXP313A_IRQ_DIE_TEMP_HIGH,
+	AXP313A_IRQ_DCDC2_V_LOW = 2,
+	AXP313A_IRQ_DCDC3_V_LOW,
+	AXP313A_IRQ_PEK_LONG,
+	AXP313A_IRQ_PEK_SHORT,
+	AXP313A_IRQ_PEK_FAL_EDGE,
+	AXP313A_IRQ_PEK_RIS_EDGE,
+};
+
+ enum axp803_irqs {
+ 	AXP803_IRQ_ACIN_OVER_V = 1,
+ 	AXP803_IRQ_ACIN_PLUGIN,
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-rgb-add-ws2812.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-rgb-add-ws2812.patch
@@ -0,0 +1,276 @@
+From 40b7424975e8868079003fda0824b7febbc7acbc Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 17:26:21 +0800
+Subject: [PATCH 11/13] Add: ws2812 RGB driver for allwinner H616
+
+---
+ drivers/leds/rgb/Kconfig       |   7 +
+ drivers/leds/rgb/Makefile      |   1 +
+ drivers/leds/rgb/leds-ws2812.c | 230 +++++++++++++++++++++++++++++++++
+ 3 files changed, 238 insertions(+)
+ create mode 100644 drivers/leds/rgb/leds-ws2812.c
+
+diff --git a/drivers/leds/rgb/Kconfig b/drivers/leds/rgb/Kconfig
+index 204cf470beae..b3f78f0775ea 100644
+--- a/drivers/leds/rgb/Kconfig
+++ b/drivers/leds/rgb/Kconfig
+@@ -27,3 +27,10 @@ config LEDS_QCOM_LPG
+ 	  If compiled as a module, the module will be named leds-qcom-lpg.
+ 
+ endif # LEDS_CLASS_MULTICOLOR
+
+config LEDS_WS2812
+	tristate "WS2812 RGB support for allwinner H616"
+	depends on PINCTRL_SUN50I_H616
+
+	help
+	  Say Y here if you want to use the WS2812.
+\ No newline at end of file
+diff --git a/drivers/leds/rgb/Makefile b/drivers/leds/rgb/Makefile
+index 0675bc0f6e18..16bcdbd71150 100644
+--- a/drivers/leds/rgb/Makefile
+++ b/drivers/leds/rgb/Makefile
+@@ -2,3 +2,4 @@
+ 
+ obj-$(CONFIG_LEDS_PWM_MULTICOLOR)	+= leds-pwm-multicolor.o
+ obj-$(CONFIG_LEDS_QCOM_LPG)		+= leds-qcom-lpg.o
+obj-$(CONFIG_LEDS_WS2812)		+= leds-ws2812.o
+diff --git a/drivers/leds/rgb/leds-ws2812.c b/drivers/leds/rgb/leds-ws2812.c
+new file mode 100644
+index 000000000000..a89030fe815e
+--- /dev/null
+++ b/drivers/leds/rgb/leds-ws2812.c
+@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023, The Linux Foundation. All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <asm/uaccess.h>
+#include <linux/moduleparam.h>
+#include <linux/ioctl.h>
+#include <linux/version.h>
+#include <linux/errno.h>
+#include <linux/rbtree.h>
+#include <linux/ktime.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+#include <linux/time.h>
+#include <linux/hrtimer.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+
+#define GPIO_BASE 0x0300B000
+#define GPIO_DAT_OFFSET(n) ((n)*0x0024 + 0x10)
+
+static uint32_t ws2812_pin = 0;
+static volatile uint32_t *ws2812_gpio_port;
+static volatile uint32_t ws2812_gpio_bit;
+static volatile uint32_t ws2812_set_val = 0;
+static volatile uint32_t ws2812_reset_val = 0;
+
+DEFINE_SPINLOCK(lock);
+
+// ws2812 reset
+static void ws2812_rst(void)
+{
+	*ws2812_gpio_port &= ~ws2812_gpio_bit;
+	udelay(200);// RES low voltage time, Above 50µs
+}
+
+static void ws2812_Write_24Bits(uint32_t grb)
+{
+	uint8_t i;
+	for (i = 0; i < 24; i++)
+	{
+		if (grb & 0x800000)
+		{
+			// loop for delay about 700ns
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			// loop for delay about 600ns
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+		}
+		else
+		{
+			// loop for delay about 200ns
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			// loop for delay about 800ns
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+		}
+		grb <<= 1;
+	}
+}
+
+static void ws2812_write_array(uint32_t *rgb, uint32_t cnt)
+{
+	uint32_t i = 0;
+	unsigned long flags;
+
+	for (i = 0; i < cnt; i++)
+	{
+		// rgb -> grb
+		rgb[i] = (((rgb[i] >> 16) & 0xff) << 8) | (((rgb[i] >> 8) & 0xff) << 16) | ((rgb[i]) & 0xff);
+	}
+
+	spin_lock_irqsave(&lock, flags);
+	ws2812_set_val = *ws2812_gpio_port | ws2812_gpio_bit;
+	ws2812_reset_val = *ws2812_gpio_port & (~ws2812_gpio_bit);
+	ws2812_rst();
+	for (i = 0; i < cnt; i++)
+	{
+		ws2812_Write_24Bits(rgb[i]);
+	}
+	spin_unlock_irqrestore(&lock, flags);
+}
+
+ssize_t ws2812_read(struct file *file, char __user *user, size_t bytesize, loff_t *this_loff_t)
+{
+	return 0;
+}
+
+ssize_t ws2812_write(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos)
+{
+	uint32_t rgb[255];
+	unsigned long ret = 0;
+
+	if (count > 255 * 4) count = 255 * 4;
+	ret = copy_from_user(&rgb[0], user_buf, count);
+	if (ret < 0)
+	{
+		printk("copy_from_user fail!!!\n");
+		return -1;
+	}
+
+	ws2812_write_array((uint32_t *)rgb, count / 4);
+
+	return 0;
+}
+
+int ws2812_open(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+int ws2812_close(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+static struct file_operations ws2812_ops = {
+	.owner = THIS_MODULE,
+	.open = ws2812_open,
+	.release = ws2812_close,
+	.write = ws2812_write,
+};
+
+static struct miscdevice ws2812_misc_dev = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "ws2812-led",
+	.fops = &ws2812_ops,
+};
+
+static int ws2812_probe(struct platform_device *pdev)
+{
+	int ret;
+	enum of_gpio_flags flag;
+	struct device_node *ws2812_gpio_node = pdev->dev.of_node;
+	uint32_t rgb_cnt = 0;
+	uint32_t rgb[255];
+
+	of_property_read_u32(ws2812_gpio_node, "rgb_cnt", &rgb_cnt);
+	if (rgb_cnt > 255)
+		rgb_cnt = 255;
+
+	of_property_read_u32_array(ws2812_gpio_node, "rgb_value", rgb, rgb_cnt);
+	ws2812_pin = of_get_named_gpio_flags(ws2812_gpio_node, "gpios", 0, &flag);
+	if (!gpio_is_valid(ws2812_pin))
+	{
+		printk(KERN_ERR "ws2812: gpio: %d is invalid\n", ws2812_pin);
+		return -ENODEV;
+	}
+
+	ws2812_gpio_port = ioremap(GPIO_BASE + GPIO_DAT_OFFSET((ws2812_pin >> 5)), 4);
+	ws2812_gpio_bit = 1 << (ws2812_pin & 0x001F);
+
+	if (gpio_request(ws2812_pin, "ws2812-gpio"))
+	{
+		printk(KERN_ERR "ws2812: gpio %d request failed!\n", ws2812_pin);
+		gpio_free(ws2812_pin);
+		return -ENODEV;
+	}
+	gpio_direction_output(ws2812_pin, 0);
+
+	ret = misc_register(&ws2812_misc_dev);
+	msleep(50);
+
+	ws2812_write_array(rgb, rgb_cnt);
+
+	return 0;
+}
+
+static int ws2812_remove(struct platform_device *pdev)
+{
+	misc_deregister(&ws2812_misc_dev);
+	gpio_free(ws2812_pin);
+
+	return 0;
+}
+
+static const struct of_device_id ws2812_of_match[] = {
+	{.compatible = "rgb-ws2812"},
+	{/* sentinel */}};
+
+MODULE_DEVICE_TABLE(of, ws2812_of_match);
+
+static struct platform_driver ws2812_driver = {
+	.probe		= ws2812_probe,
+	.remove		= ws2812_remove,
+	.driver		= {
+		.name	= "ws2812_ctl",
+		.of_match_table = ws2812_of_match,
+	},
+};
+
+module_platform_driver(ws2812_driver);
+
+MODULE_AUTHOR("MacLodge, Alan Ma <tech@biqu3d.com>");
+MODULE_DESCRIPTION("WS2812 RGB driver for Allwinner");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ws2812_ctl");
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-staging-fbtft-add-st7796s.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-staging-fbtft-add-st7796s.patch
@@ -0,0 +1,154 @@
+From 90e98efc54a4d7d538553061287eb8b4f7a5dad8 Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 14:33:52 +0800
+Subject: [PATCH 09/13] Add: FB_TFT ST7796S driver
+
+---
+ drivers/staging/fbtft/Kconfig      |  10 +++
+ drivers/staging/fbtft/Makefile     |   1 +
+ drivers/staging/fbtft/fb_st7796s.c | 100 +++++++++++++++++++++++++++++
+ 3 files changed, 111 insertions(+)
+ create mode 100644 drivers/staging/fbtft/fb_st7796s.c
+
+diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
+index 4d29e8c1014e..e46688e92419 100644
+--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
+@@ -171,6 +171,16 @@ config FB_TFT_ST7789V
+ 
+ 	  Say Y if you have such a display that utilizes this controller.
+ 
+config FB_TFT_ST7796S
+	tristate "FB driver for the ST7796S LCD Controller"
+	depends on FB_TFT
+	help
+	  This enables generic framebuffer support for the Sitronix ST7796S
+	  display controller. The controller is intended for small color
+	  displays with a resolution of up to 480x320 pixels.
+
+	  Say Y if you have such a display that utilizes this controller.
+
+ config FB_TFT_TINYLCD
+ 	tristate "FB driver for tinylcd.com display"
+ 	depends on FB_TFT
+diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
+index e9cdf0f0a7da..7b2098b8a1bd 100644
+--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
+@@ -31,6 +31,7 @@ obj-$(CONFIG_FB_TFT_SSD1331)     += fb_ssd1331.o
+ obj-$(CONFIG_FB_TFT_SSD1351)     += fb_ssd1351.o
+ obj-$(CONFIG_FB_TFT_ST7735R)     += fb_st7735r.o
+ obj-$(CONFIG_FB_TFT_ST7789V)     += fb_st7789v.o
+obj-$(CONFIG_FB_TFT_ST7796S)     += fb_st7796s.o
+ obj-$(CONFIG_FB_TFT_TINYLCD)     += fb_tinylcd.o
+ obj-$(CONFIG_FB_TFT_TLS8204)     += fb_tls8204.o
+ obj-$(CONFIG_FB_TFT_UC1611)      += fb_uc1611.o
+diff --git a/drivers/staging/fbtft/fb_st7796s.c b/drivers/staging/fbtft/fb_st7796s.c
+new file mode 100644
+index 000000000000..cad489cef595
+--- /dev/null
+++ b/drivers/staging/fbtft/fb_st7796s.c
+@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the ST7796S LCD Controller
+ *
+ * Copyright (c) 2023 Alan Ma
+ * Copyright (c) 2014 Petr Olivka
+ * Copyright (c) 2013 Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+#define DRVNAME	"fb_st7796s"
+#define WIDTH		480
+#define HEIGHT		320
+
+static const s16 default_init_sequence[] = {
+	-1, 0xC0, 0x0C, 0x02,
+	-1, 0xC1, 0x44,
+	-1, 0xC5, 0x00, 0x16, 0x80,
+	-1, 0x36, 0x28,
+	/* Interface Mode Control */
+	-1, 0x3A, 0x55,
+	-1, 0XB0, 0x00,
+	/* Frame rate 70HZ */
+	-1, 0xB1, 0xB0,
+	-1, 0xB4, 0x02,
+	/* RGB/MCU Interface Control */
+	-1, 0xB6, 0x02, 0x02,
+	-1, 0xE9, 0x00,
+	-1, 0XF7, 0xA9, 0x51, 0x2C, 0x82,
+	/* SLP_OUT - Sleep out */
+	-1, MIPI_DCS_EXIT_SLEEP_MODE,
+	-2, 50,
+	/* DISP_ON */
+	-1, MIPI_DCS_SET_DISPLAY_ON,
+	-3
+};
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+static int set_var(struct fbtft_par *par)
+{
+	switch (par->info->var.rotate) {
+	case 270:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x80 | (par->bgr << 3));
+		break;
+	case 180:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0xE0 | (par->bgr << 3));
+		break;
+	case 90:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x40 | (par->bgr << 3));
+		break;
+	default:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x20 | (par->bgr << 3));
+		break;
+	}
+
+	return 0;
+}
+
+static struct fbtft_display display = {
+	.regwidth = 8,
+	.width = WIDTH,
+	.height = HEIGHT,
+	.init_sequence = default_init_sequence,
+	.fbtftops = {
+		.set_addr_win = set_addr_win,
+		.set_var = set_var,
+	},
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7796s", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:st7796s");
+MODULE_ALIAS("platform:st7796s");
+
+MODULE_DESCRIPTION("FB driver for the ST7796S LCD Controller");
+MODULE_AUTHOR("Alan Ma");
+MODULE_LICENSE("GPL");
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-touchscreen-tsc2007-polling.patch
+++ b/patch/kernel/archive/sunxi-6.1/patches.armbian/drv-touchscreen-tsc2007-polling.patch
@@ -0,0 +1,195 @@
+From 7c62c1ea69d7f892555ad697dbefbf4803d0908b Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 14:44:07 +0800
+Subject: [PATCH 10/13] Optimize: TSC2007 touchscreen add polling method
+
+---
+ drivers/input/touchscreen/tsc2007.h      |   6 ++
+ drivers/input/touchscreen/tsc2007_core.c | 110 +++++++++++++++++++++--
+ 2 files changed, 108 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
+index 69b08dd6c8df..5252b6c6daeb 100644
+--- a/drivers/input/touchscreen/tsc2007.h
+++ b/drivers/input/touchscreen/tsc2007.h
+@@ -66,10 +66,13 @@ struct tsc2007 {
+ 	u16			model;
+ 	u16			x_plate_ohms;
+ 	u16			max_rt;
+	u16			rt_thr;
+	u8			touched;
+ 	unsigned long		poll_period; /* in jiffies */
+ 	int			fuzzx;
+ 	int			fuzzy;
+ 	int			fuzzz;
+	bool			ignore_nak;
+ 
+ 	struct gpio_desc	*gpiod;
+ 	int			irq;
+@@ -81,6 +84,9 @@ struct tsc2007 {
+ 	void			(*clear_penirq)(void);
+ 
+ 	struct mutex		mlock;
+
+	struct timer_list timer;
+	struct work_struct work_i2c_poll;
+ };
+ 
+ int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
+diff --git a/drivers/input/touchscreen/tsc2007_core.c b/drivers/input/touchscreen/tsc2007_core.c
+index 3e871d182c40..6e3bdf1debe0 100644
+--- a/drivers/input/touchscreen/tsc2007_core.c
+++ b/drivers/input/touchscreen/tsc2007_core.c
+@@ -28,6 +28,8 @@
+ #include <linux/platform_data/tsc2007.h>
+ #include "tsc2007.h"
+ 
+#define POLL_INTERVAL_MS 17 /* 17ms = 60fps */
+
+ int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
+ {
+ 	s32 data;
+@@ -172,6 +174,65 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
+ 	return IRQ_HANDLED;
+ }
+ 
+static irqreturn_t tsc2007_soft_poll(int irq, void *handle)
+{
+	struct tsc2007 *ts = handle;
+	struct input_dev *input = ts->input;
+	struct ts_event tc;
+	u32 rt;
+
+	if(!ts->stopped) {
+
+		mutex_lock(&ts->mlock);
+		tsc2007_read_values(ts, &tc);
+		mutex_unlock(&ts->mlock);
+
+		rt = tsc2007_calculate_resistance(ts, &tc);
+
+		if (rt == 0 || rt == 256) {
+
+			/*
+				* Sample found inconsistent by debouncing or pressure is
+				* beyond the maximum. Don't report it to user space,
+				* repeat at least once more the measurement.
+				*/
+			dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt);
+
+		} else {
+
+			if (rt < ts->rt_thr) {
+
+				dev_dbg(&ts->client->dev,
+					"DOWN point(%4d,%4d), resistance (%4u)\n",
+					tc.x, tc.y, rt);
+
+				rt = ts->max_rt - rt;
+
+				input_report_key(input, BTN_TOUCH, 1);
+				input_report_abs(input, ABS_X, tc.y);
+				input_report_abs(input, ABS_Y, 4096 - tc.x);
+				input_report_abs(input, ABS_PRESSURE, rt);
+
+				input_sync(input);
+				ts->touched = 1;
+
+			} else if (ts->touched == 1) {
+
+				dev_dbg(&ts->client->dev, "UP\n");
+
+				input_report_key(input, BTN_TOUCH, 0);
+				input_report_abs(input, ABS_PRESSURE, 0);
+				input_sync(input);
+				ts->touched = 0;
+			}
+		}
+
+
+	}
+
+	return IRQ_HANDLED;
+}
+
+ static irqreturn_t tsc2007_hard_irq(int irq, void *handle)
+ {
+ 	struct tsc2007 *ts = handle;
+@@ -229,11 +290,32 @@ static int tsc2007_get_pendown_state_gpio(struct device *dev)
+ 	return gpiod_get_value(ts->gpiod);
+ }
+ 
+static void tsc2007_ts_irq_poll_timer(struct timer_list *t)
+{
+	struct tsc2007 *ts = from_timer(ts, t, timer);
+
+	schedule_work(&ts->work_i2c_poll);
+	mod_timer(&ts->timer, jiffies + msecs_to_jiffies(POLL_INTERVAL_MS));
+}
+
+static void tsc2007_ts_work_i2c_poll(struct work_struct *work)
+{
+	struct tsc2007 *ts = container_of(work,
+			struct tsc2007, work_i2c_poll);
+
+	tsc2007_soft_poll(0, ts);
+}
+
+ static int tsc2007_probe_properties(struct device *dev, struct tsc2007 *ts)
+ {
+ 	u32 val32;
+ 	u64 val64;
+ 
+	ts->ignore_nak = device_property_read_bool(dev, "i2c,ignore-nak");
+
+	if (!device_property_read_u32(dev, "ti,rt-thr", &val32))
+		ts->rt_thr = val32;
+
+ 	if (!device_property_read_u32(dev, "ti,max-rt", &val32))
+ 		ts->max_rt = val32;
+ 	else
+@@ -330,6 +412,9 @@ static int tsc2007_probe(struct i2c_client *client,
+ 	if (!input_dev)
+ 		return -ENOMEM;
+ 
+	if (ts->ignore_nak)
+		client->flags |= I2C_M_IGNORE_NAK;
+
+ 	i2c_set_clientdata(client, ts);
+ 
+ 	ts->client = client;
+@@ -375,14 +460,23 @@ static int tsc2007_probe(struct i2c_client *client,
+ 			pdata->init_platform_hw();
+ 	}
+ 
+-	err = devm_request_threaded_irq(&client->dev, ts->irq,
+-					tsc2007_hard_irq, tsc2007_soft_irq,
+-					IRQF_ONESHOT,
+-					client->dev.driver->name, ts);
+-	if (err) {
+-		dev_err(&client->dev, "Failed to request irq %d: %d\n",
+-			ts->irq, err);
+-		return err;
+	if (ts->gpiod) {
+		err = devm_request_threaded_irq(&client->dev, ts->irq,
+						tsc2007_hard_irq, tsc2007_soft_irq,
+						IRQF_ONESHOT,
+						client->dev.driver->name, ts);
+		if (err) {
+			dev_err(&client->dev, "Failed to request irq %d: %d\n",
+				ts->irq, err);
+			return err;
+		}
+	} else {
+		INIT_WORK(&ts->work_i2c_poll,
+			  tsc2007_ts_work_i2c_poll);
+		timer_setup(&ts->timer, tsc2007_ts_irq_poll_timer, 0);
+		ts->timer.expires = jiffies +
+					msecs_to_jiffies(POLL_INTERVAL_MS);
+		add_timer(&ts->timer);
+ 	}
+ 
+ 	tsc2007_stop(ts);
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.1/series.armbian
+++ b/patch/kernel/archive/sunxi-6.1/series.armbian
@@ -90,6 +90,10 @@
 	patches.armbian/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
 	patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
 	patches.armbian/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
+	patches.armbian/drv-pmic-add-axp313a.patch
+	patches.armbian/drv-staging-fbtft-add-st7796s.patch
+	patches.armbian/drv-touchscreen-tsc2007-polling.patch
+	patches.armbian/drv-rgb-add-ws2812.patch
 ###################
 	patches.armbian/arm64-dts-sun50i-a64-pinebook-enable-Bluetooth.patch
 	patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch
@@ -127,6 +131,7 @@
 	patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch
 	patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch
 	patches.armbian/Compile-the-pwm-overlay.patch
+	patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
 ###################
 	patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch
 	patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch
@@ -169,3 +174,4 @@
 	patches.armbian/mfd-sunxi-ac200-fix-error-initialization.patch
 	patches.armbian/arm-dts-sun8i-h3-orangepizero-add_tve.patch
 	patches.armbian/arm-dts-sun8i-h3-fix-thermal-read.patch
+	patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
--- a/patch/kernel/archive/sunxi-6.1/series.conf
+++ b/patch/kernel/archive/sunxi-6.1/series.conf
@@ -494,6 +494,10 @@
 	patches.armbian/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
 	patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
 	patches.armbian/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
+	patches.armbian/drv-pmic-add-axp313a.patch
+	patches.armbian/drv-staging-fbtft-add-st7796s.patch
+	patches.armbian/drv-touchscreen-tsc2007-polling.patch
+	patches.armbian/drv-rgb-add-ws2812.patch
 ###################
 	patches.armbian/arm64-dts-sun50i-a64-pinebook-enable-Bluetooth.patch
 	patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch
@@ -531,6 +535,7 @@
 	patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch
 	patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch
 	patches.armbian/Compile-the-pwm-overlay.patch
+	patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
 ###################
 	patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch
 	patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch
@@ -573,3 +578,4 @@
 	patches.armbian/mfd-sunxi-ac200-fix-error-initialization.patch
 	patches.armbian/arm-dts-sun8i-h3-orangepizero-add_tve.patch
 	patches.armbian/arm-dts-sun8i-h3-fix-thermal-read.patch
+	patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
@@ -0,0 +1,497 @@
+From 0480784b475fe2af7f06ce980583b8c875d2bc5a Mon Sep 17 00:00:00 2001
+From: Your Name <you@example.com>
+Date: Tue, 30 May 2023 12:04:55 +0800
+Subject: [PATCH] cb1-overlay
+
+---
+ arch/arm64/boot/dts/allwinner/overlay/Makefile |  15 +++++++++++++--
+ .../overlay/sun50i-h616-fixup.scr-cmd          | 110 ++++++++++++++++++
+ .../dts/allwinner/overlay/sun50i-h616-ir.dts   |  13 +++
+ .../allwinner/overlay/sun50i-h616-light.dts    |  27 +++++
+ .../allwinner/overlay/sun50i-h616-mcp2515.dts  |  18 +++
+ .../overlay/sun50i-h616-spi-spidev.dts         |  42 +++++++
+ .../overlay/sun50i-h616-spidev0_0.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_0.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_1.dts          |  28 +++++
+ .../overlay/sun50i-h616-spidev1_2.dts          |  28 +++++
+ .../overlay/sun50i-h616-tft35_spi.dts          |  33 ++++++
+ .../allwinner/overlay/sun50i-h616-ws2812.dts   |  13 +++
+ 12 files changed, 383 insertions(+), 2 deletions(-)
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+ create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
+index 7cabe8f42c5a..e19b987e3b03 100644
+--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
+@@ -47,12 +47,23 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
+ 	sun50i-h6-uart1.dtbo \
+ 	sun50i-h6-uart2.dtbo \
+ 	sun50i-h6-uart3.dtbo \
+-	sun50i-h6-w1-gpio.dtbo
+	sun50i-h6-w1-gpio.dtbo \
+	sun50i-h616-spi-spidev.dtbo \
+	sun50i-h616-spidev0_0.dtbo \
+	sun50i-h616-spidev1_0.dtbo \
+	sun50i-h616-spidev1_1.dtbo \
+	sun50i-h616-spidev1_2.dtbo \
+	sun50i-h616-ir.dtbo \
+	sun50i-h616-tft35_spi.dtbo \
+	sun50i-h616-mcp2515.dtbo \
+	sun50i-h616-ws2812.dtbo \
+	sun50i-h616-light.dtbo
+ 
+ scr-$(CONFIG_ARCH_SUNXI) += \
+ 	sun50i-a64-fixup.scr \
+ 	sun50i-h5-fixup.scr \
+-	sun50i-h6-fixup.scr
+	sun50i-h6-fixup.scr \
+	sun50i-h616-fixup.scr
+ 
+ dtbotxt-$(CONFIG_ARCH_SUNXI) += \
+ 	README.sun50i-a64-overlays \
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+new file mode 100755
+index 000000000000..2bde77cb082d
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
+@@ -0,0 +1,110 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
+# setexpr test_var ${tmp_bank} - A
+# works only for hex numbers (A-F)
+
+setenv decompose_pin 'setexpr tmp_bank sub "P(C|G|H|I)\\d+" "\\1";
+setexpr tmp_pin sub "P\\S(\\d+)" "\\1";
+test "${tmp_bank}" = "C" && setenv tmp_bank 2;
+test "${tmp_bank}" = "G" && setenv tmp_bank 6'
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8;
+
+if test -n "${param_spinor_spi_bus}"; then
+	test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay"
+	if test -n "${param_spinor_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+	fi
+	if test "${param_spinor_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_spidev_spi_bus}"; then
+	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spidev status "okay"
+	if test -n "${param_spidev_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+	fi
+	if test "${param_spidev_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spidev reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+	setenv tmp_bank "${param_pps_pin}"
+	setenv tmp_pin "${param_pps_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/pps_pins pins "${param_pps_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_pps_falling_edge}" = "1"; then
+	fdt set /pps@0 assert-falling-edge
+fi
+
+for f in ${overlays}; do
+	if test "${f}" = "pwm34"; then
+		setenv bootargs_new ""
+		for arg in ${bootargs}; do
+			if test "${arg}" = "console=ttyS0,115200"; then
+				echo "Warning: Disabling ttyS0 console due to enabled PWM3 and PWM4 overlay"
+			else
+				setenv bootargs_new "${bootargs_new} ${arg}"
+			fi
+		done
+		setenv bootargs "${bootargs_new}"
+	fi
+done
+
+if test -n "${param_w1_pin}"; then
+	setenv tmp_bank "${param_w1_pin}"
+	setenv tmp_pin "${param_w1_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/w1_pins pins "${param_w1_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_w1_pin_int_pullup}" = "1"; then
+	fdt set /soc/pinctrl@300b000/w1_pins bias-pull-up
+fi
+
+if test "${param_uart1_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart1-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart1-rts-cts-pins phandle
+	fdt set /soc/serial@5000400 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000400 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000400 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart2_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart2-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart2-rts-cts-pins phandle
+	fdt set /soc/serial@5000800 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000800 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000800 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart3_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart3-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart3-rts-cts-pins phandle
+	fdt set /soc/serial@5000c00 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000c00 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000c00 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+new file mode 100755
+index 000000000000..825433add1c3
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
+@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&ir>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+new file mode 100755
+index 000000000000..5010ea6a57b5
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
+@@ -0,0 +1,27 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&i2c_gpio>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&uart0>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+    fragment@2 {
+		target = <&pwm>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+new file mode 100755
+index 000000000000..64841956e568
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
+@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+    fragment@0 {
+		target = <&spi1>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&can>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+new file mode 100755
+index 000000000000..e0ceed71965f
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
+@@ -0,0 +1,42 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi0 = "/soc/spi@5010000";
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&spi1>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+new file mode 100755
+index 000000000000..a5a89707c3dd
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi0 = "/soc/spi@5010000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev0_0: spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+new file mode 100755
+index 000000000000..20a0486442cc
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_0: spidev@0 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+new file mode 100755
+index 000000000000..a9ae45e84063
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_1: spidev@1 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <1>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+new file mode 100755
+index 000000000000..efe5a8949b3a
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
+@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi1>;
+		__overlay__ {
+            status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev1_2: spidev@2 {
+				compatible = "rohm,dh2228fv";
+				status = "okay";
+				reg = <2>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+new file mode 100755
+index 000000000000..e96582bcbed5
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
+@@ -0,0 +1,33 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c_gpio>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@1 {
+		target = <&spi1>;
+		 __overlay__ {
+			status = "okay";
+		};
+	};
+
+    fragment@2 {
+		target = <&tft_35>;
+		__overlay__ {
+            status = "okay";
+            spi-max-frequency = <12500000>;
+		};
+	};
+
+    fragment@3 {
+		target = <&tft_tp>;
+		__overlay__ {
+            status = "okay";
+		};
+	};
+};
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+new file mode 100755
+index 000000000000..4e43907cb0ce
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
+@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target = <&ws2812>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
+-- 
+2.34.1
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
@@ -0,0 +1,453 @@
+From 7251864d480d2d59779f7eed72d5b87175727914 Mon Sep 17 00:00:00 2001
+From: Your Name <you@example.com>
+Date: Tue, 30 May 2023 10:18:55 +0800
+Subject: [PATCH] add bigtreetech-cb1 dts
+
+---
+ arch/arm64/boot/dts/allwinner/Makefile        |   2 +
+ .../sun50i-h616-bigtreetech-cb1-emmc.dts      |  44 +++
+ .../sun50i-h616-bigtreetech-cb1-sd.dts        |  35 ++
+ .../sun50i-h616-bigtreetech-cb1.dtsi          | 327 ++++++++++++++++++
+ 4 files changed, 408 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index 92a30f72fb47..8a07fb03e884 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -51,5 +51,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-emmc.dtb
+ 
+ subdir-y	:= $(dts-dirs) overlay
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+new file mode 100644
+index 000000000000..f878c23f1d90
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+&mmc2 {
+	vmmc-supply = <&reg_dldo1>;
+
+	no-1-8-v;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&ws2812 {
+	gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */
+};
+
+&i2c_gpio {
+	gpios = <&pio 8 6 GPIO_ACTIVE_HIGH>, /* SDA PI6 */
+			<&pio 8 4 GPIO_ACTIVE_HIGH>; /* SCL PI4 */
+};
+
+&can0_pin_irq {
+	pins = "PI3";
+};
+
+&can {
+	interrupts = <8 3 0x08>; /* PI3 IRQ_TYPE_LEVEL_LOW */
+};
+
+&tft_35 {
+	dc-gpios  = <&pio 8 15 GPIO_ACTIVE_HIGH>; /* PI15 */
+};
+
+&spi1 {
+	cs-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>, /* PI5 */
+			   <&pio 8 14 GPIO_ACTIVE_HIGH>, /* PI14 */
+			   <&pio 8 7 GPIO_ACTIVE_HIGH>; /* PI7 */
+};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+new file mode 100644
+index 000000000000..e18dd854d74b
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+&ws2812 {
+	gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */
+};
+
+&i2c_gpio {
+	gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>, /* SDA PC12 */
+			<&pio 2 10 GPIO_ACTIVE_HIGH>; /* SCL PC10 */
+};
+
+&can0_pin_irq {
+	pins = "PC9";
+};
+
+&can {
+	interrupts = <2 9 0x08>; /* PC9 IRQ_TYPE_LEVEL_LOW */
+};
+
+&tft_35 {
+	dc-gpios  = <&pio 2 14 GPIO_ACTIVE_HIGH>; /* PC14 */
+};
+
+&spi1 {
+	cs-gpios = <&pio 2 11 GPIO_ACTIVE_HIGH>, /* PC11 */
+			   <&pio 2 7 GPIO_ACTIVE_HIGH>, /* PC7 */
+			   <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+new file mode 100644
+index 000000000000..c80cc830c321
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Alan.Ma <tech@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "BigTreeTech CB1";
+	compatible = "bigtreetech,cb1", "allwinner,sun50i-h616";
+
+	aliases {
+		ethernet0 = &emac1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		act_led: led-0 {
+			gpios = <&pio 7 5 GPIO_ACTIVE_LOW>; /* PH5 */
+			linux,default-trigger = "heartbeat";
+		};
+
+		gpio_1 {
+			function = "wifi_power";
+			gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+			default-state = "on";
+		};
+
+		gpio_2 {
+			function = "wifi_wake";
+			gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */
+			default-state = "on";
+		};
+	};
+
+	reg_vcc5v: regulator-vcc5v {
+		/* board wide 5V supply directly from the USB-C socket */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		enable-active-high;
+	};
+
+	reg_vcc33_wifi: vcc33-wifi {
+		/* Always on 3.3V regulator for WiFi and BT */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc33-wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc5v>;
+	};
+
+	reg_vcc_wifi_io: vcc-wifi-io {
+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-wifi-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc33_wifi>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rtc 1>;
+		clock-names = "osc32k-out";
+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;  /* PG18 */
+		post-power-on-delay-ms = <200>;
+	};
+
+	ws2812: ws2812 {
+		compatible = "rgb-ws2812";
+		pinctrl-names = "default";
+		rgb_cnt = <2>;
+		rgb_value = <0x010000 0x010000>;
+		status = "disabled";
+	};
+
+	i2c_gpio: i2c-gpio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "i2c-gpio";
+		status = "disabled";
+
+		i2c-gpio,delay-us = <3>; /* 100 kHz */
+
+		tft_tp: ns2009@48 {
+			compatible = "ti,tsc2007";
+			reg = <0x48>;
+			status = "disabled";
+			ti,x-plate-ohms = <660>;
+			ti,rt-thr = <3000>;
+			ti,fuzzx = <32>;
+			ti,fuzzy = <16>;
+			i2c,ignore-nak = <1>;
+		};
+
+		light: bh1750@5c {
+			compatible = "rohm,bh1750";
+			reg = <0x5c>;
+			status = "disabled";
+		};
+	};
+
+	mcp2515_clock: mcp2515_clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency  = <12000000>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_dldo1>;
+	broken-cd;
+	bus-width = <4>;
+	max-frequency = <50000000>;
+	status = "okay";
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc33_wifi>;
+	vqmmc-supply = <&reg_vcc_wifi_io>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	max-frequency = <25000000>;
+	non-removable;
+	mmc-ddr-1_8v;
+	status = "okay";
+};
+
+&pio {
+	can0_pin_irq: can0_pin_irq {
+		function = "irq";
+		bias-pull-up;
+	};
+};
+
+&spi1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins>;
+
+	can: mcp2515@0 {
+		status = "disabled";
+		compatible = "microchip,mcp2515";
+		reg = <0x0>;
+		clocks = <&mcp2515_clock>;
+		spi-max-frequency = <12500000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&can0_pin_irq>;
+		interrupt-parent = <&pio>;
+		vdd-supply = <&reg_vcc33_wifi>;
+		xceiver-supply = <&reg_vcc33_wifi>;
+	};
+
+	tft_35: st7789v@1 {
+		status = "disabled";
+		compatible = "sitronix,st7796s";
+		reg = <1>;
+		spi-max-frequency =<12500000>;
+		fps =<60>;
+		buswidth = <8>;
+		rotate =<0>;
+		width = <480>;
+		height = <320>;
+		bpp = <24>;
+		bgr;
+		regwidth = <8>;
+		debug = <0x00>;	 //0x20 show fps
+		txbuflen = <307200>;
+		spi-cpol;
+		spi-cpha;
+	};
+};
+
+&r_i2c {
+	status = "okay";
+
+	axp313a: pmic@36 {
+		compatible = "x-powers,axp313a";
+		reg = <0x36>;
+		wakeup-source;
+
+		regulators{
+			reg_dcdc1: dcdc1 {
+				regulator-name = "axp313a-dcdc1";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dcdc2: dcdc2 {
+				regulator-name = "axp313a-dcdc2";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1540000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-ramp-delay = <200>;
+				regulator-always-on;
+			};
+
+			reg_dcdc3: dcdc3 {
+				regulator-name = "axp313a-dcdc3";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1840000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_aldo1: ldo1 {
+				regulator-name = "axp313a-aldo1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dldo1: ldo2 {
+				regulator-name = "axp313a-dldo1";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&reg_dcdc3>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+&usbphy {
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+};
+
+&ohci3 {
+	status = "okay";
+};
+
+&usbotg {
+	/*
+	 * PHY0 pins are connected to a USB-C socket, but a role switch
+	 * is not implemented: both CC pins are pulled to GND.
+	 * The VBUS pins power the device, so a fixed peripheral mode
+	 * is the best choice.
+	 * The board can be powered via GPIOs, in this case port0 *can*
+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
+	 * then provided by the GPIOs. Any user of this setup would
+	 * need to adjust the DT accordingly: dr_mode set to "host",
+	 * enabling OHCI0 and EHCI0.
+	 */
+	dr_mode = "peripheral";
+	status = "okay";
+};
+-- 
+2.34.1
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-pmic-add-axp313a.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-pmic-add-axp313a.patch
@@ -0,0 +1,323 @@
+From 42429a6a2113030e8c05f49971844fc7b716d297 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Wed, 18 Jan 2023 21:25:56 +0100
+Subject: [PATCH 03/13] axp20x: Add support for AXP313a PMIC
+
+The X-Powers AXP313a is a PMIC used on some devices with the Allwinner
+H616 or H313 SoC.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ .../bindings/mfd/x-powers,axp152.yaml         |  1 +
+ drivers/mfd/axp20x-i2c.c                      |  2 +
+ drivers/mfd/axp20x.c                          | 61 +++++++++++++++++++
+ drivers/regulator/axp20x-regulator.c          | 60 ++++++++++++++++++
+ include/linux/mfd/axp20x.h                    | 32 ++++++++++
+ 5 files changed, 156 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+index b7a8747d5fa0..e2241cd28445 100644
+--- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml
+@@ -88,6 +88,7 @@ properties:
+           - x-powers,axp209
+           - x-powers,axp221
+           - x-powers,axp223
+          - x-powers,axp313a
+           - x-powers,axp803
+           - x-powers,axp806
+           - x-powers,axp809
+diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c
+index 8fd6727dc30a..ad1855b3f3e7 100644
+--- a/drivers/mfd/axp20x-i2c.c
+++ b/drivers/mfd/axp20x-i2c.c
+@@ -64,6 +64,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
+ 	{ .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
+ 	{ .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
+ 	{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
+	{ .compatible = "x-powers,axp313a", .data = (void *)AXP313A_ID},
+ 	{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
+ 	{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
+ 	{ },
+@@ -77,6 +78,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
+ 	{ "axp209", 0 },
+ 	{ "axp221", 0 },
+ 	{ "axp223", 0 },
+	{ "axp313a", 0 },
+ 	{ "axp803", 0 },
+ 	{ "axp806", 0 },
+ 	{ },
+diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
+index 880c41fa7021..dbf1d6321dc1 100644
+--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
+@@ -39,6 +39,7 @@ static const char * const axp20x_model_names[] = {
+ 	"AXP221",
+ 	"AXP223",
+ 	"AXP288",
+	"AXP313a",
+ 	"AXP803",
+ 	"AXP806",
+ 	"AXP809",
+@@ -154,6 +155,24 @@ static const struct regmap_range axp806_writeable_ranges[] = {
+ 	regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
+ };
+ 
+static const struct regmap_range axp313a_writeable_ranges[] = {
+	regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
+};
+
+static const struct regmap_range axp313a_volatile_ranges[] = {
+	regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
+};
+
+static const struct regmap_access_table axp313a_writeable_table = {
+	.yes_ranges = axp313a_writeable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
+};
+
+static const struct regmap_access_table axp313a_volatile_table = {
+	.yes_ranges = axp313a_volatile_ranges,
+	.n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
+};
+
+ static const struct regmap_range axp806_volatile_ranges[] = {
+ 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
+ };
+@@ -272,6 +291,15 @@ static const struct regmap_config axp288_regmap_config = {
+ 	.cache_type	= REGCACHE_RBTREE,
+ };
+ 
+static const struct regmap_config axp313a_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+	.wr_table = &axp313a_writeable_table,
+	.volatile_table = &axp313a_volatile_table,
+	.max_register = AXP313A_IRQ_STATE,
+	.cache_type = REGCACHE_RBTREE,
+};
+
+ static const struct regmap_config axp806_regmap_config = {
+ 	.reg_bits	= 8,
+ 	.val_bits	= 8,
+@@ -415,6 +443,16 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
+ 	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
+ };
+ 
+static const struct regmap_irq axp313a_regmap_irqs[] = {
+	INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE,		0, 7),
+	INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE,		0, 6),
+	INIT_REGMAP_IRQ(AXP313A, PEK_SHORT,		0, 5),
+	INIT_REGMAP_IRQ(AXP313A, PEK_LONG,		0, 4),
+	INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW,		0, 3),
+	INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW,		0, 2),
+	INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH,		0, 0),
+};
+
+ static const struct regmap_irq axp803_regmap_irqs[] = {
+ 	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
+ 	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
+@@ -552,6 +590,17 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
+ 
+ };
+ 
+static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
+	.name			= "axp313a_irq_chip",
+	.status_base		= AXP313A_IRQ_STATE,
+	.ack_base		= AXP313A_IRQ_STATE,
+	.unmask_base		= AXP313A_IRQ_EN,
+	.init_ack_masked	= true,
+	.irqs			= axp313a_regmap_irqs,
+	.num_irqs		= ARRAY_SIZE(axp313a_regmap_irqs),
+	.num_regs		= 1,
+};
+
+ static const struct regmap_irq_chip axp803_regmap_irq_chip = {
+ 	.name			= "axp803",
+ 	.status_base		= AXP20X_IRQ1_STATE,
+@@ -683,6 +732,12 @@ static const struct mfd_cell axp152_cells[] = {
+ 	},
+ };
+ 
+static struct mfd_cell axp313a_cells[] = {
+	{
+		.name = "axp20x-regulator",
+	},
+};
+
+ static const struct resource axp288_adc_resources[] = {
+ 	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
+ };
+@@ -900,6 +955,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
+ 		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
+ 		axp20x->irq_flags = IRQF_TRIGGER_LOW;
+ 		break;
+	case AXP313A_ID:
+		axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
+		axp20x->cells = axp313a_cells;
+		axp20x->regmap_cfg = &axp313a_regmap_config;
+		axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
+		break;
+ 	case AXP803_ID:
+ 		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
+ 		axp20x->cells = axp803_cells;
+diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
+index d260c442b788..3087bc98694f 100644
+--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
+@@ -134,6 +134,11 @@
+ #define AXP22X_PWR_OUT_DLDO4_MASK	BIT_MASK(6)
+ #define AXP22X_PWR_OUT_ALDO3_MASK	BIT_MASK(7)
+ 
+#define AXP313A_DCDC1_NUM_VOLTAGES	107
+#define AXP313A_DCDC23_NUM_VOLTAGES	88
+#define AXP313A_DCDC_V_OUT_MASK		GENMASK(6, 0)
+#define AXP313A_LDO_V_OUT_MASK		GENMASK(4, 0)
+
+ #define AXP803_PWR_OUT_DCDC1_MASK	BIT_MASK(0)
+ #define AXP803_PWR_OUT_DCDC2_MASK	BIT_MASK(1)
+ #define AXP803_PWR_OUT_DCDC3_MASK	BIT_MASK(2)
+@@ -638,6 +643,48 @@ static const struct regulator_desc axp22x_drivevbus_regulator = {
+ 	.ops		= &axp20x_ops_sw,
+ };
+ 
+static const struct linear_range axp313a_dcdc1_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0,  70,  10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71,  87,  20000),
+	REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000),
+};
+
+static const struct linear_range axp313a_dcdc2_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0, 70, 10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000),
+};
+
+/*
+ * This is deviating from the datasheet. The values here are taken from the
+ * BSP driver and have been confirmed by measurements.
+ */
+static const struct linear_range axp313a_dcdc3_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000,   0,  70, 10000),
+	REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000),
+};
+
+static const struct regulator_desc axp313a_regulators[] = {
+	AXP_DESC_RANGES(AXP313A, DCDC1, "dcdc1", "vin1",
+			axp313a_dcdc1_ranges, AXP313A_DCDC1_NUM_VOLTAGES,
+			AXP313A_DCDC1_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(0)),
+	AXP_DESC_RANGES(AXP313A, DCDC2, "dcdc2", "vin2",
+			axp313a_dcdc2_ranges, AXP313A_DCDC23_NUM_VOLTAGES,
+			AXP313A_DCDC2_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(1)),
+	AXP_DESC_RANGES(AXP313A, DCDC3, "dcdc3", "vin3",
+			axp313a_dcdc3_ranges, AXP313A_DCDC23_NUM_VOLTAGES,
+			AXP313A_DCDC3_CONRTOL, AXP313A_DCDC_V_OUT_MASK,
+			AXP313A_OUTPUT_CONTROL, BIT(2)),
+	AXP_DESC(AXP313A, LDO1, "ldo1", "vin1", 500, 3500, 100,
+		 AXP313A_ALDO1_CONRTOL, AXP313A_LDO_V_OUT_MASK,
+		 AXP313A_OUTPUT_CONTROL, BIT(3)),
+	AXP_DESC(AXP313A, LDO2, "ldo2", "vin1", 500, 3500, 100,
+		 AXP313A_DLDO1_CONRTOL, AXP313A_LDO_V_OUT_MASK,
+		 AXP313A_OUTPUT_CONTROL, BIT(4)),
+	AXP_DESC_FIXED(AXP313A, RTC_LDO, "rtc-ldo", "vin1", 1800),
+};
+
+ /* DCDC ranges shared with AXP813 */
+ static const struct linear_range axp803_dcdc234_ranges[] = {
+ 	REGULATOR_LINEAR_RANGE(500000,
+@@ -1040,6 +1087,15 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
+ 		def = 3000;
+ 		step = 150;
+ 		break;
+	case AXP313A_ID:
+		/* The DCDC PWM frequency seems to be fixed to 3 MHz. */
+		if (dcdcfreq != 3000000) {
+			dev_err(&pdev->dev,
+				"DCDC frequency on AXP313a is fixed to 3 MHz.\n");
+			return -EINVAL;
+		}
+
+		return 0;
+ 	default:
+ 		dev_err(&pdev->dev,
+ 			"Setting DCDC frequency for unsupported AXP variant\n");
+@@ -1232,6 +1288,10 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
+ 		drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
+ 						  "x-powers,drive-vbus-en");
+ 		break;
+	case AXP313A_ID:
+		regulators = axp313a_regulators;
+		nregulators = AXP313A_REG_ID_MAX;
+		break;
+ 	case AXP803_ID:
+ 		regulators = axp803_regulators;
+ 		nregulators = AXP803_REG_ID_MAX;
+diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
+index 9ab0e2fca7ea..78fa5b2b2010 100644
+--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
+@@ -17,6 +17,7 @@ enum axp20x_variants {
+ 	AXP221_ID,
+ 	AXP223_ID,
+ 	AXP288_ID,
+	AXP313A_ID,
+ 	AXP803_ID,
+ 	AXP806_ID,
+ 	AXP809_ID,
+@@ -91,6 +92,17 @@ enum axp20x_variants {
+ #define AXP22X_ALDO3_V_OUT		0x2a
+ #define AXP22X_CHRG_CTRL3		0x35
+ 
+#define AXP313A_ON_INDICATE		0x00
+#define AXP313A_OUTPUT_CONTROL		0x10
+#define AXP313A_DCDC1_CONRTOL		0x13
+#define AXP313A_DCDC2_CONRTOL		0x14
+#define AXP313A_DCDC3_CONRTOL		0x15
+#define AXP313A_ALDO1_CONRTOL		0x16
+#define AXP313A_DLDO1_CONRTOL		0x17
+#define AXP313A_OUTPUT_MONITOR		0x1d
+#define AXP313A_IRQ_EN			0x20
+#define AXP313A_IRQ_STATE		0x21
+
+ #define AXP806_STARTUP_SRC		0x00
+ #define AXP806_CHIP_ID			0x03
+ #define AXP806_PWR_OUT_CTRL1		0x10
+@@ -322,6 +334,16 @@ enum {
+ 	AXP22X_REG_ID_MAX,
+ };
+ 
+enum {
+	AXP313A_DCDC1 = 0,
+	AXP313A_DCDC2,
+	AXP313A_DCDC3,
+	AXP313A_LDO1,
+	AXP313A_LDO2,
+	AXP313A_RTC_LDO,
+	AXP313A_REG_ID_MAX,
+};
+
+ enum {
+ 	AXP806_DCDCA = 0,
+ 	AXP806_DCDCB,
+@@ -545,6 +567,16 @@ enum axp288_irqs {
+ 	AXP288_IRQ_BC_USB_CHNG,
+ };
+ 
+enum axp313a_irqs {
+	AXP313A_IRQ_DIE_TEMP_HIGH,
+	AXP313A_IRQ_DCDC2_V_LOW = 2,
+	AXP313A_IRQ_DCDC3_V_LOW,
+	AXP313A_IRQ_PEK_LONG,
+	AXP313A_IRQ_PEK_SHORT,
+	AXP313A_IRQ_PEK_FAL_EDGE,
+	AXP313A_IRQ_PEK_RIS_EDGE,
+};
+
+ enum axp803_irqs {
+ 	AXP803_IRQ_ACIN_OVER_V = 1,
+ 	AXP803_IRQ_ACIN_PLUGIN,
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-rgb-add-ws2812.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-rgb-add-ws2812.patch
@@ -0,0 +1,276 @@
+From 40b7424975e8868079003fda0824b7febbc7acbc Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 17:26:21 +0800
+Subject: [PATCH 11/13] Add: ws2812 RGB driver for allwinner H616
+
+---
+ drivers/leds/rgb/Kconfig       |   7 +
+ drivers/leds/rgb/Makefile      |   1 +
+ drivers/leds/rgb/leds-ws2812.c | 230 +++++++++++++++++++++++++++++++++
+ 3 files changed, 238 insertions(+)
+ create mode 100644 drivers/leds/rgb/leds-ws2812.c
+
+diff --git a/drivers/leds/rgb/Kconfig b/drivers/leds/rgb/Kconfig
+index 204cf470beae..b3f78f0775ea 100644
+--- a/drivers/leds/rgb/Kconfig
+++ b/drivers/leds/rgb/Kconfig
+@@ -27,3 +27,10 @@ config LEDS_QCOM_LPG
+ 	  If compiled as a module, the module will be named leds-qcom-lpg.
+ 
+ endif # LEDS_CLASS_MULTICOLOR
+
+config LEDS_WS2812
+	tristate "WS2812 RGB support for allwinner H616"
+	depends on PINCTRL_SUN50I_H616
+
+	help
+	  Say Y here if you want to use the WS2812.
+\ No newline at end of file
+diff --git a/drivers/leds/rgb/Makefile b/drivers/leds/rgb/Makefile
+index 0675bc0f6e18..16bcdbd71150 100644
+--- a/drivers/leds/rgb/Makefile
+++ b/drivers/leds/rgb/Makefile
+@@ -2,3 +2,4 @@
+ 
+ obj-$(CONFIG_LEDS_PWM_MULTICOLOR)	+= leds-pwm-multicolor.o
+ obj-$(CONFIG_LEDS_QCOM_LPG)		+= leds-qcom-lpg.o
+obj-$(CONFIG_LEDS_WS2812)		+= leds-ws2812.o
+diff --git a/drivers/leds/rgb/leds-ws2812.c b/drivers/leds/rgb/leds-ws2812.c
+new file mode 100644
+index 000000000000..a89030fe815e
+--- /dev/null
+++ b/drivers/leds/rgb/leds-ws2812.c
+@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023, The Linux Foundation. All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <asm/uaccess.h>
+#include <linux/moduleparam.h>
+#include <linux/ioctl.h>
+#include <linux/version.h>
+#include <linux/errno.h>
+#include <linux/rbtree.h>
+#include <linux/ktime.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+#include <linux/time.h>
+#include <linux/hrtimer.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+
+#define GPIO_BASE 0x0300B000
+#define GPIO_DAT_OFFSET(n) ((n)*0x0024 + 0x10)
+
+static uint32_t ws2812_pin = 0;
+static volatile uint32_t *ws2812_gpio_port;
+static volatile uint32_t ws2812_gpio_bit;
+static volatile uint32_t ws2812_set_val = 0;
+static volatile uint32_t ws2812_reset_val = 0;
+
+DEFINE_SPINLOCK(lock);
+
+// ws2812 reset
+static void ws2812_rst(void)
+{
+	*ws2812_gpio_port &= ~ws2812_gpio_bit;
+	udelay(200);// RES low voltage time, Above 50µs
+}
+
+static void ws2812_Write_24Bits(uint32_t grb)
+{
+	uint8_t i;
+	for (i = 0; i < 24; i++)
+	{
+		if (grb & 0x800000)
+		{
+			// loop for delay about 700ns
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			// loop for delay about 600ns
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+		}
+		else
+		{
+			// loop for delay about 200ns
+			*ws2812_gpio_port = ws2812_set_val;
+			*ws2812_gpio_port = ws2812_set_val;
+			// loop for delay about 800ns
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+			*ws2812_gpio_port = ws2812_reset_val;
+		}
+		grb <<= 1;
+	}
+}
+
+static void ws2812_write_array(uint32_t *rgb, uint32_t cnt)
+{
+	uint32_t i = 0;
+	unsigned long flags;
+
+	for (i = 0; i < cnt; i++)
+	{
+		// rgb -> grb
+		rgb[i] = (((rgb[i] >> 16) & 0xff) << 8) | (((rgb[i] >> 8) & 0xff) << 16) | ((rgb[i]) & 0xff);
+	}
+
+	spin_lock_irqsave(&lock, flags);
+	ws2812_set_val = *ws2812_gpio_port | ws2812_gpio_bit;
+	ws2812_reset_val = *ws2812_gpio_port & (~ws2812_gpio_bit);
+	ws2812_rst();
+	for (i = 0; i < cnt; i++)
+	{
+		ws2812_Write_24Bits(rgb[i]);
+	}
+	spin_unlock_irqrestore(&lock, flags);
+}
+
+ssize_t ws2812_read(struct file *file, char __user *user, size_t bytesize, loff_t *this_loff_t)
+{
+	return 0;
+}
+
+ssize_t ws2812_write(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos)
+{
+	uint32_t rgb[255];
+	unsigned long ret = 0;
+
+	if (count > 255 * 4) count = 255 * 4;
+	ret = copy_from_user(&rgb[0], user_buf, count);
+	if (ret < 0)
+	{
+		printk("copy_from_user fail!!!\n");
+		return -1;
+	}
+
+	ws2812_write_array((uint32_t *)rgb, count / 4);
+
+	return 0;
+}
+
+int ws2812_open(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+int ws2812_close(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+static struct file_operations ws2812_ops = {
+	.owner = THIS_MODULE,
+	.open = ws2812_open,
+	.release = ws2812_close,
+	.write = ws2812_write,
+};
+
+static struct miscdevice ws2812_misc_dev = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "ws2812-led",
+	.fops = &ws2812_ops,
+};
+
+static int ws2812_probe(struct platform_device *pdev)
+{
+	int ret;
+	enum of_gpio_flags flag;
+	struct device_node *ws2812_gpio_node = pdev->dev.of_node;
+	uint32_t rgb_cnt = 0;
+	uint32_t rgb[255];
+
+	of_property_read_u32(ws2812_gpio_node, "rgb_cnt", &rgb_cnt);
+	if (rgb_cnt > 255)
+		rgb_cnt = 255;
+
+	of_property_read_u32_array(ws2812_gpio_node, "rgb_value", rgb, rgb_cnt);
+	ws2812_pin = of_get_named_gpio_flags(ws2812_gpio_node, "gpios", 0, &flag);
+	if (!gpio_is_valid(ws2812_pin))
+	{
+		printk(KERN_ERR "ws2812: gpio: %d is invalid\n", ws2812_pin);
+		return -ENODEV;
+	}
+
+	ws2812_gpio_port = ioremap(GPIO_BASE + GPIO_DAT_OFFSET((ws2812_pin >> 5)), 4);
+	ws2812_gpio_bit = 1 << (ws2812_pin & 0x001F);
+
+	if (gpio_request(ws2812_pin, "ws2812-gpio"))
+	{
+		printk(KERN_ERR "ws2812: gpio %d request failed!\n", ws2812_pin);
+		gpio_free(ws2812_pin);
+		return -ENODEV;
+	}
+	gpio_direction_output(ws2812_pin, 0);
+
+	ret = misc_register(&ws2812_misc_dev);
+	msleep(50);
+
+	ws2812_write_array(rgb, rgb_cnt);
+
+	return 0;
+}
+
+static int ws2812_remove(struct platform_device *pdev)
+{
+	misc_deregister(&ws2812_misc_dev);
+	gpio_free(ws2812_pin);
+
+	return 0;
+}
+
+static const struct of_device_id ws2812_of_match[] = {
+	{.compatible = "rgb-ws2812"},
+	{/* sentinel */}};
+
+MODULE_DEVICE_TABLE(of, ws2812_of_match);
+
+static struct platform_driver ws2812_driver = {
+	.probe		= ws2812_probe,
+	.remove		= ws2812_remove,
+	.driver		= {
+		.name	= "ws2812_ctl",
+		.of_match_table = ws2812_of_match,
+	},
+};
+
+module_platform_driver(ws2812_driver);
+
+MODULE_AUTHOR("MacLodge, Alan Ma <tech@biqu3d.com>");
+MODULE_DESCRIPTION("WS2812 RGB driver for Allwinner");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ws2812_ctl");
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-staging-fbtft-add-st7796s.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-staging-fbtft-add-st7796s.patch
@@ -0,0 +1,154 @@
+From 90e98efc54a4d7d538553061287eb8b4f7a5dad8 Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 14:33:52 +0800
+Subject: [PATCH 09/13] Add: FB_TFT ST7796S driver
+
+---
+ drivers/staging/fbtft/Kconfig      |  10 +++
+ drivers/staging/fbtft/Makefile     |   1 +
+ drivers/staging/fbtft/fb_st7796s.c | 100 +++++++++++++++++++++++++++++
+ 3 files changed, 111 insertions(+)
+ create mode 100644 drivers/staging/fbtft/fb_st7796s.c
+
+diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
+index 4d29e8c1014e..e46688e92419 100644
+--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
+@@ -171,6 +171,16 @@ config FB_TFT_ST7789V
+ 
+ 	  Say Y if you have such a display that utilizes this controller.
+ 
+config FB_TFT_ST7796S
+	tristate "FB driver for the ST7796S LCD Controller"
+	depends on FB_TFT
+	help
+	  This enables generic framebuffer support for the Sitronix ST7796S
+	  display controller. The controller is intended for small color
+	  displays with a resolution of up to 480x320 pixels.
+
+	  Say Y if you have such a display that utilizes this controller.
+
+ config FB_TFT_TINYLCD
+ 	tristate "FB driver for tinylcd.com display"
+ 	depends on FB_TFT
+diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
+index e9cdf0f0a7da..7b2098b8a1bd 100644
+--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
+@@ -31,6 +31,7 @@ obj-$(CONFIG_FB_TFT_SSD1331)     += fb_ssd1331.o
+ obj-$(CONFIG_FB_TFT_SSD1351)     += fb_ssd1351.o
+ obj-$(CONFIG_FB_TFT_ST7735R)     += fb_st7735r.o
+ obj-$(CONFIG_FB_TFT_ST7789V)     += fb_st7789v.o
+obj-$(CONFIG_FB_TFT_ST7796S)     += fb_st7796s.o
+ obj-$(CONFIG_FB_TFT_TINYLCD)     += fb_tinylcd.o
+ obj-$(CONFIG_FB_TFT_TLS8204)     += fb_tls8204.o
+ obj-$(CONFIG_FB_TFT_UC1611)      += fb_uc1611.o
+diff --git a/drivers/staging/fbtft/fb_st7796s.c b/drivers/staging/fbtft/fb_st7796s.c
+new file mode 100644
+index 000000000000..cad489cef595
+--- /dev/null
+++ b/drivers/staging/fbtft/fb_st7796s.c
+@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the ST7796S LCD Controller
+ *
+ * Copyright (c) 2023 Alan Ma
+ * Copyright (c) 2014 Petr Olivka
+ * Copyright (c) 2013 Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+#define DRVNAME	"fb_st7796s"
+#define WIDTH		480
+#define HEIGHT		320
+
+static const s16 default_init_sequence[] = {
+	-1, 0xC0, 0x0C, 0x02,
+	-1, 0xC1, 0x44,
+	-1, 0xC5, 0x00, 0x16, 0x80,
+	-1, 0x36, 0x28,
+	/* Interface Mode Control */
+	-1, 0x3A, 0x55,
+	-1, 0XB0, 0x00,
+	/* Frame rate 70HZ */
+	-1, 0xB1, 0xB0,
+	-1, 0xB4, 0x02,
+	/* RGB/MCU Interface Control */
+	-1, 0xB6, 0x02, 0x02,
+	-1, 0xE9, 0x00,
+	-1, 0XF7, 0xA9, 0x51, 0x2C, 0x82,
+	/* SLP_OUT - Sleep out */
+	-1, MIPI_DCS_EXIT_SLEEP_MODE,
+	-2, 50,
+	/* DISP_ON */
+	-1, MIPI_DCS_SET_DISPLAY_ON,
+	-3
+};
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+static int set_var(struct fbtft_par *par)
+{
+	switch (par->info->var.rotate) {
+	case 270:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x80 | (par->bgr << 3));
+		break;
+	case 180:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0xE0 | (par->bgr << 3));
+		break;
+	case 90:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x40 | (par->bgr << 3));
+		break;
+	default:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  0x20 | (par->bgr << 3));
+		break;
+	}
+
+	return 0;
+}
+
+static struct fbtft_display display = {
+	.regwidth = 8,
+	.width = WIDTH,
+	.height = HEIGHT,
+	.init_sequence = default_init_sequence,
+	.fbtftops = {
+		.set_addr_win = set_addr_win,
+		.set_var = set_var,
+	},
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7796s", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:st7796s");
+MODULE_ALIAS("platform:st7796s");
+
+MODULE_DESCRIPTION("FB driver for the ST7796S LCD Controller");
+MODULE_AUTHOR("Alan Ma");
+MODULE_LICENSE("GPL");
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-touchscreen-tsc2007-polling.patch
+++ b/patch/kernel/archive/sunxi-6.2/patches.armbian/drv-touchscreen-tsc2007-polling.patch
@@ -0,0 +1,195 @@
+From 7c62c1ea69d7f892555ad697dbefbf4803d0908b Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Sat, 20 May 2023 14:44:07 +0800
+Subject: [PATCH 10/13] Optimize: TSC2007 touchscreen add polling method
+
+---
+ drivers/input/touchscreen/tsc2007.h      |   6 ++
+ drivers/input/touchscreen/tsc2007_core.c | 110 +++++++++++++++++++++--
+ 2 files changed, 108 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
+index 69b08dd6c8df..5252b6c6daeb 100644
+--- a/drivers/input/touchscreen/tsc2007.h
+++ b/drivers/input/touchscreen/tsc2007.h
+@@ -66,10 +66,13 @@ struct tsc2007 {
+ 	u16			model;
+ 	u16			x_plate_ohms;
+ 	u16			max_rt;
+	u16			rt_thr;
+	u8			touched;
+ 	unsigned long		poll_period; /* in jiffies */
+ 	int			fuzzx;
+ 	int			fuzzy;
+ 	int			fuzzz;
+	bool			ignore_nak;
+ 
+ 	struct gpio_desc	*gpiod;
+ 	int			irq;
+@@ -81,6 +84,9 @@ struct tsc2007 {
+ 	void			(*clear_penirq)(void);
+ 
+ 	struct mutex		mlock;
+
+	struct timer_list timer;
+	struct work_struct work_i2c_poll;
+ };
+ 
+ int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
+diff --git a/drivers/input/touchscreen/tsc2007_core.c b/drivers/input/touchscreen/tsc2007_core.c
+index 3e871d182c40..6e3bdf1debe0 100644
+--- a/drivers/input/touchscreen/tsc2007_core.c
+++ b/drivers/input/touchscreen/tsc2007_core.c
+@@ -28,6 +28,8 @@
+ #include <linux/platform_data/tsc2007.h>
+ #include "tsc2007.h"
+ 
+#define POLL_INTERVAL_MS 17 /* 17ms = 60fps */
+
+ int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
+ {
+ 	s32 data;
+@@ -172,6 +174,65 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
+ 	return IRQ_HANDLED;
+ }
+ 
+static irqreturn_t tsc2007_soft_poll(int irq, void *handle)
+{
+	struct tsc2007 *ts = handle;
+	struct input_dev *input = ts->input;
+	struct ts_event tc;
+	u32 rt;
+
+	if(!ts->stopped) {
+
+		mutex_lock(&ts->mlock);
+		tsc2007_read_values(ts, &tc);
+		mutex_unlock(&ts->mlock);
+
+		rt = tsc2007_calculate_resistance(ts, &tc);
+
+		if (rt == 0 || rt == 256) {
+
+			/*
+				* Sample found inconsistent by debouncing or pressure is
+				* beyond the maximum. Don't report it to user space,
+				* repeat at least once more the measurement.
+				*/
+			dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt);
+
+		} else {
+
+			if (rt < ts->rt_thr) {
+
+				dev_dbg(&ts->client->dev,
+					"DOWN point(%4d,%4d), resistance (%4u)\n",
+					tc.x, tc.y, rt);
+
+				rt = ts->max_rt - rt;
+
+				input_report_key(input, BTN_TOUCH, 1);
+				input_report_abs(input, ABS_X, tc.y);
+				input_report_abs(input, ABS_Y, 4096 - tc.x);
+				input_report_abs(input, ABS_PRESSURE, rt);
+
+				input_sync(input);
+				ts->touched = 1;
+
+			} else if (ts->touched == 1) {
+
+				dev_dbg(&ts->client->dev, "UP\n");
+
+				input_report_key(input, BTN_TOUCH, 0);
+				input_report_abs(input, ABS_PRESSURE, 0);
+				input_sync(input);
+				ts->touched = 0;
+			}
+		}
+
+
+	}
+
+	return IRQ_HANDLED;
+}
+
+ static irqreturn_t tsc2007_hard_irq(int irq, void *handle)
+ {
+ 	struct tsc2007 *ts = handle;
+@@ -229,11 +290,32 @@ static int tsc2007_get_pendown_state_gpio(struct device *dev)
+ 	return gpiod_get_value(ts->gpiod);
+ }
+ 
+static void tsc2007_ts_irq_poll_timer(struct timer_list *t)
+{
+	struct tsc2007 *ts = from_timer(ts, t, timer);
+
+	schedule_work(&ts->work_i2c_poll);
+	mod_timer(&ts->timer, jiffies + msecs_to_jiffies(POLL_INTERVAL_MS));
+}
+
+static void tsc2007_ts_work_i2c_poll(struct work_struct *work)
+{
+	struct tsc2007 *ts = container_of(work,
+			struct tsc2007, work_i2c_poll);
+
+	tsc2007_soft_poll(0, ts);
+}
+
+ static int tsc2007_probe_properties(struct device *dev, struct tsc2007 *ts)
+ {
+ 	u32 val32;
+ 	u64 val64;
+ 
+	ts->ignore_nak = device_property_read_bool(dev, "i2c,ignore-nak");
+
+	if (!device_property_read_u32(dev, "ti,rt-thr", &val32))
+		ts->rt_thr = val32;
+
+ 	if (!device_property_read_u32(dev, "ti,max-rt", &val32))
+ 		ts->max_rt = val32;
+ 	else
+@@ -330,6 +412,9 @@ static int tsc2007_probe(struct i2c_client *client,
+ 	if (!input_dev)
+ 		return -ENOMEM;
+ 
+	if (ts->ignore_nak)
+		client->flags |= I2C_M_IGNORE_NAK;
+
+ 	i2c_set_clientdata(client, ts);
+ 
+ 	ts->client = client;
+@@ -375,14 +460,23 @@ static int tsc2007_probe(struct i2c_client *client,
+ 			pdata->init_platform_hw();
+ 	}
+ 
+-	err = devm_request_threaded_irq(&client->dev, ts->irq,
+-					tsc2007_hard_irq, tsc2007_soft_irq,
+-					IRQF_ONESHOT,
+-					client->dev.driver->name, ts);
+-	if (err) {
+-		dev_err(&client->dev, "Failed to request irq %d: %d\n",
+-			ts->irq, err);
+-		return err;
+	if (ts->gpiod) {
+		err = devm_request_threaded_irq(&client->dev, ts->irq,
+						tsc2007_hard_irq, tsc2007_soft_irq,
+						IRQF_ONESHOT,
+						client->dev.driver->name, ts);
+		if (err) {
+			dev_err(&client->dev, "Failed to request irq %d: %d\n",
+				ts->irq, err);
+			return err;
+		}
+	} else {
+		INIT_WORK(&ts->work_i2c_poll,
+			  tsc2007_ts_work_i2c_poll);
+		timer_setup(&ts->timer, tsc2007_ts_irq_poll_timer, 0);
+		ts->timer.expires = jiffies +
+					msecs_to_jiffies(POLL_INTERVAL_MS);
+		add_timer(&ts->timer);
+ 	}
+ 
+ 	tsc2007_stop(ts);
+-- 
+2.34.1
+
--- a/patch/kernel/archive/sunxi-6.2/series.armbian
+++ b/patch/kernel/archive/sunxi-6.2/series.armbian
@@ -107,6 +107,10 @@
 	patches.armbian/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
 	patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
 	patches.armbian/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
+	patches.armbian/drv-pmic-add-axp313a.patch
+	patches.armbian/drv-staging-fbtft-add-st7796s.patch
+	patches.armbian/drv-touchscreen-tsc2007-polling.patch
+	patches.armbian/drv-rgb-add-ws2812.patch
 ###################
 	patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch
 	patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-enable-Bluetooth.patch
@@ -143,6 +147,7 @@
 	patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch
 	patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch
 	patches.armbian/Compile-the-pwm-overlay.patch
+	patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
 ###################
 	patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch
 	patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch
@@ -185,3 +190,4 @@
 	patches.armbian/net-usb-r8152-add-LED-configuration-from-OF.patch
 	patches.armbian/arm64-dts-sun50i-h6-orangepi.dtsi-Rollback-r_rsb-to-r_i2c.patch
 	patches.armbian/mfd-sunxi-ac200-fix-error-initialization.patch
+	patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
--- a/patch/kernel/archive/sunxi-6.2/series.conf
+++ b/patch/kernel/archive/sunxi-6.2/series.conf
@@ -503,6 +503,10 @@
 	patches.armbian/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
 	patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
 	patches.armbian/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
+	patches.armbian/drv-pmic-add-axp313a.patch
+	patches.armbian/drv-staging-fbtft-add-st7796s.patch
+	patches.armbian/drv-touchscreen-tsc2007-polling.patch
+	patches.armbian/drv-rgb-add-ws2812.patch
 ###################
 	patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch
 	patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-enable-Bluetooth.patch
@@ -539,6 +543,7 @@
 	patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch
 	patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch
 	patches.armbian/Compile-the-pwm-overlay.patch
+	patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch
 ###################
 	patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch
 	patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch
@@ -581,3 +586,4 @@
 	patches.armbian/net-usb-r8152-add-LED-configuration-from-OF.patch
 	patches.armbian/arm64-dts-sun50i-h6-orangepi.dtsi-Rollback-r_rsb-to-r_i2c.patch
 	patches.armbian/mfd-sunxi-ac200-fix-error-initialization.patch
+	patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch
--- a/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/allwinner-h616-fix-error-boot-from-emmc.patch
+++ b/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/allwinner-h616-fix-error-boot-from-emmc.patch
@@ -0,0 +1,26 @@
+From ae50dd46d3bacea389ffb447aefcf4e7cd2f3fe8 Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Fri, 19 May 2023 17:14:25 +0800
+Subject: [PATCH 08/11] Fix: boot from MMC2(eMMC), mmc_Load_image_raw_sector:
+ mmc block read error
+
+---
+ drivers/mmc/sunxi_mmc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
+index 23bc7da917..c500716ee5 100644
+--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
+@@ -536,7 +536,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
+ 	cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ 
+ 	cfg->f_min = 400000;
+-	cfg->f_max = 52000000;
+	cfg->f_max = 20000000;
+ 
+ 	if (mmc_resource_init(sdc_no) != 0)
+ 		return NULL;
+-- 
+2.34.1
+
--- a/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/allwinner-pmic-add-support-for-AXP313a.patch
+++ b/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/allwinner-pmic-add-support-for-AXP313a.patch
@@ -0,0 +1,613 @@
+From b6cbd44b2582bbc76d1f8eb4fe4b77d45c5dcebe Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Fri, 19 May 2023 16:38:40 +0800
+Subject: [PATCH 05/11] Add: add support for AXP313a PMIC
+
+---
+ arch/arm/mach-sunxi/pmic_bus.c |   4 +
+ board/sunxi/board.c            |  30 ++-
+ drivers/power/Kconfig          |  14 +-
+ drivers/power/Makefile         |   1 +
+ drivers/power/axp313a.c        | 362 +++++++++++++++++++++++++++++++++
+ include/axp313a.h              |  53 +++++
+ include/axp_pmic.h             |   3 +
+ 7 files changed, 459 insertions(+), 8 deletions(-)
+ create mode 100644 drivers/power/axp313a.c
+ create mode 100644 include/axp313a.h
+
+diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
+index c090840637..19c31b195f 100644
+--- a/arch/arm/mach-sunxi/pmic_bus.c
+++ b/arch/arm/mach-sunxi/pmic_bus.c
+@@ -23,6 +23,8 @@
+ 
+ #define AXP305_I2C_ADDR			0x36
+ 
+#define AXP313A_I2C_ADDR		0x36
+
+ #define AXP221_CHIP_ADDR		0x68
+ 
+ #if CONFIG_IS_ENABLED(PMIC_AXP)
+@@ -34,6 +36,8 @@ static int pmic_i2c_address(void)
+ 		return AXP152_I2C_ADDR;
+ 	if (IS_ENABLED(CONFIG_AXP305_POWER))
+ 		return AXP305_I2C_ADDR;
+	if (IS_ENABLED(CONFIG_AXP313A_POWER))
+		return AXP313A_I2C_ADDR;
+ 
+ 	/* Other AXP2xx and AXP8xx variants */
+ 	return AXP209_I2C_ADDR;
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index c7488d7c79..c264790075 100644
+--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
+@@ -581,6 +581,7 @@ static void sunxi_spl_store_dram_size(phys_addr_t dram_size)
+ void sunxi_board_init(void)
+ {
+ 	int power_failed = 0;
+	int power_volume = 0;
+ 
+ #ifdef CONFIG_LED_STATUS
+ 	if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC))
+@@ -593,7 +594,8 @@ void sunxi_board_init(void)
+ 
+ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
+ 	defined CONFIG_AXP221_POWER || defined CONFIG_AXP305_POWER || \
+-	defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
+	defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER || \
+	defined CONFIG_AXP313A_POWER
+ 	power_failed = axp_init();
+ 
+ 	if (IS_ENABLED(CONFIG_AXP_DISABLE_BOOT_ON_POWERON) && !power_failed) {
+@@ -610,11 +612,12 @@ void sunxi_board_init(void)
+ 	defined CONFIG_AXP818_POWER
+ 	power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT);
+ #endif
+-#if !defined(CONFIG_AXP305_POWER)
+#if !defined(CONFIG_AXP305_POWER) && !defined(CONFIG_AXP313A_POWER)
+ 	power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT);
+ 	power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT);
+ #endif
+-#if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP818_POWER)
+#if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP818_POWER) && \
+    !defined(CONFIG_AXP313A_POWER)
+ 	power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT);
+ #endif
+ #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \
+@@ -626,12 +629,29 @@ void sunxi_board_init(void)
+ 	defined CONFIG_AXP818_POWER
+ 	power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT);
+ #endif
+-#if !defined(CONFIG_AXP305_POWER)
+#if !defined(CONFIG_AXP305_POWER) && !defined(CONFIG_AXP313A_POWER)
+ 	power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT);
+ #endif
+-#if !defined(CONFIG_AXP152_POWER) && !defined(CONFIG_AXP305_POWER)
+#if !defined(CONFIG_AXP152_POWER) && !defined(CONFIG_AXP305_POWER) && \
+    !defined(CONFIG_AXP313A_POWER)
+ 	power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT);
+ #endif
+#if defined(CONFIG_AXP313A_POWER)
+    power_failed |= pmu_axp313a_set_voltage("dcdc1", 960, 1);
+    power_volume = pmu_axp313a_get_voltage("dcdc1");
+
+    power_failed |= pmu_axp313a_set_voltage("dcdc2", 1000, 1);
+    power_volume = pmu_axp313a_get_voltage("dcdc2");
+
+    power_failed |= pmu_axp313a_set_voltage("dcdc3", 1500, 1);
+    power_volume = pmu_axp313a_get_voltage("dcdc3");
+
+    power_failed |= pmu_axp313a_set_voltage("aldo1", 1800, 1);
+    power_volume = pmu_axp313a_get_voltage("aldo1");
+
+    power_failed |= pmu_axp313a_set_voltage("dldo1", 3300, 1);
+    power_volume = pmu_axp313a_get_voltage("dldo1");
+#endif
+ #ifdef CONFIG_AXP209_POWER
+ 	power_failed |= axp_set_aldo4(CONFIG_AXP_ALDO4_VOLT);
+ #endif
+diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
+index 7f3b990d23..93905039e6 100644
+--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
+@@ -56,7 +56,7 @@ choice
+ 	depends on ARCH_SUNXI
+ 	default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+ 	default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
+-	default AXP305_POWER if MACH_SUN50I_H616
+	default AXP313A_POWER if MACH_SUN50I_H616
+ 	default AXP818_POWER if MACH_SUN8I_A83T
+ 	default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S
+ 
+@@ -101,6 +101,14 @@ config AXP305_POWER
+ 	Select this to enable support for the axp305 pmic found on most
+ 	H616 boards.
+ 
+config AXP313A_POWER
+	bool "axp313a pmic support"
+	depends on MACH_SUN50I_H616
+	select AXP_PMIC_BUS
+	select CMD_POWEROFF
+	---help---
+	Select this to enable support for the axp313a pmic found on BigTreeTech	CB1 boards.
+
+ config AXP809_POWER
+ 	bool "axp809 pmic support"
+ 	depends on MACH_SUN9I
+@@ -180,12 +188,12 @@ config AXP_DCDC3_VOLT
+ 
+ config AXP_DCDC4_VOLT
+ 	int "axp pmic dcdc4 voltage"
+-	depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP305_POWER
+	depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP305_POWER || AXP313A_POWER
+ 	default 1250 if AXP152_POWER
+ 	default 1200 if MACH_SUN6I
+ 	default 0 if MACH_SUN8I
+ 	default 900 if MACH_SUN9I
+-	default 1500 if AXP305_POWER
+	default 1500 if AXP305_POWER || AXP313A_POWER
+ 	---help---
+ 	Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to
+ 	disable dcdc4.
+diff --git a/drivers/power/Makefile b/drivers/power/Makefile
+index ba64b2c593..f851f4a94e 100644
+--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_AXP152_POWER)	+= axp152.o
+ obj-$(CONFIG_AXP209_POWER)	+= axp209.o
+ obj-$(CONFIG_AXP221_POWER)	+= axp221.o
+ obj-$(CONFIG_AXP305_POWER)	+= axp305.o
+obj-$(CONFIG_AXP313A_POWER)	+= axp313a.o
+ obj-$(CONFIG_AXP809_POWER)	+= axp809.o
+ obj-$(CONFIG_AXP818_POWER)	+= axp818.o
+ obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
+diff --git a/drivers/power/axp313a.c b/drivers/power/axp313a.c
+new file mode 100644
+index 0000000000..c2463458c4
+--- /dev/null
+++ b/drivers/power/axp313a.c
+@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2019 Allwinner.
+ * weidonghui <weidonghui@allwinnertech.com>
+ *
+ * SUNXI AXP21  Driver
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <errno.h>
+#include <asm/arch/pmic_bus.h>
+#include <axp_pmic.h>
+#include <axp313a.h>
+
+#ifdef PMU_DEBUG
+#define axp_info(fmt...) printf("[axp][info]: " fmt)
+#define axp_err(fmt...) printf("[axp][err]: " fmt)
+#else
+#define axp_info(fmt...)
+#define axp_err(fmt...) printf("[axp][err]: " fmt)
+#endif
+
+typedef struct _axp_contrl_info
+{
+    char name[16];
+
+    u32 min_vol;
+    u32 max_vol;
+    u32 cfg_reg_addr;
+    u32 cfg_reg_mask;
+
+    u32 step0_val;
+    u32 split1_val;
+    u32 step1_val;
+    u32 ctrl_reg_addr;
+
+    u32 ctrl_bit_ofs;
+    u32 step2_val;
+    u32 split2_val;
+} axp_contrl_info;
+
+__attribute__((section(".data"))) axp_contrl_info pmu_axp313a_ctrl_tbl[] = {
+    /*name,    min,  max, reg,  mask, step0,split1_val, step1,ctrl_reg,ctrl_bit */
+    {"dcdc1", 500, 3400, AXP313A_DC1OUT_VOL, 0x7f, 10, 1200, 20,
+     AXP313A_OUTPUT_POWER_ON_OFF_CTL, 0, 100, 1540},
+    {"dcdc2", 500, 1540, AXP313A_DC2OUT_VOL, 0x7f, 10, 1200, 20,
+     AXP313A_OUTPUT_POWER_ON_OFF_CTL, 1},
+    {"dcdc3", 500, 1840, AXP313A_DC3OUT_VOL, 0x7f, 10, 1200, 20,
+     AXP313A_OUTPUT_POWER_ON_OFF_CTL, 2},
+    {"aldo1", 500, 3500, AXP313A_ALDO1OUT_VOL, 0x1f, 100, 0, 0,
+     AXP313A_OUTPUT_POWER_ON_OFF_CTL, 3},
+    {"dldo1", 500, 3500, AXP313A_DLDO1OUT_VOL, 0x1f, 100, 0, 0,
+     AXP313A_OUTPUT_POWER_ON_OFF_CTL, 4},
+};
+
+static axp_contrl_info *get_ctrl_info_from_tbl(char *name)
+{
+    int i = 0;
+    int size = ARRAY_SIZE(pmu_axp313a_ctrl_tbl);
+    axp_contrl_info *p;
+
+    for (i = 0; i < size; i++)
+    {
+        if (!strncmp(name, pmu_axp313a_ctrl_tbl[i].name,
+                     strlen(pmu_axp313a_ctrl_tbl[i].name)))
+        {
+            break;
+        }
+    }
+    if (i >= size)
+    {
+        axp_err("can't find %s from table\n", name);
+        return NULL;
+    }
+    p = pmu_axp313a_ctrl_tbl + i;
+    return p;
+}
+
+int pmu_axp313a_necessary_reg_enable(void)
+{
+    __attribute__((unused)) u8 reg_value;
+#ifdef CONFIG_AXP313A_NECESSARY_REG_ENABLE
+    if (pmic_bus_read(AXP313A_RUNTIME_ADDR, AXP313A_WRITE_LOCK, &reg_value))
+        return -1;
+    reg_value |= 0x5;
+    if (pmic_bus_write(AXP313A_RUNTIME_ADDR, AXP313A_WRITE_LOCK, reg_value))
+        return -1;
+
+    if (pmic_bus_read(AXP313A_RUNTIME_ADDR, AXP313A_ERROR_MANAGEMENT, &reg_value))
+        return -1;
+    reg_value |= 0x8;
+    if (pmic_bus_write(AXP313A_RUNTIME_ADDR, AXP313A_ERROR_MANAGEMENT, reg_value))
+        return -1;
+
+    if (pmic_bus_read(AXP313A_RUNTIME_ADDR, AXP313A_DCDC_DVM_PWM_CTL, &reg_value))
+        return -1;
+    reg_value |= (0x1 << 5);
+    if (pmic_bus_write(AXP313A_RUNTIME_ADDR, AXP313A_DCDC_DVM_PWM_CTL, reg_value))
+        return -1;
+#endif
+    return 0;
+}
+
+int axp_init(void)
+{
+    u8 pmu_chip_id;
+    if (pmic_bus_init())
+    {
+        printf("%s pmic_bus_init fail\n", __func__);
+        return -1;
+    }
+    if (pmic_bus_read(AXP313A_VERSION, &pmu_chip_id))
+    {
+        printf("%s pmic_bus_read fail\n", __func__);
+        return -1;
+    }
+    pmu_chip_id &= 0XCF;
+    if (pmu_chip_id == AXP1530_CHIP_ID || pmu_chip_id == AXP313A_CHIP_ID || pmu_chip_id == AXP313B_CHIP_ID)
+    {
+        /*pmu type AXP313A*/
+        // pmu_axp313a_necessary_reg_enable();
+        return 0;
+    }
+    return -1;
+}
+
+int pmu_axp313a_get_info(char *name, unsigned char *chipid)
+{
+    strncpy(name, "axp313a", sizeof("axp313a"));
+    *chipid = AXP313A_CHIP_ID;
+    return 0;
+}
+
+int pmu_axp313a_set_voltage(char *name, uint set_vol, uint onoff)
+{
+    u8 reg_value;
+    axp_contrl_info *p_item = NULL;
+    u8 base_step = 0;
+
+    p_item = get_ctrl_info_from_tbl(name);
+    if (!p_item)
+    {
+        return -1;
+    }
+
+    axp_info(
+        "name %s, min_vol %dmv, max_vol %d, cfg_reg 0x%x, cfg_mask 0x%x \
+		step0_val %d, split1_val %d, step1_val %d, ctrl_reg_addr 0x%x, ctrl_bit_ofs %d\n",
+        p_item->name, p_item->min_vol, p_item->max_vol,
+        p_item->cfg_reg_addr, p_item->cfg_reg_mask, p_item->step0_val,
+        p_item->split1_val, p_item->step1_val, p_item->ctrl_reg_addr,
+        p_item->ctrl_bit_ofs);
+
+    if ((set_vol > 0) && (p_item->min_vol))
+    {
+        if (set_vol < p_item->min_vol)
+        {
+            set_vol = p_item->min_vol;
+        }
+        else if (set_vol > p_item->max_vol)
+        {
+            set_vol = p_item->max_vol;
+        }
+        if (pmic_bus_read(p_item->cfg_reg_addr,
+                          &reg_value))
+        {
+            return -1;
+        }
+
+        reg_value &= ~p_item->cfg_reg_mask;
+        if (p_item->split2_val && (set_vol > p_item->split2_val))
+        {
+            base_step = (p_item->split2_val - p_item->split1_val) /
+                        p_item->step1_val;
+
+            base_step += (p_item->split1_val - p_item->min_vol) /
+                         p_item->step0_val;
+            reg_value |= (base_step +
+                          (set_vol - p_item->split2_val / p_item->step2_val * p_item->step2_val) /
+                              p_item->step2_val);
+        }
+        else if (p_item->split1_val &&
+                 (set_vol > p_item->split1_val))
+        {
+            if (p_item->split1_val < p_item->min_vol)
+            {
+                axp_err("bad split val(%d) for %s\n",
+                        p_item->split1_val, name);
+            }
+
+            base_step = (p_item->split1_val - p_item->min_vol) /
+                        p_item->step0_val;
+            reg_value |= (base_step +
+                          (set_vol - p_item->split1_val) /
+                              p_item->step1_val);
+        }
+        else
+        {
+            reg_value |=
+                (set_vol - p_item->min_vol) / p_item->step0_val;
+        }
+        if (pmic_bus_write(p_item->cfg_reg_addr, reg_value))
+        {
+            axp_err("unable to set %s\n", name);
+            return -1;
+        }
+    }
+
+    if (onoff < 0)
+    {
+        return 0;
+    }
+    if (pmic_bus_read(p_item->ctrl_reg_addr, &reg_value))
+    {
+        return -1;
+    }
+    if (onoff == 0)
+    {
+        reg_value &= ~(1 << p_item->ctrl_bit_ofs);
+    }
+    else
+    {
+        reg_value |= (1 << p_item->ctrl_bit_ofs);
+    }
+    if (pmic_bus_write(p_item->ctrl_reg_addr, reg_value))
+    {
+        axp_err("unable to onoff %s\n", name);
+        return -1;
+    }
+    return 0;
+}
+
+int pmu_axp313a_get_voltage(char *name)
+{
+    u8 reg_value;
+    axp_contrl_info *p_item = NULL;
+    u8 base_step;
+    int vol;
+
+    p_item = get_ctrl_info_from_tbl(name);
+    if (!p_item)
+    {
+        return -1;
+    }
+
+    if (pmic_bus_read(p_item->ctrl_reg_addr, &reg_value))
+    {
+        return -1;
+    }
+    if (!(reg_value & (0x01 << p_item->ctrl_bit_ofs)))
+    {
+        return 0;
+    }
+
+    if (pmic_bus_read(p_item->cfg_reg_addr, &reg_value))
+    {
+        return -1;
+    }
+    reg_value &= p_item->cfg_reg_mask;
+    if (p_item->split2_val)
+    {
+        u32 base_step2;
+        base_step = (p_item->split1_val - p_item->min_vol) /
+                    p_item->step0_val;
+
+        base_step2 = base_step + (p_item->split2_val - p_item->split1_val) /
+                                     p_item->step1_val;
+
+        if (reg_value >= base_step2)
+        {
+            vol = ALIGN(p_item->split2_val, p_item->step2_val) +
+                  p_item->step2_val * (reg_value - base_step2);
+        }
+        else if (reg_value >= base_step)
+        {
+            vol = p_item->split1_val +
+                  p_item->step1_val * (reg_value - base_step);
+        }
+        else
+        {
+            vol = p_item->min_vol + p_item->step0_val * reg_value;
+        }
+    }
+    else if (p_item->split1_val)
+    {
+        base_step = (p_item->split1_val - p_item->min_vol) /
+                    p_item->step0_val;
+        if (reg_value > base_step)
+        {
+            vol = p_item->split1_val +
+                  p_item->step1_val * (reg_value - base_step);
+        }
+        else
+        {
+            vol = p_item->min_vol + p_item->step0_val * reg_value;
+        }
+    }
+    else
+    {
+        vol = p_item->min_vol + p_item->step0_val * reg_value;
+    }
+    return vol;
+}
+
+int pmu_axp313a_set_power_off(void)
+{
+    u8 reg_value;
+    if (pmic_bus_read(AXP313A_POWER_DOMN_SEQUENCE, &reg_value))
+    {
+        return -1;
+    }
+    reg_value |= (1 << 7);
+    if (pmic_bus_write(AXP313A_POWER_DOMN_SEQUENCE, reg_value))
+    {
+        return -1;
+    }
+    return 0;
+}
+
+int pmu_axp313a_get_key_irq(void)
+{
+    u8 reg_value;
+    if (pmic_bus_read(AXP313A_IRQ_STATUS, &reg_value))
+    {
+        return -1;
+    }
+    reg_value &= (0x03 << 4);
+    if (reg_value)
+    {
+        if (pmic_bus_write(AXP313A_IRQ_STATUS, reg_value))
+        {
+            return -1;
+        }
+    }
+    return (reg_value >> 4) & 3;
+}
+
+unsigned char pmu_axp313a_get_reg_value(unsigned char reg_addr)
+{
+    u8 reg_value;
+    if (pmic_bus_read(reg_addr, &reg_value))
+    {
+        return -1;
+    }
+    return reg_value;
+}
+
+unsigned char pmu_axp313a_set_reg_value(unsigned char reg_addr, unsigned char reg_value)
+{
+    unsigned char reg;
+    if (pmic_bus_write(reg_addr, reg_value))
+    {
+        return -1;
+    }
+    if (pmic_bus_read(reg_addr, &reg))
+    {
+        return -1;
+    }
+    return reg;
+}
+diff --git a/include/axp313a.h b/include/axp313a.h
+new file mode 100644
+index 0000000000..d50d300c0f
+--- /dev/null
+++ b/include/axp313a.h
+@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 Allwinner.
+ * weidonghui <weidonghui@allwinnertech.com>
+ *
+ * SUNXI AXP313A  Driver
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __AXP313A_H__
+#define __AXP313A_H__
+
+//PMIC chip id reg03:bit7-6  bit3-
+#define   AXP1530_CHIP_ID              (0x48)
+#define   AXP313A_CHIP_ID              (0x4B)
+#define   AXP313B_CHIP_ID              (0x4C)
+
+#define AXP313A_DEVICE_ADDR			(0x3A3)
+#ifndef CONFIG_SYS_SUNXI_R_I2C0_SLAVE
+#define AXP313A_RUNTIME_ADDR			(0x2d)
+#else
+#ifndef CONFIG_AXP313A_SUNXI_I2C_SLAVE
+#define AXP313A_RUNTIME_ADDR			CONFIG_SYS_SUNXI_R_I2C0_SLAVE
+#else
+#define AXP313A_RUNTIME_ADDR                    CONFIG_AXP313A_SUNXI_I2C_SLAVE
+#endif
+#endif
+
+/* define AXP313A REGISTER */
+#define	AXP313A_POWER_ON_SOURCE_INDIVATION			(0x00)
+#define	AXP313A_POWER_OFF_SOURCE_INDIVATION			(0x01)
+#define	AXP313A_VERSION								(0x03)
+#define	AXP313A_OUTPUT_POWER_ON_OFF_CTL				(0x10)
+#define AXP313A_DCDC_DVM_PWM_CTL					(0x12)
+#define	AXP313A_DC1OUT_VOL							(0x13)
+#define	AXP313A_DC2OUT_VOL          				(0x14)
+#define	AXP313A_DC3OUT_VOL          				(0x15)
+#define	AXP313A_ALDO1OUT_VOL						(0x16)
+#define	AXP313A_DLDO1OUT_VOL						(0x17)
+#define	AXP313A_POWER_DOMN_SEQUENCE					(0x1A)
+#define	AXP313A_PWROK_VOFF_SERT						(0x1B)
+#define AXP313A_POWER_WAKEUP_CTL					(0x1C)
+#define AXP313A_OUTPUT_MONITOR_CONTROL				(0x1D)
+#define	AXP313A_POK_SET								(0x1E)
+#define	AXP313A_IRQ_ENABLE							(0x20)
+#define	AXP313A_IRQ_STATUS							(0x21)
+#define AXP313A_WRITE_LOCK							(0x70)
+#define AXP313A_ERROR_MANAGEMENT					(0x71)
+#define	AXP313A_DCDC1_2_POWER_ON_DEFAULT_SET		(0x80)
+#define	AXP313A_DCDC3_ALDO1_POWER_ON_DEFAULT_SET	(0x81)
+
+
+#endif /* __AXP313A_REGS_H__ */
+diff --git a/include/axp_pmic.h b/include/axp_pmic.h
+index 4ac6486583..6ca85ef61b 100644
+--- a/include/axp_pmic.h
+++ b/include/axp_pmic.h
+@@ -13,6 +13,7 @@
+ #include <axp209.h>
+ #include <axp221.h>
+ #include <axp305.h>
+#include <axp313a.h>
+ #include <axp809.h>
+ #include <axp818.h>
+ 
+@@ -53,5 +54,7 @@ int axp_set_fldo(int fldo_num, unsigned int mvolt);
+ int axp_set_sw(bool on);
+ int axp_init(void);
+ int axp_get_sid(unsigned int *sid);
+int pmu_axp313a_set_voltage(char *name, unsigned int set_vol, unsigned int onoff);
+int pmu_axp313a_get_voltage(char *name);
+ 
+ #endif
+-- 
+2.34.1
+
--- a/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/bigtreetech-cb1-PC3-eMMC-selpin-set-to-pull-down-mode.patch
+++ b/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/bigtreetech-cb1-PC3-eMMC-selpin-set-to-pull-down-mode.patch
@@ -0,0 +1,28 @@
+From 79ba30af3f43cdbb4e7d8bd6f19579a4e1be05f4 Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Fri, 19 May 2023 17:11:36 +0800
+Subject: [PATCH 07/11] Fix: PC3 eMMC sel pin set to pull down mode for boot
+ from eMMC
+
+---
+ board/sunxi/board.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index c264790075..28f74ca363 100644
+--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
+@@ -484,6 +484,10 @@ static void mmc_pinmux_setup(int sdc)
+ 			sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ 			sunxi_gpio_set_drv(pin, 3);
+ 		}
+		/* PC3 eMMC sel pin set to pull down mode for boot from eMMC */
+		sunxi_gpio_set_cfgpin(SUNXI_GPC(3), SUNXI_GPIO_INPUT);
+		sunxi_gpio_set_pull(SUNXI_GPC(3), SUNXI_GPIO_PULL_DOWN);
+		sunxi_gpio_set_drv(SUNXI_GPC(3), 3);
+ #elif defined(CONFIG_MACH_SUN9I)
+ 		/* SDC2: PC6-PC16 */
+ 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) {
+-- 
+2.34.1
+
--- a/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/bigtreetech-cb1-dts-add-deconfig.patch
+++ b/patch/u-boot/u-boot-sunxi/board_bigtreetech-cb1/bigtreetech-cb1-dts-add-deconfig.patch
@@ -0,0 +1,303 @@
+From ca605c51044593c72587e589ac2be90e1aa34795 Mon Sep 17 00:00:00 2001
+From: Alan <Alan>
+Date: Fri, 19 May 2023 17:01:37 +0800
+Subject: [PATCH 06/11] Add: add BigTreeTech CB1 dts & deconfig files
+
+---
+ arch/arm/dts/sun50i-h616-bigtreetech-cb1.dts | 219 +++++++++++++++++++
+ arch/arm/dts/sun50i-h616.dtsi                |   6 +-
+ configs/bigtreetech_cb1_defconfig            |  25 +++
+ 3 files changed, 247 insertions(+), 3 deletions(-)
+ create mode 100644 arch/arm/dts/sun50i-h616-bigtreetech-cb1.dts
+ create mode 100644 configs/bigtreetech_cb1_defconfig
+
+diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dts b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dts
+new file mode 100644
+index 0000000000..dc0e04be94
+--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dts
+@@ -0,0 +1,219 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "BigTreeTech CB1";
+	compatible = "bigtreetech,cb1", "allwinner,sun50i-h616";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 7 5 GPIO_ACTIVE_LOW>; /* PH5 */
+			default-state = "off";
+		};
+
+		gpio_1 {
+			function = "wifi_power";
+			gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+			default-state = "on";
+		};
+
+		gpio_2 {
+			function = "wifi_wake";
+			gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */
+			default-state = "on";
+		};
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply directly from the USB-C socket */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		enable-active-high;
+		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+	};
+
+	reg_vcc33_wifi: vcc33-wifi {
+		/* Always on 3.3V regulator for WiFi and BT */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc33-wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc5v>;
+	};
+
+	reg_vcc_wifi_io: vcc-wifi-io {
+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-wifi-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc33_wifi>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rtc 1>;
+		clock-names = "osc32k-out";
+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;  /* PG18 */
+		post-power-on-delay-ms = <200>;
+	};
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_dldo1>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc33_wifi>;
+	vqmmc-supply = <&reg_vcc_wifi_io>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	max-frequency = <25000000>;
+	non-removable;
+	mmc-ddr-1_8v;
+	status = "okay";
+};
+
+&mmc2 {
+	vmmc-supply = <&reg_dldo1>;
+	no-1-8-v;
+	bus-width = <8>;
+	max-frequency = <20000000>;
+	non-removable;
+	status = "okay";
+};
+
+&r_i2c {
+	status = "okay";
+
+	axp313a: pmic@36 {
+		compatible = "x-powers,axp313a";
+		status = "okay";
+		reg = <0x36>;
+		wakeup-source;
+
+		standby_param: standby_param {
+			vcc-dram = <0x4>;
+		};
+
+		regulators{
+			reg_dcdc1: dcdc1 {
+				regulator-name = "axp313a-dcdc1";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dcdc2: dcdc2 {
+				regulator-name = "axp313a-dcdc2";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1540000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-ramp-delay = <200>;
+				regulator-always-on;
+			};
+
+			reg_dcdc3: dcdc3 {
+				regulator-name = "axp313a-dcdc3";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1840000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_aldo1: aldo1 {
+				regulator-name = "axp313a-aldo1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+
+			reg_dldo1: dldo1 {
+				regulator-name = "axp313a-dldo1";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-step-delay-us = <25>;
+				regulator-final-delay-us = <50>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+&usbotg {
+	/*
+	 * PHY0 pins are connected to a USB-C socket, but a role switch
+	 * is not implemented: both CC pins are pulled to GND.
+	 * The VBUS pins power the device, so a fixed peripheral mode
+	 * is the best choice.
+	 * The board can be powered via GPIOs, in this case port0 *can*
+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
+	 * then provided by the GPIOs. Any user of this setup would
+	 * need to adjust the DT accordingly: dr_mode set to "host",
+	 * enabling OHCI0 and EHCI0.
+	 */
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
+diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
+index 74aed0d232..46651703e9 100644
+--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
+@@ -187,7 +187,7 @@
+ 				pins = "PF0", "PF1", "PF2", "PF3",
+ 				       "PF4", "PF5";
+ 				function = "mmc0";
+-				drive-strength = <30>;
+				drive-strength = <40>;
+ 				bias-pull-up;
+ 			};
+ 
+@@ -196,7 +196,7 @@
+ 				pins = "PG0", "PG1", "PG2", "PG3",
+ 				       "PG4", "PG5";
+ 				function = "mmc1";
+-				drive-strength = <30>;
+				drive-strength = <40>;
+ 				bias-pull-up;
+ 			};
+ 
+@@ -205,7 +205,7 @@
+ 				       "PC8", "PC9", "PC10", "PC11",
+ 				       "PC13", "PC14", "PC15", "PC16";
+ 				function = "mmc2";
+-				drive-strength = <30>;
+				drive-strength = <40>;
+ 				bias-pull-up;
+ 			};
+ 
+diff --git a/configs/bigtreetech_cb1_defconfig b/configs/bigtreetech_cb1_defconfig
+new file mode 100644
+index 0000000000..96c5c17cff
+--- /dev/null
+++ b/configs/bigtreetech_cb1_defconfig
+@@ -0,0 +1,25 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-bigtreetech-cb1"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_WRITE_LEVELING=y
+CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y
+CONFIG_DRAM_SUN50I_H616_READ_TRAINING=y
+CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_R_I2C_ENABLE=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_NET=n
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SYS_PROMPT="CB1@uboot:~$ "
+CONFIG_AXP313A_POWER=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_MMC_BROKEN_CD=y
+-- 
+2.34.1
+