Updates for Radxa's Amlogic boards (radxa-zero and radxa-zero2) (#4420)

* `radxa-zero` &  `radxa-zero2`: set `BOOT_FDT_FILE` explicitly; no real changes

* `radxa-zero2`: `6.0`/`edge`: update Radxa Zero 2 DTS patch with Radxa's latest

* `radxa-zero`: `6.0`/`edge`:  update USB-C patch with "fix interrupt storm from fusb302"

* `radxa-zero`: use pure mainline v2022.10 u-boot with no patches
This commit is contained in:
Ricardo Pardini
2022-11-11 19:29:48 +01:00
committed by GitHub
parent d0efa9bfe1
commit 98c95c00ba
4 changed files with 124 additions and 32 deletions

View File

@@ -9,3 +9,8 @@ FULL_DESKTOP="yes"
FORCE_BOOTSCRIPT_UPDATE="yes"
BOOT_LOGO="desktop"
ASOUND_STATE="asound.state.radxa-zero"
BOOT_FDT_FILE="amlogic/meson-g12a-radxa-zero.dtb"
# Newer u-boot for the Zero; pure mainline.
BOOTBRANCH_BOARD="tag:v2022.10"
BOOTPATCHDIR="v2022.10-NO-PATCHES-PURE-MAINLINE" # Pure mainline u-boot, no patches at all.

View File

@@ -6,3 +6,4 @@ KERNEL_TARGET="current,edge"
FULL_DESKTOP="yes"
BOOT_LOGO="desktop"
ASOUND_STATE="asound.state.radxa-zero2"
BOOT_FDT_FILE="amlogic/meson-g12b-radxa-zero2.dtb"

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@@ -1,22 +1,22 @@
From 9c2db9e795f4d73e78a02f6c8cb313e6bcf34f7e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 16 Feb 2022 07:27:07 +0000
Subject: [PATCH 69/90] WIP: dt-bindings: arm: amlogic: add support for Radxa
Zero2
Subject: [PATCH] dt-bindings: arm: amlogic: add support for Radxa Zero2
The Radxa Zero2 is a small form-factor SBC using the Amlogic
A311D chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Yuntian Zhang <yt@radxa.com>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 05365bb50b29..d069aecabeb3 100644
index 36081734f..ac6e1e79f 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -152,6 +152,7 @@ properties:
@@ -151,6 +151,7 @@ properties:
items:
- enum:
- khadas,vim3
@@ -25,12 +25,12 @@ index 05365bb50b29..d069aecabeb3 100644
- const: amlogic,g12b
--
2.35.1
2.36.1
From aadb6d12609309106f6ab7a56face84c19859796 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Yuntian Zhang <yt@radxa.com>
Date: Fri, 14 Jan 2022 15:50:02 +0000
Subject: [PATCH 70/90] WIP: arm64: dts: meson: add support for Radxa Zero2
Subject: [PATCH] arm64: dts: meson: add support for Radxa Zero2
Radxa Zero2 is a small form factor SBC based on the Amlogic A311D
chipset that ships in a number of eMMC configurations:
@@ -50,12 +50,12 @@ Signed-off-by: Yuntian Zhang <yt@radxa.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../dts/amlogic/meson-g12b-radxa-zero2.dts | 499 ++++++++++++++++++
2 files changed, 500 insertions(+)
.../dts/amlogic/meson-g12b-radxa-zero2.dts | 576 ++++++++++++++++++
2 files changed, 577 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 8773211df50e..f231280cd808 100644
index 5148cd9e5..c65266d26 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
@@ -68,10 +68,10 @@ index 8773211df50e..f231280cd808 100644
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-kii-pro.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
new file mode 100644
index 000000000000..fefa6f2b7abf
index 000000000..f7da62ccf
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
@@ -0,0 +1,499 @@
@@ -0,0 +1,576 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
@@ -91,7 +91,7 @@ index 000000000000..fefa6f2b7abf
+
+/ {
+ compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
+ model = "Radxa Zero2";
+ model = "Radxa Zero 2";
+
+ aliases {
+ serial0 = &uart_AO;
@@ -102,6 +102,13 @@ index 000000000000..fefa6f2b7abf
+ stdout-path = "serial0:115200n8";
+ };
+
+ fan0: pwm-fan {
+ compatible = "pwm-fan";
+ #cooling-cells = <2>;
+ cooling-levels = <0 64 128 192 255>;
+ pwms = <&pwm_AO_ab 0 40000 0>;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
@@ -162,6 +169,14 @@ index 000000000000..fefa6f2b7abf
+ clock-names = "ext_clock";
+ };
+
+ typec2_vbus: regulator-typec2_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "TYPEC2_VBUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&ao_5v>;
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
@@ -206,7 +221,7 @@ index 000000000000..fefa6f2b7abf
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+
+ vddcpu_a: regulator-vddcpu-a {
+ /*
+ * MP8756GD Regulator.
@@ -308,6 +323,18 @@ index 000000000000..fefa6f2b7abf
+ };
+};
+
+&periphs_pinctrl {
+ /* Ensure the TYPE C controller irq pin is not driven by the SoC */
+ fusb302_irq_pins: fusb302_irq {
+ mux {
+ groups = "GPIOA_13";
+ function = "gpio_periphs";
+ bias-pull-up;
+ output-disable;
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
@@ -394,7 +421,7 @@ index 000000000000..fefa6f2b7abf
+ gpio-line-names =
+ /* GPIOZ */
+ "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
+ "", "", "", "", "", "", "", "",
+ "PIN_16", "PIN_22", "", "", "", "", "", "",
+ /* GPIOH */
+ "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
+ "",
@@ -402,10 +429,10 @@ index 000000000000..fefa6f2b7abf
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "EMMC_PWRSEQ", "", "", "",
+ /* GPIOC */
+ "", "", "", "", "", "", "SD_CD", "PIN_36",
+ "", "", "", "", "", "", "SD_CD", "TYPEC_MUX",
+ /* GPIOA */
+ "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
+ "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
+ "PIN_32", "PIN_12", "PIN_35", "PIN_36", "PIN_31", "PIN_38", "", "",
+ "", "", "", "", "LED_GREEN", "FUSB_IRQ", "PIN_3", "PIN_5",
+ /* GPIOX */
+ "", "", "", "", "", "", "SDIO_PWRSEQ", "",
+ "", "", "", "", "", "", "", "",
@@ -416,7 +443,7 @@ index 000000000000..fefa6f2b7abf
+ gpio-line-names =
+ /* GPIOAO */
+ "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
+ "PIN_33", "PIN_37", "FAN", "",
+ "PIN_33", "PIN_37", "", "FAN",
+ /* GPIOE */
+ "", "", "";
+};
@@ -434,12 +461,50 @@ index 000000000000..fefa6f2b7abf
+ };
+};
+
+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ trip = <&cpu_passive>;
+ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+};
+
+&ddr_thermal {
+ cooling-maps {
+ map0 {
+ trip = <&ddr_passive>;
+ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+};
+
+&ir {
+ status = "disabled";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&i2c3 {
+ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ fusb302@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+
+ pinctrl-0 = <&fusb302_irq_pins>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio_intc>;
+ interrupts = <74 IRQ_TYPE_LEVEL_LOW>;
+
+ vbus-supply = <&typec2_vbus>;
+
+ status = "okay";
+ };
+};
+
+&pwm_ab {
+ pinctrl-0 = <&pwm_a_e_pins>;
+ pinctrl-names = "default";
@@ -456,6 +521,14 @@ index 000000000000..fefa6f2b7abf
+ status = "okay";
+};
+
+&pwm_AO_ab {
+ pinctrl-0 = <&pwm_ao_a_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin3";
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
@@ -480,7 +553,7 @@ index 000000000000..fefa6f2b7abf
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ max-frequency = <80000000>;
+
+ non-removable;
+ disable-wp;
@@ -571,6 +644,10 @@ index 000000000000..fefa6f2b7abf
+&usb {
+ status = "okay";
+};
+
+&usb3_pcie_phy {
+ phy-supply = <&typec2_vbus>;
+};
--
2.35.1
2.36.1

View File

@@ -1,8 +1,8 @@
From 795fad491189f7fd6034d6d639602119a4e60755 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 17 Aug 2021 16:16:43 +0000
Subject: [PATCH 68/90] WIP: arm64: dts: meson: radxa-zero: add support for the
usb type-c controller
Subject: [PATCH] arm64: dts: meson: radxa-zero: add support for the usb type-c
controller
Radxa Zero uses an FUSB302 type-c controller, so lets enable it.
@@ -10,14 +10,20 @@ NB: Polarity swapping via GPIO is not implemented in the current driver
(see drivers/usb/typec/tcpm/fusb302.c) so it is not possible to handle
GPIOAO_6 for USB3 polarity control.
Includes:
- arm64: dts: amlogic: fix interrupt storm from fusb302 on Radxa Zero
it makes load average >1. use correct pin for interrupt from fusb302.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Yuntian Zhang <yt@radxa.com>
---
.../dts/amlogic/meson-g12a-radxa-zero.dts | 44 +++++++++++++++++++
.../dts/amlogic/meson-g12a-radxa-zero.dts | 48 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index e3bb6df42ff3..5e3dc013409f 100644
index e3bb6df42..5e3dc0134 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -60,6 +60,14 @@ sdio_pwrseq: sdio-pwrseq {
@@ -54,11 +60,15 @@ index e3bb6df42ff3..5e3dc013409f 100644
&arb {
status = "okay";
};
@@ -278,6 +298,22 @@ &ir {
@@ -278,6 +298,26 @@ &ir {
pinctrl-names = "default";
};
+&i2c_AO {
+&i2c3 {
+ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ fusb302@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
@@ -66,7 +76,7 @@ index e3bb6df42ff3..5e3dc013409f 100644
+ pinctrl-0 = <&fusb302_irq_pins>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio_intc>;
+ interrupts = <59 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+
+ vbus-supply = <&typec2_vbus>;
+
@@ -90,5 +100,4 @@ index e3bb6df42ff3..5e3dc013409f 100644
+ phy-supply = <&typec2_vbus>;
+};
--
2.35.1
2.36.1