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sunxi-5.19: Initial state for megous patches (#4048)

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* sunxi-5.19: Initial state for megous patches

* Add the ability to do 5.19

* Move to 5.19

- tested both
- removed broken Opi Zero xradio driver https://armbian.atlassian.net/browse/AR-1280

* sunxi-5.19: fix tag for switch

* sunxi-5.19: Initial state for armbian patches

* sunxi-5.19: Add armbian patches to series.conf file

* sanxi-5.19: Add other 2 patches

* sunxi-5.19: Limit to use the 'wireless/xradio' module

Limit the kernel version to less than 5.19 to use
the 'wireless/xradio' module

Co-authored-by: Igor Pecovnik <igor.pecovnik@gmail.com>
This commit is contained in:
The-going
2022-08-05 21:23:49 +03:00
committed by GitHub
parent 73691a9e24
commit 97c6e5e9dd
597 changed files with 756470 additions and 200 deletions
Download Patch File Download Diff File Expand all files Collapse all files

224
config/kernel/linux-sunxi-edge.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.18.1 Kernel Configuration
# Linux/arm 5.19.0 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@@ -42,7 +42,6 @@ CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_INIT=""
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
@@ -158,6 +157,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
# end of Scheduler features
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
CONFIG_CGROUPS=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
@@ -201,6 +201,7 @@ CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
CONFIG_RD_ZSTD=y
# CONFIG_BOOT_CONFIG is not set
CONFIG_INITRAMFS_PRESERVE_MTIME=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
@@ -231,7 +232,6 @@ CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
# CONFIG_USERFAULTFD is not set
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_KCMP=y
CONFIG_RSEQ=y
@@ -248,17 +248,6 @@ CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
# end of Kernel Performance Events And Counters
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
CONFIG_SLAB_MERGE_DEFAULT=y
CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
CONFIG_SLUB_CPU_PARTIAL=y
CONFIG_SYSTEM_DATA_VERIFICATION=y
# CONFIG_PROFILING is not set
CONFIG_TRACEPOINTS=y
@@ -288,16 +277,9 @@ CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_BITS_MAX=16
CONFIG_ARCH_MULTIPLATFORM=y
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C24XX is not set
# CONFIG_ARCH_OMAP1 is not set
#
# Multiple platform selection
@@ -321,9 +303,11 @@ CONFIG_ARCH_MULTI_V6_V7=y
# CONFIG_ARCH_BCM is not set
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_DIGICOLOR is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_HIGHBANK is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_HPE is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_KEYSTONE is not set
# CONFIG_ARCH_MEDIATEK is not set
@@ -348,7 +332,6 @@ CONFIG_ARCH_MULTI_V6_V7=y
# CONFIG_ARCH_QCOM is not set
# CONFIG_ARCH_RDA is not set
# CONFIG_ARCH_REALTEK is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_RENESAS is not set
@@ -367,6 +350,7 @@ CONFIG_ARCH_SUNXI_MC_SMP=y
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_U8500 is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_WM8850 is not set
# CONFIG_ARCH_ZYNQ is not set
@@ -396,6 +380,7 @@ CONFIG_ARM_THUMB=y
# CONFIG_ARM_THUMBEE is not set
CONFIG_ARM_VIRT_EXT=y
CONFIG_SWP_EMULATE=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
@@ -418,7 +403,6 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_DMA_MEM_BUFFERABLE=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
CONFIG_DEBUG_ALIGN_RODATA=y
# CONFIG_ARM_ERRATA_430973 is not set
CONFIG_ARM_ERRATA_643719=y
@@ -426,6 +410,7 @@ CONFIG_ARM_ERRATA_643719=y
# CONFIG_ARM_ERRATA_754322 is not set
# CONFIG_ARM_ERRATA_754327 is not set
# CONFIG_ARM_ERRATA_764369 is not set
# CONFIG_ARM_ERRATA_764319 is not set
# CONFIG_ARM_ERRATA_775420 is not set
# CONFIG_ARM_ERRATA_798181 is not set
# CONFIG_ARM_ERRATA_773022 is not set
@@ -635,6 +620,7 @@ CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_KRETPROBES=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_NMI=y
@@ -706,7 +692,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_HAVE_GCC_PLUGINS=y
CONFIG_GCC_PLUGINS=y
# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
@@ -716,6 +701,7 @@ CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_MODULE_SIG=y
@@ -806,7 +792,6 @@ CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
# CONFIG_BINFMT_FLAT_OLD is not set
CONFIG_BINFMT_ZFLAT=y
CONFIG_BINFMT_SHARED_FLAT=y
CONFIG_BINFMT_MISC=m
CONFIG_COREDUMP=y
# end of Executable file formats
@@ -814,6 +799,41 @@ CONFIG_COREDUMP=y
#
# Memory Management options
#
CONFIG_ZPOOL=y
CONFIG_SWAP=y
CONFIG_ZSWAP=y
CONFIG_ZSWAP_DEFAULT_ON=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd"
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold"
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
#
# SLAB allocator options
#
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
CONFIG_SLAB_MERGE_DEFAULT=y
CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
# CONFIG_SLUB_STATS is not set
CONFIG_SLUB_CPU_PARTIAL=y
# end of SLAB allocator options
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
@@ -838,33 +858,17 @@ CONFIG_CMA=y
# CONFIG_CMA_DEBUGFS is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMA_AREAS=7
CONFIG_ZSWAP=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd"
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold"
CONFIG_ZSWAP_DEFAULT_ON=y
CONFIG_ZPOOL=y
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_PAGE_IDLE_FLAG=y
CONFIG_IDLE_PAGE_TRACKING=y
CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_ANON_VMA_NAME is not set
# CONFIG_USERFAULTFD is not set
#
# Data Access Monitoring
@@ -1641,6 +1645,8 @@ CONFIG_CAN_C_CAN_PLATFORM=m
CONFIG_CAN_CC770=m
CONFIG_CAN_CC770_ISA=m
CONFIG_CAN_CC770_PLATFORM=m
CONFIG_CAN_CTUCANFD=m
CONFIG_CAN_CTUCANFD_PLATFORM=m
# CONFIG_CAN_IFI_CANFD is not set
CONFIG_CAN_M_CAN=m
CONFIG_CAN_M_CAN_PLATFORM=m
@@ -1861,11 +1867,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_FW_LOADER=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_EXTRA_FIRMWARE=""
CONFIG_FW_LOADER_USER_HELPER=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
# CONFIG_FW_LOADER_COMPRESS is not set
CONFIG_FW_CACHE=y
# CONFIG_FW_UPLOAD is not set
# end of Firmware loader
CONFIG_WANT_DEV_COREDUMP=y
@@ -1903,6 +1911,7 @@ CONFIG_SUNXI_RSB=y
# CONFIG_VEXPRESS_CONFIG is not set
CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set
CONFIG_MHI_BUS_EP=m
# end of Bus devices
CONFIG_CONNECTOR=m
@@ -1917,6 +1926,7 @@ CONFIG_CONNECTOR=m
CONFIG_ARM_SCMI_PROTOCOL=m
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_HAVE_MSG=y
CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set
@@ -2091,7 +2101,6 @@ CONFIG_OF_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OF_RESOLVE=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_CONFIGFS=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_PARPORT=m
# CONFIG_PARPORT_PC is not set
@@ -2191,7 +2200,6 @@ CONFIG_EEPROM_EE1004=m
CONFIG_MISC_RTSX_USB=m
CONFIG_UACCE=m
# CONFIG_PVPANIC is not set
CONFIG_SUNXI_ADDR_MGT=m
# end of Misc devices
#
@@ -2231,7 +2239,6 @@ CONFIG_SCSI_ISCSI_ATTRS=m
CONFIG_SCSI_LOWLEVEL=y
CONFIG_ISCSI_TCP=m
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_SCSI_UFSHCD is not set
# CONFIG_SCSI_DEBUG is not set
CONFIG_SCSI_VIRTIO=m
# CONFIG_SCSI_DH is not set
@@ -2513,9 +2520,9 @@ CONFIG_FIXED_PHY=y
#
# MII PHY device drivers
#
CONFIG_AC200_PHY=m
CONFIG_AMD_PHY=m
CONFIG_ADIN_PHY=m
CONFIG_ADIN1100_PHY=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AX88796B_PHY=m
CONFIG_BROADCOM_PHY=m
@@ -2557,6 +2564,7 @@ CONFIG_DP83TC811_PHY=m
CONFIG_DP83848_PHY=m
# CONFIG_DP83867_PHY is not set
CONFIG_DP83869_PHY=m
CONFIG_DP83TD510_PHY=m
CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set
@@ -2752,6 +2760,8 @@ CONFIG_MT7921U=m
CONFIG_WLAN_VENDOR_MICROCHIP=y
# CONFIG_WILC1000_SDIO is not set
# CONFIG_WILC1000_SPI is not set
CONFIG_WLAN_VENDOR_PURELIFI=y
# CONFIG_PLFXLC is not set
CONFIG_WLAN_VENDOR_RALINK=y
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
@@ -2780,10 +2790,13 @@ CONFIG_RTLWIFI_USB=m
# CONFIG_RTLWIFI_DEBUG is not set
CONFIG_RTL8192C_COMMON=m
CONFIG_RTL8XXXU=m
# CONFIG_RTL8XXXU_UNTESTED is not set
CONFIG_RTW88=m
# CONFIG_RTW89 is not set
CONFIG_WLAN_VENDOR_RSI=y
# CONFIG_RSI_91X is not set
CONFIG_WLAN_VENDOR_SILABS=y
CONFIG_WFX=m
CONFIG_WLAN_VENDOR_ST=y
# CONFIG_CW1200 is not set
CONFIG_WLAN_VENDOR_TI=y
@@ -2796,11 +2809,7 @@ CONFIG_RTL8723DS=m
CONFIG_RTL8822CS=m
CONFIG_RTL8822BU=m
CONFIG_RTL8821CU=m
CONFIG_WLAN_VENDOR_XRADIO=m
CONFIG_XRADIO_NON_POWER_OF_TWO_BLOCKSIZES=y
# CONFIG_XRADIO_5GHZ_SUPPORT is not set
# CONFIG_XRADIO_WAPI_SUPPORT is not set
CONFIG_XRADIO_USE_EXTENSIONS=y
# CONFIG_WLAN_VENDOR_XRADIO is not set
CONFIG_88XXAU=m
CONFIG_RTL8192EU=m
CONFIG_RTL8189FS=m
@@ -2809,7 +2818,6 @@ CONFIG_WLAN_VENDOR_ZYDAS=y
# CONFIG_USB_ZD1201 is not set
# CONFIG_ZD1211RW is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
# CONFIG_SPARD_WLAN_SUPPORT is not set
CONFIG_MAC80211_HWSIM=m
CONFIG_USB_NET_RNDIS_WLAN=m
# CONFIG_VIRT_WIFI is not set
@@ -2943,6 +2951,7 @@ CONFIG_JOYSTICK_WALKERA0701=m
# CONFIG_JOYSTICK_PXRC is not set
CONFIG_JOYSTICK_QWIIC=m
# CONFIG_JOYSTICK_FSIA6B is not set
CONFIG_JOYSTICK_SENSEHAT=m
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
@@ -3046,6 +3055,7 @@ CONFIG_INPUT_DA7280_HAPTICS=m
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_IQS269A is not set
CONFIG_INPUT_IQS626A=m
CONFIG_INPUT_IQS7222=m
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
@@ -3161,9 +3171,6 @@ CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_VIRTIO_CONSOLE=m
# CONFIG_IPMI_HANDLER is not set
# CONFIG_IPMB_DEVICE_INTERFACE is not set
CONFIG_SUNXI_SYS_INFO=y
CONFIG_DUMP_REG=y
CONFIG_DUMP_REG_MISC=y
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
# CONFIG_HW_RANDOM_BA431 is not set
@@ -3664,7 +3671,9 @@ CONFIG_SENSORS_PC87360=m
CONFIG_SENSORS_PC87427=m
CONFIG_SENSORS_NTC_THERMISTOR=m
CONFIG_SENSORS_NCT6683=m
CONFIG_SENSORS_NCT6775_CORE=m
CONFIG_SENSORS_NCT6775=m
CONFIG_SENSORS_NCT6775_I2C=m
CONFIG_SENSORS_NCT7802=m
CONFIG_SENSORS_NCT7904=m
CONFIG_SENSORS_NPCM7XX=m
@@ -3812,7 +3821,6 @@ CONFIG_MFD_SUN4I_GPADC=m
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_BD9571MWV is not set
CONFIG_MFD_AC100=y
CONFIG_MFD_AC200=y
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
@@ -3989,6 +3997,7 @@ CONFIG_REGULATOR_ROHM=m
# CONFIG_REGULATOR_RT4801 is not set
CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT5190A=m
CONFIG_REGULATOR_RT5759=m
CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
@@ -4502,6 +4511,8 @@ CONFIG_VIDEO_RJ54N1=m
CONFIG_VIDEO_CCS=m
CONFIG_VIDEO_ET8EK8=m
# CONFIG_VIDEO_M5MOLS is not set
CONFIG_VIDEO_HM5065=m
CONFIG_VIDEO_GC2145=m
# end of Camera sensor devices
#
@@ -4854,11 +4865,8 @@ CONFIG_IMX_IPUV3_CORE=m
CONFIG_DRM=y
CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=m
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_MM is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_DP_HELPER=m
CONFIG_DRM_KMS_HELPER=y
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
# CONFIG_DRM_DEBUG_MODESET_LOCK is not set
@@ -4866,6 +4874,12 @@ CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_DP_AUX_BUS=m
CONFIG_DRM_DISPLAY_HELPER=y
CONFIG_DRM_DISPLAY_DP_HELPER=y
CONFIG_DRM_DISPLAY_HDCP_HELPER=y
CONFIG_DRM_DISPLAY_HDMI_HELPER=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DP_CEC is not set
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_GEM_SHMEM_HELPER=m
@@ -4899,7 +4913,6 @@ CONFIG_DRM_RCAR_DW_HDMI=m
CONFIG_DRM_RCAR_MIPI_DSI=m
CONFIG_DRM_SUN4I=y
CONFIG_DRM_SUN4I_HDMI=y
CONFIG_DRM_SUN4I_HDMI_AUDIO=y
CONFIG_DRM_SUN4I_HDMI_CEC=y
CONFIG_DRM_SUN4I_BACKEND=y
CONFIG_DRM_SUN6I_DSI=y
@@ -4945,6 +4958,7 @@ CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m
CONFIG_DRM_PANEL_LG_LB035Q02=m
# CONFIG_DRM_PANEL_LG_LG4573 is not set
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
CONFIG_DRM_PANEL_NEWVISION_NV3052C=m
CONFIG_DRM_PANEL_NOVATEK_NT35510=m
CONFIG_DRM_PANEL_NOVATEK_NT35560=m
CONFIG_DRM_PANEL_NOVATEK_NT35950=m
@@ -4999,8 +5013,10 @@ CONFIG_DRM_PANEL_BRIDGE=y
CONFIG_DRM_CHIPONE_ICN6211=m
# CONFIG_DRM_CHRONTEL_CH7033 is not set
CONFIG_DRM_DISPLAY_CONNECTOR=m
CONFIG_DRM_FSL_LDB=m
CONFIG_DRM_ITE_IT6505=m
CONFIG_DRM_LONTIUM_LT8912B=m
CONFIG_DRM_LONTIUM_LT9211=m
# CONFIG_DRM_LONTIUM_LT9611 is not set
CONFIG_DRM_LONTIUM_LT9611UXC=m
CONFIG_DRM_ITE_IT66121=m
@@ -5033,6 +5049,7 @@ CONFIG_DRM_ANALOGIX_ANX7625=m
CONFIG_DRM_DW_HDMI=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
CONFIG_DRM_DW_HDMI_GP_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=m
# end of Display Interface Bridges
@@ -5063,6 +5080,7 @@ CONFIG_DRM_TIDSS=m
CONFIG_DRM_GUD=m
CONFIG_DRM_SSD130X=m
CONFIG_DRM_SSD130X_I2C=m
CONFIG_DRM_SSD130X_SPI=m
# CONFIG_DRM_LEGACY is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
CONFIG_DRM_NOMODESET=y
@@ -5144,10 +5162,10 @@ CONFIG_HDMI=y
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
CONFIG_BOOTSPLASH=y
# end of Console display driver support
CONFIG_LOGO=y
@@ -5201,6 +5219,7 @@ CONFIG_SND_VIRMIDI=m
CONFIG_SND_MTPAV=m
CONFIG_SND_MTS64=m
CONFIG_SND_SERIAL_U16550=m
CONFIG_SND_SERIAL_GENERIC=m
CONFIG_SND_MPU401=m
CONFIG_SND_PORTMAN2X4=m
# CONFIG_SND_AC97_POWER_SAVE is not set
@@ -5340,6 +5359,10 @@ CONFIG_SND_SOC_CS35L41_LIB=m
CONFIG_SND_SOC_CS35L41=m
CONFIG_SND_SOC_CS35L41_SPI=m
CONFIG_SND_SOC_CS35L41_I2C=m
CONFIG_SND_SOC_CS35L45_TABLES=m
CONFIG_SND_SOC_CS35L45=m
CONFIG_SND_SOC_CS35L45_SPI=m
CONFIG_SND_SOC_CS35L45_I2C=m
CONFIG_SND_SOC_CS42L42=m
CONFIG_SND_SOC_CS42L51=m
CONFIG_SND_SOC_CS42L51_I2C=m
@@ -5380,6 +5403,7 @@ CONFIG_SND_SOC_MAX98927=m
CONFIG_SND_SOC_MAX98520=m
# CONFIG_SND_SOC_MAX98373_I2C is not set
# CONFIG_SND_SOC_MAX98390 is not set
CONFIG_SND_SOC_MAX98396=m
CONFIG_SND_SOC_MAX9860=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
CONFIG_SND_SOC_PCM1681=m
@@ -5460,6 +5484,8 @@ CONFIG_SND_SOC_WM8580=m
CONFIG_SND_SOC_WM8711=m
CONFIG_SND_SOC_WM8728=m
CONFIG_SND_SOC_WM8731=m
CONFIG_SND_SOC_WM8731_I2C=m
CONFIG_SND_SOC_WM8731_SPI=m
CONFIG_SND_SOC_WM8737=m
CONFIG_SND_SOC_WM8741=m
CONFIG_SND_SOC_WM8750=m
@@ -5472,6 +5498,7 @@ CONFIG_SND_SOC_WM8804_I2C=m
CONFIG_SND_SOC_WM8804_SPI=m
CONFIG_SND_SOC_WM8903=m
CONFIG_SND_SOC_WM8904=m
CONFIG_SND_SOC_WM8940=m
CONFIG_SND_SOC_WM8960=m
CONFIG_SND_SOC_WM8962=m
CONFIG_SND_SOC_WM8974=m
@@ -5494,7 +5521,6 @@ CONFIG_SND_SOC_LPASS_WSA_MACRO=m
CONFIG_SND_SOC_LPASS_VA_MACRO=m
CONFIG_SND_SOC_LPASS_RX_MACRO=m
CONFIG_SND_SOC_LPASS_TX_MACRO=m
CONFIG_SND_SOC_ACX00=m
# end of CODEC drivers
CONFIG_SND_SIMPLE_CARD_UTILS=y
@@ -5581,6 +5607,7 @@ CONFIG_LOGIWHEELS_FF=y
CONFIG_HID_MAGICMOUSE=m
CONFIG_HID_MALTRON=m
# CONFIG_HID_MAYFLASH is not set
CONFIG_HID_MEGAWORLD_FF=m
# CONFIG_HID_REDRAGON is not set
CONFIG_HID_MICROSOFT=m
CONFIG_HID_MONTEREY=m
@@ -6019,6 +6046,7 @@ CONFIG_TYPEC_EXTCON=m
#
# USB Type-C Multiplexer/DeMultiplexer Switch support
#
CONFIG_TYPEC_MUX_FSA4480=m
CONFIG_TYPEC_MUX_PI3USB30532=m
# end of USB Type-C Multiplexer/DeMultiplexer Switch support
@@ -6056,6 +6084,7 @@ CONFIG_MMC_SUNXI=y
CONFIG_MMC_HSQ=m
# CONFIG_MMC_MTK is not set
CONFIG_MMC_LITEX=m
# CONFIG_SCSI_UFSHCD is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@@ -6127,6 +6156,10 @@ CONFIG_LEDS_LM3601X=m
CONFIG_LEDS_RT4505=m
CONFIG_LEDS_RT8515=m
#
# RGB LED drivers
#
#
# LED Triggers
#
@@ -6344,6 +6377,7 @@ CONFIG_UIO_DMEM_GENIRQ=m
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO=m
CONFIG_VIRTIO_MENU=y
# CONFIG_VIRTIO_HARDEN_NOTIFICATION is not set
CONFIG_VIRTIO_BALLOON=m
CONFIG_VIRTIO_INPUT=m
# CONFIG_VIRTIO_MMIO is not set
@@ -6432,7 +6466,6 @@ CONFIG_VIDEO_SUNXI=y
CONFIG_VIDEO_SUNXI_CEDRUS=m
# CONFIG_STAGING_BOARD is not set
# CONFIG_LTE_GDM724X is not set
# CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
CONFIG_FB_TFT=m
CONFIG_FB_TFT_AGM1264K_FL=m
@@ -6478,7 +6511,10 @@ CONFIG_FIELDBUS_DEV=m
CONFIG_HMS_ANYBUSS_BUS=m
CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m
CONFIG_WFX=m
#
# VME Device Drivers
#
CONFIG_RTL8723CS=m
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
@@ -7234,6 +7270,7 @@ CONFIG_PWM_ATMEL_TCB=m
CONFIG_PWM_NTXEC=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_SUN4I=m
CONFIG_PWM_XILINX=m
#
# IRQ chip support
@@ -7243,6 +7280,10 @@ CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_MAX_NR=1
# CONFIG_AL_FIC is not set
CONFIG_MADERA_IRQ=m
CONFIG_SUN4I_INTC=y
CONFIG_SUN6I_R_INTC=y
CONFIG_SUNXI_NMI_INTC=y
# CONFIG_XILINX_INTC is not set
# end of IRQ chip support
# CONFIG_IPACK_BUS is not set
@@ -7336,13 +7377,7 @@ CONFIG_FSI_MASTER_ASPEED=m
# CONFIG_FSI_SCOM is not set
# CONFIG_FSI_SBEFIFO is not set
CONFIG_TEE=m
#
# TEE drivers
#
CONFIG_OPTEE=m
# end of TEE drivers
CONFIG_MULTIPLEXER=m
#
@@ -7368,6 +7403,7 @@ CONFIG_MOST=m
CONFIG_MOST_SND=m
CONFIG_PECI=m
CONFIG_PECI_CPU=m
# CONFIG_HTE is not set
# end of Device Drivers
#
@@ -7480,6 +7516,7 @@ CONFIG_FSCACHE_STATS=y
CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_ERROR_INJECTION is not set
# CONFIG_CACHEFILES_ONDEMAND is not set
# end of Caches
#
@@ -7621,24 +7658,6 @@ CONFIG_EROFS_FS_XATTR=y
CONFIG_EROFS_FS_POSIX_ACL=y
CONFIG_EROFS_FS_SECURITY=y
# CONFIG_EROFS_FS_ZIP is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=m
CONFIG_NFS_V2=m
@@ -7772,6 +7791,7 @@ CONFIG_IO_WQ=y
CONFIG_KEYS=y
CONFIG_KEYS_REQUEST_CACHE=y
CONFIG_PERSISTENT_KEYRINGS=y
# CONFIG_TRUSTED_KEYS is not set
CONFIG_ENCRYPTED_KEYS=y
# CONFIG_USER_DECRYPTED_DATA is not set
CONFIG_KEY_DH_OPERATIONS=y
@@ -7848,6 +7868,10 @@ CONFIG_INIT_STACK_NONE=y
CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
# end of Memory initialization
CONFIG_RANDSTRUCT_NONE=y
# CONFIG_RANDSTRUCT_FULL is not set
# CONFIG_RANDSTRUCT_PERFORMANCE is not set
# end of Kernel hardening options
# end of Security options
@@ -7962,6 +7986,7 @@ CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_SM3=m
CONFIG_CRYPTO_SM3_GENERIC=m
CONFIG_CRYPTO_STREEBOG=m
CONFIG_CRYPTO_WP512=m
@@ -7985,6 +8010,7 @@ CONFIG_CRYPTO_CHACHA20=y
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_SM4=m
CONFIG_CRYPTO_SM4_GENERIC=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m
@@ -8047,6 +8073,7 @@ CONFIG_PKCS8_PRIVATE_KEY_PARSER=m
CONFIG_PKCS7_MESSAGE_PARSER=y
# CONFIG_PKCS7_TEST_KEY is not set
# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
# CONFIG_FIPS_SIGNATURE_SELFTEST is not set
#
# Certificates for signature checking
@@ -8062,6 +8089,7 @@ CONFIG_SECONDARY_TRUSTED_KEYRING=y
CONFIG_SYSTEM_BLACKLIST_KEYRING=y
CONFIG_SYSTEM_BLACKLIST_HASH_LIST=""
# CONFIG_SYSTEM_REVOCATION_LIST is not set
# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set
# end of Certificates for signature checking
CONFIG_BINARY_PRINTF=y
@@ -8104,10 +8132,9 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM3=m
CONFIG_CRYPTO_LIB_SM4=m
# end of Crypto library routines
CONFIG_LIB_MEMNEQ=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
@@ -8221,6 +8248,8 @@ CONFIG_FONT_6x10=y
CONFIG_FONT_TER16x32=y
# CONFIG_FONT_6x8 is not set
CONFIG_SG_POOL=y
CONFIG_STACKDEPOT=y
CONFIG_STACK_HASH_ORDER=20
CONFIG_SBITMAP=y
# end of Library routines
@@ -8287,6 +8316,7 @@ CONFIG_HAVE_ARCH_KGDB=y
#
# CONFIG_NET_DEV_REFCNT_TRACKER is not set
# CONFIG_NET_NS_REFCNT_TRACKER is not set
# CONFIG_DEBUG_NET is not set
# end of Networking Debugging
#
@@ -8294,14 +8324,14 @@ CONFIG_HAVE_ARCH_KGDB=y
#
CONFIG_PAGE_EXTENSION=y
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_PAGE_OWNER is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_PAGE_REF is not set
# CONFIG_DEBUG_RODATA_TEST is not set
# CONFIG_DEBUG_WX is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
@@ -8388,6 +8418,7 @@ CONFIG_STACKTRACE=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_REF_SCALE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# end of RCU Debugging
@@ -8430,7 +8461,12 @@ CONFIG_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_BRANCH_PROFILE_NONE=y
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
CONFIG_KPROBE_EVENTS=y
# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set
# CONFIG_UPROBE_EVENTS is not set
CONFIG_BPF_EVENTS=y
CONFIG_DYNAMIC_EVENTS=y
CONFIG_PROBE_EVENTS=y
CONFIG_FTRACE_MCOUNT_RECORD=y
CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT=y
# CONFIG_SYNTH_EVENTS is not set
@@ -8445,6 +8481,7 @@ CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT=y
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
# CONFIG_KPROBE_EVENT_GEN_TEST is not set
# CONFIG_SAMPLES is not set
# CONFIG_STRICT_DEVMEM is not set
@@ -8459,6 +8496,7 @@ CONFIG_ARM_UNWIND=y
# CONFIG_DEBUG_LL is not set
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
# CONFIG_ARM_KPROBES_TEST is not set
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_CORESIGHT is not set
# end of arm Debugging

234
config/kernel/linux-sunxi64-edge.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.18.2 Kernel Configuration
# Linux/arm64 5.19.0 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@@ -32,9 +32,9 @@ CONFIG_LOCALVERSION=""
CONFIG_BUILD_SALT=""
CONFIG_DEFAULT_INIT=""
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYSVIPC_COMPAT=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
# CONFIG_WATCH_QUEUE is not set
@@ -158,6 +158,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_CC_HAS_INT128=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
CONFIG_ARCH_SUPPORTS_INT128=y
# CONFIG_NUMA_BALANCING is not set
CONFIG_CGROUPS=y
@@ -204,6 +205,7 @@ CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
CONFIG_RD_ZSTD=y
# CONFIG_BOOT_CONFIG is not set
CONFIG_INITRAMFS_PRESERVE_MTIME=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
@@ -233,7 +235,6 @@ CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_BASE_RELATIVE=y
# CONFIG_USERFAULTFD is not set
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_KCMP=y
CONFIG_RSEQ=y
@@ -246,16 +247,6 @@ CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_EVENTS=y
# end of Kernel Performance Events And Counters
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SLAB_MERGE_DEFAULT=y
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SLAB_FREELIST_HARDENED is not set
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
CONFIG_SLUB_CPU_PARTIAL=y
CONFIG_SYSTEM_DATA_VERIFICATION=y
# CONFIG_PROFILING is not set
# end of General setup
@@ -477,10 +468,12 @@ CONFIG_ARM64_EPAN=y
# end of ARMv8.7 architectural features
CONFIG_ARM64_SVE=y
CONFIG_ARM64_SME=y
CONFIG_ARM64_MODULE_PLTS=y
# CONFIG_ARM64_PSEUDO_NMI is not set
CONFIG_RELOCATABLE=y
# CONFIG_RANDOMIZE_BASE is not set
CONFIG_ARCH_NR_GPIO=0
# end of Kernel Features
#
@@ -490,8 +483,6 @@ CONFIG_CMDLINE=""
# CONFIG_EFI is not set
# end of Boot options
CONFIG_SYSVIPC_COMPAT=y
#
# Power management options
#
@@ -581,6 +572,8 @@ CONFIG_CRYPTO_SHA2_ARM64_CE=y
# CONFIG_CRYPTO_SHA3_ARM64 is not set
# CONFIG_CRYPTO_SM3_ARM64_CE is not set
CONFIG_CRYPTO_SM4_ARM64_CE=m
CONFIG_CRYPTO_SM4_ARM64_CE_BLK=m
CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=m
CONFIG_CRYPTO_GHASH_ARM64_CE=y
# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set
CONFIG_CRYPTO_AES_ARM64=y
@@ -601,6 +594,7 @@ CONFIG_KPROBES=y
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_KRETPROBES=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
@@ -685,6 +679,7 @@ CONFIG_HAVE_PREEMPT_DYNAMIC=y
CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
#
# GCOV-based kernel profiling
@@ -696,7 +691,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_HAVE_GCC_PLUGINS=y
CONFIG_GCC_PLUGINS=y
# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
@@ -706,6 +700,7 @@ CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_MODULE_SIG=y
@@ -852,6 +847,40 @@ CONFIG_COREDUMP=y
#
# Memory Management options
#
CONFIG_ZPOOL=y
CONFIG_SWAP=y
CONFIG_ZSWAP=y
CONFIG_ZSWAP_DEFAULT_ON=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd"
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold"
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
#
# SLAB allocator options
#
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SLAB_MERGE_DEFAULT=y
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SLAB_FREELIST_HARDENED is not set
# CONFIG_SLUB_STATS is not set
CONFIG_SLUB_CPU_PARTIAL=y
# end of SLAB allocator options
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
@@ -860,8 +889,8 @@ CONFIG_HAVE_FAST_GUP=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
CONFIG_MEMORY_BALLOON=y
@@ -880,6 +909,7 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
CONFIG_TRANSPARENT_HUGEPAGE=y
# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set
CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
# CONFIG_READ_ONLY_THP_FOR_FS is not set
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
@@ -889,39 +919,23 @@ CONFIG_CMA=y
# CONFIG_CMA_DEBUGFS is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMA_AREAS=7
CONFIG_ZSWAP=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd"
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold"
CONFIG_ZSWAP_DEFAULT_ON=y
CONFIG_ZPOOL=y
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
CONFIG_PAGE_IDLE_FLAG=y
CONFIG_IDLE_PAGE_TRACKING=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y
CONFIG_ARCH_HAS_VM_GET_PAGE_PROT=y
CONFIG_ARCH_HAS_PTE_DEVMAP=y
CONFIG_ZONE_DMA=y
CONFIG_ZONE_DMA32=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_PERCPU_STATS=y
# CONFIG_GUP_TEST is not set
# CONFIG_READ_ONLY_THP_FOR_FS is not set
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_SECRETMEM=y
# CONFIG_ANON_VMA_NAME is not set
# CONFIG_USERFAULTFD is not set
#
# Data Access Monitoring
@@ -1679,6 +1693,8 @@ CONFIG_CAN_CALC_BITTIMING=y
# CONFIG_CAN_XILINXCAN is not set
# CONFIG_CAN_C_CAN is not set
# CONFIG_CAN_CC770 is not set
CONFIG_CAN_CTUCANFD=m
CONFIG_CAN_CTUCANFD_PLATFORM=m
# CONFIG_CAN_IFI_CANFD is not set
# CONFIG_CAN_M_CAN is not set
# CONFIG_CAN_SJA1000 is not set
@@ -1902,6 +1918,7 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
CONFIG_FW_CACHE=y
# CONFIG_FW_UPLOAD is not set
# end of Firmware loader
CONFIG_WANT_DEV_COREDUMP=y
@@ -1936,6 +1953,7 @@ CONFIG_SUNXI_RSB=y
# CONFIG_VEXPRESS_CONFIG is not set
CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set
CONFIG_MHI_BUS_EP=m
# end of Bus devices
CONFIG_CONNECTOR=m
@@ -2128,7 +2146,6 @@ CONFIG_OF_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OF_RESOLVE=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_CONFIGFS=y
CONFIG_OF_NUMA=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
@@ -2220,7 +2237,6 @@ CONFIG_EEPROM_EE1004=m
# CONFIG_MISC_RTSX_USB is not set
CONFIG_UACCE=m
# CONFIG_PVPANIC is not set
CONFIG_SUNXI_ADDR_MGT=m
# end of Misc devices
#
@@ -2261,11 +2277,6 @@ CONFIG_SCSI_LOWLEVEL=y
CONFIG_ISCSI_TCP=m
CONFIG_ISCSI_BOOT_SYSFS=m
# CONFIG_SCSI_HISI_SAS is not set
CONFIG_SCSI_UFSHCD=m
# CONFIG_SCSI_UFSHCD_PLATFORM is not set
# CONFIG_SCSI_UFS_BSG is not set
# CONFIG_SCSI_UFS_HPB is not set
# CONFIG_SCSI_UFS_HWMON is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_VIRTIO is not set
# CONFIG_SCSI_DH is not set
@@ -2521,9 +2532,9 @@ CONFIG_FIXED_PHY=y
#
# MII PHY device drivers
#
CONFIG_AC200_PHY=m
CONFIG_AMD_PHY=m
CONFIG_ADIN_PHY=m
CONFIG_ADIN1100_PHY=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AX88796B_PHY=m
CONFIG_BROADCOM_PHY=m
@@ -2565,6 +2576,7 @@ CONFIG_DP83TC811_PHY=m
CONFIG_DP83848_PHY=m
# CONFIG_DP83867_PHY is not set
CONFIG_DP83869_PHY=m
CONFIG_DP83TD510_PHY=m
CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set
@@ -2759,6 +2771,8 @@ CONFIG_MT7921U=m
CONFIG_WLAN_VENDOR_MICROCHIP=y
# CONFIG_WILC1000_SDIO is not set
# CONFIG_WILC1000_SPI is not set
CONFIG_WLAN_VENDOR_PURELIFI=y
CONFIG_PLFXLC=m
CONFIG_WLAN_VENDOR_RALINK=y
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
@@ -2791,6 +2805,8 @@ CONFIG_RTL8XXXU=m
CONFIG_RTW88=m
# CONFIG_RTW89 is not set
# CONFIG_WLAN_VENDOR_RSI is not set
CONFIG_WLAN_VENDOR_SILABS=y
CONFIG_WFX=m
# CONFIG_WLAN_VENDOR_ST is not set
# CONFIG_WLAN_VENDOR_TI is not set
CONFIG_RTL8723DU=m
@@ -2805,23 +2821,6 @@ CONFIG_RTL8189FS=m
CONFIG_RTL8189ES=m
# CONFIG_WLAN_VENDOR_ZYDAS is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
CONFIG_SPARD_WLAN_SUPPORT=y
#
# UNISOC WCN Device Drivers(for new chip...)
#
# CONFIG_SC23XX is not set
# CONFIG_WCN_BSP_DRIVER_BUILDIN is not set
# CONFIG_RK_WIFI_DEVICE_UWE5621 is not set
# CONFIG_RK_WIFI_DEVICE_UWE5622 is not set
CONFIG_AW_WIFI_DEVICE_UWE5622=y
CONFIG_AW_BIND_VERIFY=y
# end of UNISOC WCN Device Drivers(for new chip...)
CONFIG_WLAN_UWE5622=m
CONFIG_SPRDWL_NG=m
CONFIG_UNISOC_WIFI_PS=y
CONFIG_TTY_OVERY_SDIO=m
# CONFIG_MAC80211_HWSIM is not set
CONFIG_USB_NET_RNDIS_WLAN=m
CONFIG_VIRT_WIFI=m
@@ -2955,6 +2954,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y
# CONFIG_JOYSTICK_PXRC is not set
CONFIG_JOYSTICK_QWIIC=m
# CONFIG_JOYSTICK_FSIA6B is not set
CONFIG_JOYSTICK_SENSEHAT=m
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
@@ -3077,6 +3077,7 @@ CONFIG_INPUT_DA7280_HAPTICS=m
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_IQS269A is not set
CONFIG_INPUT_IQS626A=m
CONFIG_INPUT_IQS7222=m
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
@@ -3192,9 +3193,6 @@ CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_VIRTIO_CONSOLE=y
# CONFIG_IPMI_HANDLER is not set
# CONFIG_IPMB_DEVICE_INTERFACE is not set
CONFIG_SUNXI_SYS_INFO=y
CONFIG_DUMP_REG=y
CONFIG_DUMP_REG_MISC=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_TIMERIOMEM=m
CONFIG_HW_RANDOM_BA431=m
@@ -3431,7 +3429,6 @@ CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_CDEV_V1=y
CONFIG_GPIO_GENERIC=y
@@ -3717,7 +3714,9 @@ CONFIG_SENSORS_PC87360=m
CONFIG_SENSORS_PC87427=m
CONFIG_SENSORS_NTC_THERMISTOR=m
CONFIG_SENSORS_NCT6683=m
CONFIG_SENSORS_NCT6775_CORE=m
CONFIG_SENSORS_NCT6775=m
CONFIG_SENSORS_NCT6775_I2C=m
CONFIG_SENSORS_NCT7802=m
CONFIG_SENSORS_NCT7904=m
CONFIG_SENSORS_NPCM7XX=m
@@ -3771,6 +3770,7 @@ CONFIG_SENSORS_TPS40422=m
CONFIG_SENSORS_TPS53679=m
CONFIG_SENSORS_UCD9000=m
CONFIG_SENSORS_UCD9200=m
CONFIG_SENSORS_XDPE152=m
CONFIG_SENSORS_XDPE122=m
# CONFIG_SENSORS_XDPE122_REGULATOR is not set
CONFIG_SENSORS_ZL6100=m
@@ -3910,7 +3910,6 @@ CONFIG_MFD_SUN4I_GPADC=y
# CONFIG_MFD_BCM590XX is not set
CONFIG_MFD_BD9571MWV=m
CONFIG_MFD_AC100=y
CONFIG_MFD_AC200=y
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
@@ -4085,6 +4084,7 @@ CONFIG_REGULATOR_ROHM=m
# CONFIG_REGULATOR_RT4801 is not set
CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT5190A=m
CONFIG_REGULATOR_RT5759=m
CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
@@ -4375,7 +4375,7 @@ CONFIG_VIDEO_EM28XX_RC=m
CONFIG_USB_AIRSPY=m
CONFIG_USB_HACKRF=m
CONFIG_USB_MSI2500=m
CONFIG_RADIO_ADAPTERS=y
CONFIG_RADIO_ADAPTERS=m
CONFIG_RADIO_SAA7706H=m
CONFIG_RADIO_SHARK=m
CONFIG_RADIO_SHARK2=m
@@ -4494,6 +4494,8 @@ CONFIG_VIDEO_VS6624=m
CONFIG_VIDEO_CCS=m
CONFIG_VIDEO_ET8EK8=m
CONFIG_VIDEO_M5MOLS=m
CONFIG_VIDEO_HM5065=m
CONFIG_VIDEO_GC2145=m
# end of Camera sensor devices
#
@@ -4717,14 +4719,17 @@ CONFIG_DVB_SP2=m
CONFIG_DRM=y
CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=m
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_MM is not set
CONFIG_DRM_DP_HELPER=m
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_DP_AUX_BUS=m
CONFIG_DRM_DISPLAY_HELPER=y
CONFIG_DRM_DISPLAY_DP_HELPER=y
CONFIG_DRM_DISPLAY_HDCP_HELPER=y
CONFIG_DRM_DISPLAY_HDMI_HELPER=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DP_CEC is not set
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_GEM_SHMEM_HELPER=m
@@ -4755,7 +4760,6 @@ CONFIG_DRM_VKMS=m
# CONFIG_DRM_RCAR_MIPI_DSI is not set
CONFIG_DRM_SUN4I=y
CONFIG_DRM_SUN4I_HDMI=y
CONFIG_DRM_SUN4I_HDMI_AUDIO=y
CONFIG_DRM_SUN4I_HDMI_CEC=y
CONFIG_DRM_SUN4I_BACKEND=y
CONFIG_DRM_SUN6I_DSI=y
@@ -4797,6 +4801,7 @@ CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m
CONFIG_DRM_PANEL_LG_LB035Q02=m
# CONFIG_DRM_PANEL_LG_LG4573 is not set
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
CONFIG_DRM_PANEL_NEWVISION_NV3052C=m
CONFIG_DRM_PANEL_NOVATEK_NT35510=m
CONFIG_DRM_PANEL_NOVATEK_NT35560=m
CONFIG_DRM_PANEL_NOVATEK_NT35950=m
@@ -4851,8 +4856,10 @@ CONFIG_DRM_CDNS_DSI=m
CONFIG_DRM_CHIPONE_ICN6211=m
# CONFIG_DRM_CHRONTEL_CH7033 is not set
CONFIG_DRM_DISPLAY_CONNECTOR=m
CONFIG_DRM_FSL_LDB=m
CONFIG_DRM_ITE_IT6505=m
CONFIG_DRM_LONTIUM_LT8912B=m
CONFIG_DRM_LONTIUM_LT9211=m
# CONFIG_DRM_LONTIUM_LT9611 is not set
CONFIG_DRM_LONTIUM_LT9611UXC=m
CONFIG_DRM_ITE_IT66121=m
@@ -4885,6 +4892,7 @@ CONFIG_DRM_ANALOGIX_ANX7625=m
CONFIG_DRM_DW_HDMI=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
CONFIG_DRM_DW_HDMI_GP_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=m
# end of Display Interface Bridges
@@ -4912,6 +4920,7 @@ CONFIG_DRM_TIDSS=m
CONFIG_DRM_GUD=m
CONFIG_DRM_SSD130X=m
CONFIG_DRM_SSD130X_I2C=m
CONFIG_DRM_SSD130X_SPI=m
# CONFIG_DRM_LEGACY is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
CONFIG_DRM_NOMODESET=y
@@ -4997,10 +5006,10 @@ CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
CONFIG_BOOTSPLASH=y
# end of Console display driver support
CONFIG_LOGO=y
@@ -5043,6 +5052,7 @@ CONFIG_SND_ALOOP=m
CONFIG_SND_VIRMIDI=m
CONFIG_SND_MTPAV=m
CONFIG_SND_SERIAL_U16550=m
CONFIG_SND_SERIAL_GENERIC=m
CONFIG_SND_MPU401=m
#
@@ -5161,6 +5171,10 @@ CONFIG_SND_SOC_CS35L41_LIB=m
CONFIG_SND_SOC_CS35L41=m
CONFIG_SND_SOC_CS35L41_SPI=m
CONFIG_SND_SOC_CS35L41_I2C=m
CONFIG_SND_SOC_CS35L45_TABLES=m
CONFIG_SND_SOC_CS35L45=m
CONFIG_SND_SOC_CS35L45_SPI=m
CONFIG_SND_SOC_CS35L45_I2C=m
# CONFIG_SND_SOC_CS42L42 is not set
# CONFIG_SND_SOC_CS42L51_I2C is not set
# CONFIG_SND_SOC_CS42L52 is not set
@@ -5197,6 +5211,7 @@ CONFIG_SND_SOC_MAX9867=m
CONFIG_SND_SOC_MAX98520=m
# CONFIG_SND_SOC_MAX98373_I2C is not set
# CONFIG_SND_SOC_MAX98390 is not set
CONFIG_SND_SOC_MAX98396=m
# CONFIG_SND_SOC_MAX9860 is not set
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
@@ -5268,7 +5283,9 @@ CONFIG_SND_SOC_WM8524=m
# CONFIG_SND_SOC_WM8580 is not set
# CONFIG_SND_SOC_WM8711 is not set
# CONFIG_SND_SOC_WM8728 is not set
# CONFIG_SND_SOC_WM8731 is not set
CONFIG_SND_SOC_WM8731=m
CONFIG_SND_SOC_WM8731_I2C=m
CONFIG_SND_SOC_WM8731_SPI=m
# CONFIG_SND_SOC_WM8737 is not set
# CONFIG_SND_SOC_WM8741 is not set
# CONFIG_SND_SOC_WM8750 is not set
@@ -5280,6 +5297,7 @@ CONFIG_SND_SOC_WM8782=m
# CONFIG_SND_SOC_WM8804_SPI is not set
# CONFIG_SND_SOC_WM8903 is not set
CONFIG_SND_SOC_WM8904=m
CONFIG_SND_SOC_WM8940=m
# CONFIG_SND_SOC_WM8960 is not set
# CONFIG_SND_SOC_WM8962 is not set
# CONFIG_SND_SOC_WM8974 is not set
@@ -5302,7 +5320,6 @@ CONFIG_SND_SOC_LPASS_WSA_MACRO=m
CONFIG_SND_SOC_LPASS_VA_MACRO=m
CONFIG_SND_SOC_LPASS_RX_MACRO=m
CONFIG_SND_SOC_LPASS_TX_MACRO=m
CONFIG_SND_SOC_ACX00=y
# end of CODEC drivers
CONFIG_SND_SIMPLE_CARD_UTILS=m
@@ -5387,6 +5404,7 @@ CONFIG_LOGIWHEELS_FF=y
CONFIG_HID_MAGICMOUSE=m
CONFIG_HID_MALTRON=m
# CONFIG_HID_MAYFLASH is not set
CONFIG_HID_MEGAWORLD_FF=m
CONFIG_HID_REDRAGON=m
CONFIG_HID_MICROSOFT=m
CONFIG_HID_MONTEREY=m
@@ -5809,6 +5827,7 @@ CONFIG_TYPEC_EXTCON=m
#
# USB Type-C Multiplexer/DeMultiplexer Switch support
#
CONFIG_TYPEC_MUX_FSA4480=m
CONFIG_TYPEC_MUX_PI3USB30532=m
# end of USB Type-C Multiplexer/DeMultiplexer Switch support
@@ -5863,6 +5882,11 @@ CONFIG_MMC_HSQ=m
# CONFIG_MMC_SDHCI_OMAP is not set
CONFIG_MMC_SDHCI_AM654=m
CONFIG_MMC_LITEX=m
CONFIG_SCSI_UFSHCD=m
# CONFIG_SCSI_UFS_BSG is not set
# CONFIG_SCSI_UFS_HPB is not set
# CONFIG_SCSI_UFS_HWMON is not set
# CONFIG_SCSI_UFSHCD_PLATFORM is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@@ -5919,6 +5943,10 @@ CONFIG_LEDS_USER=y
# Flash and Torch LED drivers
#
#
# RGB LED drivers
#
#
# LED Triggers
#
@@ -6133,6 +6161,7 @@ CONFIG_DMABUF_SELFTESTS=m
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO=y
CONFIG_VIRTIO_MENU=y
# CONFIG_VIRTIO_HARDEN_NOTIFICATION is not set
CONFIG_VIRTIO_BALLOON=y
# CONFIG_VIRTIO_INPUT is not set
CONFIG_VIRTIO_MMIO=y
@@ -6223,7 +6252,6 @@ CONFIG_VIDEO_SUNXI=y
CONFIG_VIDEO_SUNXI_CEDRUS=m
# CONFIG_STAGING_BOARD is not set
# CONFIG_LTE_GDM724X is not set
# CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
CONFIG_FB_TFT=m
CONFIG_FB_TFT_AGM1264K_FL=m
@@ -6266,7 +6294,10 @@ CONFIG_MOST_COMPONENTS=m
# CONFIG_PI433 is not set
CONFIG_XIL_AXIS_FIFO=m
# CONFIG_FIELDBUS_DEV is not set
CONFIG_WFX=m
#
# VME Device Drivers
#
CONFIG_RTL8723CS=m
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
@@ -7064,6 +7095,7 @@ CONFIG_PWM_ATMEL_TCB=m
CONFIG_PWM_NTXEC=m
CONFIG_PWM_PCA9685=m
CONFIG_PWM_SUN4I=m
CONFIG_PWM_XILINX=m
#
# IRQ chip support
@@ -7075,6 +7107,9 @@ CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
# CONFIG_AL_FIC is not set
CONFIG_MADERA_IRQ=m
CONFIG_SUN6I_R_INTC=y
CONFIG_SUNXI_NMI_INTC=y
# CONFIG_XILINX_INTC is not set
CONFIG_PARTITION_PERCPU=y
# end of IRQ chip support
@@ -7186,6 +7221,7 @@ CONFIG_MOST=m
CONFIG_MOST_SND=m
CONFIG_PECI=m
CONFIG_PECI_CPU=m
# CONFIG_HTE is not set
# end of Device Drivers
#
@@ -7287,6 +7323,7 @@ CONFIG_FSCACHE=m
CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_ERROR_INJECTION is not set
# CONFIG_CACHEFILES_ONDEMAND is not set
# end of Caches
#
@@ -7333,6 +7370,9 @@ CONFIG_TMPFS_XATTR=y
CONFIG_ARCH_SUPPORTS_HUGETLBFS=y
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y
CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y
# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set
CONFIG_MEMFD_CREATE=y
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
CONFIG_CONFIGFS_FS=y
@@ -7427,24 +7467,6 @@ CONFIG_EROFS_FS_XATTR=y
CONFIG_EROFS_FS_POSIX_ACL=y
CONFIG_EROFS_FS_SECURITY=y
# CONFIG_EROFS_FS_ZIP is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=m
CONFIG_NFS_V2=m
@@ -7583,6 +7605,7 @@ CONFIG_KEYS=y
CONFIG_KEYS_REQUEST_CACHE=y
CONFIG_PERSISTENT_KEYRINGS=y
CONFIG_TRUSTED_KEYS=y
CONFIG_TRUSTED_KEYS_TPM=y
CONFIG_ENCRYPTED_KEYS=y
# CONFIG_USER_DECRYPTED_DATA is not set
CONFIG_KEY_DH_OPERATIONS=y
@@ -7638,7 +7661,6 @@ CONFIG_INTEGRITY_AUDIT=y
CONFIG_IMA=y
CONFIG_IMA_MEASURE_PCR_IDX=10
CONFIG_IMA_LSM_RULES=y
# CONFIG_IMA_TEMPLATE is not set
CONFIG_IMA_NG_TEMPLATE=y
# CONFIG_IMA_SIG_TEMPLATE is not set
CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng"
@@ -7687,6 +7709,10 @@ CONFIG_INIT_STACK_NONE=y
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
# end of Memory initialization
CONFIG_RANDSTRUCT_NONE=y
# CONFIG_RANDSTRUCT_FULL is not set
# CONFIG_RANDSTRUCT_PERFORMANCE is not set
# end of Kernel hardening options
# end of Security options
@@ -7800,6 +7826,7 @@ CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_SM3=m
CONFIG_CRYPTO_SM3_GENERIC=m
CONFIG_CRYPTO_STREEBOG=m
CONFIG_CRYPTO_WP512=m
@@ -7823,6 +7850,7 @@ CONFIG_CRYPTO_CHACHA20=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_SM4=m
CONFIG_CRYPTO_SM4_GENERIC=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m
@@ -7887,6 +7915,7 @@ CONFIG_PKCS8_PRIVATE_KEY_PARSER=m
CONFIG_PKCS7_MESSAGE_PARSER=y
CONFIG_PKCS7_TEST_KEY=m
CONFIG_SIGNED_PE_FILE_VERIFICATION=y
# CONFIG_FIPS_SIGNATURE_SELFTEST is not set
#
# Certificates for signature checking
@@ -7902,6 +7931,7 @@ CONFIG_SECONDARY_TRUSTED_KEYRING=y
CONFIG_SYSTEM_BLACKLIST_KEYRING=y
CONFIG_SYSTEM_BLACKLIST_HASH_LIST=""
# CONFIG_SYSTEM_REVOCATION_LIST is not set
# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set
# end of Certificates for signature checking
CONFIG_BINARY_PRINTF=y
@@ -7945,10 +7975,9 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM3=m
CONFIG_CRYPTO_LIB_SM4=m
# end of Crypto library routines
CONFIG_LIB_MEMNEQ=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
@@ -8073,6 +8102,8 @@ CONFIG_FONT_TER16x32=y
# CONFIG_FONT_6x8 is not set
CONFIG_SG_POOL=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_STACK_HASH_ORDER=20
CONFIG_SBITMAP=y
# end of Library routines
@@ -8137,13 +8168,14 @@ CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_PAGE_TABLE_CHECK is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_RODATA_TEST is not set
CONFIG_ARCH_HAS_DEBUG_WX=y
# CONFIG_DEBUG_WX is not set
CONFIG_GENERIC_PTDUMP=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y
# CONFIG_DEBUG_VM_PGTABLE is not set
@@ -8184,7 +8216,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
# end of Lock Debugging (spinlocks, mutexes, etc...)
# CONFIG_DEBUG_IRQFLAGS is not set
# CONFIG_STACKTRACE is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
#
@@ -8197,6 +8229,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
# RCU Debugging
#
CONFIG_RCU_CPU_STALL_TIMEOUT=60
CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
# end of RCU Debugging
CONFIG_HAVE_FUNCTION_TRACER=y
@@ -8223,6 +8256,7 @@ CONFIG_TRACING_SUPPORT=y
# Kernel Testing and Coverage
#
# CONFIG_KUNIT is not set
CONFIG_FUNCTION_ERROR_INJECTION=y
CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
CONFIG_RUNTIME_TESTING_MENU=y

6
config/sources/families/include/sunxi64_common.inc
View File

@@ -22,14 +22,14 @@ case $BRANCH in
;;
edge)
KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-5.18}
KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v5.18.16'}
KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-5.19}
KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v5.19'}
;;
esac
case "$KERNEL_VERSION_LEVEL" in
5.10|5.15|5.16|5.17|5.18)
5.10|5.15|5.16|5.17|5.18|5.19)
KERNELSOURCE=$MAINLINE_KERNEL_SOURCE
KERNELSOURCENAME='name=origin'
KERNELBRANCH="branch:linux-${KERNEL_VERSION_LEVEL}.y"

6
config/sources/families/include/sunxi_common.inc
View File

@@ -21,15 +21,15 @@ case $BRANCH in
KERNELSWITCHOBJ="tag=v5.15.59"
;;
edge)
KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-5.18}
KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v5.18.16'}
KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-5.19}
KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v5.19'}
;;
esac
case "$KERNEL_VERSION_LEVEL" in
5.10|5.15|5.16|5.17|5.18)
5.10|5.15|5.16|5.17|5.18|5.19)
KERNELSOURCE=$MAINLINE_KERNEL_SOURCE
KERNELSOURCENAME='name=origin'
KERNELBRANCH="branch:linux-${KERNEL_VERSION_LEVEL}.y"

3
lib/compilation-prepare.sh
View File

@@ -398,7 +398,8 @@ compilation_prepare()
# Wireless drivers for Xradio XR819 chipsets
if linux-version compare "${version}" ge 4.19 && [[ "$LINUXFAMILY" == sunxi* ]] && [[ "$EXTRAWIFI" == yes ]]; then
if linux-version compare "${version}" ge 4.19 && linux-version compare "${version}" le 5.19 && \
[[ "$LINUXFAMILY" == sunxi* ]] && [[ "$EXTRAWIFI" == yes ]]; then
display_alert "Adding" "Wireless drivers for Xradio XR819 chipsets" "info"

13
patch/kernel/archive/sunxi-5.19/disable-debug-rtl8189fs.patch Normal file
View File

@@ -0,0 +1,13 @@
diff --git a/drivers/net/wireless/rtl8189fs/Makefile b/drivers/net/wireless/rtl8189fs/Makefile
index dfca305..d56dcfd 100644
--- a/drivers/net/wireless/rtl8189fs/Makefile
+++ b/drivers/net/wireless/rtl8189fs/Makefile
@@ -88,7 +88,7 @@ CONFIG_RTW_WIFI_HAL = n
CONFIG_ICMP_VOQ = n
CONFIG_IP_R_MONITOR = n #arp VOQ and high rate
########################## Debug ###########################
-CONFIG_RTW_DEBUG = y
+CONFIG_RTW_DEBUG = n
# default log level is _DRV_INFO_ = 4,
# please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
CONFIG_RTW_LOG_LEVEL = 4

1552
patch/kernel/archive/sunxi-5.19/patches.armbian/Add-dump_reg-and-sunxi-sysinfo-drivers.patch Normal file
View File

File diff suppressed because it is too large Load Diff

613
patch/kernel/archive/sunxi-5.19/patches.armbian/Add-sunxi-addr-driver-Used-to-fix-uwe5622-bluetooth-MAC-address.patch Normal file
View File

@@ -0,0 +1,613 @@
From 043607edd746a81ead1620c5f75ccec1073c58c1 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 20:18:18 +0000
Subject: [PATCH 160/170] Add sunxi-addr driver - Used to fix uwe5622 bluetooth
MAC addresses
---
drivers/misc/Kconfig | 1 +
drivers/misc/Makefile | 1 +
drivers/misc/sunxi-addr/Kconfig | 6 +
drivers/misc/sunxi-addr/Makefile | 5 +
drivers/misc/sunxi-addr/sha256.c | 178 +++++++++++++
drivers/misc/sunxi-addr/sunxi-addr.c | 358 +++++++++++++++++++++++++++
6 files changed, 549 insertions(+)
create mode 100644 drivers/misc/sunxi-addr/Kconfig
create mode 100644 drivers/misc/sunxi-addr/Makefile
create mode 100644 drivers/misc/sunxi-addr/sha256.c
create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f7fb1a4ca..b6eccfefa 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -507,4 +507,5 @@ source "drivers/misc/cardreader/Kconfig"
source "drivers/misc/habanalabs/Kconfig"
source "drivers/misc/uacce/Kconfig"
source "drivers/misc/pvpanic/Kconfig"
+source "drivers/misc/sunxi-addr/Kconfig"
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9dc478dbe..58b2099b5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o
obj-$(CONFIG_HI6421V600_IRQ) += hi6421v600-irq.o
obj-$(CONFIG_OPEN_DICE) += open-dice.o
obj-$(CONFIG_MODEM_POWER) += modem-power.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi-addr/
\ No newline at end of file
diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
new file mode 100644
index 000000000..801dd2c02
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Kconfig
@@ -0,0 +1,6 @@
+config SUNXI_ADDR_MGT
+ tristate "Allwinner Network MAC Addess Manager"
+ depends on BT || ETHERNET || WLAN
+ depends on NVMEM_SUNXI_SID
+ help
+ allwinner network mac address management
diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
new file mode 100644
index 000000000..f01fd4783
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for wifi mac addr manager drivers
+#
+sunxi_addr-objs := sunxi-addr.o sha256.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi_addr.o
diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
new file mode 100644
index 000000000..78825810c
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sha256.c
@@ -0,0 +1,178 @@
+/*
+ * Local implement of sha256.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+/****************************** MACROS ******************************/
+#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
+#define CH(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
+#define MAJ(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
+#define EP0(x) (ROTRIGHT(x, 2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
+#define EP1(x) (ROTRIGHT(x, 6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
+#define SIG0(x) (ROTRIGHT(x, 7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
+#define SIG1(x) (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
+
+/**************************** VARIABLES *****************************/
+static const uint32_t k[64] = {
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+ 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+ 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+ 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+ 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+ 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+ 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+ 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+ 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+ 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+ 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
+};
+
+struct sha256_ctx {
+ uint8_t data[64]; /* current 512-bit chunk of message data, just like a buffer */
+ uint32_t datalen; /* sign the data length of current chunk */
+ uint64_t bitlen; /* the bit length of the total message */
+ uint32_t state[8]; /* store the middle state of hash abstract */
+};
+
+/*********************** FUNCTION DEFINITIONS ***********************/
+static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
+{
+ uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
+
+ /* initialization */
+ for (i = 0, j = 0; i < 16; ++i, j += 4)
+ m[i] = (data[j] << 24) | (data[j + 1] << 16) |
+ (data[j + 2] << 8) | (data[j + 3]);
+ for ( ; i < 64; ++i)
+ m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
+
+ a = ctx->state[0];
+ b = ctx->state[1];
+ c = ctx->state[2];
+ d = ctx->state[3];
+ e = ctx->state[4];
+ f = ctx->state[5];
+ g = ctx->state[6];
+ h = ctx->state[7];
+
+ for (i = 0; i < 64; ++i) {
+ t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
+ t2 = EP0(a) + MAJ(a, b, c);
+ h = g;
+ g = f;
+ f = e;
+ e = d + t1;
+ d = c;
+ c = b;
+ b = a;
+ a = t1 + t2;
+ }
+
+ ctx->state[0] += a;
+ ctx->state[1] += b;
+ ctx->state[2] += c;
+ ctx->state[3] += d;
+ ctx->state[4] += e;
+ ctx->state[5] += f;
+ ctx->state[6] += g;
+ ctx->state[7] += h;
+}
+
+static void sha256_init(struct sha256_ctx *ctx)
+{
+ ctx->datalen = 0;
+ ctx->bitlen = 0;
+ ctx->state[0] = 0x6a09e667;
+ ctx->state[1] = 0xbb67ae85;
+ ctx->state[2] = 0x3c6ef372;
+ ctx->state[3] = 0xa54ff53a;
+ ctx->state[4] = 0x510e527f;
+ ctx->state[5] = 0x9b05688c;
+ ctx->state[6] = 0x1f83d9ab;
+ ctx->state[7] = 0x5be0cd19;
+}
+
+static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
+{
+ uint32_t i;
+
+ for (i = 0; i < len; ++i) {
+ ctx->data[ctx->datalen] = data[i];
+ ctx->datalen++;
+ if (ctx->datalen == 64) {
+ /* 64 byte = 512 bit means the buffer ctx->data has
+ * fully stored one chunk of message,
+ * so do the sha256 hash map for the current chunk.
+ */
+ sha256_transform(ctx, ctx->data);
+ ctx->bitlen += 512;
+ ctx->datalen = 0;
+ }
+ }
+}
+
+static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
+{
+ uint32_t i;
+
+ i = ctx->datalen;
+
+ /* Pad whatever data is left in the buffer. */
+ if (ctx->datalen < 56) {
+ ctx->data[i++] = 0x80; /* pad 10000000 = 0x80 */
+ while (i < 56)
+ ctx->data[i++] = 0x00;
+ } else {
+ ctx->data[i++] = 0x80;
+ while (i < 64)
+ ctx->data[i++] = 0x00;
+ sha256_transform(ctx, ctx->data);
+ memset(ctx->data, 0, 56);
+ }
+
+ /* Append to the padding the total message's length in bits and transform. */
+ ctx->bitlen += ctx->datalen * 8;
+ ctx->data[63] = ctx->bitlen;
+ ctx->data[62] = ctx->bitlen >> 8;
+ ctx->data[61] = ctx->bitlen >> 16;
+ ctx->data[60] = ctx->bitlen >> 24;
+ ctx->data[59] = ctx->bitlen >> 32;
+ ctx->data[58] = ctx->bitlen >> 40;
+ ctx->data[57] = ctx->bitlen >> 48;
+ ctx->data[56] = ctx->bitlen >> 56;
+ sha256_transform(ctx, ctx->data);
+
+ /* copying the final state to the output hash(use big endian). */
+ for (i = 0; i < 4; ++i) {
+ hash[i] = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 4] = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 8] = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
+ }
+}
+
+int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
+{
+ struct sha256_ctx ctx;
+
+ sha256_init(&ctx);
+ sha256_update(&ctx, plaintext, psize);
+ sha256_final(&ctx, output);
+ return 0;
+}
diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
new file mode 100644
index 000000000..a812e4e82
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sunxi-addr.c
@@ -0,0 +1,358 @@
+/*
+ * The driver of SUNXI NET MAC ADDR Manager.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#define DEBUG
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/miscdevice.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+
+#define MODULE_CUR_VERSION "v1.0.9"
+
+#define MATCH_STR_LEN 20
+#define ADDR_VAL_LEN 6
+#define ADDR_STR_LEN 18
+#define ID_LEN 16
+#define HASH_LEN 32
+
+#define TYPE_ANY 0
+#define TYPE_BURN 1
+#define TYPE_IDGEN 2
+#define TYPE_USER 3
+#define TYPE_RAND 4
+
+#define ADDR_FMT_STR 0
+#define ADDR_FMT_VAL 1
+
+#define IS_TYPE_INVALID(x) ((x < TYPE_ANY) || (x > TYPE_RAND))
+
+#define ADDR_CLASS_ATTR_ADD(name) \
+static ssize_t addr_##name##_show(struct class *class, \
+ struct class_attribute *attr, char *buffer) \
+{ \
+ char addr[ADDR_STR_LEN]; \
+ if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
+ return 0; \
+ return sprintf(buffer, "%.17s\n", addr); \
+} \
+static ssize_t addr_##name##_store(struct class *class, \
+ struct class_attribute *attr, \
+ const char *buffer, size_t count) \
+{ \
+ if (count != ADDR_STR_LEN) { \
+ ADDR_MGT_ERR("Length wrong."); \
+ return -EINVAL; \
+ } \
+ set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
+ return count; \
+} \
+static CLASS_ATTR_RW(addr_##name);
+
+struct addr_mgt_info {
+ unsigned int type_def;
+ unsigned int type_cur;
+ unsigned int flag;
+ char *addr;
+ char *name;
+};
+
+static struct addr_mgt_info info[] = {
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
+ {TYPE_ANY, TYPE_ANY, 0, NULL, "bt" },
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
+};
+
+extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
+extern int sunxi_get_soc_chipid(unsigned char *chipid);
+
+static int addr_parse(int fmt, const char *addr, int check)
+{
+ char val_buf[ADDR_VAL_LEN];
+ char cmp_buf[ADDR_VAL_LEN];
+ int ret = ADDR_VAL_LEN;
+
+ if (fmt == ADDR_FMT_STR)
+ ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &val_buf[0], &val_buf[1], &val_buf[2],
+ &val_buf[3], &val_buf[4], &val_buf[5]);
+ else
+ memcpy(val_buf, addr, ADDR_VAL_LEN);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+
+ if (check && (val_buf[0] & 0x3))
+ return -1;
+
+ memset(cmp_buf, 0x00, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ return 0;
+}
+
+static struct addr_mgt_info *addr_find_by_name(char *name)
+{
+ int i = 0;
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ if (strcmp(info[i].name, name) == 0)
+ return &info[i];
+ }
+ return NULL;
+}
+
+static int get_addr_by_name(int fmt, char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (IS_TYPE_INVALID(t->type_cur)) {
+ ADDR_MGT_ERR("addr type invalid");
+ return -1;
+ }
+
+ if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
+ return -1;
+ }
+
+ if (fmt == ADDR_FMT_STR)
+ sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
+ t->addr[0], t->addr[1], t->addr[2],
+ t->addr[3], t->addr[4], t->addr[5]);
+ else
+ memcpy(addr, t->addr, ADDR_VAL_LEN);
+
+ return t->type_cur;
+}
+
+static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (addr_parse(fmt, addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", addr);
+ return -1;
+ }
+
+ t->type_cur = type;
+ if (fmt == ADDR_FMT_STR)
+ sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &t->addr[0], &t->addr[1], &t->addr[2],
+ &t->addr[3], &t->addr[4], &t->addr[5]);
+ else
+ memcpy(t->addr, addr, ADDR_VAL_LEN);
+
+ return 0;
+}
+
+int get_custom_mac_address(int fmt, char *name, char *addr)
+{
+ return get_addr_by_name(fmt, addr, name);
+}
+EXPORT_SYMBOL_GPL(get_custom_mac_address);
+
+static int addr_factory(struct device_node *np,
+ int idx, int type, char *mac, char *name)
+{
+ int ret, i;
+ char match[MATCH_STR_LEN];
+ const char *p;
+ char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
+ struct timespec64 curtime;
+
+ switch (type) {
+ case TYPE_BURN:
+ sprintf(match, "addr_%s", name);
+ ret = of_property_read_string_index(np, match, 0, &p);
+ if (ret)
+ return -1;
+
+ ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &mac[0], &mac[1], &mac[2],
+ &mac[3], &mac[4], &mac[5]);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+ break;
+ case TYPE_IDGEN:
+ if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
+ return -1;
+ if (sunxi_get_soc_chipid(id))
+ return -1;
+ memset(cmp_buf, 0x00, ID_LEN);
+ if (memcmp(id, cmp_buf, ID_LEN) == 0)
+ return -1;
+ if (hmac_sha256(id, ID_LEN, hash))
+ return -1;
+ memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
+ break;
+ case TYPE_RAND:
+ for (i = 0; i < ADDR_VAL_LEN; i++) {
+ ktime_get_real_ts64(&curtime);
+ mac[i] = (char)curtime.tv_nsec;
+ }
+ break;
+ default:
+ ADDR_MGT_ERR("unsupport type: %d", type);
+ return -1;
+ }
+ return 0;
+}
+
+static int addr_init(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ int type, i, j;
+ char match[MATCH_STR_LEN];
+ char addr[ADDR_VAL_LEN];
+ int type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
+
+ /* init addr type and value */
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ sprintf(match, "type_addr_%s", info[i].name);
+ if (of_property_read_u32(np, match, &type)) {
+ ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
+ info[i].name, info[i].type_def);
+ } else {
+ info[i].type_def = type;
+ info[i].type_cur = type;
+ }
+
+ if (IS_TYPE_INVALID(info[i].type_def))
+ return -1;
+ if (info[i].type_def != TYPE_ANY) {
+ if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
+ return -1;
+ } else {
+ for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
+ if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
+ info[i].type_cur = type_tab[j];
+ break;
+ }
+ }
+ }
+
+ if (info[i].flag)
+ addr[0] &= 0xFC;
+
+ if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
+ return -1;
+ else {
+ info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
+ memcpy(info[i].addr, addr, ADDR_VAL_LEN);
+ }
+ }
+ return 0;
+}
+
+static ssize_t summary_show(struct class *class,
+ struct class_attribute *attr, char *buffer)
+{
+ int i = 0, ret = 0;
+
+ ret += sprintf(&buffer[ret], "name cfg cur address\n");
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ ret += sprintf(&buffer[ret],
+ "%4s %d %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+ info[i].name, info[i].type_def, info[i].type_cur,
+ info[i].addr[0], info[i].addr[1], info[i].addr[2],
+ info[i].addr[3], info[i].addr[4], info[i].addr[5]);
+ }
+ return ret;
+}
+static CLASS_ATTR_RO(summary);
+
+ADDR_CLASS_ATTR_ADD(wifi);
+ADDR_CLASS_ATTR_ADD(bt);
+ADDR_CLASS_ATTR_ADD(eth);
+
+static struct attribute *addr_class_attrs[] = {
+ &class_attr_summary.attr,
+ &class_attr_addr_wifi.attr,
+ &class_attr_addr_bt.attr,
+ &class_attr_addr_eth.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(addr_class);
+
+static struct class addr_class = {
+ .name = "addr_mgt",
+ .owner = THIS_MODULE,
+ .class_groups = addr_class_groups,
+};
+
+static const struct of_device_id addr_mgt_ids[] = {
+ { .compatible = "allwinner,sunxi-addr_mgt" },
+ { /* Sentinel */ }
+};
+
+static int addr_mgt_probe(struct platform_device *pdev)
+{
+ int status;
+
+ ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
+ status = class_register(&addr_class);
+ if (status < 0) {
+ ADDR_MGT_ERR("class register error, status: %d.", status);
+ return -1;
+ }
+
+ if (addr_init(pdev)) {
+ ADDR_MGT_ERR("failed to init addr.");
+ class_unregister(&addr_class);
+ return -1;
+ }
+ ADDR_MGT_DBG("success.");
+ return 0;
+}
+
+static int addr_mgt_remove(struct platform_device *pdev)
+{
+ class_unregister(&addr_class);
+ return 0;
+}
+
+static struct platform_driver addr_mgt_driver = {
+ .probe = addr_mgt_probe,
+ .remove = addr_mgt_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "sunxi-addr-mgt",
+ .of_match_table = addr_mgt_ids,
+ },
+};
+
+module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
+
+MODULE_AUTHOR("Allwinnertech");
+MODULE_DESCRIPTION("Network MAC Addess Manager");
+MODULE_LICENSE("GPL");
--
2.35.3

72
patch/kernel/archive/sunxi-5.19/patches.armbian/Bananapro-add-AXP209-regulators.patch Normal file
View File

@@ -0,0 +1,72 @@
From 197af60c15fa919dcbddd90ce60614f085e334cc Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 12 Apr 2022 21:14:36 +0300
Subject: [PATCH 083/170] Bananapro add AXP209 regulators
Author: Heiko Jehmlich <hje@jecons.de>
Signed-off-by: Heiko Jehmlich <hje@jecons.de>
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 50 +++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 3a34fb39a..d5bc59060 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -257,3 +257,53 @@ &usbphy {
&reg_ahci_5v {
status = "okay";
};
+
+#include "axp209.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+ regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi0";
+ regulator-ramp-delay = <1600>;
+};
+
+&reg_ldo4 {
+ regulator-always-on; /* required for SATA */
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi1";
+};
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/Compile-the-pwm-overlay.patch Normal file
View File

@@ -0,0 +1,24 @@
From 5957c182cf271f182f07b56bd98db1df981bb993 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:26:16 +0000
Subject: [PATCH 158/170] Compile the pwm overlay
---
arch/arm64/boot/dts/allwinner/overlay/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 87f5addec..7cabe8f42 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -38,6 +38,7 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-i2c0.dtbo \
sun50i-h6-i2c1.dtbo \
sun50i-h6-i2c2.dtbo \
+ sun50i-h6-pwm.dtbo \
sun50i-h6-ruart.dtbo \
sun50i-h6-spi-add-cs1.dtbo \
sun50i-h6-spi-jedec-nor.dtbo \
--
2.35.3

28
patch/kernel/archive/sunxi-5.19/patches.armbian/Doc-dt-bindings-arm-sunxi-Add-OrangePi-Zero2-binding.patch Normal file
View File

@@ -0,0 +1,28 @@
From 9afafa66794c94fc94e7b38457408476f909e34c Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 7 Dec 2020 21:35:46 +0000
Subject: [PATCH 004/170] Doc:dt-bindings:arm:sunxi: Add OrangePi Zero2 binding
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 95278a6a9..149e8d012 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -963,4 +963,9 @@ properties:
- const: xunlong,orangepi-zero-plus2-h3
- const: allwinner,sun8i-h3
+ - description: Xunlong OrangePi Zero 2
+ items:
+ - const: xunlong,orangepi-zero2
+ - const: allwinner,sun50i-h616
+
additionalProperties: true
--
2.35.3

31
patch/kernel/archive/sunxi-5.19/patches.armbian/Doc-dt-bindings-arm-sunxi-Add-two-H616-board-compatible-strings.patch Normal file
View File

@@ -0,0 +1,31 @@
From 1ca06a64ef0ab6f8781c428d61bdf4ef50004cc0 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 7 Dec 2020 21:35:46 +0000
Subject: [PATCH 007/170] Doc:dt-bindings:arm:sunxi: Add two H616 board
compatible strings
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 149e8d012..0c2356778 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -863,6 +863,11 @@ properties:
- const: yones-toptech,bs1078-v2
- const: allwinner,sun6i-a31s
+ - description: X96 Mate TV box
+ items:
+ - const: hechuang,x96-mate
+ - const: allwinner,sun50i-h616
+
- description: Xunlong OrangePi
items:
- const: xunlong,orangepi
--
2.35.3

32
patch/kernel/archive/sunxi-5.19/patches.armbian/Doc-dt-bindings-net-sun8i-emac-Add-H616-compatible-string.patch Normal file
View File

@@ -0,0 +1,32 @@
From b8169b124112c40115d188af3f55e27c6864522c Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 27 Jan 2021 13:27:39 +0000
Subject: [PATCH 003/170] Doc:dt-bindings:net: sun8i-emac: Add H616 compatible
string
Add the obvious compatible name to the existing EMAC binding, and pair
it with the existing A64 fallback compatible string, as the devices are
compatible.
On the way use enums to group the compatible devices together.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
index 6a4831fd3..87f130683 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
@@ -22,6 +22,7 @@ properties:
- enum:
- allwinner,sun20i-d1-emac
- allwinner,sun50i-h6-emac
+ - allwinner,sun50i-h616-emac
- const: allwinner,sun50i-a64-emac
reg:
--
2.35.3

64
patch/kernel/archive/sunxi-5.19/patches.armbian/Doc-dt-bindings-usb-add-binding-for-DWC3-controller-on-Allwinne.patch Normal file
View File

@@ -0,0 +1,64 @@
From 732339abc86179d926cf25ed328be324e3309f78 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 25 Dec 2017 12:08:01 +0800
Subject: [PATCH 006/170] Doc:dt-bindings:usb: add binding for DWC3 controller
on Allwinner SoC
The Allwinner H6 SoC uses DWC3 controller for USB3.
Add its device tree binding document.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../bindings/usb/allwinner,dwc3.txt | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
diff --git a/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
new file mode 100644
index 000000000..3f7714636
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
@@ -0,0 +1,39 @@
+Allwinner SuperSpeed DWC3 USB SoC controller
+
+Required properties:
+- compatible: should contain "allwinner,sun50i-h6-dwc3" for H6 SoC
+- clocks: A list of phandle + clock-specifier pairs for the
+ clocks listed in clock-names
+- clock-names: Should contain the following:
+ "bus" The bus clock of the DWC3 part
+- resets: A list of phandle + reset-specifier pairs for the
+ resets listed in reset-names
+- reset-names: Should contain the following:
+ "bus" The bus reset of the DWC3 part
+
+Required child node:
+A child node must exist to represent the core DWC3 IP block. The name of
+the node is not important. The content of the node is defined in dwc3.txt.
+
+Phy documentation is provided in the following places:
+Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt
+
+Example device nodes:
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&ccu CLK_BUS_XHCI>;
+ clock-names = "bus";
+ resets = <&ccu RST_BUS_XHCI>;
+ reset-names = "bus";
+
+ dwc3: dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x5200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+ };
--
2.35.3

90
patch/kernel/archive/sunxi-5.19/patches.armbian/Doc-u-api-media-v4l-Add-scaling-matrix-control.patch Normal file
View File

@@ -0,0 +1,90 @@
From eb63786ad5efb02977293523fbd14741ffd30e86 Mon Sep 17 00:00:00 2001
From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: Thu, 15 Jul 2021 17:12:22 +0200
Subject: [PATCH 005/170] Doc:u-api:media:v4l: Add scaling matrix control
HEVC scaling lists are used for the scaling process for transform
coefficients.
V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED has to set when they are
encoded in the bitstream.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
.../media/v4l/ext-ctrls-codec.rst | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
index 6183f43f4..29a8acf7a 100644
--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
@@ -3127,6 +3127,63 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
.. cssclass:: longtable
+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix
+ :header-rows: 0
+ :stub-columns: 0
+ :widths: 1 1 2
+
+ * - __u8
+ - ``scaling_list_4x4[6][16]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+ * - __u8
+ - ``scaling_list_8x8[6][64]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+ * - __u8
+ - ``scaling_list_16x16[6][64]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+ * - __u8
+ - ``scaling_list_32x32[2][64]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+ * - __u8
+ - ``scaling_list_dc_coef_16x16[6]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+ * - __u8
+ - ``scaling_list_dc_coef_32x32[2]``
+ - Scaling list is used for the scaling process for transform
+ coefficients. The values on each scaling list are expected
+ in raster scan order.
+
+.. raw:: latex
+
+ \normalsize
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)``
+ Specifies the HEVC scaling matrix parameters used for the scaling process
+ for transform coefficients.
+ These matrix and parameters are defined according to :ref:`hevc`.
+ They are described in section 7.4.5 "Scaling list data semantics" of
+ the specification.
+
+.. c:type:: v4l2_ctrl_hevc_scaling_matrix
+
+.. raw:: latex
+
+ \scriptsize
+
+.. tabularcolumns:: |p{5.4cm}|p{6.8cm}|p{5.1cm}|
+
+.. cssclass:: longtable
+
.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix
:header-rows: 0
:stub-columns: 0
--
2.35.3

68
patch/kernel/archive/sunxi-5.19/patches.armbian/Fix-compile-error-node-not-found.patch Normal file
View File

@@ -0,0 +1,68 @@
From fb13b0bd4f9efe319dba6e6c99d88389398473c6 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 3 Feb 2022 21:22:16 +0300
Subject: [PATCH 149/170] Fix compile error node not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:47.1-4 Label or path de not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:70.1-6 Label or path hdmi not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:75.1-10 Label or path hdmi_out not found
FATAL ERROR: Syntax error parsing input tree
make[2]: *** [scripts/Makefile.lib:365: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dtb] Error 1
---
.../dts/allwinner/sun50i-h616-x96-mate.dts | 26 -------------------
1 file changed, 26 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
index 3640160a3..51f1764ed 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
@@ -23,17 +23,6 @@ chosen {
stdout-path = "serial0:115200n8";
};
- connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC input */
compatible = "regulator-fixed";
@@ -44,10 +33,6 @@ reg_vcc5v: vcc5v {
};
};
-&de {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -67,17 +52,6 @@ &emac1 {
status = "okay";
};
-&hdmi {
- hvcc-supply = <&reg_bldo1>;
- status = "okay";
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
&ir {
status = "okay";
};
--
2.35.3

53
patch/kernel/archive/sunxi-5.19/patches.armbian/Fix-duplicate-nodes-for-sun50i-h5-orangepi-pc2.patch Normal file
View File

@@ -0,0 +1,53 @@
From 06e3f658e29de6a0e4a39dd0bd13e8a9deb18767 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 29 May 2022 23:02:24 +0300
Subject: [PATCH 154/170] Fix duplicate nodes for sun50i-h5-orangepi-pc2
The problem with duplicate nodes in the device tree is that
the first one in the queue will be applied. The subsequent
one will be ignored, not replaced.
---
.../dts/allwinner/sun50i-h5-orangepi-pc2.dts | 20 -------------------
1 file changed, 20 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index a8496664f..464e8fecd 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -95,10 +95,6 @@ &codec {
status = "okay";
};
-&cpu0 {
- cpu-supply = <&reg_vdd_cpux>;
-};
-
&de {
status = "okay";
};
@@ -178,22 +174,6 @@ &ohci3 {
status = "okay";
};
-&r_i2c {
- status = "okay";
-
- reg_vdd_cpux: regulator@65 {
- compatible = "silergy,sy8106a";
- reg = <0x65>;
- regulator-name = "vdd-cpux";
- silergy,fixed-microvolt = <1100000>;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1400000>;
- regulator-ramp-delay = <200>;
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
&sound_hdmi {
status = "okay";
};
--
2.35.3

26
patch/kernel/archive/sunxi-5.19/patches.armbian/Fix-include-uapi-spi-spidev-module.patch Normal file
View File

@@ -0,0 +1,26 @@
From c3ee64d9f6641ddb92cf21ac636cd6265e75e258 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 28 Apr 2022 15:45:14 +0300
Subject: [PATCH 155/170] Fix include uapi spi spidev module
---
drivers/spi/spidev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 5b36dd91c..714140016 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -21,8 +21,7 @@
#include <linux/slab.h>
#include <linux/compat.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spidev.h>
+#include <uapi/linux/spi/spidev.h>
#include <linux/uaccess.h>
--
2.35.3

37
patch/kernel/archive/sunxi-5.19/patches.armbian/HACK-media-uapi-hevc-tiles-and-num_slices.patch Normal file
View File

@@ -0,0 +1,37 @@
From a0336ec2aa6ea38d4b2c9a2100b67fd6d09005cd Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 23 May 2020 15:07:15 +0000
Subject: [PATCH 038/170] HACK: media: uapi: hevc: tiles and num_slices
---
include/media/hevc-ctrls.h | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index a536dab3f..c8618dc68 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -83,7 +83,8 @@ struct v4l2_ctrl_hevc_sps {
__u8 chroma_format_idc;
__u8 sps_max_sub_layers_minus1;
- __u8 padding[6];
+ __u8 num_slices;
+ __u8 padding[5];
__u64 flags;
};
@@ -208,7 +209,9 @@ struct v4l2_ctrl_hevc_slice_params {
__u16 short_term_ref_pic_set_size;
__u16 long_term_ref_pic_set_size;
- __u8 padding[4];
+ __u32 num_entry_point_offsets;
+ __u32 entry_point_offset_minus1[256];
+ __u8 padding[8];
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
struct v4l2_hevc_pred_weight_table pred_weight_table;
--
2.35.3

27
patch/kernel/archive/sunxi-5.19/patches.armbian/Makefile-CONFIG_SHELL-fix-for-builddeb-packaging.patch Normal file
View File

@@ -0,0 +1,27 @@
From 3b1e794c9f9b9de0afd7729b1f53d3c771f684d7 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 11:28:14 +0300
Subject: [PATCH 122/170] Makefile: CONFIG_SHELL fix for builddeb packaging
---
Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index df9289232..04177c779 100644
--- a/Makefile
+++ b/Makefile
@@ -417,7 +417,9 @@ KCONFIG_CONFIG ?= .config
export KCONFIG_CONFIG
# SHELL used by kbuild
-CONFIG_SHELL := sh
+CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+ else if [ -x /bin/bash ]; then echo /bin/bash; \
+ else echo sh; fi ; fi)
HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
--
2.35.3

70
patch/kernel/archive/sunxi-5.19/patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch Normal file
View File

@@ -0,0 +1,70 @@
From 151e70ba0a81fdeabff6fa0a8c5a598022569170 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:23:56 +0000
Subject: [PATCH 157/170] Move sun50i-h6-pwm settings to its own overlay
---
.../allwinner/overlay/sun50i-h6-fixup.scr-cmd | 14 -----------
.../dts/allwinner/overlay/sun50i-h6-pwm.dts | 25 +++++++++++++++++++
2 files changed, 25 insertions(+), 14 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
index d8e79ba45..f757db7aa 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
@@ -54,20 +54,6 @@ if test "${param_pps_falling_edge}" = "1"; then
fdt set /pps@0 assert-falling-edge
fi
-for f in ${overlays}; do
- if test "${f}" = "pwm"; then
- setenv bootargs_new ""
- for arg in ${bootargs}; do
- if test "${arg}" = "console=ttyS0,115200"; then
- echo "Warning: Disabling ttyS0 console due to enabled PWM overlay"
- else
- setenv bootargs_new "${bootargs_new} ${arg}"
- fi
- done
- setenv bootargs "${bootargs_new}"
- fi
-done
-
if test -n "${param_w1_pin}"; then
setenv tmp_bank "${param_w1_pin}"
setenv tmp_pin "${param_w1_pin}"
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
new file mode 100644
index 000000000..a8aa74ed1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h6-pwm";
+
+ fragment@0 {
+ target = <&pio>;
+ __overlay__ {
+ pwm_pin: pwm-pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+ };
+ };
+};
--
2.35.3

287
patch/kernel/archive/sunxi-5.19/patches.armbian/Revert-net-Remove-net-ipx.h-and-uapi-linux-ipx.h-header-files.patch Normal file
View File

@@ -0,0 +1,287 @@
From 0d9d650269893a0ebe2c6159425991b05faffc30 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH 002/170] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h
header files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000..9d1342807
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000..3168137ad
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.35.3

49
patch/kernel/archive/sunxi-5.19/patches.armbian/Rollback-r_rsb-to-r_i2c.patch Normal file
View File

@@ -0,0 +1,49 @@
From fad789644794fc525a38d27927996ae089477e3f Mon Sep 17 00:00:00 2001
From: Ukhellfire <afaulkner420@gmail.com>
Date: Fri, 1 Apr 2022 09:44:19 +0100
Subject: [PATCH 169/170] Rollback r_rsb to r_i2c
---
.../dts/allwinner/sun50i-h6-orangepi-3-lts.dts | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
index 83fa87039..0b07f8ca2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -180,16 +180,6 @@ &mmc1 {
bus-width = <4>;
non-removable;
status = "okay";
-
- uwe-bsp {
- compatible = "unisoc,uwe_bsp";
- keep-power-on;
- data-irq;
- //adma-tx;
- adma-rx;
- //blksz-512;
- status = "okay";
- };
};
&mmc2 {
@@ -218,12 +208,12 @@ &pio {
vcc-pg-supply = <&reg_vcc_wifi_io>;
};
-&r_rsb {
+&r_i2c {
status = "okay";
- axp805: pmic@745 {
+ axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x745>;
+ reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
--
2.35.3

66
patch/kernel/archive/sunxi-5.19/patches.armbian/WIP-media-uapi-hevc-add-fields-needed-for-rkvdec.patch Normal file
View File

@@ -0,0 +1,66 @@
From 4ca80443bbab08aede430ab4f13e2818836f19b5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 23 May 2020 15:03:46 +0000
Subject: [PATCH 037/170] WIP: media: uapi: hevc: add fields needed for rkvdec
NOTE: these fields are used by rkvdec hevc backend
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
include/media/hevc-ctrls.h | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index 01ccda48d..a536dab3f 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code {
/* The controls are not stable at the moment and will likely be reworked. */
struct v4l2_ctrl_hevc_sps {
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */
+ __u8 video_parameter_set_id;
+ __u8 seq_parameter_set_id;
__u16 pic_width_in_luma_samples;
__u16 pic_height_in_luma_samples;
__u8 bit_depth_luma_minus8;
@@ -81,6 +83,8 @@ struct v4l2_ctrl_hevc_sps {
__u8 chroma_format_idc;
__u8 sps_max_sub_layers_minus1;
+ __u8 padding[6];
+
__u64 flags;
};
@@ -108,6 +112,7 @@ struct v4l2_ctrl_hevc_sps {
struct v4l2_ctrl_hevc_pps {
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */
+ __u8 pic_parameter_set_id;
__u8 num_extra_slice_header_bits;
__u8 num_ref_idx_l0_default_active_minus1;
__u8 num_ref_idx_l1_default_active_minus1;
@@ -123,7 +128,7 @@ struct v4l2_ctrl_hevc_pps {
__s8 pps_tc_offset_div2;
__u8 log2_parallel_merge_level_minus2;
- __u8 padding[4];
+ __u8 padding;
__u64 flags;
};
@@ -200,7 +205,10 @@ struct v4l2_ctrl_hevc_slice_params {
__u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
- __u8 padding;
+ __u16 short_term_ref_pic_set_size;
+ __u16 long_term_ref_pic_set_size;
+
+ __u8 padding[4];
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
struct v4l2_hevc_pred_weight_table pred_weight_table;
--
2.35.3

610
patch/kernel/archive/sunxi-5.19/patches.armbian/add-initial-support-for-orangepi3-lts.patch Normal file
View File

@@ -0,0 +1,610 @@
From 64f65ddde53860c0c28db5ce6341d556f2b3ff22 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sat, 16 Apr 2022 11:51:35 +0300
Subject: [PATCH 165/170] add initial support for orangepi3-lts
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h6-orangepi-3-lts.dts | 398 ++++++++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 101 ++++-
3 files changed, 487 insertions(+), 13 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index fe2c76047..30a51b913 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
new file mode 100644
index 000000000..cc5a73026
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -0,0 +1,398 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi 3 LTS";
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial9 = &r_uart;
+ ethernet0 = &emac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "green-led";
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+ default-state = "on";
+ };
+
+ power {
+ label = "red-led";
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC jack */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vcc33_wifi: vcc33-wifi {
+ /* Always on 3.3V regulator for WiFi and BT */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+ };
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc33_wifi>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_dcdca>;
+};
+
+&de {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&reg_dcdcc>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_gmac_3v3>;
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <300>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
+ reset-assert-us = <15000>;
+ reset-deassert-us = <40000>;
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_cldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc33_wifi>;
+ vqmmc-supply = <&reg_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_cldo1>;
+ vqmmc-supply = <&reg_bldo2>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <&reg_bldo2>;
+ vcc-pd-supply = <&reg_cldo1>;
+ vcc-pg-supply = <&reg_vcc_wifi_io>;
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp805: pmic@745 {
+ compatible = "x-powers,axp805", "x-powers,axp806";
+ reg = <0x745>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
+ vina-supply = <&reg_vcc5v>;
+ vinb-supply = <&reg_vcc5v>;
+ vinc-supply = <&reg_vcc5v>;
+ vind-supply = <&reg_vcc5v>;
+ vine-supply = <&reg_vcc5v>;
+ aldoin-supply = <&reg_vcc5v>;
+ bldoin-supply = <&reg_vcc5v>;
+ cldoin-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl-led-ir";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-audio-tv-ephy-mac";
+ regulator-enable-ramp-delay = <100000>;
+ };
+
+ /* ALDO3 is shorted to CLDO1 */
+ reg_aldo3: aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18-dram-bias-pll";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
+ };
+
+ reg_blod3: bldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-pm-pg";
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ reg_cldo1: cldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1160000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-enable-ramp-delay = <32000>;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-gpu";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-name = "vdd-sys";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&pwm {
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&r_ir {
+ status = "okay";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&sound_hdmi {
+ status = "okay";
+};
+
+&sound_ac200 {
+ status = "okay";
+};
+
+/delete-node/ &spi0;
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "disabled";
+};
+
+&usb2otg {
+ /*
+ * This board doesn't have a controllable VBUS even though it
+ * does have an ID pin. Using it as anything but a USB host is
+ * unsafe.
+ */
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb2phy {
+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
+ usb0_vbus-supply = <&reg_vcc5v>;
+ usb3_vbus-supply = <&reg_vcc5v>;
+ status = "okay";
+};
+
+&usb3phy {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index d6217be99..97cd0f70f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -91,6 +91,13 @@ osc24M: osc24M_clk {
clock-output-names = "osc24M";
};
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
@@ -126,6 +133,28 @@ cpu {
};
};
+ sound_ac200: sound_ac200 {
+ status = "disabled";
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&i2s3_master>;
+ simple-audio-card,bitclock-master = <&i2s3_master>;
+ simple-audio-card,name = "allwinner,ac200-codec";
+ simple-audio-card,mclk-fs = <512>;
+ i2s3_master: simple-audio-card,cpu {
+ sound-dai = <&i2s3>;
+ system-clock-frequency = <22579200>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&ac200_codec>;
+ system-clock-frequency = <22579200>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
arm,no-tick-in-suspend;
@@ -379,7 +408,6 @@ pwm: pwm@300a000 {
pio: pinctrl@300b000 {
compatible = "allwinner,sun50i-h6-pinctrl";
reg = <0x0300b000 0x400>;
- interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
@@ -529,6 +557,11 @@ uart3_rts_cts_pins: uart3-rts-cts-pins {
pins = "PD25", "PD26";
function = "uart3";
};
+
+ i2s3_pins: i2s3-pins {
+ pins = "PB12", "PB13", "PB14", "PB15", "PB16";
+ function = "i2s3";
+ };
};
iommu: iommu@30f0000 {
@@ -727,6 +760,7 @@ i2c3: i2c@5002c00 {
ac200: mfd@10 {
compatible = "x-powers,ac200";
reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
interrupt-parent = <&pio>;
interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -734,11 +768,16 @@ ac200: mfd@10 {
ac200_ephy: phy {
compatible = "x-powers,ac200-ephy";
- clocks = <&ac200_pwm_clk>;
nvmem-cells = <&ephy_calibration>;
nvmem-cell-names = "calibration";
status = "disabled";
};
+
+ ac200_codec: codec {
+ #sound-dai-cells = <0>;
+ compatible = "x-powers,ac200-codec";
+ status = "okay";
+ };
};
};
@@ -775,6 +814,21 @@ i2s1: i2s@5091000 {
status = "disabled";
};
+ i2s3: i2s@508f000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h6-i2s";
+ reg = <0x0508f000 0x1000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S3>, <&ccu CLK_I2S3>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 6>, <&dma 6>;
+ resets = <&ccu RST_BUS_I2S3>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s3_pins>;
+ status = "disabled";
+ };
+
spdif: spdif@5093000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h6-spdif";
@@ -1070,6 +1124,7 @@ rtc: rtc@7000000 {
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
+ clocks = <&ext_osc32k>;
#clock-cells = <1>;
};
@@ -1135,17 +1190,18 @@ r_uart_pins: r-uart-pins {
};
r_ir: ir@7040000 {
- compatible = "allwinner,sun50i-h6-ir",
- "allwinner,sun6i-a31-ir";
- reg = <0x07040000 0x400>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_R_APB1_IR>,
- <&r_ccu CLK_IR>;
- clock-names = "apb", "ir";
- resets = <&r_ccu RST_R_APB1_IR>;
- pinctrl-names = "default";
- pinctrl-0 = <&r_ir_rx_pin>;
- status = "disabled";
+ compatible = "allwinner,sun50i-h6-ir",
+ "allwinner,sun6i-a31-ir";
+ reg = <0x07040000 0x400>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1_IR>,
+ <&r_ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ resets = <&r_ccu RST_R_APB1_IR>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
};
r_i2c: i2c@7081400 {
@@ -1187,6 +1243,25 @@ ths: thermal-sensor@5070400 {
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
+
+ sunxi-info {
+ compatible = "allwinner,sun50i-h6-sys-info";
+ status = "okay";
+ };
+
+ addr_mgt: addr-mgt {
+ compatible = "allwinner,sunxi-addr_mgt";
+ type_addr_wifi = <0x2>;
+ type_addr_bt = <0x2>;
+ type_addr_eth = <0x2>;
+ status = "okay";
+ };
+
+ dump_reg: dump_reg@20000 {
+ compatible = "allwinner,sunxi-dump-reg";
+ reg = <0x0 0x03001000 0x0 0x0f20>;
+ status = "okay";
+ };
};
thermal-zones {
--
2.35.3

33
patch/kernel/archive/sunxi-5.19/patches.armbian/add-uwe-bsp-to-OPi3-LTS-dts-file.patch Normal file
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@@ -0,0 +1,33 @@
From af11d586e041feb78647bafca23b5e3e24aa06af Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 23:26:02 +0000
Subject: [PATCH 168/170] add uwe-bsp to OPi3-LTS dts file
---
.../boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
index cc5a73026..83fa87039 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -180,6 +180,16 @@ &mmc1 {
bus-width = <4>;
non-removable;
status = "okay";
+
+ uwe-bsp {
+ compatible = "unisoc,uwe_bsp";
+ keep-power-on;
+ data-irq;
+ //adma-tx;
+ adma-rx;
+ //blksz-512;
+ status = "okay";
+ };
};
&mmc2 {
--
2.35.3

1875
patch/kernel/archive/sunxi-5.19/patches.armbian/allwinner-h6-Support-ac200-audio-codec.patch Normal file
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File diff suppressed because it is too large Load Diff

79
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-arm64-dts-Add-leds-axp20x-charger.patch Normal file
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@@ -0,0 +1,79 @@
From 662d197e49066f23f43997849ce7197e08ed5fe5 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 16:43:53 +0300
Subject: [PATCH 065/170] arm:arm64:dts: Add leds axp20x charger
---
arch/arm/boot/dts/axp209.dtsi | 5 +++++
arch/arm/boot/dts/axp22x.dtsi | 5 +++++
arch/arm/boot/dts/axp81x.dtsi | 5 +++++
arch/arm64/boot/dts/allwinner/axp803.dtsi | 5 +++++
4 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi
index ca240cd6f..85000fdb4 100644
--- a/arch/arm/boot/dts/axp209.dtsi
+++ b/arch/arm/boot/dts/axp209.dtsi
@@ -69,6 +69,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp209-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp22x.dtsi b/arch/arm/boot/dts/axp22x.dtsi
index a020c12b2..eeea37bbe 100644
--- a/arch/arm/boot/dts/axp22x.dtsi
+++ b/arch/arm/boot/dts/axp22x.dtsi
@@ -62,6 +62,11 @@ axp_adc: adc {
#io-channel-cells = <1>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp221-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi
index 9195a8c49..350e8ec11 100644
--- a/arch/arm/boot/dts/axp81x.dtsi
+++ b/arch/arm/boot/dts/axp81x.dtsi
@@ -74,6 +74,11 @@ gpio1_ldo: gpio1-ldo-pin {
};
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp813-battery-power-supply";
status = "disabled";
diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
index d0ccd55d8..ff1b95cc9 100644
--- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -38,6 +38,11 @@ gpio1_ldo: gpio1-ldo-pin {
};
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp803-battery-power-supply",
"x-powers,axp813-battery-power-supply";
--
2.35.3

196
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-Add-sun8i-h2-plus-nanopi-duo-device.patch Normal file
View File

@@ -0,0 +1,196 @@
From ded2657ccd6ef8c0452d4c695a4e8d9ab0f88bea Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:00:36 +0300
Subject: [PATCH 072/170] arm:dts: Add sun8i-h2-plus-nanopi-duo device
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts | 164 ++++++++++++++++++
2 files changed, 165 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a5b429dcf..f23137839 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1325,6 +1325,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a83t-tbs-a711.dtb \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts b/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
new file mode 100644
index 000000000..2b31b8fdd
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
@@ -0,0 +1,164 @@
+/*
+ * adapted by karabek, 2018 , based on
+ * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
+ * Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
+ *
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3-nanopi.dtsi"
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi DUO";
+ compatible = "friendlyarm,nanopi-duo", "allwinner,sun8i-h3";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ };
+
+ reg_sy8113b: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; // 50=4ms check
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; // PL6 check
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; // PL7 WIFI_POWER_EN
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; // PG13 WL_RESTN
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_sy8113b>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vqmmc-supply = <&reg_vcc_wifi>;
+ vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc1_pins {
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ wifi_wake: wifi_wake@0 {
+ pins = "PG10";
+ function = "irq";
+ pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /*
+ * USB Type-A port VBUS is always on. However, MicroUSB VBUS can only
+ * power up the board; when it's used as OTG port, this VBUS is
+ * always off even if the board is powered via GPIO pins.
+ */
+ status = "okay";
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+};
--
2.35.3

257
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-Add-sun8i-h2-plus-sunvell-r69-device.patch Normal file
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@@ -0,0 +1,257 @@
From 588e7ff1beb572a751bfddeb00d33539da0dab46 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:23:33 +0300
Subject: [PATCH 073/170] arm:dts: Add sun8i-h2-plus-sunvell-r69 device
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun8i-h2-plus-sunvell-r69.dts | 225 ++++++++++++++++++
2 files changed, 226 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f23137839..c85d42132 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1328,6 +1328,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
+ sun8i-h2-plus-sunvell-r69.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts b/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
new file mode 100644
index 000000000..bb0c2f72b
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Based original Sunvell R69 FEX file (2019 karabek)
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Sunvell R69";
+ compatible = "sunvell,sunvell-r69", "allwinner,sun8i-h2-plus";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
+
+ pwr_led {
+ label = "sunvell-r69:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ status_led {
+ label = "sunvell-r69:blue:status";
+ gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_vdd_cpux: vdd-cpux-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 0 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>; /* <&r_ir_rx_pin> */
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc_wifi>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <0 11 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase current from 30mA to 40mA for DDR eMMC */
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pio {
+ leds_opc: led_pins {
+ pins = "PA15";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_opc: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+};
+
+&reg_usb0_vbus {
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

39
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-a10-cubiebord-a20-cubietruck-green-LED-mmc0-default-tri.patch Normal file
View File

@@ -0,0 +1,39 @@
From a67d6111be3d4fcad889f9050d5c34ee9d74060a Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:46:11 +0300
Subject: [PATCH 071/170] arm:dts: a10-cubiebord a20-cubietruck green LED mmc0
default-trigger
---
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 0645d6064..f97b53c44 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -83,7 +83,7 @@ led-0 {
led-1 {
label = "cubieboard:green:usr";
gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */
- linux,default-trigger = "heartbeat";
+ linux,default-trigger = "mmc0";
};
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 525cb7fcc..df428f29b 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -93,6 +93,7 @@ led-2 {
led-3 {
label = "cubietruck:green:usr";
gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
};
};
--
2.35.3

86
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-a20-orangepi-and-mini-fix-phy-mode-hdmi.patch Normal file
View File

@@ -0,0 +1,86 @@
From 4f69e3baa0085d0602b380fa0a94ba0522a10b58 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 13:18:28 +0300
Subject: [PATCH 069/170] arm:dts: a20-orangepi and mini fix phy-mode, hdmi
---
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 31 ++++++++++++++++++-
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 84efa01e7..fc87309ae 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -121,7 +121,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index 5d77f1d98..0c760b0a5 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -61,6 +61,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -85,6 +96,14 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -97,11 +116,21 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
--
2.35.3

80
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-h3-nanopi-neo-Add-regulator-leds-mmc2.patch Normal file
View File

@@ -0,0 +1,80 @@
From e37a90f09817d2fd3b75921b276ce12f37039d92 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:34:01 +0300
Subject: [PATCH 074/170] arm:dts: h3-nanopi-neo Add regulator, leds, mmc2
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 57 +++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index df71fab3c..032849663 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -49,6 +49,63 @@ / {
aliases {
ethernet0 = &emac;
};
+
+ /* Warning: sunxi-5.18:
+ * The leds node is present in the sun8i-h3-nanopi.dtsi file
+ * You will have to fix this situation yourself
+ */
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
};
&ehci0 {
--
2.35.3

197
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-h3-nanopi-neo-air-Add-regulator-camera-wifi-bluetooth-o.patch Normal file
View File

@@ -0,0 +1,197 @@
From 63a18523fa56c34ff3db31710856ed749a6c195b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:45:43 +0300
Subject: [PATCH 075/170] arm:dts: h3-nanopi-neo-air Add regulator camera wifi
bluetooth otg
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 153 ++++++++++++++++++
1 file changed, 153 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index cd3df12b6..363683cd3 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -70,12 +70,92 @@ led-0 {
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
};
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ cam_xclk: cam-xclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "cam-xclk";
+ };
+
+ reg_cam_avdd: cam-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-avdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dovdd: cam-dovdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dovdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dvdd: cam-dvdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dvdd";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&pio {
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
};
};
@@ -110,6 +190,74 @@ &mmc2 {
vqmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&csi {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Parallel bus endpoint */
+ csi_from_ov5640: endpoint {
+ remote-endpoint = <&ov5640_to_csi>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&cam_xclk>;
+ clock-names = "xclk";
+
+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <&reg_cam_avdd>;
+ DOVDD-supply = <&reg_cam_dovdd>;
+ DVDD-supply = <&reg_cam_dvdd>;
+
+ port {
+ ov5640_to_csi: endpoint {
+ remote-endpoint = <&csi_from_ov5640>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+ };
+};
+
+&i2c2_pins {
+ bias-pull-up;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
status = "okay";
};
@@ -137,6 +285,11 @@ bluetooth {
};
};
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
/* USB VBUS is always on */
status = "okay";
--
2.35.3

59
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-h3-orangepi-2-Add-regulator-vdd-cpu.patch Normal file
View File

@@ -0,0 +1,59 @@
From 3cafb966228f2e69af47cc88086d3143e6bb53a8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:23:18 +0300
Subject: [PATCH 076/170] arm:dts: h3-orangepi-2 Add regulator vdd cpu
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 29 +++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 858ce4682..c33fd1134 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -124,6 +124,10 @@ &de {
status = "okay";
};
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
&ehci1 {
status = "okay";
};
@@ -178,6 +182,31 @@ rtl8189: sdio_wifi@1 {
};
};
+&r_i2c {
+ status = "okay";
+
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
&reg_usb1_vbus {
gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
status = "okay";
--
2.35.3

4964
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-overlay-Add-Overlays-for-sunxi.patch Normal file
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File diff suppressed because it is too large Load Diff

209
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-overlay-sun8i-h3-cpu-clock-add-overclock.patch Normal file
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@@ -0,0 +1,209 @@
From f2a0a2819978f5d52b9b129d98c734bf4e7e7db8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:29:16 +0300
Subject: [PATCH 126/170] arm:dts:overlay: sun8i-h3-cpu-clock add overclock
---
arch/arm/boot/dts/overlay/Makefile | 3 +
.../sun8i-h3-cpu-clock-1.2GHz-1.3v.dts | 31 +++++++++
.../sun8i-h3-cpu-clock-1.368GHz-1.3v.dts | 67 +++++++++++++++++++
.../sun8i-h3-cpu-clock-1.3GHz-1.3v.dts | 61 +++++++++++++++++
4 files changed, 162 insertions(+)
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
index d2e94f6b7..23f8c2048 100644
--- a/arch/arm/boot/dts/overlay/Makefile
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -60,6 +60,9 @@ dtbo-$(CONFIG_MACH_SUN7I) += \
dtbo-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-analog-codec.dtbo \
sun8i-h3-cir.dtbo \
+ sun8i-h3-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.368GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.3GHz-1.3v.dtbo \
sun8i-h3-i2c0.dtbo \
sun8i-h3-i2c1.dtbo \
sun8i-h3-i2c2.dtbo \
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
new file mode 100644
index 000000000..b07e694c7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the existing DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
new file mode 100644
index 000000000..e3fd7e5c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
@@ -0,0 +1,67 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1368000000 {
+ opp-hz = /bits/ 64 <1368000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
new file mode 100644
index 000000000..413222831
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
--
2.35.3

133
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun5i-a13-olinuxino-Add-panel-lcd-olinuxino-4.3-needed-.patch Normal file
View File

@@ -0,0 +1,133 @@
From 24b3919e7a03f6bc97bc034ef47ce1d69db0813a Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Thu, 19 Mar 2020 10:40:44 +0200
Subject: [PATCH 131/170] arm:dts:sun5i-a13-olinuxino Add panel
lcd-olinuxino-4.3 needed to fix overlay tests
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 79 +++++++++++++----------
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index fadeae3cd..d015a24c6 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -48,6 +48,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "Olimex A13-Olinuxino";
@@ -72,40 +73,28 @@ led {
};
};
- bridge {
- compatible = "dumb-vga-dac";
+ lcd_backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&lcd_backlight>;
+ enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- vga_bridge_in: endpoint {
- remote-endpoint = <&tcon0_out_vga>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- vga_bridge_out: endpoint {
- remote-endpoint = <&vga_con_in>;
- };
- };
- };
- };
-
- vga {
- compatible = "vga-connector";
-
- port {
- vga_con_in: endpoint {
- remote-endpoint = <&vga_bridge_out>;
- };
- };
- };
};
&be0 {
@@ -130,6 +119,11 @@ axp209: pmic@34 {
interrupt-controller;
#interrupt-cells = <1>;
+ axp_gpio:gpio{
+ compatible = "x-powers,axp209-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
};
@@ -221,12 +215,18 @@ &tcon0 {
};
&tcon0_out {
- tcon0_out_vga: endpoint@0 {
+ tcon0_out_lcd: endpoint@0 {
reg = <0>;
- remote-endpoint = <&vga_bridge_in>;
+ remote-endpoint = <&panel_input>;
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -245,3 +245,12 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ #thermal-sensor-cells = <0>;
+ /* sensitive/noisy touch panel */
+ touchscreen-inverted-x;
+ allwinner,tp-sensitive-adjust = <0>;
+ allwinner,filter-type = <3>;
+};
--
2.35.3

107
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch Normal file
View File

@@ -0,0 +1,107 @@
From 52a38161595b3fe98ef7295afa7696652dfe46de Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:00:25 +0200
Subject: [PATCH 130/170] arm:dts:sun5i-a13-olinuxino-micro add panel
lcd-olinuxino-4.3
---
.../boot/dts/sun5i-a13-olinuxino-micro.dts | 62 ++++++++++++++++++-
1 file changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index bfe1075e6..32874f6a5 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -44,7 +44,7 @@
/dts-v1/;
#include "sun5i-a13.dtsi"
#include "sunxi-common-regulators.dtsi"
-
+#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -70,6 +70,40 @@ led {
default-state = "on";
};
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&backlight>;
+ enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
+
+ };
+
+
+
+&be0 {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
};
&ehci0 {
@@ -117,10 +151,28 @@ &reg_usb0_vbus {
};
&reg_usb1_vbus {
- gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -139,3 +191,9 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ touchscreen-inverted-x;
+};
+
--
2.35.3

99
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-Disable-OOB-IRQ-for-brcm-wifi-on-Cubietruck-a.patch Normal file
View File

@@ -0,0 +1,99 @@
From 281a7c187be47b4f471b5770f41c8c72e3989f02 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 22:32:07 +0300
Subject: [PATCH 068/170] arm:dts:sun7i-a20 Disable OOB IRQ for brcm-wifi on
Cubietruck and Banana-Pro
While doing some brcmfmac driver work I needed to test this also on some
devicetree based boards. So I fired up the good old Cubietruck and when
that would not work a Banana Pro.
With an unmodified 4.17 kernel both boards intermittently would come up
with non working wifi with the following errors:
brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
brcmfmac: brcmf_bus_started: failed: -110
brcmfmac: brcmf_attach: dongle is not responding: err=-110
brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
They would come up this way more often then with actual working wifi,
once this problem happens it seems to require a power-cycle to fix.
Once things work one can safely reboot without hitting the issue.
I've found that disabling OOB interrupts fixes this. This really is more
of a workaround then a proper fix, but it makes the wifi reliable again
and it does not have much of a downside.
Using an OOB IRQ instead of the sdio-IRQ mechanism is mostly important to
allow the MMC controller to go into runtime-suspend which is not really an
issue on these boards since they are (usually) not battery powered.
I've looked at recent brcmfmac and mmc-core changes which may explain this
and I've not found anything. So the most likely culprit is the A20 external
interrupt handling e.g. perhaps it is set to edge instead of level? Either
way I do not have time to further investigate this.
BugLink: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908438
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 16 +++++++++++++---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 16 +++++++++++++---
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index e22f0e8bb..e68748076 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -162,9 +162,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 52160e368..525cb7fcc 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -213,9 +213,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
--
2.35.3

78
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-bananapro-add-hdmi-connector-de.patch Normal file
View File

@@ -0,0 +1,78 @@
From 42a0af9b56da54fc3f7bfd2683eefeb091575a20 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:15:19 +0300
Subject: [PATCH 082/170] arm:dts: sun7i-a20-bananapro add hdmi-connector, de
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index e68748076..3a34fb39a 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -60,6 +60,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -91,6 +102,7 @@ reg_gmac_3v3: gmac-3v3 {
};
&ahci {
+ target-supply = <&reg_ahci_5v>;
status = "okay";
};
@@ -98,6 +110,10 @@ &codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -115,6 +131,16 @@ &gmac {
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -227,3 +253,7 @@ &usbphy {
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
+
+&reg_ahci_5v {
+ status = "okay";
+};
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-cubietruck-add-alias-uart2.patch Normal file
View File

@@ -0,0 +1,24 @@
From 9f5ea9c15419771fd6027f129758b2c0cb338379 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 11:38:08 +0300
Subject: [PATCH 078/170] arm:dts: sun7i-a20-cubietruck add alias uart2
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index df428f29b..a3d169c43 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -55,6 +55,7 @@ / {
aliases {
serial0 = &uart0;
+ serial2 = &uart2;
};
chosen {
--
2.35.3

55
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-olimex-som-204-evb-olinuxino-micro-decrease-d.patch Normal file
View File

@@ -0,0 +1,55 @@
From baefafd2fb280d0347141cb1c1f66b88a7780c9d Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 24 Jun 2020 20:53:36 +0300
Subject: [PATCH 135/170] arm:dts:sun7i-a20:
olimex-som(204)-evb,olinuxino-micro decrease dcdc2 min voltage
fixes some kernel crashes
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index f05ee32bc..e1867190c 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -247,7 +247,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index 54af6c180..ae3aa1055 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -218,7 +218,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index a1b89b2a2..7077ceea7 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -268,7 +268,7 @@ &battery_power_supply {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
--
2.35.3

27
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-audio-codec.patch Normal file
View File

@@ -0,0 +1,27 @@
From c187cd66d4a28814a4b8887cc80a11bd2ce8d6c9 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 3 Jun 2020 13:49:44 +0300
Subject: [PATCH 133/170] arm:dts:sun7i-a20-olinuxino-lime2 enable audio codec
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index ecb91fb89..e0174ca48 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -96,6 +96,10 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
&de {
status = "okay";
};
--
2.35.3

29
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-ldo3-always-on.patch Normal file
View File

@@ -0,0 +1,29 @@
From 4abcf8a54e793203941803615d0970268e7d974c Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 16 Jun 2020 15:40:59 +0300
Subject: [PATCH 134/170] arm:dts:sun7i-a20-olinuxino-lime2 enable ldo3
always-on
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index e0174ca48..ae710f785 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -237,10 +237,10 @@ &reg_ldo2 {
};
&reg_ldo3 {
+ regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vddio-csi0";
- regulator-soft-start;
regulator-ramp-delay = <1600>;
};
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun7i-a20-olinuxino-micro-emmc-Add-vqmmc-node.patch Normal file
View File

@@ -0,0 +1,24 @@
From 7a2cfc654382da730429cab103570e2722a2845e Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 14 Apr 2020 10:28:16 +0300
Subject: [PATCH 132/170] arm:dts:sun7i-a20-olinuxino-micro-emmc Add vqmmc node
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
index 2337b44a8..c79e9ad02 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
@@ -55,6 +55,7 @@ mmc2_pwrseq: pwrseq {
&mmc2 {
vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&mmc2_pwrseq>;
--
2.35.3

36
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-xradio-interrupt.patch Normal file
View File

@@ -0,0 +1,36 @@
From fe74298b1a1162d4f0bb9418da7a357b7a3b3918 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:15:17 +0300
Subject: [PATCH 153/170] arm:dts: sun8i-h2-plus-orangepi-zero fix xradio
interrupt
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 3706216ff..7b42ab8b5 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -49,6 +49,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Zero";
@@ -151,6 +152,10 @@ &mmc1 {
*/
xr819: sdio_wifi@1 {
reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
};
};
--
2.35.3

104
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-h3-add-thermal-zones.patch Normal file
View File

@@ -0,0 +1,104 @@
From 9c9c6c98a28c0d4f880120318d4a0668376af772 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:34:48 +0300
Subject: [PATCH 136/170] arm:dts:sun8i-h3 add thermal zones
---
arch/arm/boot/dts/sun8i-h3.dtsi | 68 ++++++++++++++++++++++++++-------
1 file changed, 55 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 30d72d3b6..1b02a4c3f 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -297,32 +297,74 @@ ths: thermal-sensor@1c25000 {
};
thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ cpu_thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
thermal-sensors = <&ths>;
trips {
- cpu_hot_trip: cpu-hot {
+ cpu_warm: cpu_warm {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot_pre: cpu_hot_pre {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_very_hot_trip: cpu-very-hot {
- temperature = <100000>;
- hysteresis = <0>;
+ cpu_hot: cpu_hot {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_pre: cpu_very_hot_pre {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot: cpu_very_hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <105000>;
+ hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
- cpu-hot-limit {
- trip = <&cpu_hot_trip>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
+ };
+
+ cpu_hot_pre_limit_cpu {
+ trip = <&cpu_hot_pre>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_hot_limit_cpu {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_pre_limit_cpu {
+ trip = <&cpu_very_hot_pre>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu {
+ trip = <&cpu_very_hot>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
--
2.35.3

25
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-h3-bananapi-m2-plus-add-wifi_pwrseq.patch Normal file
View File

@@ -0,0 +1,25 @@
From 6fe2069ba83180b4a83c4430eb81fe4788cd1d59 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:06:34 +0300
Subject: [PATCH 081/170] arm:dts:sun8i-h3-bananapi-m2-plus add wifi_pwrseq
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 195a75da1..f3f324e66 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -48,3 +48,8 @@ / {
model = "Banana Pi BPI-M2-Plus H3";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
};
+
+&wifi_pwrseq {
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+};
--
2.35.3

60
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-h3-nanopi-add-leds-pio-pins.patch Normal file
View File

@@ -0,0 +1,60 @@
From 67b363d99a0cd9e1382f815945be5171110c7f2c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:14:41 +0300
Subject: [PATCH 070/170] arm:dts: sun8i-h3-nanopi add leds pio pins
---
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index a9f749f49..dac8a36bd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -59,6 +59,8 @@ chosen {
leds {
compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
led-0 {
label = "nanopi:blue:status";
@@ -75,6 +77,8 @@ led-1 {
r_gpio_keys {
compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_r_npi>;
k1 {
label = "k1";
@@ -100,6 +104,25 @@ &ohci3 {
status = "okay";
};
+&pio {
+ leds_npi: led_pins {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ sw_r_npi: key_pins {
+ pins = "PL3";
+ function = "gpio_in";
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
--
2.35.3

33
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-h3-orangepi-pc-plus-add-wifi_pwrseq.patch Normal file
View File

@@ -0,0 +1,33 @@
From 5b4393bcc98b9f6ed4574c1a179bddf345ce4e54 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:01:59 +0300
Subject: [PATCH 151/170] arm:dts: sun8i-h3-orangepi-pc-plus add wifi_pwrseq
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index babf4cf1b..e1efbf1b1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -51,10 +51,16 @@ aliases {
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
ethernet1 = &rtl8189ftv;
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
+ };
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
--
2.35.3

40
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-r40-add-clk_out_a-fix-bananam2ultra.patch Normal file
View File

@@ -0,0 +1,40 @@
From 72b9cfb98eb2911ed2b1d5dd76259b140463588d Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:01:30 +0300
Subject: [PATCH 080/170] arm:dts: sun8i-r40 add clk_out_a fix bananam2ultra
---
arch/arm/boot/dts/sun8i-r40.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 7e5f4f9c9..75137f6ae 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -74,6 +74,23 @@ osc32k: osc32k {
clock-accuracy = <20000>;
clock-output-names = "ext-osc32k";
};
+
+ osc24M_32k: clk@1 {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <732>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "osc24M_32k";
+ };
+
+ clk_out_a: clk@01c201f0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun7i-a20-out-clk";
+ reg = <0x01c201f0 0x4>;
+ clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
+ clock-output-names = "clk_out_a";
+ };
};
cpus {
--
2.35.3

63
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-r40-bananapi-m2-ultra-add-codec-analog.patch Normal file
View File

@@ -0,0 +1,63 @@
From 7272269f11c6b30592a7e51924e738df47afaf32 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 21:18:21 +0300
Subject: [PATCH 077/170] arm:dts: sun8i-r40 bananapi-m2-ultra add codec analog
---
.../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 10 ++++++++++
arch/arm/boot/dts/sun8i-r40.dtsi | 18 ++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 87cf03574..73370f20d 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -113,6 +113,16 @@ &ahci {
status = "okay";
};
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Headphone", "HPCOM",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "okay";
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 60dd97825..7e5f4f9c9 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -810,6 +810,24 @@ ths: thermal-sensor@1c24c00 {
#thermal-sensor-cells = <1>;
};
+ codec: codec@1c22c00 {
+ #sound-dai-cells = <1>;
+ compatible = "allwinner,sun8i-h3-codec";
+ reg = <0x01c22c00 0x300>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_CODEC>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 19>, <&dma 19>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ codec_analog: codec-analog@1c22f00 {
+ compatible = "allwinner,sun8i-a23-codec-analog";
+ reg = <0x01c22f00 0x4>;
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.35.3

63
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun8i-v3s-s3-pinecube-enable-sound-codec.patch Normal file
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@@ -0,0 +1,63 @@
From c28f57c2dae977d72306bf51519efcddb10efa48 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 12:58:57 +0300
Subject: [PATCH 079/170] arm:dts: sun8i-v3s/s3-pinecube enable sound codec
---
arch/arm/boot/dts/sun8i-s3-pinecube.dts | 14 ++++++++++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/sun8i-s3-pinecube.dts
index 20966e954..773ad0503 100644
--- a/arch/arm/boot/dts/sun8i-s3-pinecube.dts
+++ b/arch/arm/boot/dts/sun8i-s3-pinecube.dts
@@ -58,6 +58,20 @@ wifi_pwrseq: wifi_pwrseq {
};
};
+
+&i2s0 {
+ status = "okay";
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Speaker", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,pa-gpios = <&pio 6 6 GPIO_ACTIVE_HIGH>; /* PG6 */
+ status = "okay";
+};
+
&csi1 {
pinctrl-names = "default";
pinctrl-0 = <&csi1_8bit_pins>;
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 084323d5c..f1a8e16f5 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -469,6 +469,20 @@ codec_analog: codec-analog@1c23000 {
reg = <0x01c23000 0x4>;
};
+
+ i2s0: i2s@1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ resets = <&ccu RST_BUS_I2S0>; /* TODO: Areset/sun8i-v3s-ccu says this isn't available on V3s */
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.35.3

41
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun9i-a80-add-thermal-sensor.patch Normal file
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@@ -0,0 +1,41 @@
From 3161a1835aac25203fefda2b50faaf0311aec9bc Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:30:16 +0100
Subject: [PATCH 066/170] arm:dts: sun9i-a80 add thermal sensor
As we have gained the support for the thermal sensor in A80,
we can now add its device nodes to the device tree.
The clocks and the resets are shared between the GPADC and the THS
sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index ce4fa6706..ebffbc506 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -941,6 +941,17 @@ ccu: clock@6000000 {
#reset-cells = <1>;
};
+ ths: thermal-sensor@6004C00 {
+ compatible = "allwinner,sun9i-a80-ths";
+ reg = <0x06004C00 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_GPADC>, <&ccu CLK_GPADC>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
timer@6000c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x06000c00 0xa0>;
--
2.35.3

54
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sun9i-a80-add-thermal-zone.patch Normal file
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@@ -0,0 +1,54 @@
From 4265277690c92ad2985e64aa1e0cefa9868e4a89 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:39:09 +0100
Subject: [PATCH 067/170] arm:dts: sun9i-a80 add thermal zone
This patch adds the thermal zones to the A80.
Sensor 0 is located besides the big CPU, sensor 1 is located besides the
DRAM, sensor 2 is located besides the GPU and sensor 3 is located besides
the small CPU.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index ebffbc506..c34b463fe 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -1262,4 +1262,30 @@ r_rsb: rsb@8003400 {
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ dram_thermal: dram-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+
+ cpu2_thermal: cpu2-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 3>;
+ };
+ };
};
--
2.35.3

33
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch Normal file
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@@ -0,0 +1,33 @@
From 1b0d422e787badcb934d18496d203c20a5abd30a Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 1 Feb 2022 19:43:08 +0300
Subject: [PATCH 129/170] arm:dts:sunxi-h3-h5.dtsi add i2s0 i2s1 pins
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 64d59d6da..f2dc6a9ff 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -458,6 +458,16 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2s0_pins: i2s0-pins {
+ pins = "PA18", "PA19", "PA20", "PA21";
+ function = "i2s0";
+ };
+
+ i2s1_pins: i2s1-pins {
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s1";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From d04002431f008317faece010d1f568b54c404c77 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 16:12:37 +0300
Subject: [PATCH 084/170] arm:dts: sunxi-h3-h5.dtsi force mmc0 bus-width
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 0f5f3987e..64d59d6da 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -220,6 +220,7 @@ mmc0: mmc@1c0f000 {
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ bus-width = <0x4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
2.35.3

429
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-k1-plus-device.patch Normal file
View File

@@ -0,0 +1,429 @@
From b168c99a65ca9cca3261d20bd24ebd741af214f9 Mon Sep 17 00:00:00 2001
From: wuweidong <625769020@qq.com>
Date: Mon, 27 Nov 2017 10:23:51 +0800
Subject: [PATCH 102/170] arm64:dts: Add sun50i-h5-nanopi-k1-plus device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-k1-plus.dts | 396 ++++++++++++++++++
2 files changed, 397 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6a96494a2..c66a60ca1 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
new file mode 100644
index 000000000..b7045a9ef
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
@@ -0,0 +1,396 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyElec NanoPi K1 Plus";
+ compatible = "friendlyelec,nanopi-k1-plus", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ sw4 {
+ label = "sw4";
+ linux,code = <BTN_0>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ pcm5102a: pcm5102a-codec {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ status = "disabled";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ spi0_cs_pins: spi0_cs_pins {
+ pins = "PC3", "PA6";
+ function = "gpio_out";
+ };
+};
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+
+&r_i2c {
+ status = "okay";
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
+ status = "okay";
+};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
+
+&i2s0 {
+ sound-dai = <&pcm5102a>;
+ status = "disabled";
+};
\ No newline at end of file
--
2.35.3

272
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-m1-plus2-device.patch Normal file
View File

@@ -0,0 +1,272 @@
From 52994d1c31cc186fc390f9de3ce4c2aedf2ff0f7 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:54:36 +0300
Subject: [PATCH 105/170] arm64:dts: Add sun50i-h5-nanopi-m1-plus2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-m1-plus2.dts | 240 ++++++++++++++++++
2 files changed, 241 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index ea0cdc7cb..b516d76a9 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-m1-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
new file mode 100644
index 000000000..d051382cc
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
@@ -0,0 +1,240 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ * Copyright (C) 2017 Armbian
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM Nanopi M1 Plus 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:blue:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <50>;
+ };
+
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: brcmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&mixer0 {
+ status = "okay";
+};
+
+&r_pio {
+ wifi_wake: wifi_wake@0 {
+ pins = "PL7";
+ function = "irq";
+ bias-pull-up;
+ };
+};
+
+&tcon0 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.35.3

242
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo-core2-device.patch Normal file
View File

@@ -0,0 +1,242 @@
From 4e314db223f79170edda2b290f9bf28d717c3b05 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:43:42 +0300
Subject: [PATCH 103/170] arm64:dts: Add sun50i-h5-nanopi-neo-core2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo-core2.dts | 210 ++++++++++++++++++
2 files changed, 211 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index c66a60ca1..b3bec26c2 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
new file mode 100644
index 000000000..57283cc16
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Core2";
+ compatible = "friendlyarm,nanopi-neo-core2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ silergy,fixed-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.35.3

212
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo2-v1.1-device.patch Normal file
View File

@@ -0,0 +1,212 @@
From 89c63afc986a77b903ef3b5003942d794fcde809 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:49:55 +0300
Subject: [PATCH 104/170] arm64:dts: Add sun50i-h5-nanopi-neo2-v1.1 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo2-v1.1.dts | 180 ++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index b3bec26c2..ea0cdc7cb 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2-v1.1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
new file mode 100644
index 000000000..06ffbbd29
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.35.3

292
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h616-orangepi-zero2-device.patch Normal file
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@@ -0,0 +1,292 @@
From 05bbb6ac09fdee59252e7947ef1f6b0da171d541 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Fri, 27 Nov 2020 15:28:40 +0000
Subject: [PATCH 090/170] arm64:dts: Add sun50i-h616-orangepi-zero2 device
The OrangePi Zero 2 is a development board with the new H616 SoC. It
comes with the following features:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 512MiB/1GiB DDR3 DRAM
- AXP305 PMIC
- Raspberry-Pi-1 compatible GPIO header
- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
- 1 USB 2.0 host port
- 1 USB 2.0 type C port (power supply + OTG)
- MicroSD slot
- on-board 2MiB bootable SPI NOR flash
- 1Gbps Ethernet port (via RTL8211F PHY)
- micro-HDMI port
- unsupported Allwinner WiFi/BT chip
For more details see: https://linux-sunxi.org/Orange_Pi_Zero_2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h616-orangepi-zero2.dts | 245 ++++++++++++++++++
2 files changed, 246 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8fa5c060a..df2214e6d 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -38,3 +38,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
new file mode 100644
index 000000000..a26201288
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -0,0 +1,245 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "OrangePi Zero2";
+ compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
+
+ aliases {
+ ethernet0 = &emac0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ default-state = "on";
+ };
+
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&reg_vcc5v>;
+ enable-active-high;
+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+ status = "okay";
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+/* USB 2 & 3 are on headers only. */
+
+&emac0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_dcdce>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_dcdce>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp305: pmic@745 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x745>;
+
+ x-powers,self-working-mode;
+ vina-supply = <&reg_vcc5v>;
+ vinb-supply = <&reg_vcc5v>;
+ vinc-supply = <&reg_vcc5v>;
+ vind-supply = <&reg_vcc5v>;
+ vine-supply = <&reg_vcc5v>;
+ aldoin-supply = <&reg_vcc5v>;
+ bldoin-supply = <&reg_vcc5v>;
+ cldoin-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-sys";
+ };
+
+ reg_aldo2: aldo2 { /* 3.3V on headers */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext";
+ };
+
+ reg_aldo3: aldo3 { /* 3.3V on headers */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext2";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ bldo2 {
+ /* unused */
+ };
+
+ bldo3 {
+ /* unused */
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ cldo1 {
+ /* reserved */
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-eth-mmc";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ /*
+ * PHY0 pins are connected to a USB-C socket, but a role switch
+ * is not implemented: both CC pins are pulled to GND.
+ * The VBUS pins power the device, so a fixed peripheral mode
+ * is the best choice.
+ * The board can be powered via GPIOs, in this case port0 *can*
+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
+ * then provided by the GPIOs. Any user of this setup would
+ * need to adjust the DT accordingly: dr_mode set to "host",
+ * enabling OHCI0 and EHCI0.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+ status = "okay";
+};
--
2.35.3

251
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-Add-sun50i-h616-x96-mate-TV-box-device-support.patch Normal file
View File

@@ -0,0 +1,251 @@
From 797340a0413a91f355b93483ad0f2c8fe774b5a2 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 28 Apr 2021 00:06:26 +0100
Subject: [PATCH 091/170] arm64:dts: Add sun50i-h616-x96-mate TV box device
support
The X96 Mate is an Allwinner H616 based TV box, featuring:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 2GiB/4GiB RAM (fully usable!)
- 16/32/64GiB eMMC
- 100Mbps Ethernet (via embedded AC200 EPHY, not yet supported)
- Unsupported Allwinner WiFi chip
- 2 x USB 2.0 host ports
- HDMI port
- IR receiver
- 5V/2A DC power supply via barrel plug
For more information see: https://linux-sunxi.org/X96_Mate
Add a basic devicetree for it, with SD card, eMMC and USB working, as
well as serial and the essential peripherals, like the AXP PMIC.
This DT is somewhat minimal, and should work on many other similar TV
boxes with the Allwinner H616 chip.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h616-x96-mate.dts | 201 ++++++++++++++++++
2 files changed, 202 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index df2214e6d..6a96494a2 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -39,3 +39,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
new file mode 100644
index 000000000..b960bb310
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2021 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "X96 Mate";
+ compatible = "hechuang,x96-mate", "allwinner,sun50i-h616";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC input */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_dcdce>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_dcdce>;
+ vqmmc-supply = <&reg_bldo1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp305: pmic@745 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x745>;
+
+ x-powers,self-working-mode;
+ vina-supply = <&reg_vcc5v>;
+ vinb-supply = <&reg_vcc5v>;
+ vinc-supply = <&reg_vcc5v>;
+ vind-supply = <&reg_vcc5v>;
+ vine-supply = <&reg_vcc5v>;
+ aldoin-supply = <&reg_vcc5v>;
+ bldoin-supply = <&reg_vcc5v>;
+ cldoin-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-sys";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext";
+ status = "disabled";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_aldo3: aldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext2";
+ status = "disabled";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_bldo2: bldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8-2";
+ status = "disabled";
+ };
+
+ bldo3 {
+ /* unused */
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ cldo1 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc2v5";
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-eth-mmc";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ dr_mode = "host"; /* USB A type receptable */
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

100
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-FIXME-a64-olinuxino-add-regulator-audio-mmc.patch Normal file
View File

@@ -0,0 +1,100 @@
From 5e6a1d7d484654eae1f42f6861476569f41ec549 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:24:40 +0300
Subject: [PATCH 101/170] arm64:dts: FIXME: a64-olinuxino add regulator audio
mmc
Duplicate nodes appeared as a result of patching and this needs
to be fixed and tested on the board
---
.../dts/allwinner/sun50i-a64-olinuxino.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 21d0bdc28..636b64a1d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -52,6 +52,13 @@ reg_usb1_vbus: usb1-vbus {
status = "okay";
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
@@ -99,6 +106,10 @@ &ehci1 {
status = "okay";
};
+&mixer0 {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@@ -159,6 +170,16 @@ rtl8723bs: wifi@1 {
};
};
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -184,6 +205,7 @@ &r_pio {
*/
};
+/* FIXME: Duplicate node */
&pio {
vcc-pa-supply = <&reg_dcdc1>;
vcc-pb-supply = <&reg_dcdc1>;
@@ -365,6 +387,30 @@ &sound_hdmi {
status = "okay";
};
+/* FIXME: Duplicate node
+ * &sound {
+ * status = "okay";
+ * simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+ * "Microphone", "Internal Microphone Right",
+ * "Headphone", "Headphone Jack";
+ * simple-audio-card,aux-devs = <&codec_analog>;
+ * simple-audio-card,routing =
+ * "Left DAC", "AIF1 Slot 0 Left",
+ * "Right DAC", "AIF1 Slot 0 Right",
+ * "INL", "LINEOUT",
+ * "INR", "LINEOUT",
+ * "Headphone Jack", "HP",
+ * "AIF1 Slot 0 Left ADC", "Left ADC",
+ * "AIF1 Slot 0 Right ADC", "Right ADC",
+ * "Left ADC", "ADC",
+ * "Right ADC", "ADC",
+ * "Internal Microphone Left", "MBIAS",
+ * "MIC1", "Internal Microphone Left",
+ * "Internal Microphone Right", "HBIAS",
+ * "MIC2", "Internal Microphone Right";
+ * };
+ */
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
2.35.3

783
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-Add-sun50i-h616.dtsi-file.patch Normal file
View File

@@ -0,0 +1,783 @@
From a5eb88af76f4077531cba97cc85588f8f0d219f1 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Fri, 27 Nov 2020 15:28:12 +0000
Subject: [PATCH 089/170] arm64: dts: allwinner: Add sun50i-h616.dtsi file
This (relatively) new SoC is similar to the H6, but drops the (broken)
PCIe support and the USB 3.0 controller. It also gets the management
controller removed, which in turn removes *some*, but not all of the
devices formerly dedicated to the ARISC (CPUS).
And while there is still the extra sunxi interrupt controller, the
package lacks the corresponding NMI pin, so no interrupts for the PMIC.
USB is a bit tricky: host controller 0, 1 and 3 depend on some help from
controller and PHY 2, so we need to include one reset line and one
clock gate from HCI 2 into every other HCI node, plus need some nasty
quirk.
The reserved memory node is actually handled by Trusted Firmware now,
but U-Boot fails to propagate this to a separately loaded DTB, so we
keep it in here for now, until U-Boot learns to do this properly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 747 ++++++++++++++++++
1 file changed, 747 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
new file mode 100644
index 000000000..30195e477
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -0,0 +1,747 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Arm Ltd.
+// based on the H6 dtsi, which is:
+// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun50i-h616-ccu.h>
+#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/reset/sun50i-h616-ccu.h>
+#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+
+/ {
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <1>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <2>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <3>;
+ enable-method = "psci";
+ clocks = <&ccu CLK_CPUX>;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 512KiB reserved for ARM Trusted Firmware (BL31) */
+ secmon_reserved: secmon@40000000 {
+ reg = <0x0 0x40000000 0x0 0x80000>;
+ no-map;
+ };
+ };
+
+ osc24M: osc24M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ arm,no-tick-in-suspend;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x0 0x40000000>;
+
+ syscon: syscon@3000000 {
+ compatible = "allwinner,sun50i-h616-system-control";
+ reg = <0x03000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: sram@28000 {
+ compatible = "mmio-sram";
+ reg = <0x00028000 0x30000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00028000 0x30000>;
+ };
+ };
+
+ ccu: clock@3001000 {
+ compatible = "allwinner,sun50i-h616-ccu";
+ reg = <0x03001000 0x1000>;
+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
+ clock-names = "hosc", "losc", "iosc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ watchdog: watchdog@30090a0 {
+ compatible = "allwinner,sun50i-h616-wdt",
+ "allwinner,sun6i-a31-wdt";
+ reg = <0x030090a0 0x20>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
+ status = "okay";
+ };
+
+ pio: pinctrl@300b000 {
+ compatible = "allwinner,sun50i-h616-pinctrl";
+ reg = <0x0300b000 0x400>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ ext_rgmii_pins: rgmii-pins {
+ pins = "PI0", "PI1", "PI2", "PI3", "PI4",
+ "PI5", "PI7", "PI8", "PI9", "PI10",
+ "PI11", "PI12", "PI13", "PI14", "PI15",
+ "PI16";
+ function = "emac0";
+ drive-strength = <40>;
+ };
+
+ i2c0_pins: i2c0-pins {
+ pins = "PI6", "PI7";
+ function = "i2c0";
+ };
+
+ i2c3_ph_pins: i2c3-ph-pins {
+ pins = "PH4", "PH5";
+ function = "i2c3";
+ };
+
+ ir_rx_pin: ir-rx-pin {
+ pins = "PH10";
+ function = "ir_rx";
+ };
+
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc1_pins: mmc1-pins {
+ pins = "PG0", "PG1", "PG2", "PG3",
+ "PG4", "PG5";
+ function = "mmc1";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc2_pins: mmc2-pins {
+ pins = "PC0", "PC1", "PC5", "PC6",
+ "PC8", "PC9", "PC10", "PC11",
+ "PC13", "PC14", "PC15", "PC16";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ spi0_pins: spi0-pins {
+ pins = "PC0", "PC2", "PC3", "PC4";
+ function = "spi0";
+ };
+
+ spi1_pins: spi1-pins {
+ pins = "PH6", "PH7", "PH8";
+ function = "spi1";
+ };
+
+ spi1_cs_pin: spi1-cs-pin {
+ pins = "PH5";
+ function = "spi1";
+ };
+
+ uart0_ph_pins: uart0-ph-pins {
+ pins = "PH0", "PH1";
+ function = "uart0";
+ };
+
+ uart1_pins: uart1-pins {
+ pins = "PG6", "PG7";
+ function = "uart1";
+ };
+
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
+ pins = "PG8", "PG9";
+ function = "uart1";
+ };
+ };
+
+ gic: interrupt-controller@3021000 {
+ compatible = "arm,gic-400";
+ reg = <0x03021000 0x1000>,
+ <0x03022000 0x2000>,
+ <0x03024000 0x2000>,
+ <0x03026000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ mmc0: mmc@4020000 {
+ compatible = "allwinner,sun50i-h616-mmc",
+ "allwinner,sun50i-a100-mmc";
+ reg = <0x04020000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ status = "disabled";
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-3_3v;
+ mmc-ddr-1_8v;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc@4021000 {
+ compatible = "allwinner,sun50i-h616-mmc",
+ "allwinner,sun50i-a100-mmc";
+ reg = <0x04021000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "disabled";
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-3_3v;
+ mmc-ddr-1_8v;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc@4022000 {
+ compatible = "allwinner,sun50i-h616-emmc",
+ "allwinner,sun50i-a100-emmc";
+ reg = <0x04022000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ status = "disabled";
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-3_3v;
+ mmc-ddr-1_8v;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ uart0: serial@5000000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05000000 0x400>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
+ status = "disabled";
+ };
+
+ uart1: serial@5000400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05000400 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART1>;
+ resets = <&ccu RST_BUS_UART1>;
+ status = "disabled";
+ };
+
+ uart2: serial@5000800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05000800 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART2>;
+ resets = <&ccu RST_BUS_UART2>;
+ status = "disabled";
+ };
+
+ uart3: serial@5000c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05000c00 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART3>;
+ resets = <&ccu RST_BUS_UART3>;
+ status = "disabled";
+ };
+
+ uart4: serial@5001000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05001000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART4>;
+ resets = <&ccu RST_BUS_UART4>;
+ status = "disabled";
+ };
+
+ uart5: serial@5001400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x05001400 0x400>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART5>;
+ resets = <&ccu RST_BUS_UART5>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@5002000 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002000 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c@5002400 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002400 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@5002800 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002800 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c3: i2c@5002c00 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002c00 0x400>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4: i2c@5003000 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05003000 0x400>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C4>;
+ resets = <&ccu RST_BUS_I2C4>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi0: spi@5010000 {
+ compatible = "allwinner,sun50i-h616-spi",
+ "allwinner,sun8i-h3-spi";
+ reg = <0x05010000 0x1000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_SPI0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@5011000 {
+ compatible = "allwinner,sun50i-h616-spi",
+ "allwinner,sun8i-h3-spi";
+ reg = <0x05011000 0x1000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_SPI1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ emac0: ethernet@5020000 {
+ compatible = "allwinner,sun50i-h616-emac",
+ "allwinner,sun50i-a64-emac";
+ syscon = <&syscon>;
+ reg = <0x05020000 0x10000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC0>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC0>;
+ clock-names = "stmmaceth";
+ status = "disabled";
+
+ mdio0: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ usbotg: usb@5100000 {
+ compatible = "allwinner,sun50i-h616-musb",
+ "allwinner,sun8i-h3-musb";
+ reg = <0x05100000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ status = "disabled";
+ };
+
+ usbphy: phy@5100400 {
+ compatible = "allwinner,sun50i-h616-usb-phy";
+ reg = <0x05100400 0x24>,
+ <0x05101800 0x14>,
+ <0x05200800 0x14>,
+ <0x05310800 0x14>,
+ <0x05311800 0x14>;
+ reg-names = "phy_ctrl",
+ "pmu0",
+ "pmu1",
+ "pmu2",
+ "pmu3";
+ clocks = <&ccu CLK_USB_PHY0>,
+ <&ccu CLK_USB_PHY1>,
+ <&ccu CLK_USB_PHY2>,
+ <&ccu CLK_USB_PHY3>,
+ <&ccu CLK_BUS_EHCI2>;
+ clock-names = "usb0_phy",
+ "usb1_phy",
+ "usb2_phy",
+ "usb3_phy",
+ "pmu2_clk";
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_PHY2>,
+ <&ccu RST_USB_PHY3>;
+ reset-names = "usb0_reset",
+ "usb1_reset",
+ "usb2_reset",
+ "usb3_reset";
+ status = "disabled";
+ #phy-cells = <1>;
+ };
+
+ ehci0: usb@5101000 {
+ compatible = "allwinner,sun50i-h616-ehci",
+ "generic-ehci";
+ reg = <0x05101000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_BUS_EHCI0>,
+ <&ccu CLK_USB_OHCI0>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI0>,
+ <&ccu RST_BUS_EHCI0>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci0: usb@5101400 {
+ compatible = "allwinner,sun50i-h616-ohci",
+ "generic-ohci";
+ reg = <0x05101400 0x100>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_USB_OHCI0>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI0>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ehci1: usb@5200000 {
+ compatible = "allwinner,sun50i-h616-ehci",
+ "generic-ehci";
+ reg = <0x05200000 0x100>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI1>,
+ <&ccu CLK_BUS_EHCI1>,
+ <&ccu CLK_USB_OHCI1>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI1>,
+ <&ccu RST_BUS_EHCI1>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci1: usb@5200400 {
+ compatible = "allwinner,sun50i-h616-ohci",
+ "generic-ohci";
+ reg = <0x05200400 0x100>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI1>,
+ <&ccu CLK_USB_OHCI1>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI1>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ehci2: usb@5310000 {
+ compatible = "allwinner,sun50i-h616-ehci",
+ "generic-ehci";
+ reg = <0x05310000 0x100>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI2>,
+ <&ccu CLK_BUS_EHCI2>,
+ <&ccu CLK_USB_OHCI2>;
+ resets = <&ccu RST_BUS_OHCI2>,
+ <&ccu RST_BUS_EHCI2>;
+ phys = <&usbphy 2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci2: usb@5310400 {
+ compatible = "allwinner,sun50i-h616-ohci",
+ "generic-ohci";
+ reg = <0x05310400 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI2>,
+ <&ccu CLK_USB_OHCI2>;
+ resets = <&ccu RST_BUS_OHCI2>;
+ phys = <&usbphy 2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ehci3: usb@5311000 {
+ compatible = "allwinner,sun50i-h616-ehci",
+ "generic-ehci";
+ reg = <0x05311000 0x100>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI3>,
+ <&ccu CLK_BUS_EHCI3>,
+ <&ccu CLK_USB_OHCI3>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI3>,
+ <&ccu RST_BUS_EHCI3>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 3>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci3: usb@5311400 {
+ compatible = "allwinner,sun50i-h616-ohci",
+ "generic-ohci";
+ reg = <0x05311400 0x100>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI3>,
+ <&ccu CLK_USB_OHCI3>,
+ <&ccu CLK_USB_PHY2>;
+ resets = <&ccu RST_BUS_OHCI3>,
+ <&ccu RST_USB_PHY2>;
+ phys = <&usbphy 3>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ rtc: rtc@7000000 {
+ compatible = "allwinner,sun50i-h616-rtc";
+ reg = <0x07000000 0x400>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clock-output-names = "osc32k", "osc32k-out", "iosc";
+ #clock-cells = <1>;
+ };
+
+ r_ccu: clock@7010000 {
+ compatible = "allwinner,sun50i-h616-r-ccu";
+ reg = <0x07010000 0x210>;
+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+ <&ccu CLK_PLL_PERIPH0>;
+ clock-names = "hosc", "losc", "iosc", "pll-periph";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ r_pio: pinctrl@7022000 {
+ compatible = "allwinner,sun50i-h616-r-pinctrl";
+ reg = <0x07022000 0x400>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ r_i2c_pins: r-i2c-pins {
+ pins = "PL0", "PL1";
+ function = "s_i2c";
+ };
+
+ r_rsb_pins: r-rsb-pins {
+ pins = "PL0", "PL1";
+ function = "s_rsb";
+ };
+ };
+
+ ir: ir@7040000 {
+ compatible = "allwinner,sun50i-h616-ir",
+ "allwinner,sun6i-a31-ir";
+ reg = <0x07040000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1_IR>,
+ <&r_ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ resets = <&r_ccu RST_R_APB1_IR>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_rx_pin>;
+ status = "disabled";
+ };
+
+ r_i2c: i2c@7081400 {
+ compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x07081400 0x400>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB2_I2C>;
+ resets = <&r_ccu RST_R_APB2_I2C>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ r_rsb: rsb@7083000 {
+ compatible = "allwinner,sun50i-h616-rsb",
+ "allwinner,sun8i-a23-rsb";
+ reg = <0x07083000 0x400>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB2_RSB>;
+ clock-frequency = <3000000>;
+ resets = <&r_ccu RST_R_APB2_RSB>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_rsb_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
--
2.35.3

41
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch Normal file
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@@ -0,0 +1,41 @@
From 6ad1f8ff8bf5ce59eb59004d8bf45d821276eecc Mon Sep 17 00:00:00 2001
From: Kali Prasad <kprasadvnsi@protonmail.com>
Date: Sun, 19 Sep 2021 13:30:08 +0530
Subject: [PATCH 137/170] arm64: dts: allwinner: h616: Add device node for SID
The device tree binding for H616's SID controller.
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 6794a8035..a4a5f25d8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -166,6 +166,21 @@ ccu: clock@3001000 {
#reset-cells = <1>;
};
+ sid: efuse@3006000 {
+ compatible = "allwinner,sun50i-h616-sid";
+ reg = <0x03006000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_speed_grade: cpu-speed-grade@00 {
+ reg = <0x00 0x02>;
+ };
+
+ ths_calibration: thermal-sensor-calibration@14 {
+ reg = <0x14 0x8>;
+ };
+ };
+
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h616-wdt",
"allwinner,sun6i-a31-wdt";
--
2.35.3

135
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch Normal file
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@@ -0,0 +1,135 @@
From 5e3a70700309902e5b7d4523cd78c9b528e29138 Mon Sep 17 00:00:00 2001
From: Kali Prasad <kprasadvnsi@protonmail.com>
Date: Sun, 19 Sep 2021 13:38:20 +0530
Subject: [PATCH 138/170] arm64: dts: allwinner: h616: Add thermal sensor and
thermal zones
There are four sensors, CPU, GPU, VE, and DDR.
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 74 +++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index a4a5f25d8..e4f5a085f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -24,6 +25,8 @@ cpu0: cpu@0 {
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -32,6 +35,8 @@ cpu1: cpu@1 {
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -40,6 +45,8 @@ cpu2: cpu@2 {
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -48,6 +55,8 @@ cpu3: cpu@3 {
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
};
@@ -822,5 +831,70 @@ r_rsb: rsb@7083000 {
#address-cells = <1>;
#size-cells = <0>;
};
+
+ ths: thermal-sensor@5070400 {
+ compatible = "allwinner,sun50i-h616-ths";
+ reg = <0x05070400 0x400>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>;
+ clock-names = "bus";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration>;
+ nvmem-cell-names = "calibration";
+ #thermal-sensor-cells = <1>;
+ };
+ };
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <500>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 2>;
+ sustainable-power = <1000>;
+ k_po = <20>;
+ k_pu = <40>;
+ k_i = <0>;
+
+ trips {
+ cpu_threshold: trip-point@0 {
+ temperature = <60000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu_target: trip-point@1 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <500>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+ sustainable-power = <1100>;
+ };
+
+ ve-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ ddr-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 3>;
+ };
};
};
--
2.35.3

2471
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-overlay-Add-Overlays-for-sunxi64.patch Normal file
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File diff suppressed because it is too large Load Diff

26
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-sun50i-h6-Fix-H6-emmc.patch Normal file
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@@ -0,0 +1,26 @@
From 1e4f3be88f0c0fbe75a660693ab53fc2e94ade53 Mon Sep 17 00:00:00 2001
From: Ukhellfire <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 07:10:57 +0000
Subject: [PATCH 167/170] arm64: dts/allwinner/sun50i-h6: Fix H6 emmc
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 97cd0f70f..770bdb8d2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -608,8 +608,7 @@ mmc1: mmc@4021000 {
};
mmc2: mmc@4022000 {
- compatible = "allwinner,sun50i-h6-emmc",
- "allwinner,sun50i-a64-emmc";
+ compatible = "allwinner,sun50i-h6-emmc";
reg = <0x04022000 0x1000>;
clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
--
2.35.3

38
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch Normal file
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@@ -0,0 +1,38 @@
From f15b3c3ddfff1eeea512f5e0c7ab46ff00d66c5a Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Fri, 15 Oct 2021 21:07:46 +0200
Subject: [PATCH 092/170] arm64:dts: allwinner: sun50i-h616 Add GPU node
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 30195e477..e5e099068 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -103,6 +103,20 @@ soc {
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
+ gpu: gpu@1800000 {
+ compatible = "allwinner,sun50i-h616-mali",
+ "arm,mali-bifrost";
+ reg = <0x1800000 0x40000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>;
+ clock-names = "core", "bus";
+ resets = <&ccu RST_BUS_GPU>;
+ status = "disabled";
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
reg = <0x03000000 0x1000>;
--
2.35.3

55
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch Normal file
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@@ -0,0 +1,55 @@
From b585cb2bc1676abdb338c78213689f007de42e18 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Fri, 15 Oct 2021 21:14:55 +0200
Subject: [PATCH 094/170] arm64:dts:allwinner: sun50i-h616 Add VPU node
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index e5e099068..805b1e6b7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -117,6 +117,17 @@ gpu: gpu@1800000 {
status = "disabled";
};
+ video-codec@1c0e000 {
+ compatible = "allwinner,sun50i-h616-video-engine";
+ reg = <0x01c0e000 0x2000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_MBUS_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
reg = <0x03000000 0x1000>;
@@ -131,6 +142,19 @@ sram_c: sram@28000 {
#size-cells = <1>;
ranges = <0 0x00028000 0x30000>;
};
+
+ sram_c1: sram@1a00000 {
+ compatible = "mmio-sram";
+ reg = <0x01a00000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01a00000 0x200000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h616-sram-c1";
+ reg = <0x000000 0x200000>;
+ };
+ };
};
ccu: clock@3001000 {
--
2.35.3

29
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-nanopi-a64-set-right-phy-mode-to-rgmii-id.patch Normal file
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@@ -0,0 +1,29 @@
From af24bffeb1402e35f0aea34bf555a5725c858197 Mon Sep 17 00:00:00 2001
From: root <guido.lehwalder@gmail.com>
Date: Tue, 26 Jan 2021 18:17:33 +0300
Subject: [PATCH 100/170] arm64:dts: nanopi-a64 set right phy-mode to rgmii-id
set right phy-mode for NPI A64 to rgmii-id for working
onboard-ethernet
Signed-off-by: root <guido.lehwalder@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index e74c48b92..9bccbf6d3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -80,7 +80,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
status = "okay";
--
2.35.3

144
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-overlay-sun50i-a64-pine64-7inch-lcd.patch Normal file
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@@ -0,0 +1,144 @@
From f87e2d785c0414af99e8ecd906771c515469cbcf Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:27:02 +0300
Subject: [PATCH 127/170] arm64:dts:overlay: sun50i-a64-pine64-7inch-lcd
Added to orange-pi-5.9 2020-11-30
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 1 +
.../overlay/README.sun50i-a64-overlays | 5 ++
.../overlay/sun50i-a64-pine64-7inch-lcd.dts | 87 +++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 9b6528ec2..591eef672 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -2,6 +2,7 @@
dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-i2c0.dtbo \
sun50i-a64-i2c1.dtbo \
+ sun50i-a64-pine64-7inch-lcd.dtbo \
sun50i-a64-pps-gpio.dtbo \
sun50i-a64-spi-add-cs1.dtbo \
sun50i-a64-spi-jedec-nor.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
index cd9dbc686..b684c2e3a 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
+++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
@@ -20,6 +20,7 @@ on supported boards, so this controller is not supported in provided overlays
- i2c0
- i2c1
+- pine64-7inch-lcd
- pps-gpio
- spi-add-cs1
- spi-jedec-nor
@@ -44,6 +45,10 @@ Activates TWI/I2C bus 1
I2C1 pins (SCL, SDA): PH2, PH3
+### pine64-7inch-lcd
+
+Activates the Pine64 7" LCD on pine64/pine64so boards
+
### pps-gpio
Activates pulse-per-second GPIO client
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
new file mode 100644
index 000000000..34708103f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
@@ -0,0 +1,87 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ compatible = "allwinner,sun50i-a64";
+
+ fragment@0 {
+ target = <&reg_ldo_io0>;
+
+ __overlay__ {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ctp";
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c0>;
+
+ __overlay__ {
+ status = "okay";
+
+ gt911: touchscreen@5d {
+ compatible = "goodix,gt911";
+ reg = <0x5d>;
+
+ interrupt-parent = <&pio>;
+ interrupts = <7 4 IRQ_TYPE_EDGE_RISING>; /* PH4 */
+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+ AVDD28-supply = <&reg_ldo_io0>;
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&r_pwm>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target-path = "/";
+
+ __overlay__ {
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <1 2 4 8 16 32 64 128 512>;
+ default-brightness-level = <8>;
+ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+ };
+ };
+ };
+
+ fragment@4 {
+ target = <&dsi>;
+
+ __overlay__ {
+ vcc-dsi-supply = <&reg_dldo1>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "feiyang,fy07024di26a30d";
+ reg = <0>;
+ avdd-supply = <&reg_dc1sw>;
+ dvdd-supply = <&reg_dldo2>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ backlight = <&backlight>;
+ };
+ };
+ };
+
+ fragment@5 {
+ target = <&dphy>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
--
2.35.3

221
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch Normal file
View File

@@ -0,0 +1,221 @@
From 93a1edeebcb93511e2c84c617a6595e0b10cbcfc Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:01:10 +0300
Subject: [PATCH 128/170] arm64:dts:overlay sun50i-h5 add gpio regulator
overclock
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 4 ++
.../sun50i-h5-cpu-clock-1.0GHz-1.1v.dts | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.2GHz-1.3v.dts | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.3GHz-1.3v.dts | 61 +++++++++++++++++++
.../overlay/sun50i-h5-gpio-regulator-1.3v.dts | 38 ++++++++++++
5 files changed, 165 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 591eef672..87f5addec 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -14,6 +14,10 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-w1-gpio.dtbo \
sun50i-h5-analog-codec.dtbo \
sun50i-h5-cir.dtbo \
+ sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
+ sun50i-h5-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
+ sun50i-h5-gpio-regulator-1.3v.dtbo \
sun50i-h5-i2c0.dtbo \
sun50i-h5-i2c1.dtbo \
sun50i-h5-i2c2.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
new file mode 100644
index 000000000..674ec1dcb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.0GHz at a maximum CPU voltage of 1.1v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
new file mode 100644
index 000000000..4fb5c81d3
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
new file mode 100644
index 000000000..9c633973d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
new file mode 100644
index 000000000..8d2755c3d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+
+ fragment@0 {
+ target-path = "/";
+
+ __overlay__ {
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&cpu0>;
+
+ __overlay__ {
+ cpu-supply = <&reg_vdd_cpux>;
+ };
+ };
+};
+
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From 8b2903c6126d1888acca75745740b62e5271a429 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:52:48 +0300
Subject: [PATCH 119/170] arm64:dts: sun50i-a64 force mmc0 bus-width
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 62875d62e..e831d81ad 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -549,6 +549,7 @@ mmc0: mmc@1c0f000 {
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
status = "disabled";
+ bus-width = <0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
--
2.35.3

28
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-Disable-clock-phase-and-.patch Normal file
View File

@@ -0,0 +1,28 @@
From 776a4643cb016a933f2c633bbc8f98929ea0911a Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Wed, 20 May 2020 09:25:56 +0300
Subject: [PATCH 143/170] arm64:dts:sun50i-a64-olinuxino-1Ge16GW Disable clock
phase and hs just for test
---
.../arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index 100a7ce49..41c7a4ed4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -15,8 +15,8 @@ / {
&mmc2 {
vqmmc-supply = <&reg_eldo1>;
- mmc-hs200-1_8v;
- allwinner,drive-data-phase = <180>;
+/* mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;*/
};
&pio {
--
2.35.3

42
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,42 @@
From edbed8535a574af24788faa7cd484493c96ba2b4 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 17:31:49 +0200
Subject: [PATCH 141/170] arm64:dts: sun50i-a64-olinuxino-1Ge16GW: enable
bluetooth
---
.../sun50i-a64-olinuxino-1Ge16GW.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index a508d77d2..100a7ce49 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -18,3 +18,24 @@ &mmc2 {
mmc-hs200-1_8v;
allwinner,drive-data-phase = <180>;
};
+
+&pio {
+ vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
--
2.35.3

603
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-olinuxino-add-boards.patch Normal file
View File

@@ -0,0 +1,603 @@
From 839f6fd55c5108b40b161e09da3d312d4bb212fd Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:03:08 +0200
Subject: [PATCH 139/170] arm64:dts:sun50i-a64-olinuxino add boards
---
arch/arm64/boot/dts/allwinner/Makefile | 5 +
.../dts/allwinner/sun50i-a64-olinuxino-1G.dts | 362 ++++++++++++++++++
.../sun50i-a64-olinuxino-1Ge16GW.dts | 20 +
.../allwinner/sun50i-a64-olinuxino-1Ge4GW.dts | 97 +++++
.../allwinner/sun50i-a64-olinuxino-1Gs16M.dts | 31 ++
.../allwinner/sun50i-a64-olinuxino-2Ge8G.dts | 25 ++
6 files changed, 540 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 7d55c302a..fe2c76047 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -5,6 +5,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1G.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge4GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge16GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Gs16M.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-2Ge8G.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
new file mode 100644
index 000000000..d48ed65de
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino-1G";
+ compatible = "olimex,a64-olinuxino-1g", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
+ reg_vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+ status = "okay";
+ };
+};
+
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ hpvcc-supply = <&reg_eldo1>;
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_dcdc1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+/* Exposed to UEXT connector */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&axp_led {
+ label = "axp20x:yellow:chgled";
+ status = "okay";
+ x-powers,charger-mode = <0>;
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-pe";
+};
+
+&reg_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vcc-ddr3";
+};
+
+&reg_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+&reg_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-avdd-csi";
+};
+
+&reg_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+&reg_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+&reg_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-emmc";
+};
+
+&reg_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dvdd-csi";
+};
+
+&reg_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "Headphone Jack", "HP",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Left", "HBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
+&spdif {
+ status = "disabled";
+};
+
+/* Exposed on UEXT */
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* Exposed on UEXT */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus_det-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ usb0_vbus-supply = <&reg_drivevbus>;
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
new file mode 100644
index 000000000..a508d77d2
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1Ge4GW.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge16GW";
+ compatible = "olimex,a64-olinuxino-1ge16gw", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
new file mode 100644
index 000000000..c87ecc6e1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge4GW";
+ compatible = "olimex,a64-olinuxino-1ge4gw", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet1 = &rtl8723bs;
+ mmc1 = &mmc2;
+ };
+
+ bt-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-inversion = <1>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "RTL8723BS";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco>;
+ };
+ };
+
+ bt_sco: bt-sco {
+ compatible = "linux,bt-sco";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_aldo2>;
+ vqmmc-supply = <&reg_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
new file mode 100644
index 000000000..5b85f4d2b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Gs16M";
+ compatible = "olimex,a64-olinuxino-1gs16m", "allwinner,sun50i-a64";
+
+ aliases {
+ spi0 = &spi0;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-nor@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
new file mode 100644
index 000000000..3583c37d3
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-2Ge8G-IND";
+ compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
--
2.35.3

39
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-olinuxino-emmc-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,39 @@
From 313e00550d2c1a99de4a1b6c22bf7d9cd48f79c0 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 13:53:44 +0200
Subject: [PATCH 140/170] arm64:dts: sun50i-a64-olinuxino-emmc: enable
bluetooth
---
.../dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
index efb20846d..963b8b207 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
@@ -22,4 +22,21 @@ &mmc2 {
&pio {
vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
};
--
2.35.3

25
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-orangepi-win-add-aliase-ethernet1.patch Normal file
View File

@@ -0,0 +1,25 @@
From 44ac28a1366dc916bcf57a2d491cb753a2996ccf Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:48:25 +0300
Subject: [PATCH 118/170] arm64:dts: sun50i-a64-orangepi-win add aliase
ethernet1
---
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index eb8969356..4b6caad1b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -15,6 +15,7 @@ / {
aliases {
ethernet0 = &emac;
+ ethernet1 = &brcmf;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
--
2.35.3

49
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-pine64-add-spi0.patch Normal file
View File

@@ -0,0 +1,49 @@
From 68f2575a9a7bf36a1a68c3716a51943aa83ce81f Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 19:10:06 +0300
Subject: [PATCH 116/170] arm64:dts: sun50i-a64-pine64 add spi0
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index cba8ae875..fc0f7975c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -350,3 +350,32 @@ &usb_otg {
&usbphy {
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "disabled";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ partition@200000 {
+ label = "data";
+ reg = <0x200000 0x200000>;
+ };
+ };
+ };
+};
--
2.35.3

40
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch Normal file
View File

@@ -0,0 +1,40 @@
From 3a435ed97430d87dfb7efed761d397fa9cc2af0c Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:45:16 -0700
Subject: [PATCH 098/170] arm64:dts: sun50i-a64-pine64 enable Bluetooth
Pine64 has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index a08c97f23..cba8ae875 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -310,7 +310,15 @@ &uart0 {
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
- status = "disabled";
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
};
/* On Pi-2 connector */
--
2.35.3

52
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-pine64-enable-wifi-mmc1.patch Normal file
View File

@@ -0,0 +1,52 @@
From 428c1f4c49b027d8d8ffb012c1e048c9022a1828 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 9 Feb 2017 00:18:56 +0800
Subject: [PATCH 085/170] arm64:dts: sun50i-a64-pine64 enable wifi mmc1
The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Add device node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 17886709b..a08c97f23 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -35,6 +35,11 @@ hdmi_con_in: endpoint {
};
};
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&codec {
@@ -128,6 +133,17 @@ &mmc0 {
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
--
2.35.3

44
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-pinebook-enable-Bluetooth.patch Normal file
View File

@@ -0,0 +1,44 @@
From 8b3f4d8ece446d1b608525c9057ec902977964e7 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:43:26 -0700
Subject: [PATCH 097/170] arm64:dts: sun50i-a64-pinebook enable Bluetooth
Pinebook has an RTL8723CS WiFi + BT chip, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../boot/dts/allwinner/sun50i-a64-pinebook.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index 63571df24..80f1ef241 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -406,6 +406,20 @@ &uart0 {
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723cs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pinebook";
+ };
+};
+
&usb_otg {
dr_mode = "host";
};
--
2.35.3

44
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-Add-i2s2-mmc1.patch Normal file
View File

@@ -0,0 +1,44 @@
From c9222ed42f67d76a39f22476f75994bfaebfb681 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:43:08 -0800
Subject: [PATCH 087/170] arm64:dts: sun50i-a64-sopine-baseboard Add i2s2 mmc1
---
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 970d52837..ee4fd195e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -100,6 +100,10 @@ &i2s2 {
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -107,6 +111,16 @@ ext_rgmii_phy: ethernet-phy@1 {
};
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
--
2.35.3

45
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-enable-Bluetooth.patch Normal file
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@@ -0,0 +1,45 @@
From f69e0945136e5cbfaeebda267d08a319b9bb46fc Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:50:09 -0700
Subject: [PATCH 099/170] arm64:dts: sun50i-a64-sopine-baseboard enable
Bluetooth
SoPine has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index ee4fd195e..56714cc3f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -197,6 +197,20 @@ &uart0 {
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
+};
+
/* On Pi-2 connector */
&uart2 {
pinctrl-names = "default";
--
2.35.3

42
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-a64.dtsi-adjust-thermal-trip-points.patch Normal file
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@@ -0,0 +1,42 @@
From 1b5317a72abbd025ea91588c7a1221b50c97da2e Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Mon, 6 Apr 2020 15:26:10 +0300
Subject: [PATCH 142/170] arm64:dts:sun50i-a64.dtsi adjust thermal trip points
default values for alert1/crit are way too high.
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index e831d81ad..7cec3dcd5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -243,21 +243,21 @@ map1 {
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
- temperature = <75000>;
+ temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
/* milliCelsius */
- temperature = <90000>;
+ temperature = <80000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
/* milliCelsius */
- temperature = <110000>;
+ temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
--
2.35.3

122
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-add-cpu-opp-refs.patch Normal file
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@@ -0,0 +1,122 @@
From af9406f9060c84e894167382216af017ca2a3d4e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:40:02 +0300
Subject: [PATCH 145/170] arm64:dts:sun50i-h5 add cpu opp refs
---
arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts | 3 ++-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 1 +
8 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
index 77661006d..fa1f4e706 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-bananapi-m2-plus.dtsi>
/ {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
index b7045a9ef..4980076da 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -393,4 +394,4 @@ &usbphy {
&i2s0 {
sound-dai = <&pcm5102a>;
status = "disabled";
-};
\ No newline at end of file
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
index d051382cc..2c742e0e8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
index 57283cc16..8d1958cd5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
index 4c3921ac2..49e28ed6d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
index 06ffbbd29..be48938ee 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 39331229c..ba597c9d3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 2e2ff6cc1..7fc2ead23 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -5,6 +5,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
--
2.35.3

102
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-add-termal-zones.patch Normal file
View File

@@ -0,0 +1,102 @@
From c02f07d2a7655e9cd8ff094e57779f08f73279ce Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:12:46 +0300
Subject: [PATCH 146/170] arm64:dts:sun50i-h5 add termal zones
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 66 ++++++++++++++++----
1 file changed, 54 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62952660b..f6d970d9b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -207,31 +207,73 @@ ths: thermal-sensor@1c25000 {
thermal-zones {
cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
thermal-sensors = <&ths 0>;
trips {
- cpu_hot_trip: cpu-hot {
+ cpu_warm: cpu_warm {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot_pre: cpu_hot_pre {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_very_hot_trip: cpu-very-hot {
- temperature = <100000>;
- hysteresis = <0>;
+ cpu_hot: cpu_hot {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_pre: cpu_very_hot_pre {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot: cpu_very_hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <105000>;
+ hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
- cpu-hot-limit {
- trip = <&cpu_hot_trip>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
+ };
+
+ cpu_hot_pre_limit_cpu {
+ trip = <&cpu_hot_pre>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_hot_limit_cpu {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_pre_limit_cpu {
+ trip = <&cpu_very_hot_pre>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu {
+ trip = <&cpu_very_hot>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
--
2.35.3

66
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-nanopi-neo2-add-regulator-led-triger.patch Normal file
View File

@@ -0,0 +1,66 @@
From f472340c4545d9649a1f1f1dc5ed670bb40381cf Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:24:24 +0300
Subject: [PATCH 106/170] arm64:dts: sun50i-h5-nanopi-neo2 add regulator, led
triger
---
.../dts/allwinner/sun50i-h5-nanopi-neo2.dts | 23 ++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 05486ccce..39331229c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -25,12 +25,13 @@ leds {
led-0 {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ linux,default-trigger = "default-on";
};
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
};
};
@@ -51,6 +52,22 @@ reg_vcc3v3: vcc3v3 {
regulator-max-microvolt = <3300000>;
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1100000 0x1>;
+ };
+
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -62,6 +79,10 @@ reg_usb0_vbus: usb0-vbus {
};
};
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
&ehci0 {
status = "okay";
};
--
2.35.3

51
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-orangepi-pc2-add-spi-flash.patch Normal file
View File

@@ -0,0 +1,51 @@
From 7965454f80040f1d9f86ab6bd5e6e31db9fb2c4b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:27:52 +0300
Subject: [PATCH 107/170] arm64:dts: sun50i-h5-orangepi-pc2 add spi flash
---
.../dts/allwinner/sun50i-h5-orangepi-pc2.dts | 25 ++++++++++++++-----
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 00f1183d6..a8496664f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -198,15 +198,28 @@ &sound_hdmi {
status = "okay";
};
-&spi0 {
+&spi0 {
status = "okay";
-
- flash@0 {
+ spi-flash@0 {
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <40000000>;
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
};
};
--
2.35.3

92
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-orangepi-prime-add-regulator.patch Normal file
View File

@@ -0,0 +1,92 @@
From 63befd5ae875ac6cf2d2e2a533b8f9596e8878fe Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:34:31 +0300
Subject: [PATCH 108/170] arm64:dts: sun50i-h5-orangepi-prime add regulator
---
.../allwinner/sun50i-h5-orangepi-prime.dts | 43 ++++++++++++++++---
1 file changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 19b8538e0..2e2ff6cc1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -8,11 +8,19 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Prime";
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
aliases {
ethernet0 = &emac;
serial0 = &uart0;
@@ -68,13 +76,6 @@ reg_gmac_3v3: gmac-3v3 {
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -91,6 +92,10 @@ wifi_pwrseq: wifi_pwrseq {
};
};
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
@@ -189,6 +194,30 @@ &ohci3 {
&sound_hdmi {
status = "okay";
};
+&r_i2c {
+ status = "okay";
+
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
&uart0 {
pinctrl-names = "default";
--
2.35.3

35
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-orangepi-prime-add-rtl8723cs.patch Normal file
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@@ -0,0 +1,35 @@
From 64e30455905476585d18c542f346a575742090fa Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:11:07 +0300
Subject: [PATCH 152/170] arm64:dts: sun50i-h5-orangepi-prime add rtl8723cs
---
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 7fc2ead23..20461a170 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -25,6 +25,7 @@ reg_vcc3v3: vcc3v3 {
aliases {
ethernet0 = &emac;
serial0 = &uart0;
+ ethernet1 = &rtl8723cs;
};
chosen {
@@ -174,6 +175,10 @@ &mmc1 {
bus-width = <4>;
non-removable;
status = "okay";
+
+ rtl8723cs: sdio_wifi@1 {
+ reg = <1>;
+ };
};
&ohci0 {
--
2.35.3

67
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-orangepi-zero-plus-add-regulator.patch Normal file
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@@ -0,0 +1,67 @@
From 2e8d4c96518f716bf4345c2587993d5c658f5a31 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:49:11 +0300
Subject: [PATCH 109/170] arm64:dts: sun50i-h5-orangepi-zero-plus add regulator
---
.../sun50i-h5-orangepi-zero-plus.dts | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
index 7ec5ac850..dfa5fd2a7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -36,12 +37,13 @@ leds {
led-0 {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
- default-state = "on";
+ linux,default-trigger = "default-on";
};
led-1 {
label = "orangepi:red:status";
gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ linux,default-trigger = "heartbeat";
};
};
@@ -54,6 +56,27 @@ reg_gmac_3v3: gmac-3v3 {
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
};
+
+ reg_sy8113b: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_sy8113b>;
};
&ehci0 {
--
2.35.3

107
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h5-orangepi-zero-plus2-regulator-gpio-fix.patch Normal file
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@@ -0,0 +1,107 @@
From 6580db567a9eb07247e9bb633001b5a88650c2fe Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:54:04 +0300
Subject: [PATCH 110/170] arm64:dts: sun50i-h5-orangepi-zero-plus2
regulator-gpio fix
---
.../sun50i-h5-orangepi-zero-plus2.dts | 58 ++++++++++++++-----
1 file changed, 45 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index 3e69ebde5..999fdcd96 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -30,33 +31,55 @@ hdmi_con_in: endpoint {
};
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
+ post-power-on-delay-ms = <200>;
+ };
+
leds {
compatible = "gpio-leds";
led-0 {
label = "orangepi:green:pwr";
- gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
};
led-1 {
label = "orangepi:red:status";
- gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ linux,default-trigger = "heartbeat";
};
};
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1108475>;
+ regulator-max-microvolt = <1307810>;
+ regulator-ramp-delay = <50>; /* 4ms */
+// enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1108475 0x0
+ 1307810 0x1>;
};
+};
- wifi_pwrseq: wifi_pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
- post-power-on-delay-ms = <200>;
- };
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
};
&de {
@@ -149,3 +172,12 @@ &usb_otg {
&usbphy {
status = "okay";
};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

122
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h6-Add-AC200-EPHY-related-nodes.patch Normal file
View File

@@ -0,0 +1,122 @@
From 30f20dcf377a21ae960a136b40a435390cf1ea1e Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 12 Jan 2020 12:09:12 +0100
Subject: [PATCH 086/170] arm64:dts: sun50i-h6: Add AC200 EPHY related nodes
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 63 ++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 1206210e3..412e0ab2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -22,6 +22,16 @@ aliases {
mmc2 = &mmc2;
};
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ pwms = <&pwm 1 42 0>;
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -316,6 +326,10 @@ ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
+
cpu_speed_grade: cpu-speed-grade@1c {
reg = <0x1c 0x4>;
};
@@ -373,6 +387,14 @@ ext_rgmii_pins: rgmii-pins {
drive-strength = <40>;
};
+ /omit-if-no-ref/
+ ext_rmii_pins: rmii_pins {
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
+ "PA5", "PA6", "PA7", "PA8", "PA9";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
function = "hdmi";
@@ -393,6 +415,11 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2c3_pins: i2c3-pins {
+ pins = "PB17", "PB18";
+ function = "i2c3";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -410,6 +437,11 @@ mmc1_pins: mmc1-pins {
bias-pull-up;
};
+ pwm1_pin: pwm1-pin {
+ pins = "PB19";
+ function = "pwm1";
+ };
+
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -652,6 +684,37 @@ spi1: spi@5011000 {
#size-cells = <0>;
};
+ i2c3: i2c@5002c00 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002c00 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ac200: mfd@10 {
+ compatible = "x-powers,ac200";
+ reg = <0x10>;
+ interrupt-parent = <&pio>;
+ interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy";
+ clocks = <&ac200_pwm_clk>;
+ nvmem-cells = <&ephy_calibration>;
+ nvmem-cell-names = "calibration";
+ status = "disabled";
+ };
+ };
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
--
2.35.3

119
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h6-Add-r_uart-uart2-3-pins.patch Normal file
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@@ -0,0 +1,119 @@
From d2821c82e72b4fa55212e95ed50d3ddc148749a9 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 20:49:27 +0300
Subject: [PATCH 088/170] arm64:dts: sun50i-h6 Add r_uart uart2-3 pins
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++++++++----
1 file changed, 50 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 412e0ab2c..ad4241a1a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -316,6 +316,17 @@ msgbox: mailbox@3003000 {
#mbox-cells = <1>;
};
+ gic: interrupt-controller@3021000 {
+ compatible = "arm,gic-400";
+ reg = <0x03021000 0x1000>,
+ <0x03022000 0x2000>,
+ <0x03024000 0x2000>,
+ <0x03026000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun50i-h6-sid";
reg = <0x03006000 0x400>;
@@ -379,6 +390,7 @@ pio: pinctrl@300b000 {
interrupt-controller;
#interrupt-cells = <3>;
+ /omit-if-no-ref/
ext_rgmii_pins: rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@@ -442,6 +454,7 @@ pwm1_pin: pwm1-pin {
function = "pwm1";
};
+ /omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -495,17 +508,26 @@ uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
- };
- gic: interrupt-controller@3021000 {
- compatible = "arm,gic-400";
- reg = <0x03021000 0x1000>,
- <0x03022000 0x2000>,
- <0x03024000 0x2000>,
- <0x03026000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- interrupt-controller;
- #interrupt-cells = <3>;
+ uart2_pins: uart2-pins {
+ pins = "PD19", "PD20";
+ function = "uart2";
+ };
+
+ uart2_rts_cts_pins: uart2-rts-cts-pins {
+ pins = "PD21", "PD22";
+ function = "uart2";
+ };
+
+ uart3_pins: uart3-pins {
+ pins = "PD23", "PD24";
+ function = "uart3";
+ };
+
+ uart3_rts_cts_pins: uart3-rts-cts-pins {
+ pins = "PD25", "PD26";
+ function = "uart3";
+ };
};
iommu: iommu@30f0000 {
@@ -1023,6 +1045,19 @@ tcon_tv_out_tcon_top: endpoint@1 {
};
};
+ r_uart: serial@7080000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x07080000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&r_ccu CLK_R_APB2_UART>;
+ resets = <&r_ccu RST_R_APB2_UART>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+ };
+
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h6-rtc";
reg = <0x07000000 0x400>;
@@ -1087,6 +1122,11 @@ r_rsb_pins: r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";
};
+
+ r_uart_pins: r-uart-pins {
+ pins = "PL2", "PL3";
+ function = "s_uart";
+ };
};
r_ir: ir@7040000 {
--
2.35.3

24
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h6-orangepi-3-add-r_uart-aliase.patch Normal file
View File

@@ -0,0 +1,24 @@
From bd0af9494b37730e2f9c8ef557fdf391933be6ac Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:12:37 +0300
Subject: [PATCH 144/170] arm64:dts: sun50i-h6-orangepi-3 add r_uart aliase
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 4882b72e0..bec744a39 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -15,6 +15,7 @@ / {
aliases {
serial0 = &uart0;
serial1 = &uart1;
+ serial9 = &r_uart;
ethernet0 = &emac;
};
--
2.35.3

25
patch/kernel/archive/sunxi-5.19/patches.armbian/arm64-dts-sun50i-h6-orangepi-3-delete-node-spi0.patch Normal file
View File

@@ -0,0 +1,25 @@
From 5474ad1b5e5d56dbf0fc090581248001c265dc71 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 17:06:21 +0300
Subject: [PATCH 112/170] arm64:dts: sun50i-h6-orangepi-3 delete-node &spi0
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 58166e17f..4882b72e0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -347,6 +347,8 @@ &sound_hdmi {
status = "okay";
};
+/delete-node/ &spi0;
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
--
2.35.3

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