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Merge branch 'main' into v23.05.2

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This commit is contained in:
Igor
2023-06-05 21:28:51 +02:00
parent 7c38e02167 5ed442cad8
commit 961a1038d4
5407 changed files with 512025 additions and 7604824 deletions
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26
.github/CODEOWNERS vendored
View File

@@ -9,15 +9,17 @@
lib/ @armbian/build-scripts
packages/ @armbian/build-scripts
tools/ @The-going @iav @neheb @hzyitc @mhoffrog
packages/bsp/jethub/ @armbian/build-scripts @adeepn
tools/ @iav @neheb @hzyitc @mhoffrog
config/kernel/linux-bcm2711-current.config @igorpecovnik
config/kernel/linux-bcm2711-edge.config @igorpecovnik
config/kernel/linux-jetson-nano-legacy.config @150balbes
config/kernel/linux-media-current.config @150balbes
config/kernel/linux-media-edge.config @150balbes
config/kernel/linux-meson64-current.config @rpardini
config/kernel/linux-meson64-edge.config @rpardini
config/kernel/linux-meson64-current.config @rpardini @adeepn
config/kernel/linux-meson64-edge.config @rpardini @adeepn
config/kernel/linux-meson-current.config @hzyitc
config/kernel/linux-meson-edge.config @hzyitc
config/kernel/linux-meson-legacy.config @hzyitc
@@ -41,16 +43,20 @@ config/kernel/linux-rockchip-rk3588-legacy.config @amazingfate @nyanmi
config/kernel/linux-rockpis-legacy.config @brentr
config/kernel/linux-station-m3-legacy.config @150balbes
config/kernel/linux-station-p2-legacy.config @150balbes
config/kernel/linux-sun50iw9-legacy.config @The-going
config/kernel/linux-sunxi64-current.config @The-going
config/kernel/linux-sunxi64-edge.config @The-going
config/kernel/linux-sunxi64-legacy.config @The-going
config/kernel/linux-sunxi-current.config @The-going
config/kernel/linux-sunxi-edge.config @The-going
config/kernel/linux-sunxi-legacy.config @The-going
config/kernel/linux-sun50iw9-legacy.config @igorpecovnik
config/kernel/linux-sunxi64-current.config @igorpecovnik
config/kernel/linux-sunxi64-edge.config @igorpecovnik
config/kernel/linux-sunxi64-legacy.config @igorpecovnik
config/kernel/linux-sunxi-current.config @igorpecovnik
config/kernel/linux-sunxi-edge.config @igorpecovnik
config/kernel/linux-sunxi-legacy.config @igorpecovnik
config/kernel/linux-uefi-arm64-current.config @igorpecovnik
config/kernel/linux-uefi-arm64-edge.config @igorpecovnik
config/kernel/linux-uefi-riscv64-current.config @igorpecovnik
config/kernel/linux-uefi-riscv64-edge.config @igorpecovnik
config/kernel/linux-uefi-x86-current.config @igorpecovnik
config/kernel/linux-uefi-x86-edge.config @igorpecovnik
lib/functions/compilation/patch/drivers_network.sh @armbian/build-scripts @adeepn
patch/kernel/archive/meson64* @igorpecovnik @rpardini @adeepn

2
.github/workflows/kernel-security-analysis-pr.yml vendored
View File

@@ -31,7 +31,7 @@ jobs:
- name: Get changed files
id: changed-files
uses: tj-actions/changed-files@v35
uses: tj-actions/changed-files@v36
- name: Checkout repository
uses: actions/checkout@v3

2
.github/workflows/lint-scripts-pr.yml vendored
View File

@@ -27,7 +27,7 @@ jobs:
- name: Get changed files
id: changed-files
uses: tj-actions/changed-files@v35
uses: tj-actions/changed-files@v36
- name: List all changed files
run: |

45
README.md
View File

@@ -8,9 +8,9 @@
## Table of contents
- [What this project does?](#what-this-project-does)
- [What does this project do?](#what-does-this-project-do)
- [Getting started](#getting-started)
- [Compare with industry standards](#compare-with-industry-standards)
- [Compared with industry standards](#compared-with-industry-standards)
- [Download prebuilt images](#download-prebuilt-images)
- [Project structure](#project-structure)
- [Contribution](#contribution)
@@ -20,9 +20,9 @@
- [Partners](#armbian-partners)
- [License](#license)
## What this project does?
## What does this project do?
- Builds custom kernel, image or a distribution optimized for low resource hardware,
- Builds custom kernel, image or a distribution optimized for low-resource hardware,
- Include filesystem generation, low-level control software, kernel image and bootloader compilation,
- Provides a consistent user experience by keeping system standards across different platforms.
@@ -33,9 +33,9 @@
- x86_64 or aarch64 machine with at least 2GB of memory and ~35GB of disk space for a virtual machine, [WSL2](https://learn.microsoft.com/en-us/windows/wsl/install), container or bare metal installation
- Ubuntu Jammy 22.04.x amd64 or aarch64 for native building or any Docker capable amd64 / aarch64 Linux for containerised
- Superuser rights (configured sudo or root access).
- Make sure all your system components are up-to-date. Outdated Docker binaries for example can cause troubles.
- Make sure all your system components are up-to-date. Outdated Docker binaries, for example, can cause trouble.
### Simply start with the build script
### Start with the build script
```bash
apt-get -y install git
@@ -47,12 +47,12 @@ cd build
<a href="#how-to-build-an-image-or-a-kernel"><img src=".github/README.gif" alt="Armbian logo" width="100%"></a>
- Interactive graphical interface.
- The workspace will be prepared by installing the necessary dependencies and sources.
- It guides the entire process until a kernel package or ready-to-use image of the SD card is created.
- Prepares the workspace by installing the necessary dependencies and sources.
- It guides the entire process and creates a kernel package or a ready-to-use SD card image.
### Build parameter examples
Show work in progress areas in interactive mode:
Show work-in-progress areas in interactive mode:
```bash
./compile.sh EXPERT="yes"
@@ -76,7 +76,7 @@ More information:
- [Building Armbian](https://docs.armbian.com/Developer-Guide_Build-Preparation/) — how to start, how to automate;
- [Build options](https://docs.armbian.com/Developer-Guide_Build-Options/) — all build options;
- [User configuration](https://docs.armbian.com/Developer-Guide_User-Configurations/) — how to add packages, patches and override sources config;
- [User configuration](https://docs.armbian.com/Developer-Guide_User-Configurations/) — how to add packages, patches, and override sources config;
## Download prebuilt images
@@ -84,9 +84,9 @@ More information:
- weekly released **unsupported** community builds — <https://github.com/armbian/community>
- upon code change **unsupported** development builds — <https://github.com/armbian/build/releases>
## Compare with industry standards
## Compared with industry standards
Check similarity, advantages and disadvantages compared with leading industry standard build software.
Check similarities, advantages and disadvantages compared with leading industry standard build software.
Function | Armbian | Yocto | Buildroot |
|:--|:--|:--|:--|
@@ -178,7 +178,7 @@ Function | Armbian | Yocto | Buildroot |
```
</details>
## 🙌 Contribution
## Contribution
### You don't need to be a programmer to help!
@@ -191,25 +191,22 @@ Function | Armbian | Yocto | Buildroot |
### Want to become a maintainer?
Please review the [Board Maintainers Procedures and Guidelines](https://docs.armbian.com/Board_Maintainers_Procedures_and_Guidelines/) and if you can meet the requirements as well as find a board on the [Board Maintainers](https://docs.armbian.com/Release_Board-Maintainers/) list which has less than 2 maintainers, then please apply using the linked form.
Please review the [Board Maintainers Procedures and Guidelines](https://docs.armbian.com/Board_Maintainers_Procedures_and_Guidelines/), and if you can meet the requirements and find a board on the [Board Maintainers](https://docs.armbian.com/Release_Board-Maintainers/) list with less than two maintainers, then please apply using the linked form.
### Want to become a developer?
If you want to help with development, you should first review the [Development Code Review Procedures and Guidelines](https://docs.armbian.com/Development-Code_Review_Procedures_and_Guidelines/) and then you can review the pre-made Jira dashboards and additional resources provided below to find open tasks and how you can assist:
To help with development, you should first review the [Development Code Review Procedures and Guidelines](https://docs.armbian.com/Development-Code_Review_Procedures_and_Guidelines/). Then you can review the pre-made Jira dashboards and additional resources provided below to find open tasks and how you can assist:
- [pull requests that needs a review](https://github.com/armbian/build/pulls?q=is%3Apr+is%3Aopen+review%3Arequired)
- [pull requests that need a review](https://github.com/armbian/build/pulls?q=is%3Apr+is%3Aopen+review%3Arequired)
- dashboard for [junior](https://armbian.atlassian.net/jira/dashboards/10000) and [seniors](https://armbian.atlassian.net/jira/dashboards/10103) developers
- [documentation](https://docs.armbian.com/)
- [continuous integration](https://docs.armbian.com/Process_CI/)
## Support
Support is provided in one of two ways:
- For commercial or prioritized assistance:
- book a an hour of [professional consultation](https://calendly.com/armbian/consultation),
- consider becoming a project partner. Reach us out at <https://armbian.com/contact>,
- Alternatively free support is provided via [general project search engine](https://www.armbian.com/search), [documentation](https://docs.armbian.com), [community forums](https://forum.armbian.com/) or [IRC/Discord](https://docs.armbian.com/Community_IRC/). Keep in mind this is mostly provided by our awesome community members in a **best effort** manner and therefore there are no guaranteed solutions.
For commercial or prioritized assistance:
- Book an hour of [professional consultation](https://calendly.com/armbian/consultation)
- Consider becoming a project partner. Reach us at <https://armbian.com/contact>. Alternatively, find free support via [general project search engine](https://www.armbian.com/search), [documentation](https://docs.armbian.com), [community forums](https://forum.armbian.com/) or [IRC/Discord](https://docs.armbian.com/Community_IRC/). Remember that our awesome community members mainly provide this in a **best-effort** manner, so there are no guaranteed solutions.
## Contact
@@ -222,7 +219,7 @@ Support is provided in one of two ways:
## Contributors
Thank you to all the people who already contributed Armbian!
Thank you to all the people who already contributed to Armbian!
<a href="https://github.com/armbian/build/graphs/contributors">
<img src="https://contrib.rocks/image?repo=armbian/build" />
@@ -233,7 +230,7 @@ Thank you to all the people who already contributed Armbian!
- [Current and past contributors](https://github.com/armbian/build/graphs/contributors), our families and friends.
- [Support staff](https://forum.armbian.com/members/2-moderators/) that keeps forums usable.
- [Friends and individuals](https://armbian.com/authors) who support us with resources and their time.
- [The Armbian Community](https://forum.armbian.com/) that helps with their ideas, reports and [donations](https://www.armbian.com/donate).
- [The Armbian Community](https://forum.armbian.com/) helps with their ideas, reports and [donations](https://www.armbian.com/donate).
## Armbian Partners

2
config/boards/bananapim3.conf
View File

@@ -3,4 +3,4 @@ BOARD_NAME="Banana Pi M3"
BOARDFAMILY="sun8i"
BOOTCONFIG="Sinovoip_BPI_M3_defconfig"
OVERLAY_PREFIX="sun8i-a83t"
KERNEL_TARGET="current,edge"
KERNEL_TARGET="legacy,current,edge"

2
config/boards/nanopi-r1.conf
View File

@@ -9,4 +9,4 @@ DEFAULT_CONSOLE="serial"
SERIALCON="ttyS1,ttyGS0"
HAS_VIDEO_OUTPUT="no"
KERNEL_TARGET="legacy,current,edge"
BOOT_FDT_FILE="allwinner/sun8i-h3-nanopi-r1.dtb"
BOOT_FDT_FILE="sun8i-h3-nanopi-r1.dtb"

2
config/boards/nanopiduo2.csc
View File

@@ -9,4 +9,4 @@ DEFAULT_CONSOLE="serial"
HAS_VIDEO_OUTPUT="no"
SERIALCON="ttyS0,ttyGS0"
KERNEL_TARGET="current,edge"
BOOT_FDT_FILE="allwinner/sun8i-h3-nanopi-duo2.dtb"
BOOT_FDT_FILE="sun8i-h3-nanopi-duo2.dtb"

8
config/boards/rock-5a.wip
View File

@@ -24,3 +24,11 @@ function post_family_tweaks__rock5a_naming_audios() {
return 0
}
function post_family_config_branch_legacy__dual_uboot_for_rock5a() {
display_alert "$BOARD" "Configuring ($BOARD) normal/SPI uboot target map" "info"
UBOOT_TARGET_MAP="
BL31=$RKBIN_DIR/$BL31_BLOB rock-5a-spi-rk3588s_defconfig spl/u-boot-spl.bin u-boot.dtb u-boot.itb;;rkspi_loader.img
BL31=$RKBIN_DIR/$BL31_BLOB rock-5a-rk3588s_defconfig spl/u-boot-spl.bin u-boot.dtb u-boot.itb;;idbloader.img u-boot.itb
"
}

1
config/cli/common/main/packages
View File

@@ -19,6 +19,7 @@ htop
inetutils-ping
init
initramfs-tools
iw
jq
logrotate
less

4
config/kernel/linux-meson64-current.config
View File

@@ -3552,6 +3552,8 @@ CONFIG_RTW88_8821C=m
# CONFIG_RTW88_8822CE is not set
# CONFIG_RTW88_8723DE is not set
CONFIG_RTW88_8821CE=m
CONFIG_RTW88_8821CS=m
CONFIG_RTW88_8822CS=m
# CONFIG_RTW88_DEBUG is not set
# CONFIG_RTW88_DEBUGFS is not set
# CONFIG_RTW89 is not set
@@ -4527,7 +4529,7 @@ CONFIG_POWER_RESET_BRCMSTB=y
# CONFIG_POWER_RESET_GPIO_RESTART is not set
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_MT6323 is not set
CONFIG_POWER_RESET_ODROID=y
CONFIG_POWER_RESET_MESON64=y
# CONFIG_POWER_RESET_REGULATOR is not set
CONFIG_POWER_RESET_RESTART=y
# CONFIG_POWER_RESET_TPS65086 is not set

4
config/kernel/linux-meson64-edge.config
View File

@@ -3571,6 +3571,8 @@ CONFIG_RTW88_8821C=m
# CONFIG_RTW88_8723DE is not set
# CONFIG_RTW88_8723DU is not set
CONFIG_RTW88_8821CE=m
CONFIG_RTW88_8821CS=m
CONFIG_RTW88_8822CS=m
# CONFIG_RTW88_8821CU is not set
# CONFIG_RTW88_DEBUG is not set
# CONFIG_RTW88_DEBUGFS is not set
@@ -4550,7 +4552,7 @@ CONFIG_POWER_RESET_ATC260X=m
CONFIG_POWER_RESET_BRCMSTB=y
# CONFIG_POWER_RESET_GPIO is not set
# CONFIG_POWER_RESET_GPIO_RESTART is not set
CONFIG_POWER_RESET_ODROID=y
CONFIG_POWER_RESET_MESON64=y
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_MT6323 is not set
# CONFIG_POWER_RESET_REGULATOR is not set

256
config/kernel/linux-rk3568-odroid-edge.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.3.3 Kernel Configuration
# Linux/arm64 6.3.5 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
CONFIG_CC_IS_GCC=y
@@ -59,7 +59,6 @@ CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_SIM=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
CONFIG_GENERIC_IRQ_IPI=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_IRQ_MSI_IOMMU=y
@@ -302,7 +301,7 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y
# Platform selection
#
# CONFIG_ARCH_ACTIONS is not set
CONFIG_ARCH_SUNXI=y
# CONFIG_ARCH_SUNXI is not set
# CONFIG_ARCH_ALPINE is not set
# CONFIG_ARCH_APPLE is not set
# CONFIG_ARCH_BCM is not set
@@ -326,7 +325,7 @@ CONFIG_ARCH_ROCKCHIP=y
# CONFIG_ARCH_SEATTLE is not set
# CONFIG_ARCH_INTEL_SOCFPGA is not set
# CONFIG_ARCH_SYNQUACER is not set
CONFIG_ARCH_TEGRA=y
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_THUNDER2 is not set
@@ -591,13 +590,8 @@ CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_ACPI_CPPC_CPUFREQ=y
CONFIG_ACPI_CPPC_CPUFREQ_FIE=y
CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=m
CONFIG_ARM_SCPI_CPUFREQ=y
CONFIG_ARM_SCMI_CPUFREQ=m
CONFIG_ARM_TEGRA20_CPUFREQ=m
CONFIG_ARM_TEGRA124_CPUFREQ=y
CONFIG_ARM_TEGRA186_CPUFREQ=m
CONFIG_ARM_TEGRA194_CPUFREQ=m
# end of CPU Frequency scaling
# end of CPU Power Management
@@ -1974,7 +1968,6 @@ CONFIG_ETHTOOL_NETLINK=y
# Device Drivers
#
CONFIG_ARM_AMBA=y
CONFIG_TEGRA_AHB=y
CONFIG_HAVE_PCI=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
@@ -2023,7 +2016,6 @@ CONFIG_HOTPLUG_PCI_ACPI=y
# PCI controller drivers
#
# CONFIG_PCI_FTPCI100 is not set
CONFIG_PCI_TEGRA=y
CONFIG_PCI_HOST_COMMON=y
CONFIG_PCI_HOST_GENERIC=y
# CONFIG_PCIE_XILINX is not set
@@ -2050,9 +2042,6 @@ CONFIG_PCI_HISI=y
CONFIG_PCIE_ROCKCHIP_DW_HOST=y
# CONFIG_PCIE_KIRIN is not set
# CONFIG_PCI_MESON is not set
CONFIG_PCIE_TEGRA194=m
CONFIG_PCIE_TEGRA194_HOST=m
CONFIG_PCIE_TEGRA194_EP=m
# CONFIG_PCIE_AL is not set
# end of DesignWare PCI Core Support
@@ -2137,7 +2126,6 @@ CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_SOC_BUS=y
CONFIG_REGMAP=y
CONFIG_REGMAP_AC97=m
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=m
CONFIG_REGMAP_SPMI=m
@@ -2156,10 +2144,6 @@ CONFIG_ARM_CCI=y
CONFIG_ARM_CCI400_COMMON=y
CONFIG_BRCMSTB_GISB_ARB=y
# CONFIG_MOXTET is not set
CONFIG_SUN50I_DE2_BUS=y
CONFIG_SUNXI_RSB=m
CONFIG_TEGRA_ACONNECT=m
CONFIG_TEGRA_GMI=m
CONFIG_VEXPRESS_CONFIG=y
CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set
@@ -2235,8 +2219,6 @@ CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_BPMP=y
# end of Tegra firmware driver
# end of Firmware Drivers
@@ -2359,9 +2341,7 @@ CONFIG_MTD_NAND_DENALI=y
CONFIG_MTD_NAND_DENALI_DT=y
# CONFIG_MTD_NAND_CAFE is not set
# CONFIG_MTD_NAND_BRCMNAND is not set
# CONFIG_MTD_NAND_SUNXI is not set
# CONFIG_MTD_NAND_MXIC is not set
# CONFIG_MTD_NAND_TEGRA is not set
# CONFIG_MTD_NAND_GPIO is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_NAND_CADENCE is not set
@@ -2689,8 +2669,6 @@ CONFIG_SATA_MOBILE_LPM_POLICY=0
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_DWC=m
# CONFIG_AHCI_CEVA is not set
CONFIG_AHCI_SUNXI=y
CONFIG_AHCI_TEGRA=y
CONFIG_AHCI_XGENE=y
# CONFIG_AHCI_QORIQ is not set
CONFIG_SATA_INIC162X=m
@@ -2972,8 +2950,6 @@ CONFIG_NET_VENDOR_AGERE=y
CONFIG_ET131X=m
CONFIG_NET_VENDOR_ALACRITECH=y
# CONFIG_SLICOSS is not set
CONFIG_NET_VENDOR_ALLWINNER=y
CONFIG_SUN4I_EMAC=m
CONFIG_NET_VENDOR_ALTEON=y
CONFIG_ACENIC=m
# CONFIG_ACENIC_OMIT_TIGON_I is not set
@@ -3214,10 +3190,7 @@ CONFIG_STMMAC_PLATFORM=y
# CONFIG_DWMAC_DWC_QOS_ETH is not set
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_ROCKCHIP=y
CONFIG_DWMAC_SUNXI=m
CONFIG_DWMAC_SUN8I=m
# CONFIG_DWMAC_INTEL_PLAT is not set
# CONFIG_DWMAC_TEGRA is not set
CONFIG_DWMAC_LOONGSON=m
# CONFIG_STMMAC_PCI is not set
CONFIG_NET_VENDOR_SUN=y
@@ -3375,7 +3348,6 @@ CONFIG_FWNODE_MDIO=y
CONFIG_OF_MDIO=y
CONFIG_ACPI_MDIO=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_SUN4I=m
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BCM_UNIMAC=m
CONFIG_MDIO_CAVIUM=y
@@ -3777,7 +3749,6 @@ CONFIG_WLCORE_SPI=m
CONFIG_WLCORE_SDIO=m
# CONFIG_RTL8723DU is not set
# CONFIG_RTL8723DS is not set
# CONFIG_RTL8822CS is not set
# CONFIG_RTL8822BU is not set
# CONFIG_RTL8821CU is not set
# CONFIG_88XXAU is not set
@@ -3884,13 +3855,11 @@ CONFIG_KEYBOARD_GPIO_POLLED=m
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
CONFIG_KEYBOARD_TEGRA=m
# CONFIG_KEYBOARD_OPENCORES is not set
CONFIG_KEYBOARD_PINEPHONE=m
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
CONFIG_KEYBOARD_SUN4I_LRADC=m
CONFIG_KEYBOARD_IQS62X=m
# CONFIG_KEYBOARD_OMAP4 is not set
# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
@@ -4062,7 +4031,6 @@ CONFIG_TOUCHSCREEN_SILEAD=m
CONFIG_TOUCHSCREEN_SIS_I2C=m
CONFIG_TOUCHSCREEN_ST1232=m
CONFIG_TOUCHSCREEN_STMFTS=m
CONFIG_TOUCHSCREEN_SUN4I=m
# CONFIG_TOUCHSCREEN_SUR40 is not set
CONFIG_TOUCHSCREEN_SURFACE3_SPI=m
CONFIG_TOUCHSCREEN_SX8654=m
@@ -4143,7 +4111,6 @@ CONFIG_SERIO_ALTERA_PS2=m
# CONFIG_SERIO_PS2MULT is not set
CONFIG_SERIO_ARC_PS2=m
# CONFIG_SERIO_APBPS2 is not set
CONFIG_SERIO_SUN4I_PS2=m
# CONFIG_SERIO_GPIO_PS2 is not set
# CONFIG_USERIO is not set
CONFIG_GAMEPORT=m
@@ -4197,7 +4164,6 @@ CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_DW=y
# CONFIG_SERIAL_8250_RT288X is not set
CONFIG_SERIAL_8250_PERICOM=y
CONFIG_SERIAL_8250_TEGRA=y
CONFIG_SERIAL_OF_PLATFORM=y
#
@@ -4208,9 +4174,6 @@ CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
# CONFIG_SERIAL_EARLYCON_SEMIHOST is not set
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_TEGRA_TCU=y
CONFIG_SERIAL_TEGRA_TCU_CONSOLE=y
# CONFIG_SERIAL_MAX3100 is not set
# CONFIG_SERIAL_MAX310X is not set
# CONFIG_SERIAL_UARTLITE is not set
@@ -4380,14 +4343,11 @@ CONFIG_I2C_EMEV2=m
CONFIG_I2C_GPIO=m
CONFIG_I2C_GPIO_FAULT_INJECTOR=y
CONFIG_I2C_HISI=m
CONFIG_I2C_MV64XXX=m
# CONFIG_I2C_NOMADIK is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_RK3X=y
# CONFIG_I2C_SIMTEC is not set
CONFIG_I2C_TEGRA=y
CONFIG_I2C_TEGRA_BPMP=y
# CONFIG_I2C_THUNDERX is not set
CONFIG_I2C_XILINX=m
@@ -4461,13 +4421,7 @@ CONFIG_SPI_ROCKCHIP_SFC=m
# CONFIG_SPI_SC18IS602 is not set
# CONFIG_SPI_SIFIVE is not set
# CONFIG_SPI_SN_F_OSPI is not set
CONFIG_SPI_SUN4I=m
CONFIG_SPI_SUN6I=m
CONFIG_SPI_MXIC=m
CONFIG_SPI_TEGRA210_QUAD=m
# CONFIG_SPI_TEGRA114 is not set
CONFIG_SPI_TEGRA20_SFLASH=y
CONFIG_SPI_TEGRA20_SLINK=m
# CONFIG_SPI_THUNDERX is not set
# CONFIG_SPI_XCOMM is not set
# CONFIG_SPI_XILINX is not set
@@ -4546,36 +4500,6 @@ CONFIG_PINCTRL_SX150X=y
#
# end of Renesas pinctrl drivers
CONFIG_PINCTRL_SUNXI=y
# CONFIG_PINCTRL_SUN4I_A10 is not set
CONFIG_PINCTRL_SUN5I=y
CONFIG_PINCTRL_SUN6I_A31=y
CONFIG_PINCTRL_SUN6I_A31_R=y
CONFIG_PINCTRL_SUN8I_A23=y
CONFIG_PINCTRL_SUN8I_A33=y
CONFIG_PINCTRL_SUN8I_A83T=y
CONFIG_PINCTRL_SUN8I_A83T_R=y
CONFIG_PINCTRL_SUN8I_A23_R=y
CONFIG_PINCTRL_SUN8I_H3=y
CONFIG_PINCTRL_SUN8I_H3_R=y
CONFIG_PINCTRL_SUN8I_V3S=y
CONFIG_PINCTRL_SUN9I_A80=y
CONFIG_PINCTRL_SUN9I_A80_R=y
# CONFIG_PINCTRL_SUN20I_D1 is not set
CONFIG_PINCTRL_SUN50I_A64=y
CONFIG_PINCTRL_SUN50I_A64_R=y
CONFIG_PINCTRL_SUN50I_A100=y
CONFIG_PINCTRL_SUN50I_A100_R=y
CONFIG_PINCTRL_SUN50I_H5=y
CONFIG_PINCTRL_SUN50I_H6=y
CONFIG_PINCTRL_SUN50I_H6_R=y
CONFIG_PINCTRL_SUN50I_H616=y
CONFIG_PINCTRL_SUN50I_H616_R=y
CONFIG_PINCTRL_TEGRA=y
CONFIG_PINCTRL_TEGRA124=y
CONFIG_PINCTRL_TEGRA210=y
CONFIG_PINCTRL_TEGRA194=y
CONFIG_PINCTRL_TEGRA_XUSB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_OF_GPIO=y
@@ -4609,8 +4533,6 @@ CONFIG_GPIO_PL061=y
CONFIG_GPIO_ROCKCHIP=y
# CONFIG_GPIO_SIFIVE is not set
CONFIG_GPIO_SYSCON=y
CONFIG_GPIO_TEGRA=y
CONFIG_GPIO_TEGRA186=y
CONFIG_GPIO_XGENE=y
CONFIG_GPIO_XILINX=y
CONFIG_GPIO_AMD_FCH=m
@@ -5042,17 +4964,8 @@ CONFIG_DEVFREQ_THERMAL=y
CONFIG_THERMAL_EMULATION=y
CONFIG_THERMAL_MMIO=m
CONFIG_MAX77620_THERMAL=m
CONFIG_SUN8I_THERMAL=m
CONFIG_ROCKCHIP_THERMAL=y
# CONFIG_TI_SOC_THERMAL is not set
#
# NVIDIA Tegra thermal drivers
#
# CONFIG_TEGRA_SOCTHERM is not set
CONFIG_TEGRA_BPMP_THERMAL=m
# end of NVIDIA Tegra thermal drivers
# CONFIG_GENERIC_ADC_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
@@ -5082,10 +4995,8 @@ CONFIG_RAVE_SP_WATCHDOG=m
# CONFIG_CADENCE_WATCHDOG is not set
CONFIG_DW_WATCHDOG=y
CONFIG_RN5T618_WATCHDOG=m
CONFIG_SUNXI_WATCHDOG=m
# CONFIG_MAX63XX_WATCHDOG is not set
# CONFIG_MAX77620_WATCHDOG is not set
CONFIG_TEGRA_WATCHDOG=m
# CONFIG_ARM_SMC_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_I6300ESB_WDT is not set
@@ -5131,7 +5042,6 @@ CONFIG_BCMA_DEBUG=y
#
CONFIG_MFD_CORE=y
# CONFIG_MFD_ACT8945A is not set
CONFIG_MFD_SUN4I_GPADC=m
CONFIG_MFD_AS3711=y
# CONFIG_MFD_SMPRO is not set
CONFIG_MFD_AS3722=m
@@ -5141,10 +5051,8 @@ CONFIG_MFD_AAT2870_CORE=y
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
CONFIG_MFD_BD9571MWV=y
CONFIG_MFD_AC100=m
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=m
CONFIG_MFD_CROS_EC_DEV=y
# CONFIG_MFD_MADERA is not set
# CONFIG_PMIC_DA903X is not set
@@ -5206,7 +5114,6 @@ CONFIG_MFD_SM501=m
CONFIG_MFD_SM501_GPIO=y
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_STMPE is not set
CONFIG_MFD_SUN6I_PRCM=y
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
@@ -5399,7 +5306,6 @@ CONFIG_IR_SERIAL=m
CONFIG_IR_SERIAL_TRANSMITTER=y
CONFIG_IR_SPI=m
CONFIG_IR_STREAMZAP=m
CONFIG_IR_SUNXI=m
CONFIG_IR_TOY=m
CONFIG_IR_TTUSBIR=m
CONFIG_RC_ATI_REMOTE=m
@@ -5418,7 +5324,6 @@ CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_CEC_CH7322=m
CONFIG_CEC_CROS_EC=m
CONFIG_CEC_GPIO=m
CONFIG_CEC_TEGRA=m
CONFIG_USB_PULSE8_CEC=m
CONFIG_USB_RAINSHADOW_CEC=m
# end of CEC support
@@ -5791,7 +5696,6 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
#
# NVidia media platform drivers
#
# CONFIG_VIDEO_TEGRA_VDE is not set
#
# NXP media platform drivers
@@ -5822,12 +5726,6 @@ CONFIG_VIDEO_ROCKCHIP_ISP1=m
#
# Sunxi media platform drivers
#
# CONFIG_VIDEO_SUN4I_CSI is not set
CONFIG_VIDEO_SUN6I_CSI=m
CONFIG_VIDEO_SUN6I_MIPI_CSI2=m
CONFIG_VIDEO_SUN8I_A83T_MIPI_CSI2=m
# CONFIG_VIDEO_SUN8I_DEINTERLACE is not set
# CONFIG_VIDEO_SUN8I_ROTATE is not set
#
# Texas Instruments drivers
@@ -5838,7 +5736,6 @@ CONFIG_VIDEO_SUN8I_A83T_MIPI_CSI2=m
#
CONFIG_VIDEO_HANTRO=m
CONFIG_VIDEO_HANTRO_ROCKCHIP=y
CONFIG_VIDEO_HANTRO_SUNXI=y
#
# VIA media platform drivers
@@ -6318,9 +6215,6 @@ CONFIG_DVB_DUMMY_FE=m
#
CONFIG_APERTURE_HELPERS=y
CONFIG_VIDEO_NOMODESET=y
CONFIG_TEGRA_HOST1X_CONTEXT_BUS=y
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_DRM=m
CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y
@@ -6382,16 +6276,8 @@ CONFIG_DRM_VMWGFX=m
CONFIG_DRM_UDL=m
CONFIG_DRM_AST=m
CONFIG_DRM_MGAG200=m
CONFIG_DRM_SUN4I=m
CONFIG_DRM_SUN6I_DSI=m
CONFIG_DRM_SUN8I_DW_HDMI=m
CONFIG_DRM_SUN8I_MIXER=m
CONFIG_DRM_SUN8I_TCON_TOP=m
CONFIG_DRM_QXL=m
CONFIG_DRM_VIRTIO_GPU=m
CONFIG_DRM_TEGRA=m
# CONFIG_DRM_TEGRA_DEBUG is not set
CONFIG_DRM_TEGRA_STAGING=y
CONFIG_DRM_PANEL=y
#
@@ -6814,7 +6700,6 @@ CONFIG_SND_YMFPCI=m
CONFIG_SND_HDA=m
CONFIG_SND_HDA_GENERIC_LEDS=y
CONFIG_SND_HDA_INTEL=m
CONFIG_SND_HDA_TEGRA=m
CONFIG_SND_HDA_HWDEP=y
CONFIG_SND_HDA_RECONFIG=y
CONFIG_SND_HDA_INPUT_BEEP=y
@@ -6845,7 +6730,6 @@ CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM=y
CONFIG_SND_HDA_CORE=m
CONFIG_SND_HDA_DSP_LOADER=y
CONFIG_SND_HDA_ALIGNED_MMIO=y
CONFIG_SND_HDA_EXT_CORE=m
CONFIG_SND_HDA_PREALLOC_SIZE=64
CONFIG_SND_INTEL_NHLT=y
@@ -6937,49 +6821,6 @@ CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y
#
# end of STMicroelectronics STM32 SOC audio support
#
# Allwinner SoC Audio support
#
CONFIG_SND_SUN4I_CODEC=m
CONFIG_SND_SUN8I_CODEC=m
CONFIG_SND_SUN8I_CODEC_ANALOG=m
CONFIG_SND_SUN50I_CODEC_ANALOG=m
CONFIG_SND_SUN4I_I2S=m
CONFIG_SND_SUN4I_SPDIF=m
CONFIG_SND_SUN50I_DMIC=m
CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m
# end of Allwinner SoC Audio support
CONFIG_SND_SOC_TEGRA=m
CONFIG_SND_SOC_TEGRA20_AC97=m
CONFIG_SND_SOC_TEGRA20_DAS=m
# CONFIG_SND_SOC_TEGRA20_I2S is not set
# CONFIG_SND_SOC_TEGRA20_SPDIF is not set
# CONFIG_SND_SOC_TEGRA30_AHUB is not set
# CONFIG_SND_SOC_TEGRA30_I2S is not set
CONFIG_SND_SOC_TEGRA210_AHUB=m
CONFIG_SND_SOC_TEGRA210_DMIC=m
CONFIG_SND_SOC_TEGRA210_I2S=m
CONFIG_SND_SOC_TEGRA210_OPE=m
CONFIG_SND_SOC_TEGRA186_ASRC=m
# CONFIG_SND_SOC_TEGRA186_DSPK is not set
CONFIG_SND_SOC_TEGRA210_ADMAIF=m
CONFIG_SND_SOC_TEGRA210_MVC=m
CONFIG_SND_SOC_TEGRA210_SFC=m
CONFIG_SND_SOC_TEGRA210_AMX=m
CONFIG_SND_SOC_TEGRA210_ADX=m
CONFIG_SND_SOC_TEGRA210_MIXER=m
CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m
CONFIG_SND_SOC_TEGRA_MACHINE_DRV=m
CONFIG_SND_SOC_TEGRA_RT5640=m
CONFIG_SND_SOC_TEGRA_WM8753=m
CONFIG_SND_SOC_TEGRA_WM8903=m
CONFIG_SND_SOC_TEGRA_WM9712=m
CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
CONFIG_SND_SOC_TEGRA_ALC5632=m
CONFIG_SND_SOC_TEGRA_MAX98090=m
CONFIG_SND_SOC_TEGRA_RT5677=m
CONFIG_SND_SOC_TEGRA_SGTL5000=m
CONFIG_SND_SOC_XILINX_I2S=m
CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m
CONFIG_SND_SOC_XILINX_SPDIF=m
@@ -7014,7 +6855,6 @@ CONFIG_SND_SOC_AK4642=m
CONFIG_SND_SOC_AK5386=m
CONFIG_SND_SOC_AK5558=m
CONFIG_SND_SOC_ALC5623=m
CONFIG_SND_SOC_ALC5632=m
# CONFIG_SND_SOC_AW8738 is not set
# CONFIG_SND_SOC_AW88395 is not set
CONFIG_SND_SOC_BD28623=m
@@ -7113,8 +6953,6 @@ CONFIG_SND_SOC_RT5631=m
CONFIG_SND_SOC_RT5640=m
CONFIG_SND_SOC_RT5645=m
CONFIG_SND_SOC_RT5659=m
CONFIG_SND_SOC_RT5677=m
CONFIG_SND_SOC_RT5677_SPI=m
CONFIG_SND_SOC_RT5682=m
CONFIG_SND_SOC_RT5682_I2C=m
CONFIG_SND_SOC_RT9120=m
@@ -7194,7 +7032,6 @@ CONFIG_SND_SOC_WM8962=m
CONFIG_SND_SOC_WM8974=m
CONFIG_SND_SOC_WM8978=m
CONFIG_SND_SOC_WM8985=m
CONFIG_SND_SOC_WM9712=m
CONFIG_SND_SOC_ZL38060=m
CONFIG_SND_SOC_MAX9759=m
CONFIG_SND_SOC_MT6351=m
@@ -7414,13 +7251,11 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
# CONFIG_USB_XHCI_PCI_RENESAS is not set
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_XHCI_TEGRA=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_EHCI_FSL=m
CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OXU210HP_HCD=m
CONFIG_USB_ISP116X_HCD=m
@@ -7503,7 +7338,6 @@ CONFIG_USB_MUSB_DUAL_ROLE=y
#
# Platform Glue Layer
#
CONFIG_USB_MUSB_SUNXI=m
#
# MUSB DMA mode
@@ -7650,7 +7484,6 @@ CONFIG_USB_XUSBATM=m
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_ISP1301=m
CONFIG_USB_TEGRA_PHY=y
CONFIG_USB_ULPI=y
CONFIG_USB_ULPI_VIEWPORT=y
# end of USB Physical Layer drivers
@@ -7683,7 +7516,6 @@ CONFIG_USB_GOKU=m
CONFIG_USB_EG20T=m
CONFIG_USB_GADGET_XILINX=m
CONFIG_USB_MAX3420_UDC=m
CONFIG_USB_TEGRA_XUDC=m
CONFIG_USB_DUMMY_HCD=m
# end of USB Peripheral Controller
@@ -7825,7 +7657,6 @@ CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_OF_AT91=m
CONFIG_MMC_SDHCI_OF_DWCMSHC=m
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_MMC_SDHCI_TEGRA=y
CONFIG_MMC_SDHCI_F_SDH30=y
CONFIG_MMC_SDHCI_MILBEAUT=m
CONFIG_MMC_ALCOR=m
@@ -7846,7 +7677,6 @@ CONFIG_MMC_USHC=m
CONFIG_MMC_USDHI6ROL0=m
CONFIG_MMC_REALTEK_PCI=m
CONFIG_MMC_REALTEK_USB=m
CONFIG_MMC_SUNXI=m
CONFIG_MMC_CQHCI=y
CONFIG_MMC_HSQ=m
# CONFIG_MMC_TOSHIBA_PCI is not set
@@ -7996,7 +7826,6 @@ CONFIG_RTC_INTF_DEV_UIE_EMUL=y
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABEOZ9 is not set
# CONFIG_RTC_DRV_ABX80X is not set
CONFIG_RTC_DRV_AC100=m
CONFIG_RTC_DRV_AS3722=m
CONFIG_RTC_DRV_DS1307=y
# CONFIG_RTC_DRV_DS1307_CENTURY is not set
@@ -8091,10 +7920,8 @@ CONFIG_RTC_DRV_NTXEC=m
#
CONFIG_RTC_DRV_PL030=m
CONFIG_RTC_DRV_PL031=y
CONFIG_RTC_DRV_SUN6I=y
CONFIG_RTC_DRV_CADENCE=m
# CONFIG_RTC_DRV_FTRTC010 is not set
CONFIG_RTC_DRV_TEGRA=y
# CONFIG_RTC_DRV_R7301 is not set
#
@@ -8116,7 +7943,6 @@ CONFIG_DMA_OF=y
CONFIG_ALTERA_MSGDMA=m
# CONFIG_AMBA_PL08X is not set
CONFIG_BCM_SBA_RAID=m
CONFIG_DMA_SUN6I=m
CONFIG_DW_AXI_DMAC=m
CONFIG_FSL_EDMA=y
CONFIG_FSL_QDMA=m
@@ -8124,9 +7950,6 @@ CONFIG_FSL_QDMA=m
CONFIG_MV_XOR_V2=y
CONFIG_PL330_DMA=y
CONFIG_PLX_DMA=m
CONFIG_TEGRA186_GPC_DMA=m
CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA210_ADMA=m
# CONFIG_XILINX_DMA is not set
# CONFIG_XILINX_XDMA is not set
# CONFIG_XILINX_ZYNQMP_DMA is not set
@@ -8289,16 +8112,10 @@ CONFIG_AD9834=m
# end of IIO staging drivers
CONFIG_FB_SM750=m
# CONFIG_MFD_NVEC is not set
CONFIG_STAGING_MEDIA=y
# CONFIG_DVB_AV7110 is not set
# CONFIG_VIDEO_MAX96712 is not set
CONFIG_VIDEO_ROCKCHIP_VDEC=m
CONFIG_VIDEO_SUNXI=y
CONFIG_VIDEO_SUNXI_CEDRUS=m
# CONFIG_VIDEO_SUN6I_ISP is not set
CONFIG_VIDEO_TEGRA=m
CONFIG_VIDEO_TEGRA_TPG=y
# CONFIG_STAGING_MEDIA_DEPRECATED is not set
# CONFIG_STAGING_BOARD is not set
# CONFIG_LTE_GDM724X is not set
@@ -8417,23 +8234,9 @@ CONFIG_CLK_RK3368=y
CONFIG_CLK_RK3399=y
CONFIG_CLK_RK3568=y
CONFIG_CLK_RK3588=y
CONFIG_SUNXI_CCU=y
CONFIG_SUN50I_A64_CCU=y
CONFIG_SUN50I_A100_CCU=y
CONFIG_SUN50I_A100_R_CCU=y
CONFIG_SUN50I_H6_CCU=y
CONFIG_SUN50I_H616_CCU=y
CONFIG_SUN50I_H6_R_CCU=y
CONFIG_SUN6I_RTC_CCU=y
CONFIG_SUN8I_H3_CCU=y
CONFIG_SUN8I_DE2_CCU=y
CONFIG_SUN8I_R_CCU=y
CONFIG_CLK_TEGRA_BPMP=y
CONFIG_TEGRA_CLK_DFLL=y
CONFIG_XILINX_VCU=m
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_SUN6I=y
#
# Clock Source drivers
@@ -8443,16 +8246,12 @@ CONFIG_TIMER_ACPI=y
CONFIG_TIMER_PROBE=y
CONFIG_CLKSRC_MMIO=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_SUN4I_TIMER=y
CONFIG_TEGRA_TIMER=y
# CONFIG_TEGRA186_TIMER is not set
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_HISILICON_ERRATUM_161010101=y
CONFIG_ARM64_ERRATUM_858921=y
CONFIG_SUN50I_ERRATUM_UNKNOWN1=y
# end of Clock Source drivers
CONFIG_MAILBOX=y
@@ -8464,8 +8263,6 @@ CONFIG_ROCKCHIP_MBOX=y
CONFIG_PCC=y
# CONFIG_ALTERA_MBOX is not set
# CONFIG_MAILBOX_TEST is not set
CONFIG_TEGRA_HSP_MBOX=y
CONFIG_SUN6I_MSGBOX=y
CONFIG_IOMMU_IOVA=y
CONFIG_IOASID=y
CONFIG_IOMMU_API=y
@@ -8491,8 +8288,6 @@ CONFIG_IOMMU_DMA=y
CONFIG_IOMMU_SVA=y
# CONFIG_IOMMUFD is not set
CONFIG_ROCKCHIP_IOMMU=y
# CONFIG_SUN50I_IOMMU is not set
# CONFIG_TEGRA_IOMMU_SMMU is not set
CONFIG_ARM_SMMU=y
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y
@@ -8573,19 +8368,6 @@ CONFIG_QCOM_QMI_HELPERS=m
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_SUNXI_MBUS=y
CONFIG_SUNXI_SRAM=y
# CONFIG_SUN20I_PPU is not set
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA_186_SOC=y
CONFIG_ARCH_TEGRA_194_SOC=y
# CONFIG_ARCH_TEGRA_234_SOC is not set
CONFIG_SOC_TEGRA_FUSE=y
CONFIG_SOC_TEGRA_FLOWCTRL=y
CONFIG_SOC_TEGRA_PMC=y
CONFIG_SOC_TEGRA_POWERGATE_BPMP=y
CONFIG_SOC_TEGRA_CBB=m
CONFIG_SOC_TI=y
#
@@ -8608,9 +8390,7 @@ CONFIG_DEVFREQ_GOV_PASSIVE=m
#
# DEVFREQ Drivers
#
CONFIG_ARM_TEGRA_DEVFREQ=y
CONFIG_ARM_RK3399_DMC_DEVFREQ=y
# CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ is not set
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
CONFIG_EXTCON=y
@@ -8630,8 +8410,6 @@ CONFIG_EXTCON_USB_GPIO=y
CONFIG_EXTCON_USBC_TUSB320=m
CONFIG_MEMORY=y
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_TEGRA_MC=y
# CONFIG_TEGRA210_EMC is not set
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_BUFFER_CB=m
@@ -8770,7 +8548,6 @@ CONFIG_RN5T618_ADC=m
CONFIG_ROCKCHIP_SARADC=y
CONFIG_RICHTEK_RTQ6056=m
# CONFIG_SD_ADC_MODULATOR is not set
CONFIG_SUN4I_GPADC=m
CONFIG_TI_ADC081C=m
CONFIG_TI_ADC0832=m
CONFIG_TI_ADC084S021=m
@@ -9254,8 +9031,6 @@ CONFIG_PWM_DWC=m
CONFIG_PWM_NTXEC=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
CONFIG_PWM_SUN4I=m
CONFIG_PWM_TEGRA=y
CONFIG_PWM_XILINX=m
#
@@ -9263,15 +9038,12 @@ CONFIG_PWM_XILINX=m
#
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_PM=y
CONFIG_ARM_GIC_MAX_NR=1
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
# CONFIG_AL_FIC is not set
CONFIG_SUN6I_R_INTC=y
CONFIG_SUNXI_NMI_INTC=y
# CONFIG_XILINX_INTC is not set
CONFIG_PARTITION_PERCPU=y
# end of IRQ chip support
@@ -9281,10 +9053,8 @@ CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_SCMI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RESET_SUNXI=y
# CONFIG_RESET_TI_SYSCON is not set
CONFIG_RESET_TI_TPS380X=m
CONFIG_RESET_TEGRA_BPMP=y
#
# PHY Subsystem
@@ -9293,10 +9063,6 @@ CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PHY_MIPI_DPHY=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_CAN_TRANSCEIVER=m
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_SUN6I_MIPI_DPHY=m
CONFIG_PHY_SUN9I_USB=m
CONFIG_PHY_SUN50I_USB3=m
#
# PHY drivers for Broadcom platforms
@@ -9330,8 +9096,6 @@ CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_PHY_SAMSUNG_USB2=y
CONFIG_PHY_TEGRA_XUSB=y
CONFIG_PHY_TEGRA194_P2U=m
# CONFIG_PHY_TUSB1210 is not set
# end of PHY Subsystem
@@ -9379,7 +9143,6 @@ CONFIG_NVMEM_RMEM=m
CONFIG_NVMEM_ROCKCHIP_EFUSE=m
CONFIG_NVMEM_ROCKCHIP_OTP=m
CONFIG_NVMEM_SPMI_SDAM=m
CONFIG_NVMEM_SUNXI_SID=m
CONFIG_NVMEM_U_BOOT_ENV=m
#
@@ -10152,19 +9915,6 @@ CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
# end of Accelerated Cryptographic Algorithms for CPU (arm64)
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_DEV_ALLWINNER=y
CONFIG_CRYPTO_DEV_SUN4I_SS=m
# CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG is not set
# CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG is not set
CONFIG_CRYPTO_DEV_SUN8I_CE=m
# CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set
# CONFIG_CRYPTO_DEV_SUN8I_CE_HASH is not set
# CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG is not set
# CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG is not set
CONFIG_CRYPTO_DEV_SUN8I_SS=m
# CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG is not set
# CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG is not set
# CONFIG_CRYPTO_DEV_SUN8I_SS_HASH is not set
CONFIG_CRYPTO_DEV_ATMEL_I2C=m
CONFIG_CRYPTO_DEV_ATMEL_ECC=m
CONFIG_CRYPTO_DEV_ATMEL_SHA204A=m

22
config/kernel/linux-sunxi-current.config
View File

@@ -1,8 +1,8 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 6.1.28 Kernel Configuration
# Linux/arm 6.1.30 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.3.0-1ubuntu1~22.04.1) 11.3.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=110300
CONFIG_CLANG_VERSION=0
@@ -2357,13 +2357,13 @@ CONFIG_NET_VENDOR_SOLARFLARE=y
# CONFIG_NET_VENDOR_SMSC is not set
CONFIG_NET_VENDOR_SOCIONEXT=y
CONFIG_NET_VENDOR_STMICRO=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_ETH=m
# CONFIG_STMMAC_SELFTESTS is not set
CONFIG_STMMAC_PLATFORM=y
CONFIG_STMMAC_PLATFORM=m
CONFIG_DWMAC_DWC_QOS_ETH=m
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_SUNXI=y
CONFIG_DWMAC_SUN8I=y
CONFIG_DWMAC_GENERIC=m
CONFIG_DWMAC_SUNXI=m
CONFIG_DWMAC_SUN8I=m
# CONFIG_DWMAC_INTEL_PLAT is not set
CONFIG_NET_VENDOR_SYNOPSYS=y
# CONFIG_DWC_XLGMAC is not set
@@ -2375,7 +2375,7 @@ CONFIG_NET_VENDOR_XILINX=y
# CONFIG_XILINX_EMACLITE is not set
# CONFIG_XILINX_AXI_EMAC is not set
# CONFIG_XILINX_LL_TEMAC is not set
CONFIG_PHYLINK=y
CONFIG_PHYLINK=m
CONFIG_PHYLIB=y
CONFIG_SWPHY=y
CONFIG_LED_TRIGGER_PHY=y
@@ -2504,7 +2504,7 @@ CONFIG_MDIO_GPIO=m
#
# MDIO Multiplexers
#
CONFIG_MDIO_BUS_MUX=y
CONFIG_MDIO_BUS_MUX=m
# CONFIG_MDIO_BUS_MUX_GPIO is not set
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
@@ -2512,7 +2512,7 @@ CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
#
# PCS device drivers
#
CONFIG_PCS_XPCS=y
CONFIG_PCS_XPCS=m
# end of PCS device drivers
CONFIG_PLIP=m
@@ -2719,7 +2719,6 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WLCORE is not set
CONFIG_RTL8723DU=m
CONFIG_RTL8723DS=m
CONFIG_RTL8822CS=m
CONFIG_RTL8822BU=m
CONFIG_RTL8821CU=m
CONFIG_88XXAU=m
@@ -8417,3 +8416,4 @@ CONFIG_ARCH_USE_MEMTEST=y
#
# end of Rust hacking
# end of Kernel hacking
# CONFIG_DEBUG_INFO is not set

4
config/kernel/linux-sunxi-legacy.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.15.111 Kernel Configuration
# Linux/arm 5.15.113 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
CONFIG_CC_IS_GCC=y
@@ -2726,7 +2726,6 @@ CONFIG_RTLWIFI_USB=m
CONFIG_RTL8192C_COMMON=m
CONFIG_RTL8XXXU=m
# CONFIG_RTL8XXXU_UNTESTED is not set
CONFIG_RTL8723CS=m
CONFIG_RTW88=m
CONFIG_WLAN_VENDOR_RSI=y
# CONFIG_RSI_91X is not set
@@ -6286,6 +6285,7 @@ CONFIG_HMS_ANYBUSS_BUS=m
CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m
CONFIG_WFX=m
CONFIG_RTL8723CS=m
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set

6
config/kernel/linux-sunxi64-legacy.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.15.111 Kernel Configuration
# Linux/arm64 5.15.113 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
CONFIG_CC_IS_GCC=y
@@ -2729,7 +2729,6 @@ CONFIG_RTLWIFI_USB=m
CONFIG_RTL8192C_COMMON=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
CONFIG_RTL8723CS=m
CONFIG_RTW88=m
# CONFIG_WLAN_VENDOR_RSI is not set
# CONFIG_WLAN_VENDOR_ST is not set
@@ -3372,7 +3371,6 @@ CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_CDEV_V1=y
CONFIG_GPIO_GENERIC=y
@@ -4835,7 +4833,6 @@ CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_UVESA is not set
# CONFIG_FB_OPENCORES is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_SUN5I_EINK is not set
# CONFIG_FB_SMSCUFX is not set
# CONFIG_FB_UDL is not set
# CONFIG_FB_IBM_GXT4500 is not set
@@ -6135,6 +6132,7 @@ CONFIG_MOST_COMPONENTS=m
CONFIG_XIL_AXIS_FIFO=m
# CONFIG_FIELDBUS_DEV is not set
CONFIG_WFX=m
CONFIG_RTL8723CS=m
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set

1
config/sources/families/include/rockchip64_common.inc
View File

@@ -197,6 +197,7 @@ prepare_boot_configuration() {
fi
fi
}
uboot_custom_postprocess() {

1
lib/functions/artifacts/artifact-uboot.sh
View File

@@ -63,6 +63,7 @@ function artifact_uboot_prepare_version() {
declare -a extension_hooks_to_hash=(
"post_uboot_custom_postprocess" "fetch_custom_uboot" "build_custom_uboot"
"pre_config_uboot_target" "post_uboot_custom_postprocess" "post_uboot_custom_postprocess"
"post_config_uboot_target"
)
declare -a extension_hooks_hashed=("$(dump_extension_method_sources_functions "${extension_hooks_to_hash[@]}")")
declare hash_hooks="undetermined"

1
lib/functions/compilation/patch/drivers-harness.sh
View File

@@ -81,6 +81,7 @@ function kernel_drivers_prepare_harness() {
driver_rtl8811CU_rtl8821C
driver_rtl8188EU_rtl8188ETV
driver_rtl88x2bu
driver_rtw88
driver_rtl88x2cs
driver_rtl8822cs_bt
driver_rtl8723DS

21
lib/functions/compilation/patch/drivers_network.sh
View File

@@ -387,11 +387,20 @@ driver_rtl88x2bu() {
}
driver_rtw88() {
# Upstream wireless RTW88 drivers
if [[ "$version" == "6.1" || "$version" == "6.2" || "$version" == "6.3" ]] && [ $EXTRAWIFI == yes ]; then
display_alert "Adding" "Upstream wireless RTW88 drivers" "info"
process_patch_file "${SRC}/patch/misc/rtw88/${version}/001-rtw88-linux-next.patch" "applying"
process_patch_file "${SRC}/patch/misc/rtw88/${version}/002-rtw88-linux-next.patch" "applying"
fi
}
driver_rtl88x2cs() {
# Wireless drivers for Realtek 88x2cs chipsets
if linux-version compare "${version}" ge 5.9 && [ "$EXTRAWIFI" == yes ]; then
if linux-version compare "${version}" ge 5.9 && [ "$EXTRAWIFI" == no ]; then
# attach to specifics tag or branch
local rtl88x2csver="branch:tune_for_jethub"
@@ -610,8 +619,13 @@ driver_rtl8723cs() {
# Realtek rtl8723cs wireless support.
# Driver has been borrowed from sunxi 6.1 megous patch archive.
# Applies only from linux 6.1 onwards, so older kernel archives does not require to be altered
# It was disabled from bcm2711 as that kernel is not fully in sync with mainline and as its probably not needed there anyway
if linux-version compare "${version}" ge 6.1 && [[ "$LINUXFAMILY" != bcm2711 ]] && [[ "$LINUXFAMILY" != d1 ]]; then
# It was disabled from d1/bcm2711 as that kernel is not fully in sync with mainline and as its probably not needed there anyway
if [[ "$LINUXFAMILY" == bcm2711 || "$LINUXFAMILY" == d1 ]]; then
return 0
fi
if linux-version compare "${version}" ge 6.1; then
process_patch_file "${SRC}/patch/misc/wireless-rtl8723cs/8723cs-Add-a-new-driver-v5.12.2-7-g2de5ec386.20201013_beta.patch" "applying"
process_patch_file "${SRC}/patch/misc/wireless-rtl8723cs/8723cs-Make-the-driver-compile-and-probe-drop-rockchip-platform.patch" "applying"
process_patch_file "${SRC}/patch/misc/wireless-rtl8723cs/8723cs-Enable-OOB-interrupt.patch" "applying"
@@ -672,6 +686,7 @@ patch_drivers_network() {
driver_rtl8811CU_rtl8821C
driver_rtl8188EU_rtl8188ETV
driver_rtl88x2bu
driver_rtw88
driver_rtl88x2cs
driver_rtl8822cs_bt
driver_rtl8723DS

7
lib/functions/compilation/uboot.sh
View File

@@ -147,6 +147,13 @@ function compile_uboot_target() {
fi
# Hook time, for extra post-processing
call_extension_method "post_config_uboot_target" <<- 'POST_CONFIG_UBOOT_TARGET'
*allow extensions prepare after configuring but before compiling an u-boot target*
Some u-boot targets require extra configuration or pre-processing before compiling.
Last chance to change .config for u-boot before compiling.
POST_CONFIG_UBOOT_TARGET
if [[ "${UBOOT_CONFIGURE:-"no"}" == "yes" ]]; then
display_alert "Configuring u-boot" "UBOOT_CONFIGURE=yes; experimental" "warn"
run_host_command_dialog make menuconfig

4
lib/functions/host/prepare-host.sh
View File

@@ -377,6 +377,10 @@ function install_host_dependencies() {
function check_host_has_enough_disk_space() {
declare -a dirs_to_check=("${DEST}" "${SRC}/cache")
for dir in "${dirs_to_check[@]}"; do
if [[ ! -d "${dir}" ]]; then
display_alert "Directory not found" "Skipping disk space check for '${dir}'" "debug"
continue
fi
check_dir_has_enough_disk_space "${dir}" 10 || exit_if_countdown_not_aborted 10 "Low free disk space left in '${dir}'"
done
}

3
lib/functions/main/rootfs-image.sh
View File

@@ -39,6 +39,9 @@ function build_rootfs_and_image() {
# NOTE: installing too many packages may fill tmpfs mount
LOG_SECTION="customize_image" do_with_logging customize_image
# Deploy the full apt lists, including the Armbian repo.
create_sources_list_and_deploy_repo_key "image-late" "${RELEASE}" "${SDCARD}/"
# remove packages that are no longer needed. rootfs cache + uninstall might have leftovers.
LOG_SECTION="apt_purge_unneeded_packages_and_clean_apt_caches" do_with_logging apt_purge_unneeded_packages_and_clean_apt_caches

4
lib/functions/rootfs/create-cache.sh
View File

@@ -125,8 +125,8 @@ function extract_rootfs_artifact() {
run_host_command_logged echo "nameserver ${NAMESERVER}" ">" "${SDCARD}"/etc/resolv.conf
# all sources etc.
# armbian repo is fully included, inclusive the components that have debs produced by armbian/build.
create_sources_list_and_deploy_repo_key "image" "${RELEASE}" "${SDCARD}/"
# armbian repo is NOT yet included here, since we'll be building the image, and don't want the repo interferring.
create_sources_list_and_deploy_repo_key "image-early" "${RELEASE}" "${SDCARD}/"
return 0
}

4
lib/functions/rootfs/distro-agnostic.sh
View File

@@ -442,7 +442,9 @@ function install_distribution_agnostic() {
run_host_command_logged cp -v "${SRC}"/packages/bsp/armbian_first_run.txt.template "${SDCARD}"/boot/armbian_first_run.txt.template
# switch to beta repository at this stage if building nightly images
[[ $IMAGE_TYPE == nightly ]] && sed -i 's/apt/beta/' "${SDCARD}"/etc/apt/sources.list.d/armbian.list
if [[ $IMAGE_TYPE == nightly && -f "${SDCARD}"/etc/apt/sources.list.d/armbian.list ]]; then
sed -i 's/apt/beta/' "${SDCARD}"/etc/apt/sources.list.d/armbian.list
fi
# fix for https://bugs.launchpad.net/ubuntu/+source/blueman/+bug/1542723 @TODO: from ubuntu 15. maybe gone?
chroot_sdcard chown root:messagebus /usr/lib/dbus-1.0/dbus-daemon-launch-helper

10
lib/functions/rootfs/distro-specific.sh
View File

@@ -196,7 +196,7 @@ function create_sources_list_and_deploy_repo_key() {
fi
declare -a components=()
if [[ "${when}" == "image" ]]; then # only include the 'main' component when deploying to image
if [[ "${when}" == "image"* ]]; then # only include the 'main' component when deploying to image (early or late)
components+=("main")
fi
components+=("${RELEASE}-utils") # utils contains packages Igor picks from other repos
@@ -214,9 +214,9 @@ function create_sources_list_and_deploy_repo_key() {
# replace local package server if defined. Suitable for development
[[ -n $LOCAL_MIRROR ]] && echo "deb ${SIGNED_BY}http://$LOCAL_MIRROR $RELEASE ${components[*]}" > "${basedir}"/etc/apt/sources.list.d/armbian.list
# disable repo if SKIP_ARMBIAN_REPO=yes
if [[ "${SKIP_ARMBIAN_REPO}" == "yes" ]]; then
display_alert "Disabling Armbian repo due to SKIP_ARMBIAN_REPO=yes" "${ARCH}-${RELEASE}" "info"
# disable repo if SKIP_ARMBIAN_REPO==yes, or if when==image-early.
if [[ "${when}" == "image-early" || "${SKIP_ARMBIAN_REPO}" == "yes" ]]; then
display_alert "Disabling Armbian repo" "${ARCH}-${RELEASE} :: skip:${SKIP_ARMBIAN_REPO:-"no"} when:${when}" "info"
mv "${SDCARD}"/etc/apt/sources.list.d/armbian.list "${SDCARD}"/etc/apt/sources.list.d/armbian.list.disabled
fi
@@ -230,6 +230,8 @@ function create_sources_list_and_deploy_repo_key() {
The global Armbian GPG key has been deployed to SDCARD's /usr/share/keyrings/armbian.gpg, de-armored.
You can implement this hook to add, remove, or modify sources.list.d entries, and/or deploy additional GPG keys.
Important: honor $CUSTOM_REPO_WHEN; if it's ==rootfs, don't add repos/components that carry the .debs produced by armbian/build.
Ideally, also don't add any possibly-conflicting repo if `$CUSTOM_REPO_WHEN==image-early`.
`$CUSTOM_APT_REPO==image-late` is passed during the very final stages of image building, after all packages were installed/upgraded.
CUSTOM_APT_REPO
unset CUSTOM_REPO_WHEN

13
lib/tools/info/repo-reprepro.py
View File

@@ -78,7 +78,6 @@ log.info(f"Wrote {reprepro_conf_distributions_fn}")
options: list[str] = []
options.append("verbose")
# options.append(f"basedir /armbian/output/repos/single-dir")
# create the reprerepo options file for the target
with open(reprepro_conf_options_fn, "w") as f:
@@ -89,13 +88,17 @@ log.info(f"Wrote {reprepro_conf_options_fn}")
# Prepare the reprepro-invoking bash script
bash_lines = [
"#!/bin/bash",
"set",
'ls -laR "${INCOMING_DEBS_DIR}"'
'mkdir -p "${REPO_CONF_LOCATION}"',
'cp -rv "${REPREPRO_INFO_DIR}/conf"/* "${REPO_CONF_LOCATION}"/',
# run clearvanished
'echo "reprepro clearvanished..."',
'reprepro -b "${REPO_LOCATION}" --delete clearvanished || echo "clearvanished failed"',
# run reprepro check
'echo "reprepro initial check..."',
'reprepro -b "${REPO_LOCATION}" check || echo "initial check failed"'
]
# Copy the config files to the repo dir (from REPREPRO_INFO_DIR/conf to REPO_CONF_LOCATION script-side)
bash_lines.append('mkdir -p "${REPO_CONF_LOCATION}"')
bash_lines.append('cp -rv "${REPREPRO_INFO_DIR}/conf"/* "${REPO_CONF_LOCATION}"/')
for one_repo_target in repo_targets:
artifacts = repo_targets[one_repo_target]

24
patch/kernel/archive/meson64-6.1/add-board-bananapi-cm4-cm4io.patch
View File

@@ -83,12 +83,9 @@ index 97b42e2100e0..d4b315a05ef9 100644
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
new file mode 100644
index 000000000000..1b0c3881c6a1
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
@@ -0,0 +1,165 @@
--- /dev/null 2023-05-21 09:58:01.101444638 -0400
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts 2023-05-29 07:19:26.254573254 -0400
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
@@ -111,6 +108,12 @@ index 000000000000..1b0c3881c6a1
+ i2c1 = &i2c3;
+ };
+
+ reboot: meson64-reboot {
+ compatible = "meson64,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 2>;
@@ -141,14 +144,15 @@ index 000000000000..1b0c3881c6a1
+ led-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
@@ -631,8 +635,8 @@ index 000000000000..97e522921b06
+
+ bluetooth {
+ compatible = "realtek,rtl8822cs-bt";
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ //host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
+ };
+};

243
patch/kernel/archive/meson64-6.1/board-odroidc4-reset-driver.patch
View File

@@ -1,243 +0,0 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index 8c30ce636..ee8aa390e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -11,6 +11,16 @@ / {
compatible = "hardkernel,odroid-c4", "amlogic,sm1";
model = "Hardkernel ODROID-C4";
+ odroid-reboot {
+ compatible = "odroid,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+
+ sd-vqen = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
+ sd-vqsw = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+ sd-vmmc = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ };
+
leds {
compatible = "gpio-leds";
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 4b563db3a..14396a3fc 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -141,6 +141,13 @@ config POWER_RESET_OCELOT_RESET
help
This driver supports restart for Microsemi Ocelot SoC and similar.
+config POWER_RESET_ODROID
+ bool "odroid reboot/power-off driver"
+ depends on ARCH_MESON
+ help
+ This driver supports restart / power off board for amlogic
+ g12a/g12b/sm1 SoCs
+
config POWER_RESET_OXNAS
bool "OXNAS SoC restart driver"
depends on ARCH_OXNAS
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index f606a2f60..ce0149984 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
+obj-$(CONFIG_POWER_RESET_ODROID) += odroid-reboot.o
obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o
obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
diff --git a/drivers/power/reset/odroid-reboot.c b/drivers/power/reset/odroid-reboot.c
new file mode 100644
index 000000000..00fedd36b
--- /dev/null
+++ b/drivers/power/reset/odroid-reboot.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * drivers/power/reset/odroid-reboot.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2023 Ash Hughes (sehguh.hsa@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/reboot.h>
+
+#include <asm/system_misc.h>
+
+#include <asm/compiler.h>
+#include <linux/kdebug.h>
+#include <linux/arm-smccc.h>
+
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+
+int sd_vqsw;
+int sd_vmmc;
+int sd_vqen;
+
+static u32 psci_function_id_restart;
+static u32 psci_function_id_poweroff;
+
+#define CHECK_RET(ret) { \
+ if (ret) \
+ pr_err("[%s] gpio op failed(%d) at line %d\n",\
+ __func__, ret, __LINE__); \
+}
+
+static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
+ u64 arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc((unsigned long)function_id,
+ (unsigned long)arg0,
+ (unsigned long)arg1,
+ (unsigned long)arg2,
+ 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+void odroid_card_reset(void)
+{
+ int ret = 0;
+
+ if ((sd_vqsw == 0) && (sd_vmmc == 0))
+ return;
+
+ if (sd_vqen == 0) {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 1);
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 0);
+ CHECK_RET(ret);
+ ret = gpio_direction_output(sd_vmmc, 1);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ } else {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vqen,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(100);
+ ret = gpio_direction_input(sd_vqen);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vmmc);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vqsw);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+ gpio_free(sd_vqsw);
+ }
+}
+
+static int do_odroid_restart(struct notifier_block *this, unsigned long mode, void *cmd)
+{
+ odroid_card_reset();
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block odroid_restart_handler = {
+ .notifier_call = do_odroid_restart,
+ .priority = 130,
+};
+
+static void do_odroid_poweroff(void)
+{
+ odroid_card_reset();
+
+ __invoke_psci_fn_smc(0x82000042, 1, 0, 0);
+}
+
+static int odroid_restart_probe(struct platform_device *pdev)
+{
+ struct device_node *of_node;
+ u32 id;
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_reset", &id)) {
+ psci_function_id_restart = id;
+ register_restart_handler(&odroid_restart_handler);
+ }
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_poweroff", &id)) {
+ psci_function_id_poweroff = id;
+ pm_power_off = do_odroid_poweroff;
+ }
+
+ of_node = pdev->dev.of_node;
+
+ sd_vqsw = of_get_named_gpio(of_node, "sd-vqsw", 0);
+ if (!gpio_is_valid(sd_vqsw)) sd_vqsw = 0;
+
+ sd_vmmc = of_get_named_gpio(of_node, "sd-vmmc", 0);
+ if (!gpio_is_valid(sd_vmmc)) sd_vmmc = 0;
+
+ sd_vqen = of_get_named_gpio(of_node, "sd-vqen", 0);
+ if (!gpio_is_valid(sd_vqen)) sd_vqen = 0;
+
+ return 0;
+}
+
+static const struct of_device_id of_odroid_restart_match[] = {
+ { .compatible = "odroid,reboot", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_odroid_restart_match);
+
+static struct platform_driver odroid_restart_driver = {
+ .probe = odroid_restart_probe,
+ .driver = {
+ .name = "odroid-restart",
+ .of_match_table = of_match_ptr(of_odroid_restart_match),
+ },
+};
+
+static int __init odroid_restart_init(void)
+{
+ return platform_driver_register(&odroid_restart_driver);
+}
+device_initcall(odroid_restart_init);
+

21
patch/kernel/archive/meson64-6.1/board-odroidc4-reset.patch Normal file
View File

@@ -0,0 +1,21 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index 8c30ce636..ee8aa390e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -11,6 +11,16 @@ / {
compatible = "hardkernel,odroid-c4", "amlogic,sm1";
model = "Hardkernel ODROID-C4";
+ meson64-reboot {
+ compatible = "meson64,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+
+ sd-vqen = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
+ sd-vqsw = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+ sd-vmmc = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ };
+
leds {
compatible = "gpio-leds";

222
patch/kernel/archive/meson64-6.1/driver-power-meson64-reset.patch Normal file
View File

@@ -0,0 +1,222 @@
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 4b563db3a..14396a3fc 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -141,6 +141,13 @@ config POWER_RESET_OCELOT_RESET
help
This driver supports restart for Microsemi Ocelot SoC and similar.
+config POWER_RESET_MESON64
+ bool "Meson64 reboot/power-off driver"
+ depends on ARCH_MESON
+ help
+ The driver supports restart / power off for amlogic
+ g12a, g12b and sm1 SoCs
+
config POWER_RESET_OXNAS
bool "OXNAS SoC restart driver"
depends on ARCH_OXNAS
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index f606a2f60..ce0149984 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
+obj-$(CONFIG_POWER_RESET_MESON64) += meson64-reboot.o
obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o
obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
diff --git a/drivers/power/reset/meson64-reboot.c b/drivers/power/reset/meson64-reboot.c
new file mode 100644
index 000000000..00fedd36b
--- /dev/null
+++ b/drivers/power/reset/meson64-reboot.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * drivers/power/reset/meson64-reboot.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2023 Ash Hughes (sehguh.hsa@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/reboot.h>
+
+#include <asm/system_misc.h>
+
+#include <asm/compiler.h>
+#include <linux/kdebug.h>
+#include <linux/arm-smccc.h>
+
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+
+int sd_vqsw;
+int sd_vmmc;
+int sd_vqen;
+
+static u32 psci_function_id_restart;
+static u32 psci_function_id_poweroff;
+
+#define CHECK_RET(ret) { \
+ if (ret) \
+ pr_err("[%s] gpio op failed(%d) at line %d\n",\
+ __func__, ret, __LINE__); \
+}
+
+static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
+ u64 arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc((unsigned long)function_id,
+ (unsigned long)arg0,
+ (unsigned long)arg1,
+ (unsigned long)arg2,
+ 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+void meson64_card_reset(void)
+{
+ int ret = 0;
+
+ if ((sd_vqsw == 0) && (sd_vmmc == 0))
+ return;
+
+ if (sd_vqen == 0) {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 1);
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 0);
+ CHECK_RET(ret);
+ ret = gpio_direction_output(sd_vmmc, 1);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ } else {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vqen,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(100);
+ ret = gpio_direction_input(sd_vqen);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vmmc);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vqsw);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+ gpio_free(sd_vqsw);
+ }
+}
+
+static int do_meson64_restart(struct notifier_block *this, unsigned long mode, void *cmd)
+{
+ meson64_card_reset();
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block meson64_restart_handler = {
+ .notifier_call = do_meson64_restart,
+ .priority = 130,
+};
+
+static void do_meson64_poweroff(void)
+{
+ meson64_card_reset();
+
+ __invoke_psci_fn_smc(0x82000042, 1, 0, 0);
+}
+
+static int meson64_restart_probe(struct platform_device *pdev)
+{
+ struct device_node *of_node;
+ u32 id;
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_reset", &id)) {
+ psci_function_id_restart = id;
+ register_restart_handler(&meson64_restart_handler);
+ }
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_poweroff", &id)) {
+ psci_function_id_poweroff = id;
+ pm_power_off = do_meson64_poweroff;
+ }
+
+ of_node = pdev->dev.of_node;
+
+ sd_vqsw = of_get_named_gpio(of_node, "sd-vqsw", 0);
+ if (!gpio_is_valid(sd_vqsw)) sd_vqsw = 0;
+
+ sd_vmmc = of_get_named_gpio(of_node, "sd-vmmc", 0);
+ if (!gpio_is_valid(sd_vmmc)) sd_vmmc = 0;
+
+ sd_vqen = of_get_named_gpio(of_node, "sd-vqen", 0);
+ if (!gpio_is_valid(sd_vqen)) sd_vqen = 0;
+
+ return 0;
+}
+
+static const struct of_device_id of_meson64_restart_match[] = {
+ { .compatible = "meson64,reboot", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_meson64_restart_match);
+
+static struct platform_driver meson64_restart_driver = {
+ .probe = meson64_restart_probe,
+ .driver = {
+ .name = "meson64-restart",
+ .of_match_table = of_match_ptr(of_meson64_restart_match),
+ },
+};
+
+static int __init meson64_restart_init(void)
+{
+ return platform_driver_register(&meson64_restart_driver);
+}
+device_initcall(meson64_restart_init);
+

115
patch/kernel/archive/meson64-6.1/meson-uart-use-divide-XTAL-by-2-bit-on-G12A.patch Normal file
View File

@@ -0,0 +1,115 @@
diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 3cbdde85ed71..22656efe8ddc 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -34,6 +34,11 @@ properties:
- amlogic,meson-gx-uart
- amlogic,meson-s4-uart
- const: amlogic,meson-ao-uart
+ - description: Always-on power domain UART controller on G12A SoCs
+ items:
+ - const: amlogic,meson-g12a-uart
+ - const: amlogic,meson-gx-uart
+ - const: amlogic,meson-ao-uart
- description: Everything-Else power domain UART controller
enum:
- amlogic,meson6-uart
@@ -41,6 +46,10 @@ properties:
- amlogic,meson8b-uart
- amlogic,meson-gx-uart
- amlogic,meson-s4-uart
+ - description: Everything-Else power domain UART controller on G12A SoCs
+ items:
+ - const: amlogic,meson-g12a-uart
+ - const: amlogic,meson-gx-uart
reg:
maxItems: 1
--
2.39.2
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 74110017988a..2501db5a7aaf 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -779,7 +779,7 @@ static int meson_uart_remove(struct platform_device *pdev)
return 0;
}
-static struct meson_uart_data s4_uart_data = {
+static struct meson_uart_data meson_g12a_uart_data = {
.has_xtal_div2 = true,
};
@@ -788,9 +788,13 @@ static const struct of_device_id meson_uart_dt_match[] = {
{ .compatible = "amlogic,meson8-uart" },
{ .compatible = "amlogic,meson8b-uart" },
{ .compatible = "amlogic,meson-gx-uart" },
+ {
+ .compatible = "amlogic,meson-g12a-uart",
+ .data = (void *)&meson_g12a_uart_data,
+ },
{
.compatible = "amlogic,meson-s4-uart",
- .data = (void *)&s4_uart_data,
+ .data = (void *)&meson_g12a_uart_data,
},
{ /* sentinel */ },
};
--
2.39.2
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 123a56f7f818..904bcd4d2acf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -2046,7 +2046,8 @@ pwm_AO_cd: pwm@2000 {
};
uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart",
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x3000 0x0 0x18>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
@@ -2056,7 +2057,8 @@ uart_AO: serial@3000 {
};
uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart",
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x4000 0x0 0x18>;
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
@@ -2293,7 +2295,8 @@ clk_msr: clock-measure@18000 {
};
uart_C: serial@22000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x22000 0x0 0x18>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
@@ -2302,7 +2305,8 @@ uart_C: serial@22000 {
};
uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x23000 0x0 0x18>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
@@ -2311,7 +2315,8 @@ uart_B: serial@23000 {
};
uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x24000 0x0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
--
2.39.2

24
patch/kernel/archive/meson64-6.2/add-board-bananapi-cm4-cm4io.patch
View File

@@ -83,12 +83,9 @@ index 97b42e2100e0..d4b315a05ef9 100644
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
new file mode 100644
index 000000000000..1b0c3881c6a1
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
@@ -0,0 +1,165 @@
--- /dev/null 2023-05-21 09:58:01.101444638 -0400
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts 2023-05-29 07:19:26.254573254 -0400
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
@@ -111,6 +108,12 @@ index 000000000000..1b0c3881c6a1
+ i2c1 = &i2c3;
+ };
+
+ reboot: meson64-reboot {
+ compatible = "meson64,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 2>;
@@ -141,14 +144,15 @@ index 000000000000..1b0c3881c6a1
+ led-blue {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
@@ -631,8 +635,8 @@ index 000000000000..97e522921b06
+
+ bluetooth {
+ compatible = "realtek,rtl8822cs-bt";
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ //host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
+ };
+};

260
patch/kernel/archive/meson64-6.2/board-odroidc4-reset-driver.patch
View File

@@ -1,260 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ash Hughes <spirit.returned@gmail.com>
Date: Sat, 18 Feb 2023 07:46:38 -0300
Subject: adapted odroid-reboot driver, fix reboot on odroid C4 when using
UHS-II SD cards
bring back fixed version of `odroid-reboot` driver (Fix reboot on odroid C4 when using UHS-II SD cards)
---
arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts | 10 +
drivers/power/reset/Kconfig | 7 +
drivers/power/reset/Makefile | 1 +
drivers/power/reset/odroid-reboot.c | 186 ++++++++++
4 files changed, 204 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index 8c30ce63686e..ee8aa390ea56 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -11,6 +11,16 @@ / {
compatible = "hardkernel,odroid-c4", "amlogic,sm1";
model = "Hardkernel ODROID-C4";
+ odroid-reboot {
+ compatible = "odroid,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+
+ sd-vqen = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
+ sd-vqsw = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+ sd-vmmc = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ };
+
leds {
compatible = "gpio-leds";
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index a8c46ba5878f..f685772c8213 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -141,6 +141,13 @@ config POWER_RESET_OCELOT_RESET
help
This driver supports restart for Microsemi Ocelot SoC and similar.
+config POWER_RESET_ODROID
+ bool "odroid reboot/power-off driver"
+ depends on ARCH_MESON
+ help
+ This driver supports restart / power off board for amlogic
+ g12a/g12b/sm1 SoCs
+
config POWER_RESET_OXNAS
bool "OXNAS SoC restart driver"
depends on ARCH_OXNAS
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 0a39424fc558..b58a4f2891db 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
+obj-$(CONFIG_POWER_RESET_ODROID) += odroid-reboot.o
obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o
obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
diff --git a/drivers/power/reset/odroid-reboot.c b/drivers/power/reset/odroid-reboot.c
new file mode 100644
index 000000000000..0339718b4a80
--- /dev/null
+++ b/drivers/power/reset/odroid-reboot.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * drivers/power/reset/odroid-reboot.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2023 Ash Hughes (sehguh.hsa@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/reboot.h>
+
+#include <asm/system_misc.h>
+
+#include <asm/compiler.h>
+#include <linux/kdebug.h>
+#include <linux/arm-smccc.h>
+
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+
+int sd_vqsw;
+int sd_vmmc;
+int sd_vqen;
+
+static u32 psci_function_id_restart;
+static u32 psci_function_id_poweroff;
+
+#define CHECK_RET(ret) { \
+ if (ret) \
+ pr_err("[%s] gpio op failed(%d) at line %d\n",\
+ __func__, ret, __LINE__); \
+}
+
+static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
+ u64 arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc((unsigned long)function_id,
+ (unsigned long)arg0,
+ (unsigned long)arg1,
+ (unsigned long)arg2,
+ 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+void odroid_card_reset(void)
+{
+ int ret = 0;
+
+ if ((sd_vqsw == 0) && (sd_vmmc == 0))
+ return;
+
+ if (sd_vqen == 0) {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 1);
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 0);
+ CHECK_RET(ret);
+ ret = gpio_direction_output(sd_vmmc, 1);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ } else {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vqen,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(100);
+ ret = gpio_direction_input(sd_vqen);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vmmc);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vqsw);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+ gpio_free(sd_vqsw);
+ }
+}
+
+static int do_odroid_restart(struct notifier_block *this, unsigned long mode, void *cmd)
+{
+ odroid_card_reset();
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block odroid_restart_handler = {
+ .notifier_call = do_odroid_restart,
+ .priority = 130,
+};
+
+static void do_odroid_poweroff(void)
+{
+ odroid_card_reset();
+
+ __invoke_psci_fn_smc(0x82000042, 1, 0, 0);
+}
+
+static int odroid_restart_probe(struct platform_device *pdev)
+{
+ struct device_node *of_node;
+ u32 id;
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_reset", &id)) {
+ psci_function_id_restart = id;
+ register_restart_handler(&odroid_restart_handler);
+ }
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_poweroff", &id)) {
+ psci_function_id_poweroff = id;
+ pm_power_off = do_odroid_poweroff;
+ }
+
+ of_node = pdev->dev.of_node;
+
+ sd_vqsw = of_get_named_gpio(of_node, "sd-vqsw", 0);
+ if (!gpio_is_valid(sd_vqsw)) sd_vqsw = 0;
+
+ sd_vmmc = of_get_named_gpio(of_node, "sd-vmmc", 0);
+ if (!gpio_is_valid(sd_vmmc)) sd_vmmc = 0;
+
+ sd_vqen = of_get_named_gpio(of_node, "sd-vqen", 0);
+ if (!gpio_is_valid(sd_vqen)) sd_vqen = 0;
+
+ return 0;
+}
+
+static const struct of_device_id of_odroid_restart_match[] = {
+ { .compatible = "odroid,reboot", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_odroid_restart_match);
+
+static struct platform_driver odroid_restart_driver = {
+ .probe = odroid_restart_probe,
+ .driver = {
+ .name = "odroid-restart",
+ .of_match_table = of_match_ptr(of_odroid_restart_match),
+ },
+};
+
+static int __init odroid_restart_init(void)
+{
+ return platform_driver_register(&odroid_restart_driver);
+}
+device_initcall(odroid_restart_init);
+
--
Armbian

35
patch/kernel/archive/meson64-6.2/board-odroidc4-reset.patch Normal file
View File

@@ -0,0 +1,35 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ash Hughes <spirit.returned@gmail.com>
Date: Sat, 18 Feb 2023 07:46:38 -0300
Subject: adapted meson64-reboot driver, fix reboot on odroid C4 when using
UHS-II SD cards
bring back fixed version of `odroid-reboot` driver (Fix reboot on odroid C4 when using UHS-II SD cards)
---
arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts | 10 +
drivers/power/reset/Kconfig | 7 +
drivers/power/reset/Makefile | 1 +
drivers/power/reset/odroid-reboot.c | 186 ++++++++++
4 files changed, 204 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index 8c30ce63686e..ee8aa390ea56 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -11,6 +11,16 @@ / {
compatible = "hardkernel,odroid-c4", "amlogic,sm1";
model = "Hardkernel ODROID-C4";
+ meson64-reboot {
+ compatible = "meson64,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+
+ sd-vqen = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
+ sd-vqsw = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+ sd-vmmc = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ };
+
leds {
compatible = "gpio-leds";

222
patch/kernel/archive/meson64-6.2/driver-power-meson64-reset.patch Normal file
View File

@@ -0,0 +1,222 @@
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 4b563db3a..14396a3fc 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -141,6 +141,13 @@ config POWER_RESET_OCELOT_RESET
help
This driver supports restart for Microsemi Ocelot SoC and similar.
+config POWER_RESET_MESON64
+ bool "Meson64 reboot/power-off driver"
+ depends on ARCH_MESON
+ help
+ The driver supports restart / power off for amlogic
+ g12a, g12b and sm1 SoCs
+
config POWER_RESET_OXNAS
bool "OXNAS SoC restart driver"
depends on ARCH_OXNAS
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index f606a2f60..ce0149984 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o
+obj-$(CONFIG_POWER_RESET_MESON64) += meson64-reboot.o
obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o
obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o
obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
diff --git a/drivers/power/reset/meson64-reboot.c b/drivers/power/reset/meson64-reboot.c
new file mode 100644
index 000000000..00fedd36b
--- /dev/null
+++ b/drivers/power/reset/meson64-reboot.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * drivers/power/reset/meson64-reboot.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2023 Ash Hughes (sehguh.hsa@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/reboot.h>
+
+#include <asm/system_misc.h>
+
+#include <asm/compiler.h>
+#include <linux/kdebug.h>
+#include <linux/arm-smccc.h>
+
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+
+int sd_vqsw;
+int sd_vmmc;
+int sd_vqen;
+
+static u32 psci_function_id_restart;
+static u32 psci_function_id_poweroff;
+
+#define CHECK_RET(ret) { \
+ if (ret) \
+ pr_err("[%s] gpio op failed(%d) at line %d\n",\
+ __func__, ret, __LINE__); \
+}
+
+static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
+ u64 arg2)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc((unsigned long)function_id,
+ (unsigned long)arg0,
+ (unsigned long)arg1,
+ (unsigned long)arg2,
+ 0, 0, 0, 0, &res);
+ return res.a0;
+}
+
+void meson64_card_reset(void)
+{
+ int ret = 0;
+
+ if ((sd_vqsw == 0) && (sd_vmmc == 0))
+ return;
+
+ if (sd_vqen == 0) {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 1);
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(10);
+ ret = gpio_direction_output(sd_vqsw, 0);
+ CHECK_RET(ret);
+ ret = gpio_direction_output(sd_vmmc, 1);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vmmc);
+ } else {
+ gpio_free(sd_vqsw);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+
+ ret = gpio_request_one(sd_vqsw,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vqen,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ ret = gpio_request_one(sd_vmmc,
+ GPIOF_OUT_INIT_LOW, "REBOOT");
+ CHECK_RET(ret);
+ mdelay(100);
+ ret = gpio_direction_input(sd_vqen);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vmmc);
+ CHECK_RET(ret);
+ ret = gpio_direction_input(sd_vqsw);
+ CHECK_RET(ret);
+ mdelay(5);
+ gpio_free(sd_vqen);
+ gpio_free(sd_vmmc);
+ gpio_free(sd_vqsw);
+ }
+}
+
+static int do_meson64_restart(struct notifier_block *this, unsigned long mode, void *cmd)
+{
+ meson64_card_reset();
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block meson64_restart_handler = {
+ .notifier_call = do_meson64_restart,
+ .priority = 130,
+};
+
+static void do_meson64_poweroff(void)
+{
+ meson64_card_reset();
+
+ __invoke_psci_fn_smc(0x82000042, 1, 0, 0);
+}
+
+static int meson64_restart_probe(struct platform_device *pdev)
+{
+ struct device_node *of_node;
+ u32 id;
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_reset", &id)) {
+ psci_function_id_restart = id;
+ register_restart_handler(&meson64_restart_handler);
+ }
+
+ if (!of_property_read_u32(pdev->dev.of_node, "sys_poweroff", &id)) {
+ psci_function_id_poweroff = id;
+ pm_power_off = do_meson64_poweroff;
+ }
+
+ of_node = pdev->dev.of_node;
+
+ sd_vqsw = of_get_named_gpio(of_node, "sd-vqsw", 0);
+ if (!gpio_is_valid(sd_vqsw)) sd_vqsw = 0;
+
+ sd_vmmc = of_get_named_gpio(of_node, "sd-vmmc", 0);
+ if (!gpio_is_valid(sd_vmmc)) sd_vmmc = 0;
+
+ sd_vqen = of_get_named_gpio(of_node, "sd-vqen", 0);
+ if (!gpio_is_valid(sd_vqen)) sd_vqen = 0;
+
+ return 0;
+}
+
+static const struct of_device_id of_meson64_restart_match[] = {
+ { .compatible = "meson64,reboot", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_meson64_restart_match);
+
+static struct platform_driver meson64_restart_driver = {
+ .probe = meson64_restart_probe,
+ .driver = {
+ .name = "meson64-restart",
+ .of_match_table = of_match_ptr(of_meson64_restart_match),
+ },
+};
+
+static int __init meson64_restart_init(void)
+{
+ return platform_driver_register(&meson64_restart_driver);
+}
+device_initcall(meson64_restart_init);
+

115
patch/kernel/archive/meson64-6.2/meson-uart-use-divide-XTAL-by-2-bit-on-G12A.patch Normal file
View File

@@ -0,0 +1,115 @@
diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 3cbdde85ed71..22656efe8ddc 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -34,6 +34,11 @@ properties:
- amlogic,meson-gx-uart
- amlogic,meson-s4-uart
- const: amlogic,meson-ao-uart
+ - description: Always-on power domain UART controller on G12A SoCs
+ items:
+ - const: amlogic,meson-g12a-uart
+ - const: amlogic,meson-gx-uart
+ - const: amlogic,meson-ao-uart
- description: Everything-Else power domain UART controller
enum:
- amlogic,meson6-uart
@@ -41,6 +46,10 @@ properties:
- amlogic,meson8b-uart
- amlogic,meson-gx-uart
- amlogic,meson-s4-uart
+ - description: Everything-Else power domain UART controller on G12A SoCs
+ items:
+ - const: amlogic,meson-g12a-uart
+ - const: amlogic,meson-gx-uart
reg:
maxItems: 1
--
2.39.2
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 74110017988a..2501db5a7aaf 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -779,7 +779,7 @@ static int meson_uart_remove(struct platform_device *pdev)
return 0;
}
-static struct meson_uart_data s4_uart_data = {
+static struct meson_uart_data meson_g12a_uart_data = {
.has_xtal_div2 = true,
};
@@ -788,9 +788,13 @@ static const struct of_device_id meson_uart_dt_match[] = {
{ .compatible = "amlogic,meson8-uart" },
{ .compatible = "amlogic,meson8b-uart" },
{ .compatible = "amlogic,meson-gx-uart" },
+ {
+ .compatible = "amlogic,meson-g12a-uart",
+ .data = (void *)&meson_g12a_uart_data,
+ },
{
.compatible = "amlogic,meson-s4-uart",
- .data = (void *)&s4_uart_data,
+ .data = (void *)&meson_g12a_uart_data,
},
{ /* sentinel */ },
};
--
2.39.2
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 123a56f7f818..904bcd4d2acf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -2046,7 +2046,8 @@ pwm_AO_cd: pwm@2000 {
};
uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart",
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x3000 0x0 0x18>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
@@ -2056,7 +2057,8 @@ uart_AO: serial@3000 {
};
uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart",
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x4000 0x0 0x18>;
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
@@ -2293,7 +2295,8 @@ clk_msr: clock-measure@18000 {
};
uart_C: serial@22000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x22000 0x0 0x18>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
@@ -2302,7 +2305,8 @@ uart_C: serial@22000 {
};
uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x23000 0x0 0x18>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
@@ -2311,7 +2315,8 @@ uart_B: serial@23000 {
};
uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
+ compatible = "amlogic,meson-g12a-uart",
+ "amlogic,meson-gx-uart";
reg = <0x0 0x24000 0x0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
--
2.39.2

31
patch/kernel/archive/rk322x-6.1/wifi-4004-esp8089-kernel-driver.patch
View File

@@ -633,7 +633,7 @@ index 000000000000..56b40db272f3
+To load the module.
diff --git a/drivers/net/wireless/esp8089/esp_ctrl.c b/drivers/net/wireless/esp8089/esp_ctrl.c
new file mode 100644
index 000000000000..ee64fab67a3b
index 000000000000..a19d2437dd82
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_ctrl.c
@@ -0,0 +1,801 @@
@@ -3539,7 +3539,7 @@ index 000000000000..6c5c01aad4e5
+}
diff --git a/drivers/net/wireless/esp8089/esp_mac80211.c b/drivers/net/wireless/esp8089/esp_mac80211.c
new file mode 100644
index 000000000000..3c8a5ab9444f
index 000000000000..14186365fdd4
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_mac80211.c
@@ -0,0 +1,1727 @@
@@ -5597,7 +5597,7 @@ index 000000000000..1ceb14bc3b15
+#endif /* _ESP_PATH_H_ */
diff --git a/drivers/net/wireless/esp8089/esp_pub.h b/drivers/net/wireless/esp8089/esp_pub.h
new file mode 100644
index 000000000000..830dcac0a89b
index 000000000000..0d3ad3655cf4
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_pub.h
@@ -0,0 +1,222 @@
@@ -6038,10 +6038,10 @@ index 000000000000..2d49f2bc8035
+#endif /* _ESP_SIF_H_ */
diff --git a/drivers/net/wireless/esp8089/esp_sip.c b/drivers/net/wireless/esp8089/esp_sip.c
new file mode 100644
index 000000000000..7aaad88b942d
index 000000000000..6602a1e22ab1
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_sip.c
@@ -0,0 +1,2418 @@
@@ -0,0 +1,2420 @@
+/*
+ * Copyright (c) 2009 - 2014 Espressif System.
+ *
@@ -8002,6 +8002,7 @@ index 000000000000..7aaad88b942d
+ if (sip == NULL)
+ return;
+
+ esp_dbg(ESP_DBG_TRACE, "sip_detach: sip_free_init_ctrl_buf()");
+ sip_free_init_ctrl_buf(sip);
+
+ if (atomic_read(&sip->state) == SIP_RUN) {
@@ -8016,7 +8017,7 @@ index 000000000000..7aaad88b942d
+
+ skb_queue_purge(&sip->rxq);
+ mutex_destroy(&sip->rx_mtx);
+ cancel_work_sync(&sip->epub->sendup_work);
+ cancel_work(&sip->epub->sendup_work); // Must be non-sync
+ skb_queue_purge(&sip->epub->rxq);
+
+#ifdef ESP_NO_MAC80211
@@ -8048,6 +8049,7 @@ index 000000000000..7aaad88b942d
+
+ sif_disable_target_interrupt(sip->epub);
+ atomic_set(&sip->state, SIP_STOP);
+
+ sif_disable_irq(sip->epub);
+
+ if (sip->rawbuf)
@@ -9337,10 +9339,10 @@ index 000000000000..0dd35c82a001
+ limitations under the License.
diff --git a/drivers/net/wireless/esp8089/sdio_sif_esp.c b/drivers/net/wireless/esp8089/sdio_sif_esp.c
new file mode 100644
index 000000000000..97718f42e1a6
index 000000000000..2bd2c63f5388
--- /dev/null
+++ b/drivers/net/wireless/esp8089/sdio_sif_esp.c
@@ -0,0 +1,811 @@
@@ -0,0 +1,824 @@
+/*
+ * Copyright (c) 2010 -2013 Espressif System.
+ *
@@ -9370,6 +9372,7 @@ index 000000000000..97718f42e1a6
+#include <net/mac80211.h>
+#include <linux/time.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
+
+#include "esp_pub.h"
+#include "esp_sif.h"
@@ -9978,6 +9981,7 @@ index 000000000000..97718f42e1a6
+ sdio_claim_host(func);
+ mmc_sw_reset(func->card);
+ sdio_release_host(func);
+ msleep(10);
+ }
+
+ return err;
@@ -10063,6 +10067,17 @@ index 000000000000..97718f42e1a6
+
+ sdio_set_drvdata(func, NULL);
+
+ /*
+ * Reset on sdio remove to leave the hardware in cold state,
+ * so a new module insertion will be possible
+ */
+ if (epub->sdio_state == ESP_SDIO_STATE_SECOND_INIT) {
+ sdio_claim_host(func);
+ mmc_hw_reset(func->card);
+ sdio_release_host(func);
+ mdelay(10);
+ }
+
+ esp_dbg(ESP_DBG_TRACE, "eagle sdio remove complete\n");
+}
+

4
patch/kernel/archive/rk322x-6.3/01-linux-1000-drm-rockchip.patch
View File

@@ -1514,15 +1514,15 @@ index 66fee351f4a7..d6d8f3335813 100644
err_bind:
drm_encoder_cleanup(encoder);
err_disable_clk:
@@ -719,7 +763,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
@@ -639,7 +870,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
{
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
- dw_hdmi_unbind(hdmi->hdmi);
+ dw_hdmi_remove(hdmi->hdmi);
drm_encoder_cleanup(&hdmi->encoder.encoder);
clk_disable_unprepare(hdmi->ref_clk);
regulator_disable(hdmi->avdd_1v8);
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>

31
patch/kernel/archive/rk322x-6.3/wifi-4004-esp8089-kernel-driver.patch
View File

@@ -633,7 +633,7 @@ index 000000000000..56b40db272f3
+To load the module.
diff --git a/drivers/net/wireless/esp8089/esp_ctrl.c b/drivers/net/wireless/esp8089/esp_ctrl.c
new file mode 100644
index 000000000000..ee64fab67a3b
index 000000000000..a19d2437dd82
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_ctrl.c
@@ -0,0 +1,801 @@
@@ -3539,7 +3539,7 @@ index 000000000000..6c5c01aad4e5
+}
diff --git a/drivers/net/wireless/esp8089/esp_mac80211.c b/drivers/net/wireless/esp8089/esp_mac80211.c
new file mode 100644
index 000000000000..3c8a5ab9444f
index 000000000000..14186365fdd4
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_mac80211.c
@@ -0,0 +1,1728 @@
@@ -5598,7 +5598,7 @@ index 000000000000..1ceb14bc3b15
+#endif /* _ESP_PATH_H_ */
diff --git a/drivers/net/wireless/esp8089/esp_pub.h b/drivers/net/wireless/esp8089/esp_pub.h
new file mode 100644
index 000000000000..830dcac0a89b
index 000000000000..0d3ad3655cf4
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_pub.h
@@ -0,0 +1,222 @@
@@ -6039,10 +6039,10 @@ index 000000000000..2d49f2bc8035
+#endif /* _ESP_SIF_H_ */
diff --git a/drivers/net/wireless/esp8089/esp_sip.c b/drivers/net/wireless/esp8089/esp_sip.c
new file mode 100644
index 000000000000..7aaad88b942d
index 000000000000..6602a1e22ab1
--- /dev/null
+++ b/drivers/net/wireless/esp8089/esp_sip.c
@@ -0,0 +1,2418 @@
@@ -0,0 +1,2420 @@
+/*
+ * Copyright (c) 2009 - 2014 Espressif System.
+ *
@@ -8003,6 +8003,7 @@ index 000000000000..7aaad88b942d
+ if (sip == NULL)
+ return;
+
+ esp_dbg(ESP_DBG_TRACE, "sip_detach: sip_free_init_ctrl_buf()");
+ sip_free_init_ctrl_buf(sip);
+
+ if (atomic_read(&sip->state) == SIP_RUN) {
@@ -8017,7 +8018,7 @@ index 000000000000..7aaad88b942d
+
+ skb_queue_purge(&sip->rxq);
+ mutex_destroy(&sip->rx_mtx);
+ cancel_work_sync(&sip->epub->sendup_work);
+ cancel_work(&sip->epub->sendup_work); // Must be non-sync
+ skb_queue_purge(&sip->epub->rxq);
+
+#ifdef ESP_NO_MAC80211
@@ -8049,6 +8050,7 @@ index 000000000000..7aaad88b942d
+
+ sif_disable_target_interrupt(sip->epub);
+ atomic_set(&sip->state, SIP_STOP);
+
+ sif_disable_irq(sip->epub);
+
+ if (sip->rawbuf)
@@ -9338,10 +9340,10 @@ index 000000000000..0dd35c82a001
+ limitations under the License.
diff --git a/drivers/net/wireless/esp8089/sdio_sif_esp.c b/drivers/net/wireless/esp8089/sdio_sif_esp.c
new file mode 100644
index 000000000000..97718f42e1a6
index 000000000000..2bd2c63f5388
--- /dev/null
+++ b/drivers/net/wireless/esp8089/sdio_sif_esp.c
@@ -0,0 +1,811 @@
@@ -0,0 +1,824 @@
+/*
+ * Copyright (c) 2010 -2013 Espressif System.
+ *
@@ -9371,6 +9373,7 @@ index 000000000000..97718f42e1a6
+#include <net/mac80211.h>
+#include <linux/time.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
+
+#include "esp_pub.h"
+#include "esp_sif.h"
@@ -9979,6 +9982,7 @@ index 000000000000..97718f42e1a6
+ sdio_claim_host(func);
+ mmc_sw_reset(func->card);
+ sdio_release_host(func);
+ msleep(10);
+ }
+
+ return err;
@@ -10064,6 +10068,17 @@ index 000000000000..97718f42e1a6
+
+ sdio_set_drvdata(func, NULL);
+
+ /*
+ * Reset on sdio remove to leave the hardware in cold state,
+ * so a new module insertion will be possible
+ */
+ if (epub->sdio_state == ESP_SDIO_STATE_SECOND_INIT) {
+ sdio_claim_host(func);
+ mmc_hw_reset(func->card);
+ sdio_release_host(func);
+ mdelay(10);
+ }
+
+ esp_dbg(ESP_DBG_TRACE, "eagle sdio remove complete\n");
+}
+

4
patch/kernel/archive/rockchip-6.3/01-linux-1000-drm-rockchip.patch
View File

@@ -1514,15 +1514,15 @@ index 66fee351f4a7..d6d8f3335813 100644
err_bind:
drm_encoder_cleanup(encoder);
err_disable_clk:
@@ -719,7 +763,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
@@ -639,7 +870,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
{
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
- dw_hdmi_unbind(hdmi->hdmi);
+ dw_hdmi_remove(hdmi->hdmi);
drm_encoder_cleanup(&hdmi->encoder.encoder);
clk_disable_unprepare(hdmi->ref_clk);
regulator_disable(hdmi->avdd_1v8);
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>

15
patch/kernel/archive/rockchip-6.3/4016-workaround-broadcom-bt-serdev.patch
View File

@@ -12,15 +12,16 @@ diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c
index 1b9743b7f..b274f1cdd 100644
--- a/drivers/bluetooth/btbcm.c
+++ b/drivers/bluetooth/btbcm.c
@@ -87,7 +87,7 @@ int btbcm_check_bdaddr(struct hci_dev *hdev)
!bacmp(&bda->bdaddr, BDADDR_BCM43341B)) {
bt_dev_info(hdev, "BCM: Using default device address (%pMR)",
&bda->bdaddr);
- set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
+ //set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
@@ -129,7 +129,7 @@ int btbcm_check_bdaddr(struct hci_dev *hdev)
if (btbcm_set_bdaddr_from_efi(hdev) != 0) {
bt_dev_info(hdev, "BCM: Using default device address (%pMR)",
&bda->bdaddr);
- set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
+ //set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
}
}
kfree_skb(skb);
--
2.25.1

26
patch/kernel/archive/sunxi-5.11/0001-Fix-broken-ethernet-on-Orangepi-2.patch
View File

@@ -1,26 +0,0 @@
From c0d922d25d5efb64dc28817cefda7a6945e74e2c Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Tue, 5 Jan 2021 22:53:31 +0100
Subject: [PATCH] Fix broken ethernet on Orangepi 2
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 97f497854..d05fa679d 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -85,7 +85,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
Created with Armbian build tools https://github.com/armbian/build

52
patch/kernel/archive/sunxi-5.11/0001-arm64-allwinner-a64-enable-Wi-Fi-for-Pine64.patch
View File

@@ -1,52 +0,0 @@
From a5b709a81ad9a5e2e6e4be6a696711ad7f35ad57 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 9 Feb 2017 00:18:56 +0800
Subject: [PATCH 001/146] arm64: allwinner: a64: enable Wi-Fi for Pine64
The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Add device node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 1b9b92e541d2..d06b5b88f60e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -62,6 +62,11 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&ehci0 {
@@ -109,6 +114,17 @@
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
--
2.17.1

33
patch/kernel/archive/sunxi-5.11/0001-arm64-pine64-plus-add-PHY-regulator-delay.patch
View File

@@ -1,33 +0,0 @@
From bb0516f4d03ffe9bcc06f840e477ea665af94e9d Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 25 Aug 2019 14:40:10 +0200
Subject: [PATCH] arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator
delay
Depending on kernel and bootloader configuration, it's possible that
Realtek ethernet PHY isn't powered on properly. It needs some time
before it can be used.
Fix that by adding 100ms ramp delay to regulator responsible for
powering PHY.
Fixes: 94dcfdc77fc5 ("arm64: allwinner: pine64-plus: Enable dwmac-sun8i")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 24f1aac366d6..9612a34c1762 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -63,3 +63,7 @@
reg = <1>;
};
};
+
+&reg_dc1sw {
+ regulator-enable-ramp-delay = <100000>;
+};
--
2.23.0

440
patch/kernel/archive/sunxi-5.11/0001-mfd-Add-support-for-AC200.patch
View File

@@ -1,440 +0,0 @@
From d98aa318aabd4aba05328f9c832b23bdf2e1677a Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Fri, 16 Aug 2019 16:38:21 +0200
Subject: [PATCH 1/4] mfd: Add support for AC200
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/mfd/Kconfig | 9 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/ac200.c | 170 +++++++++++++++++++++++++++++++
include/linux/mfd/ac200.h | 208 ++++++++++++++++++++++++++++++++++++++
4 files changed, 388 insertions(+)
create mode 100644 drivers/mfd/ac200.c
create mode 100644 include/linux/mfd/ac200.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 420900852166..a45e7c88ac9b 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -178,6 +178,15 @@ config MFD_AC100
This driver include only the core APIs. You have to select individual
components like codecs or RTC under the corresponding menus.
+config MFD_AC200
+ tristate "X-Powers AC200"
+ select MFD_CORE
+ depends on I2C
+ help
+ If you say Y here you get support for the X-Powers AC200 IC.
+ This driver include only the core APIs. You have to select individual
+ components like Ethernet PHY or RTC under the corresponding menus.
+
config MFD_AXP20X
tristate
select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index aed99f08739f..4431a4cf19ca 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -141,6 +141,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
obj-$(CONFIG_MFD_AC100) += ac100.o
+obj-$(CONFIG_MFD_AC200) += ac200.o
obj-$(CONFIG_MFD_AXP20X) += axp20x.o
obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
diff --git a/drivers/mfd/ac200.c b/drivers/mfd/ac200.c
new file mode 100644
index 000000000000..570573790d91
--- /dev/null
+++ b/drivers/mfd/ac200.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MFD core driver for X-Powers' AC200 IC
+ *
+ * The AC200 is a chip which is co-packaged with Allwinner H6 SoC and
+ * includes analog audio codec, analog TV encoder, ethernet PHY, eFuse
+ * and RTC.
+ *
+ * Copyright (c) 2020 Jernej Skrabec <jernej.skrabec@siol.net>
+ */
+
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/ac200.h>
+#include <linux/module.h>
+#include <linux/of.h>
+
+/* Interrupts */
+#define AC200_IRQ_RTC 0
+#define AC200_IRQ_EPHY 1
+#define AC200_IRQ_TVE 2
+
+/* IRQ enable register */
+#define AC200_SYS_IRQ_ENABLE_OUT_EN BIT(15)
+#define AC200_SYS_IRQ_ENABLE_RTC BIT(12)
+#define AC200_SYS_IRQ_ENABLE_EPHY BIT(8)
+#define AC200_SYS_IRQ_ENABLE_TVE BIT(4)
+
+static const struct regmap_range_cfg ac200_range_cfg[] = {
+ {
+ .range_min = AC200_SYS_VERSION,
+ .range_max = AC200_IC_CHARA1,
+ .selector_reg = AC200_TWI_REG_ADDR_H,
+ .selector_mask = 0xff,
+ .selector_shift = 0,
+ .window_start = 0,
+ .window_len = 256,
+ }
+};
+
+static const struct regmap_config ac200_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 16,
+ .ranges = ac200_range_cfg,
+ .num_ranges = ARRAY_SIZE(ac200_range_cfg),
+ .max_register = AC200_IC_CHARA1,
+};
+
+static const struct regmap_irq ac200_regmap_irqs[] = {
+ REGMAP_IRQ_REG(AC200_IRQ_RTC, 0, AC200_SYS_IRQ_ENABLE_RTC),
+ REGMAP_IRQ_REG(AC200_IRQ_EPHY, 0, AC200_SYS_IRQ_ENABLE_EPHY),
+ REGMAP_IRQ_REG(AC200_IRQ_TVE, 0, AC200_SYS_IRQ_ENABLE_TVE),
+};
+
+static const struct regmap_irq_chip ac200_regmap_irq_chip = {
+ .name = "ac200_irq_chip",
+ .status_base = AC200_SYS_IRQ_STATUS,
+ .mask_base = AC200_SYS_IRQ_ENABLE,
+ .mask_invert = true,
+ .irqs = ac200_regmap_irqs,
+ .num_irqs = ARRAY_SIZE(ac200_regmap_irqs),
+ .num_regs = 1,
+};
+
+static const struct resource ephy_resource[] = {
+ DEFINE_RES_IRQ(AC200_IRQ_EPHY),
+};
+
+static const struct mfd_cell ac200_cells[] = {
+ {
+ .name = "ac200-ephy",
+ .num_resources = ARRAY_SIZE(ephy_resource),
+ .resources = ephy_resource,
+ .of_compatible = "x-powers,ac200-ephy",
+ },
+};
+
+static int ac200_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &i2c->dev;
+ struct ac200_dev *ac200;
+ int ret;
+
+ ac200 = devm_kzalloc(dev, sizeof(*ac200), GFP_KERNEL);
+ if (!ac200)
+ return -ENOMEM;
+
+ i2c_set_clientdata(i2c, ac200);
+
+ ac200->regmap = devm_regmap_init_i2c(i2c, &ac200_regmap_config);
+ if (IS_ERR(ac200->regmap)) {
+ ret = PTR_ERR(ac200->regmap);
+ dev_err(dev, "regmap init failed: %d\n", ret);
+ return ret;
+ }
+
+ /* do a reset to put chip in a known state */
+
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 1);
+ if (ret)
+ return ret;
+
+ /* enable interrupt pin */
+
+ ret = regmap_write(ac200->regmap, AC200_SYS_IRQ_ENABLE,
+ AC200_SYS_IRQ_ENABLE_OUT_EN);
+ if (ret)
+ return ret;
+
+ ret = regmap_add_irq_chip(ac200->regmap, i2c->irq, IRQF_ONESHOT, 0,
+ &ac200_regmap_irq_chip, &ac200->regmap_irqc);
+ if (ret)
+ return ret;
+
+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ac200_cells,
+ ARRAY_SIZE(ac200_cells), NULL, 0, NULL);
+ if (ret) {
+ dev_err(dev, "failed to add MFD devices: %d\n", ret);
+ regmap_del_irq_chip(i2c->irq, ac200->regmap_irqc);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ac200_i2c_remove(struct i2c_client *i2c)
+{
+ struct ac200_dev *ac200 = i2c_get_clientdata(i2c);
+
+ regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
+
+ mfd_remove_devices(&i2c->dev);
+ regmap_del_irq_chip(i2c->irq, ac200->regmap_irqc);
+
+ return 0;
+}
+
+static const struct i2c_device_id ac200_ids[] = {
+ { "ac200", },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, ac200_ids);
+
+static const struct of_device_id ac200_of_match[] = {
+ { .compatible = "x-powers,ac200" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ac200_of_match);
+
+static struct i2c_driver ac200_i2c_driver = {
+ .driver = {
+ .name = "ac200",
+ .of_match_table = of_match_ptr(ac200_of_match),
+ },
+ .probe = ac200_i2c_probe,
+ .remove = ac200_i2c_remove,
+ .id_table = ac200_ids,
+};
+module_i2c_driver(ac200_i2c_driver);
+
+MODULE_DESCRIPTION("MFD core driver for AC200");
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/ac200.h b/include/linux/mfd/ac200.h
new file mode 100644
index 000000000000..0c677094a5b3
--- /dev/null
+++ b/include/linux/mfd/ac200.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * AC200 register list
+ *
+ * Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
+ */
+
+#ifndef __LINUX_MFD_AC200_H
+#define __LINUX_MFD_AC200_H
+
+#include <linux/regmap.h>
+
+/* interface registers (can be accessed from any page) */
+#define AC200_TWI_CHANGE_TO_RSB 0x3E
+#define AC200_TWI_PAD_DELAY 0xC4
+#define AC200_TWI_REG_ADDR_H 0xFE
+
+/* General registers */
+#define AC200_SYS_VERSION 0x0000
+#define AC200_SYS_CONTROL 0x0002
+#define AC200_SYS_IRQ_ENABLE 0x0004
+#define AC200_SYS_IRQ_STATUS 0x0006
+#define AC200_SYS_CLK_CTL 0x0008
+#define AC200_SYS_DLDO_OSC_CTL 0x000A
+#define AC200_SYS_PLL_CTL0 0x000C
+#define AC200_SYS_PLL_CTL1 0x000E
+#define AC200_SYS_AUDIO_CTL0 0x0010
+#define AC200_SYS_AUDIO_CTL1 0x0012
+#define AC200_SYS_EPHY_CTL0 0x0014
+#define AC200_SYS_EPHY_CTL1 0x0016
+#define AC200_SYS_TVE_CTL0 0x0018
+#define AC200_SYS_TVE_CTL1 0x001A
+
+/* Audio Codec registers */
+#define AC200_AC_SYS_CLK_CTL 0x2000
+#define AC200_SYS_MOD_RST 0x2002
+#define AC200_SYS_SAMP_CTL 0x2004
+#define AC200_I2S_CTL 0x2100
+#define AC200_I2S_CLK 0x2102
+#define AC200_I2S_FMT0 0x2104
+#define AC200_I2S_FMT1 0x2108
+#define AC200_I2S_MIX_SRC 0x2114
+#define AC200_I2S_MIX_GAIN 0x2116
+#define AC200_I2S_DACDAT_DVC 0x2118
+#define AC200_I2S_ADCDAT_DVC 0x211A
+#define AC200_AC_DAC_DPC 0x2200
+#define AC200_AC_DAC_MIX_SRC 0x2202
+#define AC200_AC_DAC_MIX_GAIN 0x2204
+#define AC200_DACA_OMIXER_CTRL 0x2220
+#define AC200_OMIXER_SR 0x2222
+#define AC200_LINEOUT_CTRL 0x2224
+#define AC200_AC_ADC_DPC 0x2300
+#define AC200_MBIAS_CTRL 0x2310
+#define AC200_ADC_MIC_CTRL 0x2320
+#define AC200_ADCMIXER_SR 0x2322
+#define AC200_ANALOG_TUNING0 0x232A
+#define AC200_ANALOG_TUNING1 0x232C
+#define AC200_AC_AGC_SEL 0x2480
+#define AC200_ADC_DAPLCTRL 0x2500
+#define AC200_ADC_DAPRCTRL 0x2502
+#define AC200_ADC_DAPLSTA 0x2504
+#define AC200_ADC_DAPRSTA 0x2506
+#define AC200_ADC_DAPLTL 0x2508
+#define AC200_ADC_DAPRTL 0x250A
+#define AC200_ADC_DAPLHAC 0x250C
+#define AC200_ADC_DAPLLAC 0x250E
+#define AC200_ADC_DAPRHAC 0x2510
+#define AC200_ADC_DAPRLAC 0x2512
+#define AC200_ADC_DAPLDT 0x2514
+#define AC200_ADC_DAPLAT 0x2516
+#define AC200_ADC_DAPRDT 0x2518
+#define AC200_ADC_DAPRAT 0x251A
+#define AC200_ADC_DAPNTH 0x251C
+#define AC200_ADC_DAPLHNAC 0x251E
+#define AC200_ADC_DAPLLNAC 0x2520
+#define AC200_ADC_DAPRHNAC 0x2522
+#define AC200_ADC_DAPRLNAC 0x2524
+#define AC200_AC_DAPHHPFC 0x2526
+#define AC200_AC_DAPLHPFC 0x2528
+#define AC200_AC_DAPOPT 0x252A
+#define AC200_AC_DAC_DAPCTRL 0x3000
+#define AC200_AC_DRC_HHPFC 0x3002
+#define AC200_AC_DRC_LHPFC 0x3004
+#define AC200_AC_DRC_CTRL 0x3006
+#define AC200_AC_DRC_LPFHAT 0x3008
+#define AC200_AC_DRC_LPFLAT 0x300A
+#define AC200_AC_DRC_RPFHAT 0x300C
+#define AC200_AC_DRC_RPFLAT 0x300E
+#define AC200_AC_DRC_LPFHRT 0x3010
+#define AC200_AC_DRC_LPFLRT 0x3012
+#define AC200_AC_DRC_RPFHRT 0x3014
+#define AC200_AC_DRC_RPFLRT 0x3016
+#define AC200_AC_DRC_LRMSHAT 0x3018
+#define AC200_AC_DRC_LRMSLAT 0x301A
+#define AC200_AC_DRC_RRMSHAT 0x301C
+#define AC200_AC_DRC_RRMSLAT 0x301E
+#define AC200_AC_DRC_HCT 0x3020
+#define AC200_AC_DRC_LCT 0x3022
+#define AC200_AC_DRC_HKC 0x3024
+#define AC200_AC_DRC_LKC 0x3026
+#define AC200_AC_DRC_HOPC 0x3028
+#define AC200_AC_DRC_LOPC 0x302A
+#define AC200_AC_DRC_HLT 0x302C
+#define AC200_AC_DRC_LLT 0x302E
+#define AC200_AC_DRC_HKI 0x3030
+#define AC200_AC_DRC_LKI 0x3032
+#define AC200_AC_DRC_HOPL 0x3034
+#define AC200_AC_DRC_LOPL 0x3036
+#define AC200_AC_DRC_HET 0x3038
+#define AC200_AC_DRC_LET 0x303A
+#define AC200_AC_DRC_HKE 0x303C
+#define AC200_AC_DRC_LKE 0x303E
+#define AC200_AC_DRC_HOPE 0x3040
+#define AC200_AC_DRC_LOPE 0x3042
+#define AC200_AC_DRC_HKN 0x3044
+#define AC200_AC_DRC_LKN 0x3046
+#define AC200_AC_DRC_SFHAT 0x3048
+#define AC200_AC_DRC_SFLAT 0x304A
+#define AC200_AC_DRC_SFHRT 0x304C
+#define AC200_AC_DRC_SFLRT 0x304E
+#define AC200_AC_DRC_MXGHS 0x3050
+#define AC200_AC_DRC_MXGLS 0x3052
+#define AC200_AC_DRC_MNGHS 0x3054
+#define AC200_AC_DRC_MNGLS 0x3056
+#define AC200_AC_DRC_EPSHC 0x3058
+#define AC200_AC_DRC_EPSLC 0x305A
+#define AC200_AC_DRC_HPFHGAIN 0x305E
+#define AC200_AC_DRC_HPFLGAIN 0x3060
+#define AC200_AC_DRC_BISTCR 0x3100
+#define AC200_AC_DRC_BISTST 0x3102
+
+/* TVE registers */
+#define AC200_TVE_CTL0 0x4000
+#define AC200_TVE_CTL1 0x4002
+#define AC200_TVE_MOD0 0x4004
+#define AC200_TVE_MOD1 0x4006
+#define AC200_TVE_DAC_CFG0 0x4008
+#define AC200_TVE_DAC_CFG1 0x400A
+#define AC200_TVE_YC_DELAY 0x400C
+#define AC200_TVE_YC_FILTER 0x400E
+#define AC200_TVE_BURST_FRQ0 0x4010
+#define AC200_TVE_BURST_FRQ1 0x4012
+#define AC200_TVE_FRONT_PORCH 0x4014
+#define AC200_TVE_BACK_PORCH 0x4016
+#define AC200_TVE_TOTAL_LINE 0x401C
+#define AC200_TVE_FIRST_ACTIVE 0x401E
+#define AC200_TVE_BLACK_LEVEL 0x4020
+#define AC200_TVE_BLANK_LEVEL 0x4022
+#define AC200_TVE_PLUG_EN 0x4030
+#define AC200_TVE_PLUG_IRQ_EN 0x4032
+#define AC200_TVE_PLUG_IRQ_STA 0x4034
+#define AC200_TVE_PLUG_STA 0x4038
+#define AC200_TVE_PLUG_DEBOUNCE 0x4040
+#define AC200_TVE_DAC_TEST 0x4042
+#define AC200_TVE_PLUG_PULSE_LEVEL 0x40F4
+#define AC200_TVE_PLUG_PULSE_START 0x40F8
+#define AC200_TVE_PLUG_PULSE_PERIOD 0x40FA
+#define AC200_TVE_IF_CTL 0x5000
+#define AC200_TVE_IF_TIM0 0x5008
+#define AC200_TVE_IF_TIM1 0x500A
+#define AC200_TVE_IF_TIM2 0x500C
+#define AC200_TVE_IF_TIM3 0x500E
+#define AC200_TVE_IF_SYNC0 0x5010
+#define AC200_TVE_IF_SYNC1 0x5012
+#define AC200_TVE_IF_SYNC2 0x5014
+#define AC200_TVE_IF_TIM4 0x5016
+#define AC200_TVE_IF_STATUS 0x5018
+
+/* EPHY registers */
+#define AC200_EPHY_CTL 0x6000
+#define AC200_EPHY_BIST 0x6002
+
+/* eFuse registers (0x8000 - 0x9FFF, layout unknown) */
+
+/* RTC registers */
+#define AC200_LOSC_CTRL0 0xA000
+#define AC200_LOSC_CTRL1 0xA002
+#define AC200_LOSC_AUTO_SWT_STA 0xA004
+#define AC200_INTOSC_CLK_PRESCAL 0xA008
+#define AC200_RTC_YY_MM_DD0 0xA010
+#define AC200_RTC_YY_MM_DD1 0xA012
+#define AC200_RTC_HH_MM_SS0 0xA014
+#define AC200_RTC_HH_MM_SS1 0xA016
+#define AC200_ALARM0_CUR_VLU0 0xA024
+#define AC200_ALARM0_CUR_VLU1 0xA026
+#define AC200_ALARM0_ENABLE 0xA028
+#define AC200_ALARM0_IRQ_EN 0xA02C
+#define AC200_ALARM0_IRQ_STA 0xA030
+#define AC200_ALARM1_WK_HH_MM_SS0 0xA040
+#define AC200_ALARM1_WK_HH_MM_SS1 0xA042
+#define AC200_ALARM1_ENABLE 0xA044
+#define AC200_ALARM1_IRQ_EN 0xA048
+#define AC200_ALARM1_IRQ_STA 0xA04C
+#define AC200_ALARM_CONFIG 0xA050
+#define AC200_LOSC_OUT_GATING 0xA060
+#define AC200_GP_DATA(x) (0xA100 + (x) * 2)
+#define AC200_RTC_DEB 0xA170
+#define AC200_GPL_HOLD_OUTPUT 0xA180
+#define AC200_VDD_RTC 0xA190
+#define AC200_IC_CHARA0 0xA1F0
+#define AC200_IC_CHARA1 0xA1F2
+
+struct ac200_dev {
+ struct regmap *regmap;
+ struct regmap_irq_chip_data *regmap_irqc;
+};
+
+#endif /* __LINUX_MFD_AC200_H */
--
2.20.1

30
patch/kernel/archive/sunxi-5.11/0001-pinctrl-sunxi-Disable-strict-mode-for-A64-pinctrl-dr.patch
View File

@@ -1,30 +0,0 @@
From 4aa7894de903660f5c8d5155f2590d00022ca95e Mon Sep 17 00:00:00 2001
From: WaterByWind <WaterByWind@users.noreply.github.com>
Date: Sun, 14 Apr 2019 16:16:09 -0400
Subject: [PATCH] pinctrl: sunxi: Disable strict mode for A64 pinctrl driver
With kernel 4.15.y (and later):
* Strict mode was enabled by default via commit 1396007286b1e2fd5dd10ae6a5ccaaaed51ab762 which can/will cause breakage with existing implementations.
* The ability to configure strict mode was added via commit aae842a3ff3385f27f1df8a9ee1494a416ec032d to allow older drivers to maintain existing behavior and avoid breakage.
* Commit cd70387f892205bcd7b8093b0837269b0739cbe0 had then explicitly disabled strict mode for most other existing SoCs but did not include A64.
This change is to update the A64 pinctrl driver similar to the other pre-existing SoC pinctrl drivers.
---
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 7b83d3755a0e..bea52c5a9afa 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -578,6 +578,7 @@ static const struct sunxi_pinctrl_desc a64_pinctrl_data = {
.pins = a64_pins,
.npins = ARRAY_SIZE(a64_pins),
.irq_banks = 3,
+ .disable_strict_mode = true,
};
static int a64_pinctrl_probe(struct platform_device *pdev)
--
2.20.1 (Apple Git-117)

64
patch/kernel/archive/sunxi-5.11/0002-Add-leds-axp20-x-charger.patch
View File

@@ -1,64 +0,0 @@
diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi
index 0d9ff12bd..f972b6f3e 100644
--- a/arch/arm/boot/dts/axp209.dtsi
+++ b/arch/arm/boot/dts/axp209.dtsi
@@ -69,6 +69,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp209-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp22x.dtsi b/arch/arm/boot/dts/axp22x.dtsi
index 65a07a67a..92a0b6425 100644
--- a/arch/arm/boot/dts/axp22x.dtsi
+++ b/arch/arm/boot/dts/axp22x.dtsi
@@ -62,6 +62,11 @@ axp_adc: adc {
#io-channel-cells = <1>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp221-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi
index 00b092f94..7d2bfa42d 100644
--- a/arch/arm/boot/dts/axp81x.dtsi
+++ b/arch/arm/boot/dts/axp81x.dtsi
@@ -74,6 +74,11 @@ gpio1_ldo: gpio1-ldo {
};
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp813-battery-power-supply";
status = "disabled";
diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
index 43276d88b..ac484b5da 100644
--- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -38,6 +38,11 @@ gpio1_ldo: gpio1-ldo {
};
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp803-battery-power-supply",
"x-powers,axp813-battery-power-supply";

272
patch/kernel/archive/sunxi-5.11/0002-net-phy-Add-support-for-AC200-EPHY.patch
View File

@@ -1,272 +0,0 @@
From 1b528543ea41a9837d39e9ab621631c77122f1aa Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Fri, 16 Aug 2019 16:38:57 +0200
Subject: [PATCH 2/4] net: phy: Add support for AC200 EPHY
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/net/phy/Kconfig | 7 ++
drivers/net/phy/Makefile | 1 +
drivers/net/phy/ac200.c | 220 +++++++++++++++++++++++++++++++++++++++
3 files changed, 228 insertions(+)
create mode 100644 drivers/net/phy/ac200.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 2e016271e126..248d9384091c 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -266,6 +266,13 @@ config ADIN_PHY
- ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit
Ethernet PHY
+config AC200_PHY
+ tristate "AC200 EPHY"
+ depends on NVMEM
+ depends on OF
+ help
+ Fast ethernet PHY as found in X-Powers AC200 multi-function device.
+
config AMD_PHY
tristate "AMD PHYs"
---help---
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index fe5badf13b65..2143587f010e 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_SFP) += sfp.o
sfp-obj-$(CONFIG_SFP) += sfp-bus.o
obj-y += $(sfp-obj-y) $(sfp-obj-m)
+obj-$(CONFIG_AC200_PHY) += ac200.o
obj-$(CONFIG_ADIN_PHY) += adin.o
obj-$(CONFIG_AMD_PHY) += amd.o
aquantia-objs += aquantia_main.o
diff --git a/drivers/net/phy/ac200.c b/drivers/net/phy/ac200.c
new file mode 100644
index 000000000000..cb713188f7ec
--- /dev/null
+++ b/drivers/net/phy/ac200.c
@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0+
+/**
+ * Driver for AC200 Ethernet PHY
+ *
+ * Copyright (c) 2020 Jernej Skrabec <jernej.skrabec@siol.net>
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/ac200.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/of.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+
+#define AC200_EPHY_ID 0x00441400
+#define AC200_EPHY_ID_MASK 0x0ffffff0
+
+/* macros for system ephy control 0 register */
+#define AC200_EPHY_RESET_INVALID BIT(0)
+#define AC200_EPHY_SYSCLK_GATING BIT(1)
+
+/* macros for system ephy control 1 register */
+#define AC200_EPHY_E_EPHY_MII_IO_EN BIT(0)
+#define AC200_EPHY_E_LNK_LED_IO_EN BIT(1)
+#define AC200_EPHY_E_SPD_LED_IO_EN BIT(2)
+#define AC200_EPHY_E_DPX_LED_IO_EN BIT(3)
+
+/* macros for ephy control register */
+#define AC200_EPHY_SHUTDOWN BIT(0)
+#define AC200_EPHY_LED_POL BIT(1)
+#define AC200_EPHY_CLK_SEL BIT(2)
+#define AC200_EPHY_ADDR(x) (((x) & 0x1F) << 4)
+#define AC200_EPHY_XMII_SEL BIT(11)
+#define AC200_EPHY_CALIB(x) (((x) & 0xF) << 12)
+
+struct ac200_ephy_dev {
+ struct clk *clk;
+ struct phy_driver *ephy;
+ struct regmap *regmap;
+};
+
+static char *ac200_phy_name = "AC200 EPHY";
+
+static int ac200_ephy_config_init(struct phy_device *phydev)
+{
+ const struct ac200_ephy_dev *priv = phydev->drv->driver_data;
+ unsigned int value;
+ int ret;
+
+ phy_write(phydev, 0x1f, 0x0100); /* Switch to Page 1 */
+ phy_write(phydev, 0x12, 0x4824); /* Disable APS */
+
+ phy_write(phydev, 0x1f, 0x0200); /* Switch to Page 2 */
+ phy_write(phydev, 0x18, 0x0000); /* PHYAFE TRX optimization */
+
+ phy_write(phydev, 0x1f, 0x0600); /* Switch to Page 6 */
+ phy_write(phydev, 0x14, 0x708f); /* PHYAFE TX optimization */
+ phy_write(phydev, 0x13, 0xF000); /* PHYAFE RX optimization */
+ phy_write(phydev, 0x15, 0x1530);
+
+ phy_write(phydev, 0x1f, 0x0800); /* Switch to Page 6 */
+ phy_write(phydev, 0x18, 0x00bc); /* PHYAFE TRX optimization */
+
+ phy_write(phydev, 0x1f, 0x0100); /* switch to page 1 */
+ phy_clear_bits(phydev, 0x17, BIT(3)); /* disable intelligent IEEE */
+
+ /* next two blocks disable 802.3az IEEE */
+ phy_write(phydev, 0x1f, 0x0200); /* switch to page 2 */
+ phy_write(phydev, 0x18, 0x0000);
+
+ phy_write(phydev, 0x1f, 0x0000); /* switch to page 0 */
+ phy_clear_bits_mmd(phydev, 0x7, 0x3c, BIT(1));
+
+ if (phydev->interface == PHY_INTERFACE_MODE_RMII)
+ value = AC200_EPHY_XMII_SEL;
+ else
+ value = 0;
+
+ ret = regmap_update_bits(priv->regmap, AC200_EPHY_CTL,
+ AC200_EPHY_XMII_SEL, value);
+ if (ret)
+ return ret;
+
+ /* FIXME: This is H6 specific */
+ phy_set_bits(phydev, 0x13, BIT(12));
+
+ return 0;
+}
+
+static int ac200_ephy_probe(struct platform_device *pdev)
+{
+ struct ac200_dev *ac200 = dev_get_drvdata(pdev->dev.parent);
+ struct device *dev = &pdev->dev;
+ struct ac200_ephy_dev *priv;
+ struct nvmem_cell *calcell;
+ struct phy_driver *ephy;
+ u16 *caldata, calib;
+ size_t callen;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ ephy = devm_kzalloc(dev, sizeof(*ephy), GFP_KERNEL);
+ if (!ephy)
+ return -ENOMEM;
+
+ priv->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(priv->clk)) {
+ dev_err(dev, "Can't obtain the clock!\n");
+ return PTR_ERR(priv->clk);
+ }
+
+ calcell = devm_nvmem_cell_get(dev, "calibration");
+ if (IS_ERR(calcell)) {
+ dev_err(dev, "Unable to find calibration data!\n");
+ return PTR_ERR(calcell);
+ }
+
+ caldata = nvmem_cell_read(calcell, &callen);
+ if (IS_ERR(caldata)) {
+ dev_err(dev, "Unable to read calibration data!\n");
+ return PTR_ERR(caldata);
+ }
+
+ if (callen != 2) {
+ dev_err(dev, "Calibration data has wrong length: 2 != %zu\n",
+ callen);
+ kfree(caldata);
+ return -EINVAL;
+ }
+
+ calib = *caldata + 3;
+ kfree(caldata);
+
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ return ret;
+
+ ephy->phy_id = AC200_EPHY_ID;
+ ephy->phy_id_mask = AC200_EPHY_ID_MASK;
+ ephy->name = ac200_phy_name;
+ ephy->driver_data = priv;
+ ephy->soft_reset = genphy_soft_reset;
+ ephy->config_init = ac200_ephy_config_init;
+ ephy->suspend = genphy_suspend;
+ ephy->resume = genphy_resume;
+
+ priv->ephy = ephy;
+ priv->regmap = ac200->regmap;
+ platform_set_drvdata(pdev, priv);
+
+ ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL0,
+ AC200_EPHY_RESET_INVALID |
+ AC200_EPHY_SYSCLK_GATING);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL1,
+ AC200_EPHY_E_EPHY_MII_IO_EN |
+ AC200_EPHY_E_LNK_LED_IO_EN |
+ AC200_EPHY_E_SPD_LED_IO_EN |
+ AC200_EPHY_E_DPX_LED_IO_EN);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(ac200->regmap, AC200_EPHY_CTL,
+ AC200_EPHY_LED_POL |
+ AC200_EPHY_CLK_SEL |
+ AC200_EPHY_ADDR(1) |
+ AC200_EPHY_CALIB(calib));
+ if (ret)
+ return ret;
+
+ ret = phy_driver_register(priv->ephy, THIS_MODULE);
+ if (ret) {
+ dev_err(dev, "Unable to register phy\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ac200_ephy_remove(struct platform_device *pdev)
+{
+ struct ac200_ephy_dev *priv = platform_get_drvdata(pdev);
+
+ phy_driver_unregister(priv->ephy);
+
+ regmap_write(priv->regmap, AC200_EPHY_CTL, AC200_EPHY_SHUTDOWN);
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1, 0);
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0);
+
+ clk_disable_unprepare(priv->clk);
+
+ return 0;
+}
+
+static const struct of_device_id ac200_ephy_match[] = {
+ { .compatible = "x-powers,ac200-ephy" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ac200_ephy_match);
+
+static struct platform_driver ac200_ephy_driver = {
+ .probe = ac200_ephy_probe,
+ .remove = ac200_ephy_remove,
+ .driver = {
+ .name = "ac200-ephy",
+ .of_match_table = ac200_ephy_match,
+ },
+};
+module_platform_driver(ac200_ephy_driver);
+
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
+MODULE_DESCRIPTION("AC200 Ethernet PHY driver");
+MODULE_LICENSE("GPL");
--
2.20.1

122
patch/kernel/archive/sunxi-5.11/0003-arm64-dts-allwinner-h6-Add-AC200-EPHY-related-nodes.patch
View File

@@ -1,122 +0,0 @@
From 1b08baab634bebd4ef94ca449b81d7550c91abf0 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 12 Jan 2020 12:09:12 +0100
Subject: [PATCH 3/4] arm64: dts: allwinner: h6: Add AC200 EPHY related nodes
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 63 ++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 3329283e38ab..81caf1e96407 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -16,6 +16,16 @@
#address-cells = <1>;
#size-cells = <1>;
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ pwms = <&pwm 1 42 0>;
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -248,6 +258,10 @@
ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
+
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
};
watchdog: watchdog@30090a0 {
@@ -291,6 +305,14 @@
function = "emac";
drive-strength = <40>;
};
+
+ /omit-if-no-ref/
+ ext_rmii_pins: rmii_pins {
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
+ "PA5", "PA6", "PA7", "PA8", "PA9";
+ function = "emac";
+ drive-strength = <40>;
+ };
hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
@@ -311,6 +333,11 @@
pins = "PD23", "PD24";
function = "i2c2";
};
+
+ i2c3_pins: i2c3-pins {
+ pins = "PB17", "PB18";
+ function = "i2c3";
+ };
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
@@ -329,6 +356,11 @@
bias-pull-up;
};
+ pwm1_pin: pwm1-pin {
+ pins = "PB19";
+ function = "pwm1";
+ };
+
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -504,6 +536,37 @@
#size-cells = <0>;
};
+ i2c3: i2c@5002c00 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002c00 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ac200: mfd@10 {
+ compatible = "x-powers,ac200";
+ reg = <0x10>;
+ interrupt-parent = <&pio>;
+ interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy";
+ clocks = <&ac200_pwm_clk>;
+ nvmem-cells = <&ephy_calibration>;
+ nvmem-cell-names = "calibration";
+ status = "disabled";
+ };
+ };
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
--
2.20.1

84
patch/kernel/archive/sunxi-5.11/0004-arm64-dts-allwinner-h6-tanix-tx6-Enable-ethernet.patch
View File

@@ -1,84 +0,0 @@
From 15a2214233c38b98cb76e7214c83fbc26068a909 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 12 Jan 2020 12:19:51 +0100
Subject: [PATCH 4/4] arm64: dts: allwinner: h6: tanix-tx6: Enable ethernet
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index 83e6cb0e59ce..41a2e3454be5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -12,6 +12,7 @@
compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -39,6 +40,14 @@
};
};
+&ac200_ephy {
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
&de {
status = "okay";
};
@@ -47,6 +56,14 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy>;
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -69,6 +86,17 @@
};
};
+&i2c3 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -86,6 +114,10 @@
status = "okay";
};
+&pwm {
+ status = "okay";
+};
+
&r_ir {
linux,rc-map-name = "rc-tanix-tx5max";
status = "okay";
--
2.20.1

50
patch/kernel/archive/sunxi-5.11/0005-drm-gem-cma-Export-with-handle-allocator.patch
View File

@@ -1,50 +0,0 @@
From ea69ff188dd5d9ac7162f05a22bf299b83a7536e Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 7 Dec 2015 09:33:28 +0100
Subject: [PATCH 005/146] drm: gem: cma: Export with handle allocator
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/drm_gem_cma_helper.c | 3 ++-
include/drm/drm_gem_cma_helper.h | 4 ++++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
index 80a5115c3846..077c61f065d9 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -142,7 +142,7 @@ EXPORT_SYMBOL_GPL(drm_gem_cma_create);
* A struct drm_gem_cma_object * on success or an ERR_PTR()-encoded negative
* error code on failure.
*/
-static struct drm_gem_cma_object *
+struct drm_gem_cma_object *
drm_gem_cma_create_with_handle(struct drm_file *file_priv,
struct drm_device *drm, size_t size,
uint32_t *handle)
@@ -169,6 +169,7 @@ drm_gem_cma_create_with_handle(struct drm_file *file_priv,
return cma_obj;
}
+EXPORT_SYMBOL_GPL(drm_gem_cma_create_with_handle);
/**
* drm_gem_cma_free_object - free resources associated with a CMA GEM object
diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
index 19777145cf8e..79f397c91517 100644
--- a/include/drm/drm_gem_cma_helper.h
+++ b/include/drm/drm_gem_cma_helper.h
@@ -79,6 +79,10 @@ int drm_gem_cma_mmap(struct file *filp, struct vm_area_struct *vma);
/* allocate physical memory */
struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
size_t size);
+struct drm_gem_cma_object *
+drm_gem_cma_create_with_handle(struct drm_file *file_priv,
+ struct drm_device *drm, size_t size,
+ uint32_t *handle);
extern const struct vm_operations_struct drm_gem_cma_vm_ops;
--
2.17.1

102
patch/kernel/archive/sunxi-5.11/0006-drm-sun4i-Add-GEM-allocator.patch
View File

@@ -1,102 +0,0 @@
From b143de6aef8be007256082e0f89606b7f5e3c757 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 7 Dec 2015 09:47:34 +0100
Subject: [PATCH 006/146] drm/sun4i: Add GEM allocator
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 27 +++++++++++++++++++++++++++
include/uapi/drm/sun4i_drm.h | 29 +++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
create mode 100644 include/uapi/drm/sun4i_drm.h
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 8b0cd08034e0..9f5de14fb2fe 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -22,6 +22,8 @@
#include <drm/drm_fb_helper.h>
#include <drm/drm_of.h>
+#include <uapi/drm/sun4i_drm.h>
+
#include "sun4i_drv.h"
#include "sun4i_frontend.h"
#include "sun4i_framebuffer.h"
@@ -30,6 +32,27 @@
DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops);
+static int sun4i_gem_create_ioctl(struct drm_device *drm, void *data,
+ struct drm_file *file_priv)
+{
+ struct drm_sun4i_gem_create *args = data;
+ struct drm_gem_cma_object *cma_obj;
+ size_t size;
+
+ /* The Mali requires a 64 bytes alignment */
+ size = ALIGN(args->size, 64);
+
+ cma_obj = drm_gem_cma_create_with_handle(file_priv, drm, size,
+ &args->handle);
+
+ return PTR_ERR_OR_ZERO(cma_obj);
+}
+
+static const struct drm_ioctl_desc sun4i_drv_ioctls[] = {
+ DRM_IOCTL_DEF_DRV(SUN4I_GEM_CREATE, sun4i_gem_create_ioctl,
+ DRM_UNLOCKED | DRM_AUTH),
+};
+
static const struct drm_driver sun4i_drv_driver = {
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
@@ -42,6 +65,10 @@ static struct drm_driver sun4i_drv_driver = {
.major = 1,
.minor = 0,
+ /* Custom ioctls */
+ .ioctls = sun4i_drv_ioctls,
+ .num_ioctls = ARRAY_SIZE(sun4i_drv_ioctls),
+
/* GEM Operations */
.dumb_create = drm_gem_cma_dumb_create,
.gem_free_object_unlocked = drm_gem_cma_free_object,
diff --git a/include/uapi/drm/sun4i_drm.h b/include/uapi/drm/sun4i_drm.h
new file mode 100644
index 000000000000..67b9dd4ee594
--- /dev/null
+++ b/include/uapi/drm/sun4i_drm.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2015 Free Electrons
+ * Copyright (C) 2015 NextThing Co
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _UAPI_SUN4I_DRM_H_
+#define _UAPI_SUN4I_DRM_H_
+
+#include <drm/drm.h>
+
+struct drm_sun4i_gem_create {
+ __u64 size;
+ __u32 flags;
+ __u32 handle;
+};
+
+#define DRM_SUN4I_GEM_CREATE 0x00
+
+#define DRM_IOCTL_SUN4I_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_SUN4I_GEM_CREATE, \
+ struct drm_sun4i_gem_create)
+
+#endif
--
2.17.1

54
patch/kernel/archive/sunxi-5.11/0007-Add-sopine-HDMI-sound-and-WiFi-support.patch
View File

@@ -1,54 +0,0 @@
From 87020e638ad511e0ebe9c72208d2f0192c905812 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:43:08 -0800
Subject: [PATCH 007/146] Add sopine HDMI sound and WiFi support
---
.../allwinner/sun50i-a64-sopine-baseboard.dts | 18 ++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 29 +++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index c21f2331add6..8161895dde52 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -86,6 +86,10 @@
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -93,6 +97,16 @@
};
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
@@ -138,6 +152,10 @@
vcc-hdmi-supply = <&reg_dldo1>;
};
+&hdmi_sound {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;

107
patch/kernel/archive/sunxi-5.11/0010-general-h6-add-dma-i2c-ir-spi-uart.patch
View File

@@ -1,107 +0,0 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index dc785da9c..141fd186b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -374,6 +381,17 @@
#dma-cells = <1>;
};
+ gic: interrupt-controller@3021000 {
+ compatible = "arm,gic-400";
+ reg = <0x03021000 0x1000>,
+ <0x03022000 0x2000>,
+ <0x03024000 0x2000>,
+ <0x03026000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun50i-h6-sid";
reg = <0x03006000 0x400>;
@@ -279,6 +305,7 @@
interrupt-controller;
#interrupt-cells = <3>;
+ /omit-if-no-ref/
ext_rgmii_pins: rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@@ -309,6 +354,7 @@
bias-pull-up;
};
+ /omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -511,17 +540,26 @@
pins = "PG8", "PG9";
function = "uart1";
};
- };
- gic: interrupt-controller@3021000 {
- compatible = "arm,gic-400";
- reg = <0x03021000 0x1000>,
- <0x03022000 0x2000>,
- <0x03024000 0x2000>,
- <0x03026000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- interrupt-controller;
- #interrupt-cells = <3>;
+ uart2_pins: uart2-pins {
+ pins = "PD19", "PD20";
+ function = "uart2";
+ };
+
+ uart2_rts_cts_pins: uart2-rts-cts-pins {
+ pins = "PD21", "PD22";
+ function = "uart2";
+ };
+
+ uart3_pins: uart3-pins {
+ pins = "PD23", "PD24";
+ function = "uart3";
+ };
+
+ uart3_rts_cts_pins: uart3-rts-cts-pins {
+ pins = "PD25", "PD26";
+ function = "uart3";
+ };
};
mmc0: mmc@4020000 {
@@ -963,6 +1033,19 @@
};
};
+ r_uart: serial@7080000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x07080000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&r_ccu CLK_R_APB2_UART>;
+ resets = <&r_ccu RST_R_APB2_UART>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+ };
+
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h6-rtc";
reg = <0x07000000 0x400>;
@@ -1021,6 +1104,11 @@
pins = "PL9";
function = "s_cir_rx";
};
+
+ r_uart_pins: r-uart-pins {
+ pins = "PL2", "PL3";
+ function = "s_uart";
+ };
};
r_ir: ir@7040000 {

56
patch/kernel/archive/sunxi-5.11/0011-iio-adc-sun4i-gpadc-iio-rename-A33-specified-registe.patch
View File

@@ -1,56 +0,0 @@
From ef6a8862ab9440c5d6a73da32be83edc46e2fe94 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 14 Sep 2017 22:52:47 +0800
Subject: [PATCH 011/146] iio: adc: sun4i-gpadc-iio: rename A33-specified
registers to contain A33
As the H3 SoC, which is also in sun8i line, has totally different
register map for the thermal sensor (a cut down version of GPADC), we
should rename A23/A33-specified registers to contain A33, in order to
prevent obfuscation with H3 registers. Currently these registers are
only prefixed "SUN8I", not "SUN8I_A33".
Add "_A33" after "SUN8I" on the register names.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 2 +-
include/linux/mfd/sun4i-gpadc.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 04d7147e0110..03804ff9c006 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -88,7 +88,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
- .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
+ .tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
};
struct sun4i_gpadc_iio {
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 139872c2e0fe..78d31984a222 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -38,9 +38,9 @@
#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x))
#define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0)
-/* TP_CTRL1 bits for sun8i SoCs */
-#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
-#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
+/* TP_CTRL1 bits for A33 */
+#define SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
+#define SUN8I_A33_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
#define SUN4I_GPADC_CTRL2 0x08
--
2.17.1

237
patch/kernel/archive/sunxi-5.11/0012-iio-adc-sun4i-gpadc-iio-rework-sampling-start-end-co.patch
View File

@@ -1,237 +0,0 @@
From 3de3b1512ed5905e9522a4966d238f571825ee70 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 20 Jan 2018 14:03:10 +0100
Subject: [PATCH 012/146] iio: adc: sun4i-gpadc-iio: rework: sampling start/end
code readout reg
For adding newer sensor some basic rework of the code is necessary.
This commit reworks the code and allows the sampling start/end code and
the position of value readout register to be altered. Later the start/end
functions will be used to configure the ths and start/stop the
sampling.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 87 ++++++++++++++++++++++++++++---
include/linux/mfd/sun4i-gpadc.h | 19 +++++--
2 files changed, 94 insertions(+), 12 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 03804ff9c006..363936b37c5a 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -49,6 +49,18 @@ static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
}
+struct sun4i_gpadc_iio;
+
+/*
+ * Prototypes for these functions, which enable these functions to be
+ * referenced in gpadc_data structures.
+ */
+static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info);
+static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info);
+
+static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info);
+static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info);
+
struct gpadc_data {
int temp_offset;
int temp_scale;
@@ -56,6 +68,13 @@ struct gpadc_data {
unsigned int tp_adc_select;
unsigned int (*adc_chan_select)(unsigned int chan);
unsigned int adc_chan_mask;
+ unsigned int temp_data;
+ int (*sample_start)(struct sun4i_gpadc_iio *info);
+ int (*sample_end)(struct sun4i_gpadc_iio *info);
+ u32 ctrl0_map;
+ u32 ctrl2_map;
+ u32 sensor_en_map;
+ u32 filter_map;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -65,6 +84,9 @@ static const struct gpadc_data sun4i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -74,6 +96,9 @@ static const struct gpadc_data sun5i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -83,12 +108,18 @@ static const struct gpadc_data sun6i_gpadc_data = {
.tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun6i_gpadc_chan_select,
.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
.tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
+ .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .sample_start = sun4i_gpadc_sample_start,
+ .sample_end = sun4i_gpadc_sample_end,
};
struct sun4i_gpadc_iio {
@@ -277,7 +308,7 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
if (info->no_irq) {
pm_runtime_get_sync(indio_dev->dev.parent);
- regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
+ regmap_read(info->regmap, info->data->temp_data, val);
pm_runtime_mark_last_busy(indio_dev->dev.parent);
pm_runtime_put_autosuspend(indio_dev->dev.parent);
@@ -382,10 +413,8 @@ static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static int sun4i_gpadc_runtime_suspend(struct device *dev)
+static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
{
- struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
-
/* Disable the ADC on IP */
regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
/* Disable temperature sensor on IP */
@@ -394,19 +423,32 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
return 0;
}
-static int sun4i_gpadc_runtime_resume(struct device *dev)
+static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info)
+{
+ /* Disable temperature sensor */
+ regmap_write(info->regmap, SUNXI_THS_CTRL2, 0x0);
+
+ return 0;
+}
+
+static int sun4i_gpadc_runtime_suspend(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ return info->data->sample_end(info);
+}
+
+static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
+{
/* clkin = 6MHz */
regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
SUN4I_GPADC_CTRL0_FS_DIV(7) |
- SUN4I_GPADC_CTRL0_T_ACQ(63));
+ SUNXI_THS_ACQ0(63));
regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
- SUN4I_GPADC_CTRL3_FILTER_EN |
- SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
+ SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(1));
/* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
regmap_write(info->regmap, SUN4I_GPADC_TPR,
SUN4I_GPADC_TPR_TEMP_ENABLE |
@@ -415,6 +457,35 @@ static int sun4i_gpadc_runtime_resume(struct device *dev)
return 0;
}
+static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
+{
+ u32 value;
+
+ if (info->data->ctrl0_map)
+ regmap_write(info->regmap, SUNXI_THS_CTRL0,
+ info->data->ctrl0_map);
+
+ regmap_write(info->regmap, SUNXI_THS_CTRL2,
+ info->data->ctrl2_map);
+
+ regmap_write(info->regmap, SUNXI_THS_FILTER,
+ info->data->filter_map);
+
+ regmap_read(info->regmap, SUNXI_THS_CTRL2, &value);
+
+ regmap_write(info->regmap, SUNXI_THS_CTRL2,
+ info->data->sensor_en_map | value);
+
+ return 0;
+}
+
+static int sun4i_gpadc_runtime_resume(struct device *dev)
+{
+ struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+
+ return info->data->sample_start(info);
+}
+
static int sun4i_gpadc_get_temp(void *data, int *temp)
{
struct sun4i_gpadc_iio *info = data;
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 78d31984a222..39e096c3ddac 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -17,7 +17,6 @@
#define SUN4I_GPADC_CTRL0_ADC_CLK_SELECT BIT(22)
#define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20)
#define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16)
-#define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x))
#define SUN4I_GPADC_CTRL1 0x04
@@ -51,9 +50,6 @@
#define SUN4I_GPADC_CTRL3 0x0c
-#define SUN4I_GPADC_CTRL3_FILTER_EN BIT(2)
-#define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
-
#define SUN4I_GPADC_TPR 0x18
#define SUN4I_GPADC_TPR_TEMP_ENABLE BIT(16)
@@ -90,6 +86,21 @@
/* 10s delay before suspending the IP */
#define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000
+/* SUNXI_THS COMMON REGISTERS + DEFINES */
+#define SUNXI_THS_CTRL0 0x00
+#define SUNXI_THS_CTRL2 0x40
+#define SUNXI_THS_FILTER 0x70
+
+#define SUNXI_THS_FILTER_EN BIT(2)
+#define SUNXI_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
+#define SUNXI_THS_ACQ0(x) (GENMASK(15, 0) & (x))
+#define SUNXI_THS_ACQ1(x) (GENMASK(31, 16) & ((x) << 16))
+
+#define SUNXI_THS_TEMP_SENSE_EN0 BIT(0)
+#define SUNXI_THS_TEMP_SENSE_EN1 BIT(1)
+#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
+#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+
struct sun4i_gpadc_dev {
struct device *dev;
struct regmap *regmap;
--
2.17.1

168
patch/kernel/archive/sunxi-5.11/0013-iio-adc-sun4i-gpadc-iio-rework-support-clocks-and-re.patch
View File

@@ -1,168 +0,0 @@
From c2d19fecbff6a21b3ab351c7843ae27de0d10b5b Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:23:00 +0100
Subject: [PATCH 013/146] iio: adc: sun4i-gpadc-iio: rework: support clocks and
reset
For adding newer sensor some basic rework of the code is necessary.
The SoCs after H3 has newer thermal sensor ADCs, which have two clock
inputs (bus clock and sampling clock) and a reset. The registers are
also re-arranged.
This commit reworks the code, adds the process of the clocks and
resets.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 80 +++++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 363936b37c5a..1a80744bd472 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -22,6 +22,7 @@
* shutdown for not being used.
*/
+#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/io.h>
@@ -31,6 +32,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
+#include <linux/reset.h>
#include <linux/thermal.h>
#include <linux/delay.h>
@@ -75,6 +77,9 @@ struct gpadc_data {
u32 ctrl2_map;
u32 sensor_en_map;
u32 filter_map;
+ bool has_bus_clk;
+ bool has_bus_rst;
+ bool has_mod_clk;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -134,6 +139,9 @@ struct sun4i_gpadc_iio {
atomic_t ignore_temp_data_irq;
const struct gpadc_data *data;
bool no_irq;
+ struct clk *bus_clk;
+ struct clk *mod_clk;
+ struct reset_control *reset;
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -435,6 +443,12 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ if (info->data->has_mod_clk)
+ clk_disable(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_disable(info->bus_clk);
+
return info->data->sample_end(info);
}
@@ -483,6 +497,12 @@ static int sun4i_gpadc_runtime_resume(struct device *dev)
{
struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
+ if (info->data->has_mod_clk)
+ clk_enable(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_enable(info->bus_clk);
+
return info->data->sample_start(info);
}
@@ -597,10 +617,61 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
return ret;
}
+ if (info->data->has_bus_rst) {
+ info->reset = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(info->reset)) {
+ ret = PTR_ERR(info->reset);
+ return ret;
+ }
+
+ ret = reset_control_deassert(info->reset);
+ if (ret)
+ return ret;
+ }
+
+ if (info->data->has_bus_clk) {
+ info->bus_clk = devm_clk_get(&pdev->dev, "bus");
+ if (IS_ERR(info->bus_clk)) {
+ ret = PTR_ERR(info->bus_clk);
+ goto assert_reset;
+ }
+
+ ret = clk_prepare_enable(info->bus_clk);
+ if (ret)
+ goto assert_reset;
+ }
+
+ if (info->data->has_mod_clk) {
+ info->mod_clk = devm_clk_get(&pdev->dev, "mod");
+ if (IS_ERR(info->mod_clk)) {
+ ret = PTR_ERR(info->mod_clk);
+ goto disable_bus_clk;
+ }
+
+ /* Running at 6MHz */
+ ret = clk_set_rate(info->mod_clk, 4000000);
+ if (ret)
+ goto disable_bus_clk;
+
+ ret = clk_prepare_enable(info->mod_clk);
+ if (ret)
+ goto disable_bus_clk;
+ }
+
if (IS_ENABLED(CONFIG_THERMAL_OF))
info->sensor_device = &pdev->dev;
return 0;
+
+disable_bus_clk:
+ if (info->data->has_bus_clk)
+ clk_disable_unprepare(info->bus_clk);
+
+assert_reset:
+ if (info->data->has_bus_rst)
+ reset_control_assert(info->reset);
+
+ return ret;
}
static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
@@ -766,6 +837,15 @@ static int sun4i_gpadc_remove(struct platform_device *pdev)
if (!info->no_irq)
iio_map_array_unregister(indio_dev);
+ if (info->data->has_mod_clk)
+ clk_disable_unprepare(info->mod_clk);
+
+ if (info->data->has_bus_clk)
+ clk_disable_unprepare(info->bus_clk);
+
+ if (info->data->has_bus_rst)
+ reset_control_assert(info->reset);
+
return 0;
}
--
2.17.1

186
patch/kernel/archive/sunxi-5.11/0014-iio-adc-sun4i-gpadc-iio-rework-support-multible-sens.patch
View File

@@ -1,186 +0,0 @@
From e684b6faf4b5509f852867cac4830a0274f89211 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:26:50 +0100
Subject: [PATCH 014/146] iio: adc: sun4i-gpadc-iio: rework: support multible
sensors
For adding newer sensor some basic rework of the code is necessary.
This patch reworks the driver to be able to handle more than one
thermal sensor. Newer SoC like the A80 have 4 thermal sensors.
Because of this the maximal sensor count value was set to 4.
The sensor_id value is set during sensor registration and is for each
registered sensor indiviual. This makes it able to differntiate the
sensors when the value is read from the register.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 36 ++++++++++++++++++++-----------
include/linux/mfd/sun4i-gpadc.h | 6 ++++++
2 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 1a80744bd472..bff06f2798e8 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -70,7 +70,7 @@ struct gpadc_data {
unsigned int tp_adc_select;
unsigned int (*adc_chan_select)(unsigned int chan);
unsigned int adc_chan_mask;
- unsigned int temp_data;
+ unsigned int temp_data[MAX_SENSOR_COUNT];
int (*sample_start)(struct sun4i_gpadc_iio *info);
int (*sample_end)(struct sun4i_gpadc_iio *info);
u32 ctrl0_map;
@@ -80,6 +80,7 @@ struct gpadc_data {
bool has_bus_clk;
bool has_bus_rst;
bool has_mod_clk;
+ int sensor_count;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -89,9 +90,10 @@ static const struct gpadc_data sun4i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -101,9 +103,10 @@ static const struct gpadc_data sun5i_gpadc_data = {
.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun4i_gpadc_chan_select,
.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -113,18 +116,20 @@ static const struct gpadc_data sun6i_gpadc_data = {
.tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
.adc_chan_select = &sun6i_gpadc_chan_select,
.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
.temp_offset = -1662,
.temp_scale = 162,
.tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN,
- .temp_data = SUN4I_GPADC_TEMP_DATA,
+ .temp_data = {SUN4I_GPADC_TEMP_DATA, 0, 0, 0},
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
+ .sensor_count = 1,
};
struct sun4i_gpadc_iio {
@@ -142,6 +147,7 @@ struct sun4i_gpadc_iio {
struct clk *bus_clk;
struct clk *mod_clk;
struct reset_control *reset;
+ int sensor_id;
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -309,14 +315,15 @@ static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
}
-static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
+static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val,
+ int sensor)
{
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
if (info->no_irq) {
pm_runtime_get_sync(indio_dev->dev.parent);
- regmap_read(info->regmap, info->data->temp_data, val);
+ regmap_read(info->regmap, info->data->temp_data[sensor], val);
pm_runtime_mark_last_busy(indio_dev->dev.parent);
pm_runtime_put_autosuspend(indio_dev->dev.parent);
@@ -363,7 +370,7 @@ static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
val);
else
- ret = sun4i_gpadc_temp_read(indio_dev, val);
+ ret = sun4i_gpadc_temp_read(indio_dev, val, 0);
if (ret)
return ret;
@@ -511,7 +518,7 @@ static int sun4i_gpadc_get_temp(void *data, int *temp)
struct sun4i_gpadc_iio *info = data;
int val, scale, offset;
- if (sun4i_gpadc_temp_read(info->indio_dev, &val))
+ if (sun4i_gpadc_temp_read(info->indio_dev, &val, info->sensor_id))
return -ETIMEDOUT;
sun4i_gpadc_temp_scale(info->indio_dev, &scale);
@@ -755,7 +762,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
{
struct sun4i_gpadc_iio *info;
struct iio_dev *indio_dev;
- int ret;
+ int ret, i;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
if (!indio_dev)
@@ -788,9 +795,12 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
- info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
- 0, info,
- &sun4i_ts_tz_ops);
+ for (i = 0; i < info->data->sensor_count; i++) {
+ info->sensor_id = i;
+ info->tzd = thermal_zone_of_sensor_register(
+ info->sensor_device,
+ i, info, &sun4i_ts_tz_ops);
+ }
/*
* Do not fail driver probing when failing to register in
* thermal because no thermal DT node is found.
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 39e096c3ddac..40b4dd9d2405 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -90,6 +90,10 @@
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
#define SUNXI_THS_FILTER 0x70
+#define SUNXI_THS_TDATA0 0x80
+#define SUNXI_THS_TDATA1 0x84
+#define SUNXI_THS_TDATA2 0x88
+#define SUNXI_THS_TDATA3 0x8c
#define SUNXI_THS_FILTER_EN BIT(2)
#define SUNXI_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
@@ -101,6 +105,8 @@
#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+#define MAX_SENSOR_COUNT 4
+
struct sun4i_gpadc_dev {
struct device *dev;
struct regmap *regmap;
--
2.17.1

166
patch/kernel/archive/sunxi-5.11/0015-iio-adc-sun4i-gpadc-iio-rework-support-nvmem-calibra.patch
View File

@@ -1,166 +0,0 @@
From 9bb64076c49cf41aaa252ce7b5aa24b93c322bd5 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 22:29:55 +0100
Subject: [PATCH 015/146] iio: adc: sun4i-gpadc-iio: rework: support nvmem
calibration data
This patch reworks the driver to support nvmem calibration cells.
The driver checks if the nvmem calibration is supported and reads out
the nvmem. At the beginning of the startup process the calibration data
is written to the related registers.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 52 +++++++++++++++++++++++++++++++
include/linux/mfd/sun4i-gpadc.h | 2 ++
2 files changed, 54 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index bff06f2798e8..7b12666cdd9e 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -27,6 +27,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
@@ -81,6 +82,7 @@ struct gpadc_data {
bool has_bus_rst;
bool has_mod_clk;
int sensor_count;
+ bool supports_nvmem;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -94,6 +96,7 @@ static const struct gpadc_data sun4i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -107,6 +110,7 @@ static const struct gpadc_data sun5i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -120,6 +124,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
@@ -130,6 +135,7 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.sample_start = sun4i_gpadc_sample_start,
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
+ .supports_nvmem = false,
};
struct sun4i_gpadc_iio {
@@ -148,6 +154,8 @@ struct sun4i_gpadc_iio {
struct clk *mod_clk;
struct reset_control *reset;
int sensor_id;
+ u32 calibration_data[2];
+ bool has_calibration_data[2];
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
struct thermal_zone_device *tzd;
@@ -459,6 +467,17 @@ static int sun4i_gpadc_runtime_suspend(struct device *dev)
return info->data->sample_end(info);
}
+static void sunxi_calibrate(struct sun4i_gpadc_iio *info)
+{
+ if (info->has_calibration_data[0])
+ regmap_write(info->regmap, SUNXI_THS_CDATA_0_1,
+ info->calibration_data[0]);
+
+ if (info->has_calibration_data[1])
+ regmap_write(info->regmap, SUNXI_THS_CDATA_2_3,
+ info->calibration_data[1]);
+}
+
static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
{
/* clkin = 6MHz */
@@ -481,6 +500,7 @@ static int sun4i_gpadc_sample_start(struct sun4i_gpadc_iio *info)
static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
{
u32 value;
+ sunxi_calibrate(info);
if (info->data->ctrl0_map)
regmap_write(info->regmap, SUNXI_THS_CTRL0,
@@ -602,6 +622,9 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
struct resource *mem;
void __iomem *base;
int ret;
+ struct nvmem_cell *cell;
+ ssize_t cell_size;
+ u64 *cell_data;
info->data = of_device_get_match_data(&pdev->dev);
if (!info->data)
@@ -616,6 +639,35 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
if (IS_ERR(base))
return PTR_ERR(base);
+ info->has_calibration_data[0] = false;
+ info->has_calibration_data[1] = false;
+
+ if (!info->data->supports_nvmem)
+ goto no_nvmem;
+
+ cell = devm_nvmem_cell_get(&pdev->dev, "calibration");
+ if (IS_ERR(cell)) {
+ if (PTR_ERR(cell) == -EPROBE_DEFER)
+ return PTR_ERR(cell);
+ } else {
+ cell_data = (u64 *)nvmem_cell_read(cell, &cell_size);
+ devm_nvmem_cell_put(&pdev->dev, cell);
+ if (cell_size <= 4) {
+ info->has_calibration_data[0] = true;
+ info->calibration_data[0] = be32_to_cpu(cell_data[0] &
+ GENMASK(31, 0));
+ } else if (cell_size <= 8) {
+ info->has_calibration_data[0] = true;
+ info->calibration_data[0] = be32_to_cpu(cell_data[0] &
+ GENMASK(31, 0));
+ info->has_calibration_data[1] = true;
+ info->calibration_data[1] = be32_to_cpu(
+ (cell_data[0] >> 32) & GENMASK(31, 0));
+ }
+ }
+
+no_nvmem:
+
info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
&sun4i_gpadc_regmap_config);
if (IS_ERR(info->regmap)) {
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 40b4dd9d2405..c251002431bd 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -90,6 +90,8 @@
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
#define SUNXI_THS_FILTER 0x70
+#define SUNXI_THS_CDATA_0_1 0x74
+#define SUNXI_THS_CDATA_2_3 0x78
#define SUNXI_THS_TDATA0 0x80
#define SUNXI_THS_TDATA1 0x84
#define SUNXI_THS_TDATA2 0x88
--
2.17.1

253
patch/kernel/archive/sunxi-5.11/0016-iio-adc-sun4i-gpadc-iio-rework-add-interrupt-support.patch
View File

@@ -1,253 +0,0 @@
From 153c005037601e2ba02f7fb36d8864194d8c98c8 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 11:20:55 +0100
Subject: [PATCH 016/146] iio: adc: sun4i-gpadc-iio: rework: add interrupt
support
This patch rewors the driver to support interrupts for the thermal part
of the sensor.
This is only available for the newer sensor (currently H3 and A83T).
The interrupt will be trigerd on data available and triggers the update
for the thermal sensors. All newer sensors have different amount of
sensors and different interrupts for each device the reset of the
interrupts need to be done different
For the newer sensors is the autosuspend disabled.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 68 ++++++++++++++++++++++++++++---
include/linux/mfd/sun4i-gpadc.h | 33 +++++++++++++++
2 files changed, 95 insertions(+), 6 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 7b12666cdd9e..77e07f042730 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -78,11 +78,14 @@ struct gpadc_data {
u32 ctrl2_map;
u32 sensor_en_map;
u32 filter_map;
+ u32 irq_clear_map;
+ u32 irq_control_map;
bool has_bus_clk;
bool has_bus_rst;
bool has_mod_clk;
int sensor_count;
bool supports_nvmem;
+ bool support_irq;
};
static const struct gpadc_data sun4i_gpadc_data = {
@@ -97,6 +100,7 @@ static const struct gpadc_data sun4i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun5i_gpadc_data = {
@@ -111,6 +115,7 @@ static const struct gpadc_data sun5i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun6i_gpadc_data = {
@@ -125,6 +130,7 @@ static const struct gpadc_data sun6i_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
static const struct gpadc_data sun8i_a33_gpadc_data = {
@@ -136,6 +142,7 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.sample_end = sun4i_gpadc_sample_end,
.sensor_count = 1,
.supports_nvmem = false,
+ .support_irq = false,
};
struct sun4i_gpadc_iio {
@@ -339,6 +346,11 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val,
return 0;
}
+ if (info->data->support_irq) {
+ regmap_read(info->regmap, info->data->temp_data[sensor], val);
+ return 0;
+ }
+
return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
}
@@ -436,6 +448,17 @@ static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static irqreturn_t sunxi_irq_thread(int irq, void *data)
+{
+ struct sun4i_gpadc_iio *info = data;
+
+ regmap_write(info->regmap, SUNXI_THS_STAT, info->data->irq_clear_map);
+
+ thermal_zone_device_update(info->tzd, THERMAL_EVENT_TEMP_SAMPLE);
+
+ return IRQ_HANDLED;
+}
+
static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
{
/* Disable the ADC on IP */
@@ -448,6 +471,8 @@ static int sun4i_gpadc_sample_end(struct sun4i_gpadc_iio *info)
static int sunxi_ths_sample_end(struct sun4i_gpadc_iio *info)
{
+ /* Disable ths interrupt*/
+ regmap_write(info->regmap, SUNXI_THS_INTC, 0x0);
/* Disable temperature sensor */
regmap_write(info->regmap, SUNXI_THS_CTRL2, 0x0);
@@ -509,9 +534,15 @@ static int sunxi_ths_sample_start(struct sun4i_gpadc_iio *info)
regmap_write(info->regmap, SUNXI_THS_CTRL2,
info->data->ctrl2_map);
+ regmap_write(info->regmap, SUNXI_THS_STAT,
+ info->data->irq_clear_map);
+
regmap_write(info->regmap, SUNXI_THS_FILTER,
info->data->filter_map);
+ regmap_write(info->regmap, SUNXI_THS_INTC,
+ info->data->irq_control_map);
+
regmap_read(info->regmap, SUNXI_THS_CTRL2, &value);
regmap_write(info->regmap, SUNXI_THS_CTRL2,
@@ -625,12 +656,29 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
struct nvmem_cell *cell;
ssize_t cell_size;
u64 *cell_data;
+ int irq;
info->data = of_device_get_match_data(&pdev->dev);
if (!info->data)
return -ENODEV;
- info->no_irq = true;
+ if (info->data->support_irq) {
+ /* only the new versions of ths support right now irqs */
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get IRQ: %d\n", irq);
+ return irq;
+ }
+
+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+ sunxi_irq_thread, IRQF_ONESHOT,
+ dev_name(&pdev->dev), info);
+ if (ret)
+ return ret;
+
+ } else
+ info->no_irq = true;
+
indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
indio_dev->channels = sun8i_a33_gpadc_channels;
@@ -840,11 +888,13 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
if (ret)
return ret;
- pm_runtime_set_autosuspend_delay(&pdev->dev,
- SUN4I_GPADC_AUTOSUSPEND_DELAY);
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_suspended(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ if (!info->data->support_irq) {
+ pm_runtime_set_autosuspend_delay(&pdev->dev,
+ SUN4I_GPADC_AUTOSUSPEND_DELAY);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ pm_runtime_set_suspended(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+ }
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
for (i = 0; i < info->data->sensor_count; i++) {
@@ -865,6 +915,9 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
}
}
+ if (info->data->support_irq)
+ info->data->sample_start(info);
+
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0) {
dev_err(&pdev->dev, "could not register the device\n");
@@ -894,6 +947,9 @@ static int sun4i_gpadc_remove(struct platform_device *pdev)
if (!IS_ENABLED(CONFIG_THERMAL_OF))
return 0;
+ if (info->data->support_irq)
+ info->data->sample_end(info);
+
thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
if (!info->no_irq)
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index c251002431bd..ab34a96a7ff3 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -89,6 +89,8 @@
/* SUNXI_THS COMMON REGISTERS + DEFINES */
#define SUNXI_THS_CTRL0 0x00
#define SUNXI_THS_CTRL2 0x40
+#define SUNXI_THS_INTC 0x44
+#define SUNXI_THS_STAT 0x48
#define SUNXI_THS_FILTER 0x70
#define SUNXI_THS_CDATA_0_1 0x74
#define SUNXI_THS_CDATA_2_3 0x78
@@ -107,6 +109,37 @@
#define SUNXI_THS_TEMP_SENSE_EN2 BIT(2)
#define SUNXI_THS_TEMP_SENSE_EN3 BIT(3)
+#define SUNXI_THS_TEMP_PERIOD(x) (GENMASK(31, 12) & ((x) << 12))
+
+#define SUNXI_THS_INTS_ALARM_OFF_2 BIT(14)
+#define SUNXI_THS_INTS_ALARM_OFF_1 BIT(13)
+#define SUNXI_THS_INTS_ALARM_OFF_0 BIT(12)
+#define SUNXI_THS_INTS_TDATA_IRQ_3 BIT(11)
+#define SUNXI_THS_INTS_TDATA_IRQ_2 BIT(10)
+#define SUNXI_THS_INTS_TDATA_IRQ_1 BIT(9)
+#define SUNXI_THS_INTS_TDATA_IRQ_0 BIT(8)
+#define SUNXI_THS_INTS_SHUT_INT_3 BIT(7)
+#define SUNXI_THS_INTS_SHUT_INT_2 BIT(6)
+#define SUNXI_THS_INTS_SHUT_INT_1 BIT(5)
+#define SUNXI_THS_INTS_SHUT_INT_0 BIT(4)
+#define SUNXI_THS_INTS_ALARM_INT_3 BIT(3)
+#define SUNXI_THS_INTS_ALARM_INT_2 BIT(2)
+#define SUNXI_THS_INTS_ALARM_INT_1 BIT(1)
+#define SUNXI_THS_INTS_ALARM_INT_0 BIT(0)
+
+#define SUNXI_THS_INTC_TDATA_IRQ_EN3 BIT(11)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN2 BIT(10)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN1 BIT(9)
+#define SUNXI_THS_INTC_TDATA_IRQ_EN0 BIT(8)
+#define SUNXI_THS_INTC_SHUT_INT_EN3 BIT(7)
+#define SUNXI_THS_INTC_SHUT_INT_EN2 BIT(6)
+#define SUNXI_THS_INTC_SHUT_INT_EN1 BIT(5)
+#define SUNXI_THS_INTC_SHUT_INT_EN0 BIT(4)
+#define SUNXI_THS_INTC_ALARM_INT_EN3 BIT(3)
+#define SUNXI_THS_INTC_ALARM_INT_EN2 BIT(2)
+#define SUNXI_THS_INTC_ALARM_INT_EN1 BIT(1)
+#define SUNXI_THS_INTC_ALARM_INT_EN0 BIT(0)
+
#define MAX_SENSOR_COUNT 4
struct sun4i_gpadc_dev {
--
2.17.1

67
patch/kernel/archive/sunxi-5.11/0017-iio-adc-sun4i-gpadc-iio-add-support-for-H3-thermal-s.patch
View File

@@ -1,67 +0,0 @@
From 1968a84bd7cfdf60b29a154e682c4239bdfe6cb7 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 23:14:09 +0100
Subject: [PATCH 017/146] iio: adc: sun4i-gpadc-iio: add support for H3 thermal
sensor
This patch adds support for the H3 ths sensor.
The H3 supports interrupts. The interrupt is configured to update the
the sensor values every second. The calibration data is writen at the
begin of the init process.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 77e07f042730..f2e0ec65c53e 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -145,6 +145,31 @@ static const struct gpadc_data sun8i_a33_gpadc_data = {
.support_irq = false,
};
+static const struct gpadc_data sun8i_h3_ths_data = {
+ .temp_offset = -1791,
+ .temp_scale = -121,
+ .temp_data = {SUNXI_THS_TDATA0, 0, 0, 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 1,
+ .supports_nvmem = true,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0xff),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x3f),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_ALARM_OFF_0,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_TEMP_PERIOD(0x7),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -643,6 +668,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-a33-ths",
.data = &sun8i_a33_gpadc_data,
},
+ {
+ .compatible = "allwinner,sun8i-h3-ths",
+ .data = &sun8i_h3_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

75
patch/kernel/archive/sunxi-5.11/0018-iio-adc-sun4i-gpadc-iio-add-support-for-A83T-thermal.patch
View File

@@ -1,75 +0,0 @@
From 20484f59a26747db157563c9ba13767c21b48efb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sun, 21 Jan 2018 18:50:11 +0100
Subject: [PATCH 018/146] iio: adc: sun4i-gpadc-iio: add support for A83T
thermal sensor
This patch adds support for the A83T ths sensor.
The A83T does not support interrupts. This seems to be broken.
The calibration data is writen at the begin of the init process.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 38 +++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index f2e0ec65c53e..b8693afcdbea 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -170,6 +170,40 @@ static const struct gpadc_data sun8i_h3_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x7),
};
+static const struct gpadc_data sun8i_a83t_ths_data = {
+ .temp_offset = -2724,
+ .temp_scale = -70,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .sensor_count = 3,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x1f3),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_TEMP_PERIOD(0x257),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -672,6 +706,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-h3-ths",
.data = &sun8i_h3_ths_data,
},
+ {
+ .compatible = "allwinner,sun8i-a83t-ths",
+ .data = &sun8i_a83t_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

30
patch/kernel/archive/sunxi-5.11/0020-arm-dts-sun8i-h3-add-support-for-the-thermal-sensor-.patch
View File

@@ -1,30 +0,0 @@
From e475b475fbab608b805a57c8cc083e7b3da77954 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:07:15 +0100
Subject: [PATCH 020/146] arm: dts: sun8i: h3: add support for the thermal
sensor in H3
This patch adds the missing compatible and the thermal sensor cells.
The H3 has one sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index f0096074a467..5907b54b6e1d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -216,3 +216,8 @@
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
+
+&ths {
+ compatible = "allwinner,sun8i-h3-ths";
+ #thermal-sensor-cells = <0>;
+};
--
2.17.1

26
patch/kernel/archive/sunxi-5.11/0026-iio-adc-Kconfig-enable-A80-A64-and-H5-for-THS.patch
View File

@@ -1,26 +0,0 @@
From f79548364ea767853c5a95f1db2407219f06572a Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 22:35:13 +0100
Subject: [PATCH 026/146] iio: adc: Kconfig: enable A80, A64 and H5 for THS
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 4a754921fb6f..c77aec60a364 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -723,7 +723,7 @@ config STX104
config SUN4I_GPADC
tristate "Support for the Allwinner SoCs GPADC"
depends on IIO
- depends on MFD_SUN4I_GPADC || MACH_SUN8I
+ depends on MFD_SUN4I_GPADC || MACH_SUN8I || MACH_SUN50I || MACH_SUN9I
depends on THERMAL || !THERMAL_OF
select REGMAP_IRQ
help
--
2.17.1

79
patch/kernel/archive/sunxi-5.11/0027-iio-adc-sun4i-gpadc-iio-add-support-for-H5-thermal-s.patch
View File

@@ -1,79 +0,0 @@
From 46f1130b5286457e519c296a4b683747deb983cb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 16:58:30 +0100
Subject: [PATCH 027/146] iio: adc: sun4i-gpadc-iio: add support for H5 thermal
sensor
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch adds support for the H5 ths sensor.
The H5 supports interrupts. The interrupt is configured to update
the sensor values every second. The sensor is except the scale/offset
values and an additional sensor for the gpu the same. A temperatur higer
than 70°C needs an other formula. Since the operating temperatures maximum
is 70°C this case was neglegted.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 36 +++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index b8693afcdbea..40529a197335 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -204,6 +204,38 @@ static const struct gpadc_data sun8i_a83t_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x257),
};
+static const struct gpadc_data sun50i_h5_ths_data = {
+ .temp_offset = -1872,
+ .temp_scale = -119,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1, 0, 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 2,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_ACQ1(0x1f3),
+ .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1,
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_ALARM_OFF_0 |
+ SUNXI_THS_INTS_ALARM_OFF_1,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_TEMP_PERIOD(0x3a),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -710,6 +742,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun8i-a83t-ths",
.data = &sun8i_a83t_ths_data,
},
+ {
+ .compatible = "allwinner,sun50i-h5-ths",
+ .data = &sun50i_h5_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

86
patch/kernel/archive/sunxi-5.11/0028-iio-adc-sun4i-gpadc-iio-add-support-for-A80-thermal-.patch
View File

@@ -1,86 +0,0 @@
From 413a3bde03c061d4b5affe25ad75f4dfe6e3282b Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 17:28:02 +0100
Subject: [PATCH 028/146] iio: adc: sun4i-gpadc-iio: add support for A80
thermal sensor
This patch adds support for the A80 ths sensor.
The A80 has 4 sensors and supports interrupts. The interrupt is configured to update
the sensor values every second. The A80 shares some registers with the
integrated GPADC. ACQ0 must be set in the GPADC register with the offset
0x00. In fact the GPADC and the THS use the same register base and also
the same clocks and resets.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 46 +++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 40529a197335..7ab175f0bd40 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -236,6 +236,48 @@ static const struct gpadc_data sun50i_h5_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x3a),
};
+static const struct gpadc_data sun9i_a80_ths_data = {
+ .temp_offset = -2794,
+ .temp_scale = -67,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ SUNXI_THS_TDATA3},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 4,
+ .supports_nvmem = false,
+ .support_irq = true,
+ .ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+ .ctrl2_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2 |
+ SUNXI_THS_TEMP_SENSE_EN3 |
+ SUNXI_THS_ACQ1(0x1f3),
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x2),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_ALARM_INT_3 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_3 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_3,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN3 |
+ SUNXI_THS_TEMP_PERIOD(0x3a),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -746,6 +788,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun50i-h5-ths",
.data = &sun50i_h5_ths_data,
},
+ {
+ .compatible = "allwinner,sun9i-a80-ths",
+ .data = &sun9i_a80_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

87
patch/kernel/archive/sunxi-5.11/0029-iio-adc-sun4i-gpadc-iio-add-support-for-A64-thermal-.patch
View File

@@ -1,87 +0,0 @@
From 5a1eb96e482c276f8bc81c18696748ecb20b3656 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 17:41:45 +0100
Subject: [PATCH 029/146] iio: adc: sun4i-gpadc-iio: add support for A64
thermal sensor
This patch adds support for the A64 ths sensor.
The A64 supports interrupts. The interrupt is configured to update
the sensor values every second.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 50 +++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 7ab175f0bd40..fdfa01bad325 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -278,6 +278,52 @@ static const struct gpadc_data sun9i_a80_ths_data = {
SUNXI_THS_TEMP_PERIOD(0x3a),
};
+static const struct gpadc_data sun50i_a64_ths_data = {
+ .temp_offset = -2170,
+ .temp_scale = -117,
+ .temp_data = {SUNXI_THS_TDATA0,
+ SUNXI_THS_TDATA1,
+ SUNXI_THS_TDATA2,
+ 0},
+ .sample_start = sunxi_ths_sample_start,
+ .sample_end = sunxi_ths_sample_end,
+ .has_bus_clk = true,
+ .has_bus_rst = true,
+ .has_mod_clk = true,
+ .sensor_count = 3,
+ .supports_nvmem = false,
+ .support_irq = true,
+
+ /* The final sample period is calculated as follows:
+ * (THERMAL_PER + 1) * 4096 / 24MHz * 2^(FILTER_TYPE + 1)
+ *
+ * This results to about 1Hz with these settings.
+ */
+ .ctrl0_map = SUNXI_THS_ACQ0(0xff),
+ .ctrl2_map = SUNXI_THS_TEMP_SENSE_EN0 |
+ SUNXI_THS_TEMP_SENSE_EN1 |
+ SUNXI_THS_TEMP_SENSE_EN2 |
+ SUNXI_THS_ACQ1(0x3f),
+ .filter_map = SUNXI_THS_FILTER_EN |
+ SUNXI_THS_FILTER_TYPE(0x1),
+ .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+ SUNXI_THS_INTS_ALARM_INT_1 |
+ SUNXI_THS_INTS_ALARM_INT_2 |
+ SUNXI_THS_INTS_SHUT_INT_0 |
+ SUNXI_THS_INTS_SHUT_INT_1 |
+ SUNXI_THS_INTS_SHUT_INT_2 |
+ SUNXI_THS_INTS_TDATA_IRQ_0 |
+ SUNXI_THS_INTS_TDATA_IRQ_1 |
+ SUNXI_THS_INTS_TDATA_IRQ_2 |
+ SUNXI_THS_INTS_ALARM_OFF_0 |
+ SUNXI_THS_INTS_ALARM_OFF_1 |
+ SUNXI_THS_INTS_ALARM_OFF_2,
+ .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+ SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+ SUNXI_THS_TEMP_PERIOD(0x7),
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -792,6 +838,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
.compatible = "allwinner,sun9i-a80-ths",
.data = &sun9i_a80_ths_data,
},
+ {
+ .compatible = "allwinner,sun50i-a64-ths",
+ .data = &sun50i_a64_ths_data,
+ },
{ /* sentinel */ }
};
--
2.17.1

30
patch/kernel/archive/sunxi-5.11/0030-arm64-dts-allwinner-h5-add-support-for-the-thermal-s.patch
View File

@@ -1,30 +0,0 @@
From e6e2d489bd4776f62a962ad8f511d862a1864f80 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Fri, 26 Jan 2018 01:40:38 +0100
Subject: [PATCH 030/146] arm64: dts: allwinner: h5: add support for the
thermal sensor in H5
This patch adds the missing compatible and the thermal sensor cells.
The H5 has two sensors.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62d646baac3c..ee12490203b8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -129,3 +129,8 @@
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
+
+&ths {
+ compatible = "allwinner,sun50i-h5-ths";
+ #thermal-sensor-cells = <1>;
+};
--
2.17.1

42
patch/kernel/archive/sunxi-5.11/0032-arm-dts-sun9i-a80-add-support-for-the-thermal-sensor.patch
View File

@@ -1,42 +0,0 @@
From 4990f2559d012df5c225df7cda3c29d60d3263b7 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:30:16 +0100
Subject: [PATCH 032/146] arm: dts: sun9i: a80: add support for the thermal
sensor in A80
As we have gained the support for the thermal sensor in A80,
we can now add its device nodes to the device tree.
The clocks and the resets are shared between the GPADC and the THS
sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 25591d6883ef..9411831d04aa 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -913,6 +913,17 @@
#reset-cells = <1>;
};
+ ths: thermal-sensor@6004C00 {
+ compatible = "allwinner,sun9i-a80-ths";
+ reg = <0x06004C00 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_GPADC>, <&ccu CLK_GPADC>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
timer@6000c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x06000c00 0xa0>;
--
2.17.1

54
patch/kernel/archive/sunxi-5.11/0033-arm-dts-sun9i-a80-add-thermal-zone-to-A80.patch
View File

@@ -1,54 +0,0 @@
From 559d5cc47ffd71a47da77424e251a8d21250cabb Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:39:09 +0100
Subject: [PATCH 033/146] arm: dts: sun9i: a80: add thermal zone to A80
This patch adds the thermal zones to the A80.
Sensor 0 is located besides the big CPU, sensor 1 is located besides the
DRAM, sensor 2 is located besides the GPU and sensor 3 is located besides
the small CPU.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 9411831d04aa..6c52b33dad84 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -1221,4 +1221,30 @@
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ dram_thermal: dram-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+
+ cpu2_thermal: cpu2-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 3>;
+ };
+ };
};
--
2.17.1

31
patch/kernel/archive/sunxi-5.11/0036-sun4i-gpadc-iio-ignore-zero-samples-to-avoid-force-p.patch
View File

@@ -1,31 +0,0 @@
From a6b5eb09bddbd0c331f41fefa2fd2f71a2cf9455 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 24 Apr 2018 22:21:10 -0700
Subject: [PATCH 036/146] sun4i-gpadc-iio: ignore zero samples to avoid force
poweroff when reading first sample
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index fdfa01bad325..68256e73a4d2 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -751,6 +751,12 @@ static int sun4i_gpadc_get_temp(void *data, int *temp)
if (sun4i_gpadc_temp_read(info->indio_dev, &val, info->sensor_id))
return -ETIMEDOUT;
+ /* Ignore first sample which is always zero. 0 is either too
+ * cold or too hot, so we can safely ignore it
+ */
+ if (val == 0)
+ return -ETIMEDOUT;
+
sun4i_gpadc_temp_scale(info->indio_dev, &scale);
sun4i_gpadc_temp_offset(info->indio_dev, &offset);
--
2.17.1

33
patch/kernel/archive/sunxi-5.11/0072-drm-fourcc-add-ARM-tiled-format-modifier.patch
View File

@@ -1,33 +0,0 @@
From c578aadd5ccfe5c64f628ef3aa8c7ff88600e421 Mon Sep 17 00:00:00 2001
From: Qiang Yu <yuq825@gmail.com>
Date: Tue, 19 Jun 2018 13:51:17 +0800
Subject: [PATCH 072/146] drm/fourcc: add ARM tiled format modifier
Signed-off-by: Qiang Yu <yuq825@gmail.com>
---
include/uapi/drm/drm_fourcc.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 721ab7e54d96..097d9faca608 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -581,6 +581,15 @@ extern "C" {
*/
#define AFBC_FORMAT_MOD_SC (1ULL << 9)
+/*
+ * ARM tiled format
+ *
+ * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into
+ * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
+ * in the block are reordered.
+ */
+#define DRM_FORMAT_MOD_ARM_TILED fourcc_mod_code(ARM, 1)
+
#if defined(__cplusplus)
}
#endif
--
2.17.1

58
patch/kernel/archive/sunxi-5.11/0074-a64-ccu-enable-LDOs-for-pll-mipi-and-add-min-max-rat.patch
View File

@@ -1,58 +0,0 @@
From 9c4d2eb582078788a3f115fef91824d9213e237d Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Tue, 24 Jul 2018 10:17:55 -0700
Subject: [PATCH 074/146] a64: ccu: enable LDOs for pll-mipi and add min/max
rate for it
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 ++
drivers/clk/sunxi-ng/ccu_nkm.c | 5 +++++
drivers/clk/sunxi-ng/ccu_nkm.h | 3 +++
3 files changed, 10 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 1fe3c3fbc9bc..7c645f2c017a 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -163,6 +163,8 @@ static struct ccu_nkm pll_mipi_clk = {
.n = _SUNXI_CCU_MULT(8, 4),
.k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
.m = _SUNXI_CCU_DIV(0, 4),
+ .min_rate = 300000000,
+ .max_rate = 1400000000,
.common = {
.reg = 0x040,
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 841840e35e61..01e6df4c1232 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -122,6 +122,11 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
_nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
+ if (rate < nkm->min_rate)
+ rate = nkm->min_rate;
+ if (nkm->max_rate && (rate > nkm->max_rate))
+ rate = nkm->max_rate;
+
if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nkm->fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h
index cc6efb70a102..6e01836ef122 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.h
+++ b/drivers/clk/sunxi-ng/ccu_nkm.h
@@ -36,6 +36,9 @@ struct ccu_nkm {
unsigned int fixed_post_div;
+ unsigned int min_rate;
+ unsigned int max_rate;
+
struct ccu_common common;
};
--
2.17.1

25
patch/kernel/archive/sunxi-5.11/0075-sopine-baseboard-enable-HS200-for-eMMC.patch
View File

@@ -1,25 +0,0 @@
From 1d3ae34846fcee5e4d4ec54476c85992d03d204e Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 10 Sep 2018 16:09:30 -0700
Subject: [PATCH 075/146] sopine: baseboard: enable HS200 for eMMC
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index dc728b3b5556..abad307b414a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -119,6 +119,7 @@
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
status = "okay";
};
--
2.17.1

26
patch/kernel/archive/sunxi-5.11/0080-rtl8723bs-disable-error-message-about-failure-to-all.patch
View File

@@ -1,26 +0,0 @@
From 02d04263581ac956a4822b02ee7ccd15aa5600af Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Mon, 10 Sep 2018 20:32:51 -0700
Subject: [PATCH 080/146] rtl8723bs: disable error message about failure to
alloc recvbuf
---
drivers/staging/rtl8723bs/hal/sdio_ops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/hal/sdio_ops.c b/drivers/staging/rtl8723bs/hal/sdio_ops.c
index d6b93e1f78d8..ecc4d1db9bbe 100644
--- a/drivers/staging/rtl8723bs/hal/sdio_ops.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_ops.c
@@ -947,7 +947,7 @@ static struct recv_buf *sd_recv_rxfifo(struct adapter *adapter, u32 size)
recv_priv = &adapter->recvpriv;
recvbuf = rtw_dequeue_recvbuf(&recv_priv->free_recv_buf_queue);
if (!recvbuf) {
- DBG_871X_LEVEL(_drv_err_, "%s: alloc recvbuf FAIL!\n", __func__);
+ //DBG_871X_LEVEL(_drv_err_, "%s: alloc recvbuf FAIL!\n", __func__);
return NULL;
}
--
2.17.1

43
patch/kernel/archive/sunxi-5.11/0103-dt-bindings-power-supply-axp20x-add-AXP803-power-bin.patch
View File

@@ -1,43 +0,0 @@
From 5b0f15a9da1cb6110bc2eded53bf18626626179c Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:21 +0300
Subject: [PATCH 103/146] dt-bindings: power: supply: axp20x: add AXP803 power
bindings
The AXP803 power supplies are compatible with AXP813, but
add specific compatibles for them.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/power/supply/axp20x_ac_power.txt | 1 +
.../devicetree/bindings/power/supply/axp20x_battery.txt | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt b/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
index 7a1fb532abe5..acdeb4b8f4cc 100644
--- a/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
+++ b/Documentation/devicetree/bindings/power/supply/axp20x_ac_power.txt
@@ -4,6 +4,7 @@ Required Properties:
- compatible: One of:
"x-powers,axp202-ac-power-supply"
"x-powers,axp221-ac-power-supply"
+ "x-powers,axp803-ac-power-supply"
"x-powers,axp813-ac-power-supply"
This node is a subnode of the axp20x PMIC.
diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
index 41916f69902c..780ebd7e3b84 100644
--- a/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
+++ b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
@@ -4,6 +4,7 @@ Required Properties:
- compatible, one of:
"x-powers,axp209-battery-power-supply"
"x-powers,axp221-battery-power-supply"
+ "x-powers,axp803-battery-power-supply"
"x-powers,axp813-battery-power-supply"
This node is a subnode of its respective PMIC DT node.
--
2.17.1

38
patch/kernel/archive/sunxi-5.11/0104-dt-bindings-gpio-gpio-axp209-add-AXP803-GPIO-binding.patch
View File

@@ -1,38 +0,0 @@
From 80694d54812c5fc49dd738e17a9cf5a91f343cae Mon Sep 17 00:00:00 2001
From: Oskari Lemmela <oskari@lemmela.net>
Date: Tue, 23 Oct 2018 21:53:22 +0300
Subject: [PATCH 104/146] dt-bindings: gpio: gpio-axp209: add AXP803 GPIO
bindings
The AXP803 GPIO is compatible with AXP813 GPIO, but add
specific compatible for it.
Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/gpio/gpio-axp209.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt b/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
index fc42b2caa06d..5337a21d7bcf 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-axp209.txt
@@ -11,6 +11,7 @@ This driver employs the per-pin muxing pattern.
Required properties:
- compatible: Should be one of:
- "x-powers,axp209-gpio"
+ - "x-powers,axp803-gpio"
- "x-powers,axp813-gpio"
- #gpio-cells: Should be two. The first cell is the pin number and the
second is the GPIO flags.
@@ -67,6 +68,7 @@ GPIO0 | gpio_in, gpio_out, ldo, adc
GPIO1 | gpio_in, gpio_out, ldo, adc
GPIO2 | gpio_in, gpio_out
+axp803
axp813
------
GPIO | Functions
--
2.17.1

39
patch/kernel/archive/sunxi-5.11/0137-Pinebook-HDMI-audio.patch
View File

@@ -1,39 +0,0 @@
From 59197ec5632d29d173aae2fbe6c92402fc2f0a58 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 28 Oct 2018 19:07:23 -0700
Subject: [PATCH 137/146] Pinebook HDMI audio
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index 8c9bd4dfbbba..0f788400ece0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -123,6 +123,10 @@
};
};
+&i2s2 {
+ status = "okay";
+};
+
&mixer0 {
status = "okay";
};
@@ -373,6 +377,10 @@
"MIC2", "Internal Microphone Right";
};
+&hdmi_sound {
+ status = "okay";
+};
+
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
--
2.17.1

57
patch/kernel/archive/sunxi-5.11/0141-dt-bindings-net-bluetooth-Add-rtl8723bs-bluetooth.patch
View File

@@ -1,57 +0,0 @@
From d063238f64a1f0a4e8baf11e55d9cc1989816ee6 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:05:14 -0700
Subject: [PATCH 141/146] dt-bindings: net: bluetooth: Add rtl8723bs-bluetooth
Add binding document for bluetooth part of RTL8723BS/RTL8723CS
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../bindings/net/rtl8723bs-bluetooth.txt | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt b/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt
new file mode 100644
index 000000000000..8357f242ae4c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt
@@ -0,0 +1,35 @@
+RTL8723BS/RTL8723CS Bluetooth
+---------------------
+
+RTL8723CS/RTL8723CS is WiFi + BT chip. WiFi part is connected over SDIO, while
+BT is connected over serial. It speaks H5 protocol with few extra commands
+to upload firmware and change module speed.
+
+Required properties:
+
+ - compatible: should be one of the following:
+ * "realtek,rtl8723bs-bt"
+ * "realtek,rtl8723cs-bt"
+Optional properties:
+
+ - device-wake-gpios: GPIO specifier, used to wakeup the BT module (active high)
+ - enable-gpios: GPIO specifier, used to enable the BT module (active high)
+ - host-wake-gpios: GPIO specifier, used to wakeup the host processor (active high)
+ - firmware-postfix: firmware postfix to be used for firmware config
+ - reset-gpios: GPIO specifier, used to reset the BT module (active high)
+
+Example:
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix="pine64";
+ };
+};
--
2.17.1

44
patch/kernel/archive/sunxi-5.11/0144-arm64-allwinner-a64-enable-Bluetooth-On-Pinebook.patch
View File

@@ -1,44 +0,0 @@
From 26b3d6f8ffa77cb05066c11967a498d6dacbdc42 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:43:26 -0700
Subject: [PATCH 144/146] arm64: allwinner: a64: enable Bluetooth On Pinebook
Pinebook has an RTL8723CS WiFi + BT chip, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../boot/dts/allwinner/sun50i-a64-pinebook.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index 0f788400ece0..c1e57597f76a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -401,6 +401,20 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723cs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pinebook";
+ };
+};
+
&usb_otg {
dr_mode = "host";
};
--
2.17.1

40
patch/kernel/archive/sunxi-5.11/0145-arm64-allwinner-a64-enable-Bluetooth-On-Pine64.patch
View File

@@ -1,40 +0,0 @@
From 7f24fdacc41a34b5d1a39ae81f4f39660a5b72ca Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:45:16 -0700
Subject: [PATCH 145/146] arm64: allwinner: a64: enable Bluetooth On Pine64
Pine64 has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index f6fc0ed2f4ec..8e55e81c3236 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -333,7 +333,15 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
- status = "disabled";
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
};
/* On Pi-2 connector */
--
2.17.1

45
patch/kernel/archive/sunxi-5.11/0146-arm64-allwinner-a64-enable-Bluetooth-On-SoPine-baseb.patch
View File

@@ -1,45 +0,0 @@
From b325cd227f2426f938a08168b5c1b40111562e9e Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:50:09 -0700
Subject: [PATCH 146/146] arm64: allwinner: a64: enable Bluetooth On SoPine
baseboard
SoPine has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 9010bd58af1b..590a77769cde 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -230,6 +230,20 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
+};
+
&usb_otg {
dr_mode = "host";
status = "okay";
--
2.17.1

28
patch/kernel/archive/sunxi-5.11/0147-si2168-fix-cmd-timeout.patch
View File

@@ -1,28 +0,0 @@
From 2e01cc074cc426da4b390af025a736eda9aef80c Mon Sep 17 00:00:00 2001
From: Koumes <koumes@centrum.cz>
Date: Sat, 1 Jun 2019 21:20:26 +0000
Subject: [PATCH] si2168: fix cmd timeout
Some demuxer si2168 commands may take 130-140 ms.
(DVB-T/T2 tuner MyGica T230C v2).
Details: https://github.com/CoreELEC/CoreELEC/pull/208
---
drivers/media/dvb-frontends/si2168.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c
index b05e6772c..ffaba6f81 100644
--- a/drivers/media/dvb-frontends/si2168.c
+++ b/drivers/media/dvb-frontends/si2168.c
@@ -42,7 +42,7 @@ static int si2168_cmd_execute(struct i2c_client *client, struct si2168_cmd *cmd)
if (cmd->rlen) {
/* wait cmd execution terminate */
- #define TIMEOUT 70
+ #define TIMEOUT 200
timeout = jiffies + msecs_to_jiffies(TIMEOUT);
while (!time_after(jiffies, timeout)) {
ret = i2c_master_recv(client, cmd->args, cmd->rlen);
--
2.17.1

57
patch/kernel/archive/sunxi-5.11/0700-h3-spdif-clk-fix.patch
View File

@@ -1,57 +0,0 @@
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index cbe598b0f..08f0ed3e9 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -175,6 +175,7 @@ struct sun4i_spdif_quirks {
unsigned int reg_dac_txdata;
bool has_reset;
unsigned int val_fctl_ftx;
+ unsigned int mclk_multiplier;
};
struct sun4i_spdif_dev {
@@ -311,6 +312,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,
default:
return -EINVAL;
}
+ mclk *= host->quirks->mclk_multiplier;
ret = clk_set_rate(host->spdif_clk, mclk);
if (ret < 0) {
@@ -345,6 +347,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,
default:
return -EINVAL;
}
+ mclk_div *= host->quirks->mclk_multiplier;
reg_val = 0;
reg_val |= SUN4I_SPDIF_TXCFG_ASS;
@@ -427,24 +430,28 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = {
static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
+ .mclk_multiplier = 1,
};
static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true,
+ .mclk_multiplier = 1,
};
static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
.reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true,
+ .mclk_multiplier = 4,
};
static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {
.reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX,
.has_reset = true,
+ .mclk_multiplier = 1,
};
static const struct of_device_id sun4i_spdif_of_match[] = {

90
patch/kernel/archive/sunxi-5.11/ARM-dts-sun7i-Disable-OOB-IRQ-for-brcm-wifi-on-Cubietruck-and-Banana-Pro.patch
View File

@@ -1,90 +0,0 @@
While doing some brcmfmac driver work I needed to test this also on some
devicetree based boards. So I fired up the good old Cubietruck and when
that would not work a Banana Pro.
With an unmodified 4.17 kernel both boards intermittently would come up
with non working wifi with the following errors:
brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
brcmfmac: brcmf_bus_started: failed: -110
brcmfmac: brcmf_attach: dongle is not responding: err=-110
brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
They would come up this way more often then with actual working wifi,
once this problem happens it seems to require a power-cycle to fix.
Once things work one can safely reboot without hitting the issue.
I've found that disabling OOB interrupts fixes this. This really is more
of a workaround then a proper fix, but it makes the wifi reliable again
and it does not have much of a downside.
Using an OOB IRQ instead of the sdio-IRQ mechanism is mostly important to
allow the MMC controller to go into runtime-suspend which is not really an
issue on these boards since they are (usually) not battery powered.
I've looked at recent brcmfmac and mmc-core changes which may explain this
and I've not found anything. So the most likely culprit is the A20 external
interrupt handling e.g. perhaps it is set to edge instead of level? Either
way I do not have time to further investigate this.
BugLink: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908438
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 16 +++++++++++++---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 16 +++++++++++++---
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 0898eb6162f5..0e1ddd998b20 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -174,9 +174,19 @@
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 5649161de1d7..a837516db6f9 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -222,9 +222,19 @@
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};

638
patch/kernel/archive/sunxi-5.11/Add_HDMI_audio_support_for_the_sun4i-hdmi.patch
View File

@@ -1,638 +0,0 @@
Add HDMI audio support for the sun4i-hdmi encoder, used on
the older Allwinner chips - A10, A20, A31.
Most of the code is based on the BSP implementation. In it
dditional formats are supported (S20_3LE and S24_LE), however
there where some problems with them and only S16_LE is left.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
Changes for v3:
- Instead of platfrom_driver dynammicly register/unregister card
- Add Kconfig dependencies
- Restrore drvdata after card unregistering
Changes for v2:
- Create a new platform driver instead of using the HDMI encoder
- Expose a new kcontrol to the userspace holding the ELD data
- Wrap all macro arguments in parentheses
drivers/gpu/drm/sun4i/Kconfig | 11 +
drivers/gpu/drm/sun4i/Makefile | 3 +
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 37 ++
drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c | 450 +++++++++++++++++++++++
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 14 +
5 files changed, 515 insertions(+)
create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index 37e90e42943f..ca2ab5d53dd4 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -23,6 +23,17 @@ config DRM_SUN4I_HDMI
Choose this option if you have an Allwinner SoC with an HDMI
controller.
+config DRM_SUN4I_HDMI_AUDIO
+ bool "Allwinner A10 HDMI Audio Support"
+ default y
+ depends on DRM_SUN4I_HDMI
+ depends on SND_SOC=y || SND_SOC=DRM_SUN4I_HDMI
+ select SND_PCM_ELD
+ select SND_SOC_GENERIC_DMAENGINE_PCM
+ help
+ Choose this option if you have an Allwinner SoC with an HDMI
+ controller and want to use audio.
+
config DRM_SUN4I_HDMI_CEC
bool "Allwinner A10 HDMI CEC Support"
depends on DRM_SUN4I_HDMI
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 0d04f2447b01..492bfd28ad2e 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -5,6 +5,9 @@ sun4i-frontend-y += sun4i_frontend.o
sun4i-drm-y += sun4i_drv.o
sun4i-drm-y += sun4i_framebuffer.o
+ifdef CONFIG_DRM_SUN4I_HDMI_AUDIO
+sun4i-drm-hdmi-y += sun4i_hdmi_audio.o
+endif
sun4i-drm-hdmi-y += sun4i_hdmi_ddc_clk.o
sun4i-drm-hdmi-y += sun4i_hdmi_enc.o
sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 7ad3f06c127e..28621d289655 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -42,7 +42,32 @@
#define SUN4I_HDMI_VID_TIMING_POL_VSYNC BIT(1)
#define SUN4I_HDMI_VID_TIMING_POL_HSYNC BIT(0)
+#define SUN4I_HDMI_AUDIO_CTRL_REG 0x040
+#define SUN4I_HDMI_AUDIO_CTRL_ENABLE BIT(31)
+#define SUN4I_HDMI_AUDIO_CTRL_RESET BIT(30)
+
+#define SUN4I_HDMI_AUDIO_FMT_REG 0x048
+#define SUN4I_HDMI_AUDIO_FMT_SRC BIT(31)
+#define SUN4I_HDMI_AUDIO_FMT_LAYOUT BIT(3)
+#define SUN4I_HDMI_AUDIO_FMT_CH_CFG(n) ((n) - 1)
+#define SUN4I_HDMI_AUDIO_FMT_CH_CFG_MASK GENMASK(2, 0)
+
+#define SUN4I_HDMI_AUDIO_PCM_REG 0x4c
+#define SUN4I_HDMI_AUDIO_PCM_CH_MAP(n, m) (((m) - 1) << ((n) * 4))
+#define SUN4I_HDMI_AUDIO_PCM_CH_MAP_MASK(n) (GENMASK(2, 0) << ((n) * 4))
+
+#define SUN4I_HDMI_AUDIO_CTS_REG 0x050
+#define SUN4I_HDMI_AUDIO_CTS(n) ((n) & GENMASK(19, 0))
+
+#define SUN4I_HDMI_AUDIO_N_REG 0x054
+#define SUN4I_HDMI_AUDIO_N(n) ((n) & GENMASK(19, 0))
+
+#define SUN4I_HDMI_AUDIO_STAT0_REG 0x58
+#define SUN4I_HDMI_AUDIO_STAT0_FREQ(n) ((n) << 24)
+#define SUN4I_HDMI_AUDIO_STAT0_FREQ_MASK GENMASK(27, 24)
+
#define SUN4I_HDMI_AVI_INFOFRAME_REG(n) (0x080 + (n))
+#define SUN4I_HDMI_AUDIO_INFOFRAME_REG(n) (0x0a0 + (n))
#define SUN4I_HDMI_PAD_CTRL0_REG 0x200
#define SUN4I_HDMI_PAD_CTRL0_BIASEN BIT(31)
@@ -242,6 +267,11 @@ struct sun4i_hdmi_variant {
bool ddc_fifo_has_dir;
};
+struct sun4i_hdmi_audio {
+ struct snd_soc_card *card;
+ u8 channels;
+};
+
struct sun4i_hdmi {
struct drm_connector connector;
struct drm_encoder encoder;
@@ -283,9 +313,14 @@ struct sun4i_hdmi {
struct regmap_field *field_ddc_sda_en;
struct regmap_field *field_ddc_sck_en;
+
struct sun4i_drv *drv;
bool hdmi_monitor;
+ bool hdmi_audio;
+
+ struct sun4i_hdmi_audio audio;
+
struct cec_adapter *cec_adap;
const struct sun4i_hdmi_variant *variant;
@@ -294,5 +329,7 @@ struct sun4i_hdmi {
int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);
int sun4i_tmds_create(struct sun4i_hdmi *hdmi);
int sun4i_hdmi_i2c_create(struct device *dev, struct sun4i_hdmi *hdmi);
+int sun4i_hdmi_audio_create(struct sun4i_hdmi *hdmi);
+void sun4i_hdmi_audio_destroy(struct sun4i_hdmi *hdmi);
#endif /* _SUN4I_HDMI_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
new file mode 100644
index 000000000000..f42f2cea4e9e
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
@@ -0,0 +1,450 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 Olimex Ltd.
+ * Author: Stefan Mavrodiev <stefan@olimex.com>
+ */
+#include <linux/dma-mapping.h>
+#include <linux/dmaengine.h>
+#include <linux/module.h>
+#include <linux/of_dma.h>
+#include <linux/regmap.h>
+
+#include <drm/drm_print.h>
+
+#include <sound/dmaengine_pcm.h>
+#include <sound/pcm_drm_eld.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+
+#include "sun4i_hdmi.h"
+
+static int sun4i_hdmi_audio_ctl_eld_info(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
+ uinfo->count = MAX_ELD_BYTES;
+ return 0;
+}
+
+static int sun4i_hdmi_audio_ctl_eld_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
+ struct sun4i_hdmi *hdmi = snd_soc_card_get_drvdata(card);
+
+ memcpy(ucontrol->value.bytes.data,
+ hdmi->connector.eld,
+ MAX_ELD_BYTES);
+
+ return 0;
+}
+
+static const struct snd_kcontrol_new sun4i_hdmi_audio_controls[] = {
+ {
+ .access = SNDRV_CTL_ELEM_ACCESS_READ |
+ SNDRV_CTL_ELEM_ACCESS_VOLATILE,
+ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+ .name = "ELD",
+ .info = sun4i_hdmi_audio_ctl_eld_info,
+ .get = sun4i_hdmi_audio_ctl_eld_get,
+ },
+};
+
+static const struct snd_soc_dapm_widget sun4i_hdmi_audio_widgets[] = {
+ SND_SOC_DAPM_OUTPUT("TX"),
+};
+
+static const struct snd_soc_dapm_route sun4i_hdmi_audio_routes[] = {
+ { "TX", NULL, "Playback" },
+};
+
+static const struct snd_soc_component_driver sun4i_hdmi_audio_component = {
+ .controls = sun4i_hdmi_audio_controls,
+ .num_controls = ARRAY_SIZE(sun4i_hdmi_audio_controls),
+ .dapm_widgets = sun4i_hdmi_audio_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(sun4i_hdmi_audio_widgets),
+ .dapm_routes = sun4i_hdmi_audio_routes,
+ .num_dapm_routes = ARRAY_SIZE(sun4i_hdmi_audio_routes),
+};
+
+static int sun4i_hdmi_audio_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
+ struct sun4i_hdmi *hdmi = snd_soc_card_get_drvdata(card);
+ u32 reg;
+ int ret;
+
+ regmap_write(hdmi->regmap, SUN4I_HDMI_AUDIO_CTRL_REG, 0);
+ regmap_write(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_CTRL_REG,
+ SUN4I_HDMI_AUDIO_CTRL_RESET);
+ ret = regmap_read_poll_timeout(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_CTRL_REG,
+ reg, !reg, 100, 50000);
+ if (ret < 0) {
+ DRM_ERROR("Failed to reset HDMI Audio\n");
+ return ret;
+ }
+
+ regmap_write(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_CTRL_REG,
+ SUN4I_HDMI_AUDIO_CTRL_ENABLE);
+
+ return snd_pcm_hw_constraint_eld(substream->runtime,
+ hdmi->connector.eld);
+}
+
+static void sun4i_hdmi_audio_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
+ struct sun4i_hdmi *hdmi = snd_soc_card_get_drvdata(card);
+
+ regmap_write(hdmi->regmap, SUN4I_HDMI_AUDIO_CTRL_REG, 0);
+}
+
+static int sun4i_hdmi_setup_audio_infoframes(struct sun4i_hdmi *hdmi)
+{
+ union hdmi_infoframe frame;
+ u8 buffer[14];
+ int i, ret;
+
+ ret = hdmi_audio_infoframe_init(&frame.audio);
+ if (ret < 0) {
+ DRM_ERROR("Failed to init HDMI audio infoframe\n");
+ return ret;
+ }
+
+ frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
+ frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
+ frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
+ frame.audio.channels = hdmi->audio.channels;
+
+ ret = hdmi_infoframe_pack(&frame, buffer, sizeof(buffer));
+ if (ret < 0) {
+ DRM_ERROR("Failed to pack HDMI audio infoframe\n");
+ return ret;
+ }
+
+ for (i = 0; i < sizeof(buffer); i++)
+ writeb(buffer[i],
+ hdmi->base + SUN4I_HDMI_AUDIO_INFOFRAME_REG(i));
+
+ return 0;
+}
+
+static void sun4i_hdmi_audio_set_cts_n(struct sun4i_hdmi *hdmi,
+ struct snd_pcm_hw_params *params)
+{
+ struct drm_encoder *encoder = &hdmi->encoder;
+ struct drm_crtc *crtc = encoder->crtc;
+ const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
+ u32 rate = params_rate(params);
+ u32 n, cts;
+ u64 tmp;
+
+ /**
+ * Calculate Cycle Time Stamp (CTS) and Numerator (N):
+ *
+ * N = 128 * Samplerate / 1000
+ * CTS = (Ftdms * N) / (128 * Samplerate)
+ */
+
+ n = 128 * rate / 1000;
+ tmp = (u64)(mode->clock * 1000) * n;
+ do_div(tmp, 128 * rate);
+ cts = tmp;
+
+ regmap_write(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_CTS_REG,
+ SUN4I_HDMI_AUDIO_CTS(cts));
+
+ regmap_write(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_N_REG,
+ SUN4I_HDMI_AUDIO_N(n));
+}
+
+static int sun4i_hdmi_audio_set_hw_rate(struct sun4i_hdmi *hdmi,
+ struct snd_pcm_hw_params *params)
+{
+ u32 rate = params_rate(params);
+ u32 val;
+
+ switch (rate) {
+ case 44100:
+ val = 0x0;
+ break;
+ case 48000:
+ val = 0x2;
+ break;
+ case 32000:
+ val = 0x3;
+ break;
+ case 88200:
+ val = 0x8;
+ break;
+ case 96000:
+ val = 0x9;
+ break;
+ case 176400:
+ val = 0xc;
+ break;
+ case 192000:
+ val = 0xe;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ regmap_update_bits(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_STAT0_REG,
+ SUN4I_HDMI_AUDIO_STAT0_FREQ_MASK,
+ SUN4I_HDMI_AUDIO_STAT0_FREQ(val));
+
+ return 0;
+}
+
+static int sun4i_hdmi_audio_set_hw_channels(struct sun4i_hdmi *hdmi,
+ struct snd_pcm_hw_params *params)
+{
+ u32 channels = params_channels(params);
+
+ if (channels > 8)
+ return -EINVAL;
+
+ hdmi->audio.channels = channels;
+
+ regmap_update_bits(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_FMT_REG,
+ SUN4I_HDMI_AUDIO_FMT_LAYOUT,
+ (channels > 2) ? SUN4I_HDMI_AUDIO_FMT_LAYOUT : 0);
+
+ regmap_update_bits(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_FMT_REG,
+ SUN4I_HDMI_AUDIO_FMT_CH_CFG_MASK,
+ SUN4I_HDMI_AUDIO_FMT_CH_CFG(channels));
+
+ regmap_write(hdmi->regmap, SUN4I_HDMI_AUDIO_PCM_REG, 0x76543210);
+
+ /**
+ * If only one channel is required, send the same sample
+ * to the sink device as a left and right channel.
+ */
+ if (channels == 1)
+ regmap_update_bits(hdmi->regmap,
+ SUN4I_HDMI_AUDIO_PCM_REG,
+ SUN4I_HDMI_AUDIO_PCM_CH_MAP_MASK(1),
+ SUN4I_HDMI_AUDIO_PCM_CH_MAP(1, 1));
+
+ return 0;
+}
+
+static int sun4i_hdmi_audio_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
+ struct sun4i_hdmi *hdmi = snd_soc_card_get_drvdata(card);
+ int ret;
+
+ ret = sun4i_hdmi_audio_set_hw_rate(hdmi, params);
+ if (ret < 0)
+ return ret;
+
+ ret = sun4i_hdmi_audio_set_hw_channels(hdmi, params);
+ if (ret < 0)
+ return ret;
+
+ sun4i_hdmi_audio_set_cts_n(hdmi, params);
+
+ return 0;
+}
+
+static int sun4i_hdmi_audio_trigger(struct snd_pcm_substream *substream,
+ int cmd,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
+ struct sun4i_hdmi *hdmi = snd_soc_card_get_drvdata(card);
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ ret = sun4i_hdmi_setup_audio_infoframes(hdmi);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+static const struct snd_soc_dai_ops sun4i_hdmi_audio_dai_ops = {
+ .startup = sun4i_hdmi_audio_startup,
+ .shutdown = sun4i_hdmi_audio_shutdown,
+ .hw_params = sun4i_hdmi_audio_hw_params,
+ .trigger = sun4i_hdmi_audio_trigger,
+};
+
+static int sun4i_hdmi_audio_dai_probe(struct snd_soc_dai *dai)
+{
+ struct snd_dmaengine_dai_dma_data *dma_data;
+
+ dma_data = devm_kzalloc(dai->dev, sizeof(*dma_data), GFP_KERNEL);
+ if (!dma_data)
+ return -ENOMEM;
+
+ dma_data->addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dma_data->maxburst = 8;
+
+ snd_soc_dai_init_dma_data(dai, dma_data, NULL);
+
+ return 0;
+}
+
+static struct snd_soc_dai_driver sun4i_hdmi_audio_dai = {
+ .name = "HDMI",
+ .ops = &sun4i_hdmi_audio_dai_ops,
+ .probe = sun4i_hdmi_audio_dai_probe,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 8,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ },
+};
+
+static const struct snd_pcm_hardware sun4i_hdmi_audio_pcm_hardware = {
+ .info = SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_RESUME,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ .channels_min = 1,
+ .channels_max = 8,
+ .buffer_bytes_max = 128 * 1024,
+ .period_bytes_min = 4 * 1024,
+ .period_bytes_max = 32 * 1024,
+ .periods_min = 2,
+ .periods_max = 8,
+ .fifo_size = 128,
+};
+
+static const struct snd_dmaengine_pcm_config sun4i_hdmi_audio_pcm_config = {
+ .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-tx",
+ .pcm_hardware = &sun4i_hdmi_audio_pcm_hardware,
+ .prealloc_buffer_size = 128 * 1024,
+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
+};
+
+struct snd_soc_card sun4i_hdmi_audio_card = {
+ .name = "sun4i-hdmi",
+};
+
+int sun4i_hdmi_audio_create(struct sun4i_hdmi *hdmi)
+{
+ struct snd_soc_card *card = &sun4i_hdmi_audio_card;
+ struct snd_soc_dai_link_component *comp;
+ struct snd_soc_dai_link *link;
+ int ret;
+
+ ret = snd_dmaengine_pcm_register(hdmi->dev,
+ &sun4i_hdmi_audio_pcm_config, 0);
+ if (ret < 0) {
+ DRM_ERROR("Could not register PCM\n");
+ return ret;
+ }
+
+ ret = snd_soc_register_component(hdmi->dev,
+ &sun4i_hdmi_audio_component,
+ &sun4i_hdmi_audio_dai, 1);
+ if (ret < 0) {
+ DRM_ERROR("Could not register DAI\n");
+ goto unregister_pcm;
+ }
+
+ link = devm_kzalloc(hdmi->dev, sizeof(*link), GFP_KERNEL);
+ if (!link) {
+ ret = -ENOMEM;
+ goto unregister_component;
+ }
+
+ comp = devm_kzalloc(hdmi->dev, sizeof(*comp) * 3, GFP_KERNEL);
+ if (!comp) {
+ ret = -ENOMEM;
+ goto unregister_component;
+ }
+
+ link->cpus = &comp[0];
+ link->codecs = &comp[1];
+ link->platforms = &comp[2];
+
+ link->num_cpus = 1;
+ link->num_codecs = 1;
+ link->num_platforms = 1;
+
+ link->playback_only = 1;
+
+ link->name = "SUN4I-HDMI";
+ link->stream_name = "SUN4I-HDMI PCM";
+
+ link->codecs->name = dev_name(hdmi->dev);
+ link->codecs->dai_name = sun4i_hdmi_audio_dai.name;
+
+ link->cpus->dai_name = dev_name(hdmi->dev);
+
+ link->platforms->name = dev_name(hdmi->dev);
+
+ link->dai_fmt = SND_SOC_DAIFMT_I2S;
+
+ card->dai_link = link;
+ card->num_links = 1;
+ card->dev = hdmi->dev;
+
+ hdmi->audio.card = card;
+
+ /**
+ * snd_soc_register_card() will overwrite the driver_data pointer.
+ * So before registering the card, store the original pointer in
+ * card->drvdata.
+ */
+ snd_soc_card_set_drvdata(card, hdmi);
+ ret = snd_soc_register_card(card);
+ if (ret)
+ goto unregister_component;
+
+ return 0;
+
+unregister_component:
+ snd_soc_unregister_component(hdmi->dev);
+unregister_pcm:
+ snd_dmaengine_pcm_unregister(hdmi->dev);
+ return ret;
+}
+
+void sun4i_hdmi_audio_destroy(struct sun4i_hdmi *hdmi)
+{
+ struct snd_soc_card *card = hdmi->audio.card;
+ void *data;
+
+ /**
+ * Before removing the card, restore the previously stored driver_data.
+ * This will ensure proper removal of the sun4i-hdmi module, since it
+ * uses dev_get_drvdata() in the unbind function.
+ */
+ data = snd_soc_card_get_drvdata(card);
+
+ snd_soc_unregister_card(card);
+ snd_soc_unregister_component(hdmi->dev);
+ snd_dmaengine_pcm_unregister(hdmi->dev);
+
+ dev_set_drvdata(hdmi->dev, data);
+}
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
index 68d4644ac2dc..4cd35c97c503 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
@@ -23,6 +23,8 @@
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
+#include <sound/soc.h>
+
#include "sun4i_backend.h"
#include "sun4i_crtc.h"
#include "sun4i_drv.h"
@@ -87,6 +89,11 @@ static void sun4i_hdmi_disable(struct drm_encoder *encoder)
DRM_DEBUG_DRIVER("Disabling the HDMI Output\n");
+#ifdef CONFIG_DRM_SUN4I_HDMI_AUDIO
+ if (hdmi->hdmi_audio)
+ sun4i_hdmi_audio_destroy(hdmi);
+#endif
+
val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
val &= ~SUN4I_HDMI_VID_CTRL_ENABLE;
writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
@@ -114,6 +120,11 @@ static void sun4i_hdmi_enable(struct drm_encoder *encoder)
val |= SUN4I_HDMI_VID_CTRL_HDMI_MODE;
writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
+
+#ifdef CONFIG_DRM_SUN4I_HDMI_AUDIO
+ if (hdmi->hdmi_audio && sun4i_hdmi_audio_create(hdmi))
+ DRM_ERROR("Couldn't create the HDMI audio adapter\n");
+#endif
}
static void sun4i_hdmi_mode_set(struct drm_encoder *encoder,
@@ -218,6 +229,9 @@ static int sun4i_hdmi_get_modes(struct drm_connector *connector)
if (!edid)
return 0;
+#ifdef CONFIG_DRM_SUN4I_HDMI_AUDIO
+ hdmi->hdmi_audio = drm_detect_monitor_audio(edid);
+#endif
hdmi->hdmi_monitor = drm_detect_hdmi_monitor(edid);
DRM_DEBUG_DRIVER("Monitor is %s monitor\n",
hdmi->hdmi_monitor ? "an HDMI" : "a DVI");

113
patch/kernel/archive/sunxi-5.11/Add_frame_inversion_to_correct_audio_channels.patch
View File

@@ -1,113 +0,0 @@
From 62d75bddd6fb671adc7684bfd206f8e635c4bf4b Mon Sep 17 00:00:00 2001
From: Marcus Cooper <codekipper@gmail.com>
Date: Wed, 1 Jan 2020 20:03:03 +0100
Subject: [PATCH] Allwinner: Add frame inversion to correct audio channels
For some reason the mainline i2s driver inverts the frame clock
which in turn maps the audio channels incorrectly when not using
audio passthrough on multi-channel audio.
Adding frame-inversion to the device tree properties fixes the
issue but should be seen as a temporary fix whilst we investigate
the correct default setup of the i2s block.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
---
...rsion-to-correct-multi-channel-audio.patch | 24 +++++++++++++++++++
...rsion-to-correct-multi-channel-audio.patch | 24 +++++++++++++++++++
...rsion-to-correct-multi-channel-audio.patch | 24 +++++++++++++++++++
3 files changed, 72 insertions(+)
create mode 100644 projects/Allwinner/devices/A64/patches/linux/04-Add-frame-inversion-to-correct-multi-channel-audio.patch
create mode 100644 projects/Allwinner/devices/H3/patches/linux/17-Add-frame-inversion-to-correct-multi-channel-audio.patch
create mode 100644 projects/Allwinner/devices/H6/patches/linux/16-Add-frame-inversion-to-correct-multi-channel-audio.patch
diff --git a/projects/Allwinner/devices/A64/patches/linux/04-Add-frame-inversion-to-correct-multi-channel-audio.patch b/projects/Allwinner/devices/A64/patches/linux/04-Add-frame-inversion-to-correct-multi-channel-audio.patch
new file mode 100644
index 00000000000..16bbbb5c808
--- /dev/null
+++ b/projects/Allwinner/devices/A64/patches/linux/04-Add-frame-inversion-to-correct-multi-channel-audio.patch
@@ -0,0 +1,24 @@
+From 08d35c5d5ce6de3453f17e6eff7375afa74173d2 Mon Sep 17 00:00:00 2001
+From: Marcus Cooper <codekipper@gmail.com>
+Date: Thu, 2 Jan 2020 19:09:25 +0100
+Subject: [PATCH] Add frame inversion to correct multi-channel audio
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+index 988e261a0ab3..4e20a0872c0c 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -1101,6 +1101,7 @@
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner-hdmi";
+ simple-audio-card,mclk-fs = <128>;
++ simple-audio-card,frame-inversion;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+--
+2.24.1
+
diff --git a/projects/Allwinner/devices/H3/patches/linux/17-Add-frame-inversion-to-correct-multi-channel-audio.patch b/projects/Allwinner/devices/H3/patches/linux/17-Add-frame-inversion-to-correct-multi-channel-audio.patch
new file mode 100644
index 00000000000..21e13cbfd72
--- /dev/null
+++ b/projects/Allwinner/devices/H3/patches/linux/17-Add-frame-inversion-to-correct-multi-channel-audio.patch
@@ -0,0 +1,24 @@
+From 51dcda7a261bcadca0a8f5e6fe6241ec266438d0 Mon Sep 17 00:00:00 2001
+From: Marcus Cooper <codekipper@gmail.com>
+Date: Thu, 2 Jan 2020 19:03:35 +0100
+Subject: [PATCH] Add frame inversion to correct multi-channel audio
+
+---
+ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+index 8644435e66d3..7375a9479e84 100644
+--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+@@ -82,6 +82,7 @@
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner-hdmi";
+ simple-audio-card,mclk-fs = <128>;
++ simple-audio-card,frame-inversion;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+--
+2.24.1
+
diff --git a/projects/Allwinner/devices/H6/patches/linux/16-Add-frame-inversion-to-correct-multi-channel-audio.patch b/projects/Allwinner/devices/H6/patches/linux/16-Add-frame-inversion-to-correct-multi-channel-audio.patch
new file mode 100644
index 00000000000..18f7f636562
--- /dev/null
+++ b/projects/Allwinner/devices/H6/patches/linux/16-Add-frame-inversion-to-correct-multi-channel-audio.patch
@@ -0,0 +1,24 @@
+From 3e9d104275c44ab1711a3564ce67cabe850afe75 Mon Sep 17 00:00:00 2001
+From: Marcus Cooper <codekipper@gmail.com>
+Date: Thu, 2 Jan 2020 19:07:29 +0100
+Subject: [PATCH] Add frame inversion to correct multi-channel audio
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index 132ef9c2d348..43ed134b49f7 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -103,6 +103,7 @@
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner-hdmi";
+ simple-audio-card,mclk-fs = <128>;
++ simple-audio-card,frame-inversion;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+--
+2.24.1
+

73
patch/kernel/archive/sunxi-5.11/a20-orangepi-orangepi-mini-dts-fix-eth-hdmi.patch
View File

@@ -1,73 +0,0 @@
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 2e328d2ce..3cd0803a1 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -121,7 +121,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index d75b2e2ba..31e3beba1 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -61,6 +61,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -85,6 +96,14 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -97,11 +116,21 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";

26
patch/kernel/archive/sunxi-5.11/add-h5-emmc-compatible.patch
View File

@@ -1,26 +0,0 @@
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index bba98d8..6087fdb 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1180,6 +1180,13 @@ static const struct sunxi_mmc_cfg sun50i_a64_emmc_cfg = {
.needs_new_timings = true,
};
+static const struct sunxi_mmc_cfg sun50i_h5_emmc_cfg = {
+ .idma_des_size_bits = 13,
+ .clk_delays = NULL,
+ .can_calibrate = true,
+ .needs_new_timings = false,
+};
+
static const struct of_device_id sunxi_mmc_of_match[] = {
{ .compatible = "allwinner,sun4i-a10-mmc", .data = &sun4i_a10_cfg },
{ .compatible = "allwinner,sun5i-a13-mmc", .data = &sun5i_a13_cfg },
@@ -1188,6 +1195,7 @@ static const struct of_device_id sunxi_mmc_of_match[] = {
{ .compatible = "allwinner,sun9i-a80-mmc", .data = &sun9i_a80_cfg },
{ .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg },
{ .compatible = "allwinner,sun50i-a64-emmc", .data = &sun50i_a64_emmc_cfg },
+ { .compatible = "allwinner,sun50i-h5-emmc", .data = &sun50i_h5_emmc_cfg },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sunxi_mmc_of_match);

26
patch/kernel/archive/sunxi-5.11/add-missing-ext_osc32k-on-H6.patch
View File

@@ -1,26 +0,0 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f55879b..c3621dd 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -70,6 +80,13 @@
clock-output-names = "osc24M";
};
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
@@ -922,6 +1050,7 @@
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>,
<6 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
+ clocks = <&ext_osc32k>;
#clock-cells = <1>;
};

40
patch/kernel/archive/sunxi-5.11/add-more-uart-pins-to-sun8i-r40.patch
View File

@@ -1,40 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 421dfbb..ae64248 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -403,6 +420,11 @@
function = "uart0";
};
+ uart2_pi_pins: uart2-pi-pins {
+ pins = "PI18", "PI19";
+ function = "uart2";
+ };
+
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
@@ -412,6 +463,23 @@
pins = "PG8", "PG9";
function = "uart3";
};
+
+ uart4_ph_pins: uart4-ph-pins {
+ pins = "PH4", "PH5";
+ function = "uart4";
+ };
+
+
+ uart5_ph_pins: uart5-ph-pins {
+ pins = "PH6", "PH7";
+ function = "uart5";
+ };
+
+ uart7_pi_pins: uart7-pi-pins {
+ pins = "PI20", "PI21";
+ function = "uart7";
+ };
+
};
wdt: watchdog@1c20c90 {

84
patch/kernel/archive/sunxi-5.11/add-more-uarts-bpim2ultra-bpim2berry.patch
View File

@@ -1,84 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 42d62d1..35bba4e 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -305,6 +305,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
@@ -324,6 +330,24 @@
};
};
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_ph_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_ph_pins>;
+ status = "disabled";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pi_pins>;
+ status = "disabled";
+};
+
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
usb2_vbus-supply = <&reg_vcc5v0>;
diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index 15c22b0..967833c 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -280,6 +280,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
@@ -299,6 +305,24 @@
};
};
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_ph_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_ph_pins>;
+ status = "disabled";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pi_pins>;
+ status = "disabled";
+};
+
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";

48
patch/kernel/archive/sunxi-5.11/add-nanopi-npi-stuff.patch
View File

@@ -1,48 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index 4df29a6..cf59d3f 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -59,6 +63,8 @@
leds {
compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
status {
label = "nanopi:blue:status";
@@ -76,6 +82,8 @@
r_gpio_keys {
compatible = "gpio-keys";
input-name = "k1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_r_npi>;
k1 {
label = "k1";
@@ -100,6 +136,25 @@
status = "okay";
};
+&pio {
+ leds_npi: led_pins {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ sw_r_npi: key_pins {
+ pins = "PL3";
+ function = "gpio_in";
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;

83
patch/kernel/archive/sunxi-5.11/board-a64-nanopi-a64-add-wifi-led-audio-usb.patch
View File

@@ -1,83 +0,0 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index e58db8a6c..0cf3d2e61 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -47,6 +47,20 @@ wifi_pwrseq: wifi_pwrseq {
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ blue {
+ label = "nanopi-a64:blue:status";
+ gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&cpu0 {
@@ -137,6 +151,24 @@ rtl8189etv: wifi@1 {
};
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8189etv: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
&ohci0 {
status = "okay";
};
@@ -261,3 +293,32 @@ &uart0 {
&usbphy {
status = "okay";
};
+
+&sound {
+status = "okay";
+};
+
+&hdmi_sound {
+status = "okay";
+};
+
+&usb_otg {
+dr_mode = "host";
+status = "okay";
+};
+
+&i2s2 {
+status = "okay";
+};
+
+&dai {
+status = "okay";
+};
+
+&codec {
+status = "okay";
+};
+
+&codec_analog {
+status = "okay";
+};

27
patch/kernel/archive/sunxi-5.11/board-a64-nanopi-a64-ethernet-phy-mode.patch
View File

@@ -1,27 +0,0 @@
From 9fa7f92966d8b0e689171ddcd708c4f249012e3f Mon Sep 17 00:00:00 2001
From: root <guido.lehwalder@gmail.com>
Date: Tue, 26 Jan 2021 18:17:33 +0300
Subject: [PATCH] set right phy-mode for NPI A64 to rgmii-id for working
onboard-ethernet
Signed-off-by: root <guido.lehwalder@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 0cf3d2e61..25f07cf89 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -94,7 +94,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
status = "okay";
--
Created with Armbian build tools https://github.com/armbian/build

102
patch/kernel/archive/sunxi-5.11/board-a64-olinuxino-add-regulator-audio-mmc.patch
View File

@@ -1,102 +0,0 @@
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index f3f8e177a..3e7aea743 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -52,6 +52,13 @@ reg_usb1_vbus: usb1-vbus {
status = "okay";
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
@@ -74,6 +81,18 @@ &cpu3 {
cpu-supply = <&reg_dcdc2>;
};
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
&de {
status = "okay";
};
@@ -86,6 +105,14 @@ &ehci1 {
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
+&mixer0 {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@@ -142,6 +169,16 @@ rtl8723bs: wifi@1 {
};
};
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -328,6 +365,32 @@ &simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
+&sound {
+ status = "okay";
+ simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+ "Microphone", "Internal Microphone Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,routing =
+ "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "INL", "LINEOUT",
+ "INR", "LINEOUT",
+ "Headphone Jack", "HP",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Left ADC", "ADC",
+ "Right ADC", "ADC",
+ "Internal Microphone Left", "MBIAS",
+ "MIC1", "Internal Microphone Left",
+ "Internal Microphone Right", "HBIAS",
+ "MIC2", "Internal Microphone Right";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;

16
patch/kernel/archive/sunxi-5.11/board-a83t-bananapi-m3-enable-IR-controller.patch
View File

@@ -1,16 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 3b579d7567c8..ea23ff821166 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -183,6 +183,11 @@
status = "okay";
};
+&r_cir {
+ clock-frequency = <3000000>;
+ status = "okay";
+};
+
&r_rsb {
status = "okay";

25
patch/kernel/archive/sunxi-5.11/board-cubieboard-cubietruck-green-LED-mmc0.patch
View File

@@ -1,25 +0,0 @@
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 710e2ef..ffe7625 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -73,7 +73,7 @@
green {
label = "cubieboard:green:usr";
gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */
- linux,default-trigger = "heartbeat";
+ linux,default-trigger = "mmc0";
};
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 8da939a..934655f 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -85,6 +85,7 @@
green {
label = "cubietruck:green:usr";
gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
};
};

25
patch/kernel/archive/sunxi-5.11/board-cubietruck-enable-uart2.patch
View File

@@ -1,25 +0,0 @@
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 8da939a..42fd205 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -56,6 +56,7 @@
aliases {
serial0 = &uart0;
+ serial2 = &uart2;
};
chosen {
@@ -307,6 +308,12 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_cts_rts_pi_pins>, <&uart2_pi_pins>;
+ status = "okay";
+};
+
&usb_otg {
dr_mode = "otg";
status = "okay";

119
patch/kernel/archive/sunxi-5.11/board-h2plus-bananapi-m2-zero-fixes.patch
View File

@@ -1,119 +0,0 @@
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index 4c6704e4c..5b15a95c0 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -20,22 +20,45 @@ / {
aliases {
serial0 = &uart0;
serial1 = &uart1;
+ ethernet0 = &emac;
};
chosen {
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pwr_led {
label = "bananapi-m2-zero:red:pwr";
- gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
- default-state = "on";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "heartbeat";
};
};
+ rfkill_bt: rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
gpio_keys {
compatible = "gpio-keys";
@@ -70,6 +93,21 @@ wifi_pwrseq: wifi_pwrseq {
};
};
+&pio {
+ bt_pwr_pin: bt_pwr_pin {
+ pins = "PG12";
+ function = "gpio_out";
+ };
+};
+
+
+&r_pio {
+ wifi_en_pin: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
@@ -107,6 +145,24 @@ brcmf: wifi@1 {
};
};
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mixer0 {
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -151,3 +207,19 @@ &usbphy {
*/
status = "okay";
};
+
+
+&emac {
+ status = "okay";
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};

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