Adjust broken patches and move sunxi to latest tag (#3876)

* Bump sunxi kernels

* Adjust remaining patches
This commit is contained in:
Igor Pečovnik
2022-06-11 18:01:32 +02:00
committed by GitHub
parent 07d263283e
commit 85958994b5
9 changed files with 121 additions and 404 deletions

View File

@@ -13,7 +13,7 @@ case $BRANCH in
legacy)
KERNEL_VERSION_LEVEL="5.10"
KERNELSWITCHOBJ="tag=v5.10.119"
KERNELSWITCHOBJ="tag=v5.10.121"
;;
current)

View File

@@ -14,7 +14,7 @@ case $BRANCH in
legacy)
KERNEL_VERSION_LEVEL="5.10"
KERNELSWITCHOBJ="tag=v5.10.119"
KERNELSWITCHOBJ="tag=v5.10.121"
;;
current)
KERNEL_VERSION_LEVEL="5.15"

View File

@@ -0,0 +1,83 @@
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 2cc6d99..19e05ad 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -6,6 +6,7 @@
#include <linux/clk.h>
#include <linux/dmaengine.h>
+#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -185,6 +186,10 @@ struct rockchip_spi {
bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM];
};
+struct rockchip_spi_data {
+ bool cs_gpio_requested;
+};
+
static inline void spi_enable_chip(struct rockchip_spi *rs, bool enable)
{
writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR);
@@ -455,6 +460,50 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
return 1;
}
+static int rockchip_spi_setup(struct spi_device *spi)
+{
+ int ret = 0;
+ unsigned long flags = (spi->mode & SPI_CS_HIGH) ?
+ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH;
+ struct rockchip_spi_data *data = spi_get_ctldata(spi);
+
+ if (!gpio_is_valid(spi->cs_gpio))
+ return 0;
+
+ if (!data) {
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+ spi_set_ctldata(spi, data);
+ }
+
+ if (!data->cs_gpio_requested) {
+ ret = gpio_request_one(spi->cs_gpio, flags,
+ dev_name(&spi->dev));
+ if (!ret)
+ data->cs_gpio_requested = 1;
+ } else
+ ret = gpio_direction_output(spi->cs_gpio, flags);
+
+ if (ret < 0)
+ dev_err(&spi->dev, "Failed to setup cs gpio(%d): %d\n",
+ spi->cs_gpio, ret);
+
+ return ret;
+}
+
+static void rockchip_spi_cleanup(struct spi_device *spi)
+{
+ struct rockchip_spi_data *data = spi_get_ctldata(spi);
+
+ if (data) {
+ if (data->cs_gpio_requested)
+ gpio_free(spi->cs_gpio);
+ kfree(data);
+ spi_set_ctldata(spi, NULL);
+ }
+}
+
static int rockchip_spi_config(struct rockchip_spi *rs,
struct spi_device *spi, struct spi_transfer *xfer,
bool use_dma)
@@ -683,6 +732,8 @@ static int rockchip_spi_probe(struct platform_device *pdev)
ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT);
ctlr->set_cs = rockchip_spi_set_cs;
+ ctlr->setup = rockchip_spi_setup;
+ ctlr->cleanup = rockchip_spi_cleanup;
ctlr->transfer_one = rockchip_spi_transfer_one;
ctlr->max_transfer_size = rockchip_spi_max_transfer_size;
ctlr->handle_err = rockchip_spi_handle_err;

View File

@@ -25,7 +25,7 @@ index 76e97cbe2512..af44a16c0c4a 100644
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -752,7 +752,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
continue;
if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM ||
- dpb[i].frame_num < dec_params->frame_num) {
+ dpb[i].frame_num <= dec_params->frame_num) {
@@ -52,7 +52,7 @@ index 7131156c1f2c..65a8334a188b 100644
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -233,6 +233,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
pix_mp->pixelformat = coded_desc->decoded_fmts[0];
/* Always apply the frmsize constraint of the coded end. */
+ pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
+ pix_mp->height = max(pix_mp->height, ctx->coded_fmt.fmt.pix_mp.height);
@@ -102,7 +102,7 @@ index 65a8334a188b..f4c5ee4a1e26 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -29,8 +29,11 @@
static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
{
+ struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
@@ -128,39 +128,6 @@ index 65a8334a188b..f4c5ee4a1e26 100644
return 0;
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: rkvdec: h264: Fix bit depth wrap in pps packet
The luma and chroma bit depth fields in the pps packet is 3 bits wide.
8 is wrongly added to the bit depth value written to these 3-bit fields.
Because only the 3 LSB is written the hardware is configured correctly.
Correct this by not adding 8 to the luma and chroma bit depth value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 9852c3519f56..f3ff3e709169 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -661,8 +661,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
WRITE_PPS(0xff, PROFILE_IDC);
WRITE_PPS(1, CONSTRAINT_SET3_FLAG);
WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
- WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA);
- WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA);
+ WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA);
+ WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA);
WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4);
WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES);
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
@@ -186,7 +153,7 @@ index 04af03285a20..ae585828c388 100644
@@ -333,6 +333,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf
return info->block_h[plane];
}
+static inline unsigned int v4l2_format_plane_width(const struct v4l2_format_info *info, int plane,
+ unsigned int width)
+{
@@ -218,13 +185,13 @@ index 04af03285a20..ae585828c388 100644
const struct v4l2_frmsize_stepwise *frmsize)
{
@@ -368,37 +395,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt,
if (info->mem_planes == 1) {
plane = &pixfmt->plane_fmt[0];
- plane->bytesperline = ALIGN(width, v4l2_format_block_width(info, 0)) * info->bpp[0];
+ plane->bytesperline = v4l2_format_plane_width(info, 0, width);
plane->sizeimage = 0;
- for (i = 0; i < info->comp_planes; i++) {
- unsigned int hdiv = (i == 0) ? 1 : info->hdiv;
- unsigned int vdiv = (i == 0) ? 1 : info->vdiv;
@@ -269,7 +236,7 @@ index 04af03285a20..ae585828c388 100644
- pixfmt->bytesperline = ALIGN(width, v4l2_format_block_width(info, 0)) * info->bpp[0];
+ pixfmt->bytesperline = v4l2_format_plane_width(info, 0, width);
pixfmt->sizeimage = 0;
- for (i = 0; i < info->comp_planes; i++) {
- unsigned int hdiv = (i == 0) ? 1 : info->hdiv;
- unsigned int vdiv = (i == 0) ? 1 : info->vdiv;
@@ -323,7 +290,7 @@ index ae585828c388..5bafbdbe30b0 100644
@@ -267,6 +267,9 @@ const struct v4l2_format_info *v4l2_format_info(u32 format)
{ .format = V4L2_PIX_FMT_NV24, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .hdiv = 1, .vdiv = 1 },
{ .format = V4L2_PIX_FMT_NV42, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .hdiv = 1, .vdiv = 1 },
+ { .format = V4L2_PIX_FMT_NV15, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 5, 5, 0, 0 }, .hdiv = 2, .vdiv = 2, .block_w = { 4, 2, 0, 0 }, .block_h = { 1, 1, 0, 0 } },
+ { .format = V4L2_PIX_FMT_NV20, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 5, 5, 0, 0 }, .hdiv = 2, .vdiv = 1, .block_w = { 4, 2, 0, 0 }, .block_h = { 1, 1, 0, 0 } },
+
@@ -350,7 +317,7 @@ index 9260791b8438..169f8ad6fade 100644
@@ -603,6 +603,9 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */
+#define V4L2_PIX_FMT_NV15 v4l2_fourcc('N', 'V', '1', '5') /* 15 Y/CbCr 4:2:0 10-bit packed */
+#define V4L2_PIX_FMT_NV20 v4l2_fourcc('N', 'V', '2', '0') /* 20 Y/CbCr 4:2:2 10-bit packed */
+
@@ -392,7 +359,7 @@ index 503ae683d0fd..88f5f4bb320b 100644
u32 offset;
dma_addr_t dst_addr;
@@ -906,8 +906,8 @@ static void config_registers(struct rkvdec_ctx *ctx,
f = &ctx->decoded_fmt;
dst_fmt = &f->fmt.pix_mp;
- hor_virstride = (sps->bit_depth_luma_minus8 + 8) * dst_fmt->width / 8;
@@ -400,7 +367,7 @@ index 503ae683d0fd..88f5f4bb320b 100644
+ hor_virstride = dst_fmt->plane_fmt[0].bytesperline;
+ ver_virstride = dst_fmt->height;
y_virstride = hor_virstride * ver_virstride;
if (sps->chroma_format_idc == 0)
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
@@ -426,7 +393,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
@@ -27,6 +27,17 @@
#include "rkvdec.h"
#include "rkvdec-regs.h"
+static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
+ struct v4l2_pix_format_mplane *pix_mp)
+{
@@ -442,7 +409,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
{
struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
@@ -177,13 +188,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
- v4l2_fill_pixfmt_mp(&f->fmt.pix_mp,
@@ -456,12 +423,12 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
+ f->fmt.pix_mp.height = ctx->coded_fmt.fmt.pix_mp.height;
+ rkvdec_fill_decoded_pixfmt(ctx, &f->fmt.pix_mp);
}
static int rkvdec_enum_framesizes(struct file *file, void *priv,
@@ -249,13 +256,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
&pix_mp->height,
&coded_desc->frmsize);
- v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat,
- pix_mp->width, pix_mp->height);
- pix_mp->plane_fmt[0].sizeimage +=
@@ -470,7 +437,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
- DIV_ROUND_UP(pix_mp->height, 16);
- pix_mp->field = V4L2_FIELD_NONE;
+ rkvdec_fill_decoded_pixfmt(ctx, pix_mp);
return 0;
}
@@ -498,7 +465,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
@@ -38,6 +38,16 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
pix_mp->field = V4L2_FIELD_NONE;
}
+static u32 rkvdec_valid_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
+{
+ const struct rkvdec_coded_fmt_desc *coded_desc = ctx->coded_fmt_desc;
@@ -515,18 +482,18 @@ index d8d0eab9e25d..d31344c4acaa 100644
@@ -60,6 +70,10 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
/* Only 8-bit is supported */
return -EINVAL;
+ if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
+ /* Only current valid format */
+ return -EINVAL;
+
width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
height = (sps->pic_height_in_map_units_minus1 + 1) * 16;
@@ -70,8 +84,27 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
return 0;
}
+static int rkvdec_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
@@ -549,12 +516,12 @@ index d8d0eab9e25d..d31344c4acaa 100644
.try_ctrl = rkvdec_try_ctrl,
+ .s_ctrl = rkvdec_s_ctrl,
};
static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
@@ -186,6 +219,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
{
struct v4l2_format *f = &ctx->decoded_fmt;
+ ctx->valid_fmt = 0;
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
@@ -562,7 +529,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
@@ -241,13 +275,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
if (WARN_ON(!coded_desc))
return -EINVAL;
- for (i = 0; i < coded_desc->num_decoded_fmts; i++) {
- if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat)
- break;
@@ -574,27 +541,27 @@ index d8d0eab9e25d..d31344c4acaa 100644
+ if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat)
+ break;
+ }
- if (i == coded_desc->num_decoded_fmts)
- pix_mp->pixelformat = coded_desc->decoded_fmts[0];
+ if (i == coded_desc->num_decoded_fmts)
+ pix_mp->pixelformat = coded_desc->decoded_fmts[0];
+ }
/* Always apply the frmsize constraint of the coded end. */
pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
@@ -322,6 +360,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
return ret;
ctx->decoded_fmt = *f;
+ ctx->valid_fmt = f->fmt.pix_mp.pixelformat;
return 0;
}
@@ -411,6 +450,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
if (WARN_ON(!ctx->coded_fmt_desc))
return -EINVAL;
+ if (ctx->valid_fmt) {
+ if (f->index)
+ return -EINVAL;
@@ -605,7 +572,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
+
if (f->index >= ctx->coded_fmt_desc->num_decoded_fmts)
return -EINVAL;
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
index 52ac3874c5e5..7b6f44ee8a1a 100644
--- a/drivers/staging/media/rkvdec/rkvdec.h
@@ -653,7 +620,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644
@@ -1021,6 +1021,25 @@ static int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx,
return 0;
}
+static u32 rkvdec_h264_valid_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
+{
+ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
@@ -677,7 +644,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644
{
struct rkvdec_dev *rkvdec = ctx->dev;
@@ -1124,6 +1143,7 @@ static int rkvdec_h264_run(struct rkvdec_ctx *ctx)
const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops = {
.adjust_fmt = rkvdec_h264_adjust_fmt,
+ .valid_fmt = rkvdec_h264_valid_fmt,
@@ -720,15 +687,15 @@ index d31344c4acaa..d068383aeea8 100644
+ if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
+ /* Only 8-bit and 10-bit is supported */
return -EINVAL;
if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
@@ -155,6 +151,9 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
static const u32 rkvdec_h264_decoded_fmts[] = {
V4L2_PIX_FMT_NV12,
+ V4L2_PIX_FMT_NV15,
+ V4L2_PIX_FMT_NV16,
+ V4L2_PIX_FMT_NV20,
};
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {

View File

@@ -98,27 +98,6 @@ index c9a551dbd9bc..6ce11b736363 100644
/*
* Assign an invalid pic_num if DPB entry at that position is inactive.
* If we assign 0 in that position hardware will treat that as a real
@@ -763,19 +767,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
u8 dpb_valid = 0;
- u8 idx = 0;
-
- switch (j) {
- case 0:
- idx = h264_ctx->reflists.p[i];
- break;
- case 1:
- idx = h264_ctx->reflists.b0[i];
- break;
- case 2:
- idx = h264_ctx->reflists.b1[i];
- break;
- }
+ u8 idx = reflists[j][i];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
@@ -143,88 +122,6 @@ index 6ce11b736363..9c3f08c94800 100644
u16 *p = (u16 *)hw_rps;
memset(hw_rps, 0, sizeof(priv_tbl->rps));
@@ -764,18 +764,71 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
p[i] = dpb[i].frame_num - max_frame_num;
}
- for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
- for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
- u8 dpb_valid = 0;
- u8 idx = reflists[j][i];
+ if (!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) {
+ for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
+ for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
+ u8 dpb_valid = 0;
+ u8 idx = reflists[j][i];
- if (idx >= ARRAY_SIZE(dec_params->dpb))
- continue;
- dpb_valid = !!(dpb[idx].flags &
- V4L2_H264_DPB_ENTRY_FLAG_ACTIVE);
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ dpb_valid = !!(dpb[idx].flags &
+ V4L2_H264_DPB_ENTRY_FLAG_ACTIVE);
- set_ps_field(hw_rps, DPB_INFO(i, j),
- idx | dpb_valid << 4);
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | dpb_valid << 4);
+ }
+ }
+ return;
+ }
+
+ for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
+ enum v4l2_h264_field_reference a_parity =
+ (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
+ ? V4L2_H264_BOTTOM_FIELD_REF : V4L2_H264_TOP_FIELD_REF;
+ enum v4l2_h264_field_reference b_parity =
+ (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
+ ? V4L2_H264_TOP_FIELD_REF : V4L2_H264_BOTTOM_FIELD_REF;
+ u32 flags = V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM;
+ i = 0;
+
+ for (k = 0; k < 2; k++) {
+ u8 a = 0;
+ u8 b = 0;
+ u32 long_term = k ? V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM : 0;
+
+ while (a < h264_ctx->reflists.num_valid || b < h264_ctx->reflists.num_valid) {
+ for (; a < h264_ctx->reflists.num_valid; a++) {
+ u8 idx = reflists[j][a];
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ if ((dpb[idx].reference & a_parity) == a_parity &&
+ (dpb[idx].flags & flags) == long_term) {
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | (1 << 4));
+ set_ps_field(hw_rps, BOTTOM_FLAG(i, j),
+ a_parity == V4L2_H264_BOTTOM_FIELD_REF);
+ i++;
+ a++;
+ break;
+ }
+ }
+ for (; b < h264_ctx->reflists.num_valid; b++) {
+ u8 idx = reflists[j][b];
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ if ((dpb[idx].reference & b_parity) == b_parity &&
+ (dpb[idx].flags & flags) == long_term) {
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | (1 << 4));
+ set_ps_field(hw_rps, BOTTOM_FLAG(i, j),
+ b_parity == V4L2_H264_BOTTOM_FIELD_REF);
+ i++;
+ b++;
+ break;
+ }
+ }
+ }
}
}
}
@@ -968,10 +1021,6 @@ static void config_registers(struct rkvdec_ctx *ctx,
rkvdec->regs + RKVDEC_REG_H264_BASE_REFER15);
}
@@ -431,52 +328,6 @@ index 7b56a68c176c..befa69d5c855 100644
if (dpb[i / 2].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 13:42:01 +0200
Subject: [PATCH] media: rkvdec: adapt to match 5.11 H.264 uapi changes
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 9c3f08c94800..7238117b6cf4 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -783,10 +783,10 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
}
for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
- enum v4l2_h264_field_reference a_parity =
+ u8 a_parity =
(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
? V4L2_H264_BOTTOM_FIELD_REF : V4L2_H264_TOP_FIELD_REF;
- enum v4l2_h264_field_reference b_parity =
+ u8 b_parity =
(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
? V4L2_H264_TOP_FIELD_REF : V4L2_H264_BOTTOM_FIELD_REF;
u32 flags = V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM;
@@ -802,7 +802,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
u8 idx = reflists[j][a];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
- if ((dpb[idx].reference & a_parity) == a_parity &&
+ if ((dpb[idx].fields & a_parity) == a_parity &&
(dpb[idx].flags & flags) == long_term) {
set_ps_field(hw_rps, DPB_INFO(i, j),
idx | (1 << 4));
@@ -817,7 +817,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
u8 idx = reflists[j][b];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
- if ((dpb[idx].reference & b_parity) == b_parity &&
+ if ((dpb[idx].fields & b_parity) == b_parity &&
(dpb[idx].flags & flags) == long_term) {
set_ps_field(hw_rps, DPB_INFO(i, j),
idx | (1 << 4));
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Randy Li <ayaka@soulik.info>
Date: Sun, 6 Jan 2019 01:48:37 +0800

View File

@@ -3505,10 +3505,9 @@ index da32a6350344..4fb05e8b5a54 100644
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, of_rkvdec_match);
@@ -1218,6 +1255,7 @@ static int rkvdec_probe(struct platform_device *pdev)
@@ -1218,5 +1255,6 @@ static int rkvdec_probe(struct platform_device *pdev)
{
struct rkvdec_dev *rkvdec;
struct resource *res;
+ const struct rkvdec_variant *variant;
unsigned int i;
int ret, irq;

View File

@@ -128,39 +128,6 @@ index 65a8334a188b..f4c5ee4a1e26 100644
return 0;
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: rkvdec: h264: Fix bit depth wrap in pps packet
The luma and chroma bit depth fields in the pps packet is 3 bits wide.
8 is wrongly added to the bit depth value written to these 3-bit fields.
Because only the 3 LSB is written the hardware is configured correctly.
Correct this by not adding 8 to the luma and chroma bit depth value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 9852c3519f56..f3ff3e709169 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -661,8 +661,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
WRITE_PPS(0xff, PROFILE_IDC);
WRITE_PPS(1, CONSTRAINT_SET3_FLAG);
WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
- WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA);
- WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA);
+ WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA);
+ WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA);
WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4);
WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES);
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000

View File

@@ -98,27 +98,6 @@ index c9a551dbd9bc..6ce11b736363 100644
/*
* Assign an invalid pic_num if DPB entry at that position is inactive.
* If we assign 0 in that position hardware will treat that as a real
@@ -763,19 +767,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
u8 dpb_valid = 0;
- u8 idx = 0;
-
- switch (j) {
- case 0:
- idx = h264_ctx->reflists.p[i];
- break;
- case 1:
- idx = h264_ctx->reflists.b0[i];
- break;
- case 2:
- idx = h264_ctx->reflists.b1[i];
- break;
- }
+ u8 idx = reflists[j][i];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
@@ -143,88 +122,6 @@ index 6ce11b736363..9c3f08c94800 100644
u16 *p = (u16 *)hw_rps;
memset(hw_rps, 0, sizeof(priv_tbl->rps));
@@ -764,18 +764,71 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
p[i] = dpb[i].frame_num - max_frame_num;
}
- for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
- for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
- u8 dpb_valid = 0;
- u8 idx = reflists[j][i];
+ if (!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) {
+ for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
+ for (i = 0; i < h264_ctx->reflists.num_valid; i++) {
+ u8 dpb_valid = 0;
+ u8 idx = reflists[j][i];
- if (idx >= ARRAY_SIZE(dec_params->dpb))
- continue;
- dpb_valid = !!(dpb[idx].flags &
- V4L2_H264_DPB_ENTRY_FLAG_ACTIVE);
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ dpb_valid = !!(dpb[idx].flags &
+ V4L2_H264_DPB_ENTRY_FLAG_ACTIVE);
- set_ps_field(hw_rps, DPB_INFO(i, j),
- idx | dpb_valid << 4);
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | dpb_valid << 4);
+ }
+ }
+ return;
+ }
+
+ for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
+ enum v4l2_h264_field_reference a_parity =
+ (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
+ ? V4L2_H264_BOTTOM_FIELD_REF : V4L2_H264_TOP_FIELD_REF;
+ enum v4l2_h264_field_reference b_parity =
+ (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
+ ? V4L2_H264_TOP_FIELD_REF : V4L2_H264_BOTTOM_FIELD_REF;
+ u32 flags = V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM;
+ i = 0;
+
+ for (k = 0; k < 2; k++) {
+ u8 a = 0;
+ u8 b = 0;
+ u32 long_term = k ? V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM : 0;
+
+ while (a < h264_ctx->reflists.num_valid || b < h264_ctx->reflists.num_valid) {
+ for (; a < h264_ctx->reflists.num_valid; a++) {
+ u8 idx = reflists[j][a];
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ if ((dpb[idx].reference & a_parity) == a_parity &&
+ (dpb[idx].flags & flags) == long_term) {
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | (1 << 4));
+ set_ps_field(hw_rps, BOTTOM_FLAG(i, j),
+ a_parity == V4L2_H264_BOTTOM_FIELD_REF);
+ i++;
+ a++;
+ break;
+ }
+ }
+ for (; b < h264_ctx->reflists.num_valid; b++) {
+ u8 idx = reflists[j][b];
+ if (idx >= ARRAY_SIZE(dec_params->dpb))
+ continue;
+ if ((dpb[idx].reference & b_parity) == b_parity &&
+ (dpb[idx].flags & flags) == long_term) {
+ set_ps_field(hw_rps, DPB_INFO(i, j),
+ idx | (1 << 4));
+ set_ps_field(hw_rps, BOTTOM_FLAG(i, j),
+ b_parity == V4L2_H264_BOTTOM_FIELD_REF);
+ i++;
+ b++;
+ break;
+ }
+ }
+ }
}
}
}
@@ -968,10 +1021,6 @@ static void config_registers(struct rkvdec_ctx *ctx,
rkvdec->regs + RKVDEC_REG_H264_BASE_REFER15);
}
@@ -431,52 +328,6 @@ index 7b56a68c176c..befa69d5c855 100644
if (dpb[i / 2].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 13:42:01 +0200
Subject: [PATCH] media: rkvdec: adapt to match 5.11 H.264 uapi changes
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 9c3f08c94800..7238117b6cf4 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -783,10 +783,10 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
}
for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
- enum v4l2_h264_field_reference a_parity =
+ u8 a_parity =
(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
? V4L2_H264_BOTTOM_FIELD_REF : V4L2_H264_TOP_FIELD_REF;
- enum v4l2_h264_field_reference b_parity =
+ u8 b_parity =
(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)
? V4L2_H264_TOP_FIELD_REF : V4L2_H264_BOTTOM_FIELD_REF;
u32 flags = V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM;
@@ -802,7 +802,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
u8 idx = reflists[j][a];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
- if ((dpb[idx].reference & a_parity) == a_parity &&
+ if ((dpb[idx].fields & a_parity) == a_parity &&
(dpb[idx].flags & flags) == long_term) {
set_ps_field(hw_rps, DPB_INFO(i, j),
idx | (1 << 4));
@@ -817,7 +817,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
u8 idx = reflists[j][b];
if (idx >= ARRAY_SIZE(dec_params->dpb))
continue;
- if ((dpb[idx].reference & b_parity) == b_parity &&
+ if ((dpb[idx].fields & b_parity) == b_parity &&
(dpb[idx].flags & flags) == long_term) {
set_ps_field(hw_rps, DPB_INFO(i, j),
idx | (1 << 4));
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Randy Li <ayaka@soulik.info>
Date: Sun, 6 Jan 2019 01:48:37 +0800

View File

@@ -3505,10 +3505,9 @@ index da32a6350344..4fb05e8b5a54 100644
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, of_rkvdec_match);
@@ -1218,6 +1255,7 @@ static int rkvdec_probe(struct platform_device *pdev)
@@ -1218,5 +1255,6 @@ static int rkvdec_probe(struct platform_device *pdev)
{
struct rkvdec_dev *rkvdec;
struct resource *res;
+ const struct rkvdec_variant *variant;
unsigned int i;
int ret, irq;