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rockchip-rk3588: edge: add panthor support
This commit is contained in:
amazingfate
committed by
Jianfeng Liu
Jianfeng Liu
parent
c2c672f07c
commit
6aff5cfbc1
@@ -6374,6 +6374,7 @@ CONFIG_DRM_DISPLAY_HDMI_HELPER=y
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CONFIG_DRM_DP_CEC=y
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CONFIG_DRM_TTM=m
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CONFIG_DRM_EXEC=m
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CONFIG_DRM_GPUVM=m
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CONFIG_DRM_BUDDY=m
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CONFIG_DRM_VRAM_HELPER=m
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CONFIG_DRM_TTM_HELPER=m
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@@ -6600,6 +6601,7 @@ CONFIG_DRM_XEN=y
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CONFIG_DRM_XEN_FRONTEND=m
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CONFIG_DRM_LIMA=m
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CONFIG_DRM_PANFROST=m
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CONFIG_DRM_PANTHOR=m
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CONFIG_DRM_TIDSS=m
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CONFIG_DRM_GUD=m
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CONFIG_DRM_SSD130X=m
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14855
patch/kernel/rockchip-rk3588-edge/0041-panthor-v6.patch
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14855
patch/kernel/rockchip-rk3588-edge/0041-panthor-v6.patch
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,150 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@collabora.com>
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Date: Mon, 7 Aug 2023 17:30:58 +0200
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Subject: arm64: dts: rockchip: rk3588: Add GPU nodes
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 119 ++++++++++
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1 file changed, 119 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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index 762a095648b1..f43f10340d5d 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -962,6 +962,120 @@ usb_host2_xhci: usb@fcd00000 {
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snps,dis-del-phy-power-chg-quirk;
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snps,dis-tx-ipgap-linecheck-quirk;
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snps,dis_rxdet_inp3_quirk;
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+ };
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+
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+ gpu_opp_table: gpu-opp-table {
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+ compatible = "operating-points-v2";
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+
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+ nvmem-cells = <&gpu_leakage>;
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+ nvmem-cell-names = "leakage";
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+
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+ rockchip,pvtm-voltage-sel = <
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+ 0 815 0
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+ 816 835 1
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+ 836 860 2
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+ 861 885 3
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+ 886 910 4
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+ 911 9999 5
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+ >;
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+ rockchip,pvtm-pvtpll;
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+ rockchip,pvtm-offset = <0x1c>;
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+ rockchip,pvtm-sample-time = <1100>;
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+ rockchip,pvtm-freq = <800000>;
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+ rockchip,pvtm-volt = <750000>;
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+ rockchip,pvtm-ref-temp = <25>;
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+ rockchip,pvtm-temp-prop = <(-135) (-135)>;
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+ rockchip,pvtm-thermal-zone = "gpu-thermal";
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+
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+ clocks = <&cru CLK_GPU>;
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+ clock-names = "clk";
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+ rockchip,grf = <&gpu_grf>;
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+ volt-mem-read-margin = <
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+ 855000 1
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+ 765000 2
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+ 675000 3
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+ 495000 4
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+ >;
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+ low-volt-mem-read-margin = <4>;
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+ intermediate-threshold-freq = <400000>; /* KHz */
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+
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+ rockchip,temp-hysteresis = <5000>;
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+ rockchip,low-temp = <10000>;
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+ rockchip,low-temp-min-volt = <750000>;
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+ rockchip,high-temp = <85000>;
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+ rockchip,high-temp-max-freq = <800000>;
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+
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+ opp-300000000 {
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+ opp-hz = /bits/ 64 <300000000>;
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+ opp-microvolt = <675000 675000 850000>;
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+ };
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+ opp-400000000 {
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+ opp-hz = /bits/ 64 <400000000>;
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+ opp-microvolt = <675000 675000 850000>;
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+ };
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+ opp-500000000 {
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+ opp-hz = /bits/ 64 <500000000>;
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+ opp-microvolt = <675000 675000 850000>;
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+ };
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+ opp-600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt = <675000 675000 850000>;
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+ };
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+ opp-700000000 {
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+ opp-hz = /bits/ 64 <700000000>;
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+ opp-microvolt = <700000 700000 850000>;
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+ opp-microvolt-L2 = <687500 687500 850000>;
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+ opp-microvolt-L3 = <675000 675000 850000>;
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+ opp-microvolt-L4 = <675000 675000 850000>;
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+ opp-microvolt-L5 = <675000 675000 850000>;
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+ };
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+ opp-800000000 {
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+ opp-hz = /bits/ 64 <800000000>;
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+ opp-microvolt = <750000 750000 850000>;
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+ opp-microvolt-L1 = <737500 737500 850000>;
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+ opp-microvolt-L2 = <725000 725000 850000>;
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+ opp-microvolt-L3 = <712500 712500 850000>;
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+ opp-microvolt-L4 = <700000 700000 850000>;
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+ opp-microvolt-L5 = <700000 700000 850000>;
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+ };
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+ opp-900000000 {
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+ opp-hz = /bits/ 64 <900000000>;
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+ opp-microvolt = <800000 800000 850000>;
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+ opp-microvolt-L1 = <787500 787500 850000>;
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+ opp-microvolt-L2 = <775000 775000 850000>;
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+ opp-microvolt-L3 = <762500 762500 850000>;
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+ opp-microvolt-L4 = <750000 750000 850000>;
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+ opp-microvolt-L5 = <737500 737500 850000>;
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+ };
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+ opp-1000000000 {
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+ opp-hz = /bits/ 64 <1000000000>;
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+ opp-microvolt = <850000 850000 850000>;
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+ opp-microvolt-L1 = <837500 837500 850000>;
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+ opp-microvolt-L2 = <825000 825000 850000>;
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+ opp-microvolt-L3 = <812500 812500 850000>;
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+ opp-microvolt-L4 = <800000 800000 850000>;
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+ opp-microvolt-L5 = <787500 787500 850000>;
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+ };
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+ };
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+
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+ gpu: gpu@fb000000 {
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+ compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
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+ reg = <0x0 0xfb000000 0x0 0x200000>;
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+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
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+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
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+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
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+ interrupt-names = "job", "mmu", "gpu";
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+
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+ clock-names = "core", "coregroup", "stacks";
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+ clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
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+ <&cru CLK_GPU_STACKS>;
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+ assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
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+ assigned-clock-rates = <200000000>;
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+ power-domains = <&power RK3588_PD_GPU>;
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+ operating-points-v2 = <&gpu_opp_table>;
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+ #cooling-cells = <2>;
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+ dynamic-power-coefficient = <2982>;
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+
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status = "disabled";
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};
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@@ -3124,6 +3238,11 @@ gpio4: gpio@fec50000 {
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};
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};
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+ gpu_grf: syscon@fd5a0000 {
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+ compatible = "rockchip,rk3588-gpu-grf", "syscon";
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+ reg = <0x0 0xfd5a0000 0x0 0x100>;
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+ };
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+
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av1d: video-codec@fdc70000 {
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compatible = "rockchip,rk3588-av1-vpu";
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reg = <0x0 0xfdc70000 0x0 0x800>;
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--
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Armbian
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@@ -0,0 +1,38 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@collabora.com>
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Date: Tue, 8 Aug 2023 12:05:22 +0200
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Subject: arm64: dts: rockchip: rk3588-rock5b: Add GPU node
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Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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index 98192a35920c..7cb5874f3ec2 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -182,6 +182,11 @@ &cpu_l3 {
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mem-supply = <&vdd_cpu_lit_mem_s0>;
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};
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+&gpu {
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+ mali-supply = <&vdd_gpu_s0>;
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+ status = "okay";
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+};
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+
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&hdmi0 {
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status = "okay";
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};
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@@ -490,6 +495,7 @@ rk806_dvs3_null: dvs3-null-pins {
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regulators {
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vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
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+ regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <950000>;
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--
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Armbian
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