mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
add community support for DShanPI-R1
This commit is contained in:
chainsx
30
config/boards/dshanpi-r1.csc
Normal file
30
config/boards/dshanpi-r1.csc
Normal file
@@ -0,0 +1,30 @@
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# Rockchip RK3568 quad core 1-8GB SoC GBe eMMC USB3
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BOARD_NAME="100ASK DShanPI R1"
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BOARDFAMILY="rk35xx"
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BOARD_MAINTAINER=""
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BOOTCONFIG="dshanpi-r1-rk3568_defconfig"
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KERNEL_TARGET="vendor"
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KERNEL_TEST_TARGET="vendor"
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FULL_DESKTOP="yes"
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BOOT_LOGO="desktop"
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BOOT_FDT_FILE="rockchip/rk3568-dshapi-r1.dtb"
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BOOT_SCENARIO="spl-blobs"
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IMAGE_PARTITION_TABLE="gpt"
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function post_family_config__dshanpi-r1_use_mainline_uboot() {
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display_alert "$BOARD" "Mainline U-Boot overrides for $BOARD - $BRANCH" "info"
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unset BOOTFS_TYPE # fixes armbian-install and unneeded for modern uboot anyway
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declare -g BOOTCONFIG="dshanpi-r1-rk3568_defconfig"
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declare -g BOOTDELAY=1
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declare -g BOOTSOURCE="https://github.com/u-boot/u-boot"
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declare -g BOOTBRANCH="tag:v2024.10"
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declare -g BOOTPATCHDIR="v2024.10"
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declare -g BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory
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declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin"
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unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already
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# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
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function write_uboot_platform() {
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dd "if=$1/u-boot-rockchip.bin" "of=$2" bs=32k seek=1 conv=notrunc status=none
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}
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}
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@@ -0,0 +1,859 @@
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From 40f17829a096ffd2d8f3a7919f0564d471dc9f1d Mon Sep 17 00:00:00 2001
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From: chainsx <chainsx@outlook.com>
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Date: Sun, 22 Dec 2024 16:27:57 +0800
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Subject: [PATCH] add support for dshanpi-r1
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---
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arch/arm/dts/rk3568-dshanpi-r1-u-boot.dtsi | 42 ++
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configs/dshanpi-r1-rk3568_defconfig | 93 +++
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.../src/arm64/rockchip/rk3568-dshanpi-r1.dts | 689 ++++++++++++++++++
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3 files changed, 824 insertions(+)
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create mode 100644 arch/arm/dts/rk3568-dshanpi-r1-u-boot.dtsi
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create mode 100644 configs/dshanpi-r1-rk3568_defconfig
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create mode 100644 dts/upstream/src/arm64/rockchip/rk3568-dshanpi-r1.dts
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diff --git a/arch/arm/dts/rk3568-dshanpi-r1-u-boot.dtsi b/arch/arm/dts/rk3568-dshanpi-r1-u-boot.dtsi
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new file mode 100644
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index 00000000..869724ec
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--- /dev/null
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+++ b/arch/arm/dts/rk3568-dshanpi-r1-u-boot.dtsi
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@@ -0,0 +1,42 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
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+ */
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+
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+#include "rk356x-u-boot.dtsi"
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+
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+&pcie3x2 {
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+ pinctrl-0 = <&pcie3x2_reset_h>;
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+};
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+
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+&pinctrl {
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+ pcie {
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+ pcie3x2_reset_h: pcie3x2-reset-h {
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+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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+
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+&sdhci {
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+ cap-mmc-highspeed;
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+ mmc-hs200-1_8v;
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+ mmc-hs400-1_8v;
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+ mmc-hs400-enhanced-strobe;
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+};
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+
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+&sfc {
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+ flash@0 {
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+ bootph-pre-ram;
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+ bootph-some-ram;
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+ };
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+};
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+
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+&usb_host0_ohci {
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+ status = "disabled";
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+};
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+
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+&vdd_npu {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
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+};
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diff --git a/configs/dshanpi-r1-rk3568_defconfig b/configs/dshanpi-r1-rk3568_defconfig
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new file mode 100644
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index 00000000..becb4240
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--- /dev/null
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+++ b/configs/dshanpi-r1-rk3568_defconfig
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@@ -0,0 +1,93 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_COUNTER_FREQUENCY=24000000
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_SPEED=24000000
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+CONFIG_SF_DEFAULT_MODE=0x2000
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+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-dshanpi-r1"
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+CONFIG_ROCKCHIP_RK3568=y
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+CONFIG_ROCKCHIP_SPI_IMAGE=y
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+CONFIG_SPL_SERIAL=y
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+CONFIG_DEBUG_UART_BASE=0xFE660000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SPL_SPI_FLASH_SUPPORT=y
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+CONFIG_SPL_SPI=y
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+CONFIG_SYS_LOAD_ADDR=0xc00800
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+CONFIG_PCI=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_AHCI=y
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_FIT_SIGNATURE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_LEGACY_IMAGE_FORMAT=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-dshanpi-r1.dtb"
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+CONFIG_SPL_MAX_SIZE=0x40000
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+CONFIG_SPL_PAD_TO=0x7f8000
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_SPL_SPI_LOAD=y
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+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
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+CONFIG_SPL_ATF=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_POWEROFF=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_PMIC=y
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+CONFIG_CMD_REGULATOR=y
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+# CONFIG_SPL_DOS_PARTITION is not set
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_OF_LIVE=y
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_SPL_DM_SEQ_ALIAS=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_SCSI_AHCI=y
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+CONFIG_AHCI_PCI=y
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+CONFIG_SPL_CLK=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MISC=y
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+CONFIG_SUPPORT_EMMC_RPMB=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_MMC_SDHCI=y
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+CONFIG_MMC_SDHCI_SDMA=y
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+CONFIG_MMC_SDHCI_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_BUS=4
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+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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+CONFIG_SPI_FLASH_MACRONIX=y
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+CONFIG_SPI_FLASH_XTX=y
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+CONFIG_PHY_REALTEK=y
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+CONFIG_DWC_ETH_QOS=y
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+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
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+CONFIG_NVME_PCI=y
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+CONFIG_PCIE_DW_ROCKCHIP=y
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+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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+CONFIG_SPL_PINCTRL=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+CONFIG_SPL_RAM=y
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+CONFIG_SCSI=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYS_NS16550_MEM32=y
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+CONFIG_ROCKCHIP_SFC=y
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+CONFIG_SYSRESET=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_ERRNO_STR=y
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diff --git a/dts/upstream/src/arm64/rockchip/rk3568-dshanpi-r1.dts b/dts/upstream/src/arm64/rockchip/rk3568-dshanpi-r1.dts
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new file mode 100644
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index 00000000..19f8fc36
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--- /dev/null
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+++ b/dts/upstream/src/arm64/rockchip/rk3568-dshanpi-r1.dts
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@@ -0,0 +1,689 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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+ *
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
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+ compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
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+
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+ aliases {
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+ ethernet0 = &gmac0;
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+ ethernet1 = &gmac1;
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+ mmc0 = &sdmmc0;
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+ mmc1 = &sdhci;
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+ };
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ dc_12v: dc-12v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "dc_12v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
|
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+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
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||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led_work: led-0 {
|
||||
+ gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
+ function = LED_FUNCTION_HEARTBEAT;
|
||||
+ color = <LED_COLOR_ID_BLUE>;
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_work_en>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rk809-sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,name = "Analog RK809";
|
||||
+ simple-audio-card,mclk-fs = <256>;
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s1_8ch>;
|
||||
+ };
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&rk809>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sys: vcc3v3-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&dc_12v>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_sys: vcc5v0-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&dc_12v>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb: vcc5v0-usb {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_usb";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&dc_12v>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb_host: vcc5v0-usb-host {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
|
||||
+ regulator-name = "vcc5v0_usb_host";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_usb>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb_otg: vcc5v0-usb-otg {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
|
||||
+ regulator-name = "vcc5v0_usb_otg";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_usb>;
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_lcd0_n: vcc3v3-lcd0-n {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_lcd0_n";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc3v3_lcd0_n_en>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_lcd1_n: vcc3v3-lcd1-n {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_lcd1_n";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc3v3_lcd1_n_en>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&combphy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&combphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&gmac0 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
|
||||
+ assigned-clock-rates = <0>, <125000000>;
|
||||
+ clock_in_out = "output";
|
||||
+ phy-handle = <&rgmii_phy0>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac0_miim
|
||||
+ &gmac0_tx_bus2
|
||||
+ &gmac0_rx_bus2
|
||||
+ &gmac0_rgmii_clk
|
||||
+ &gmac0_rgmii_bus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gmac1 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
|
||||
+ assigned-clock-rates = <0>, <125000000>;
|
||||
+ clock_in_out = "output";
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1m1_miim
|
||||
+ &gmac1m1_tx_bus2
|
||||
+ &gmac1m1_rx_bus2
|
||||
+ &gmac1m1_rgmii_clk
|
||||
+ &gmac1m1_rgmii_bus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ avdd-0v9-supply = <&vdda0v9_image>;
|
||||
+ avdd-1v8-supply = <&vcca1v8_image>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint {
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_cpu: regulator@1c {
|
||||
+ compatible = "tcs,tcs4525";
|
||||
+ reg = <0x1c>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rk809: pmic@20 {
|
||||
+ compatible = "rockchip,rk809";
|
||||
+ reg = <0x20>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-names = "mclk";
|
||||
+ clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ vcc1-supply = <&vcc3v3_sys>;
|
||||
+ vcc2-supply = <&vcc3v3_sys>;
|
||||
+ vcc3-supply = <&vcc3v3_sys>;
|
||||
+ vcc4-supply = <&vcc3v3_sys>;
|
||||
+ vcc5-supply = <&vcc3v3_sys>;
|
||||
+ vcc6-supply = <&vcc3v3_sys>;
|
||||
+ vcc7-supply = <&vcc3v3_sys>;
|
||||
+ vcc8-supply = <&vcc3v3_sys>;
|
||||
+ vcc9-supply = <&vcc3v3_sys>;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG8 {
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ codec {
|
||||
+ mic-in-differential;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ touchscreen0: goodix@14 {
|
||||
+ compatible = "goodix,gt1151";
|
||||
+ reg = <0x14>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
|
||||
+ AVDD28-supply = <&vcc3v3_lcd0_n>;
|
||||
+ irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&touch_int &touch_rst>;
|
||||
+ reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
+ VDDIO-supply = <&vcc3v3_lcd0_n>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1_8ch {
|
||||
+ rockchip,trcm-sync-tx-only;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio0 {
|
||||
+ rgmii_phy0: ethernet-phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: ethernet-phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ display {
|
||||
+ vcc3v3_lcd0_n_en: vcc3v3_lcd0_n_en {
|
||||
+ rockchip,pins = <0 RK_PC7 0 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ vcc3v3_lcd1_n_en: vcc3v3_lcd1_n_en {
|
||||
+ rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ led_work_en: led_work_en {
|
||||
+ rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic_int {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ touchscreen {
|
||||
+ touch_int: touch_int {
|
||||
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ touch_rst: touch_rst {
|
||||
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_usb_host_en: vcc5v0_usb_host_en {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_1v8>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc3v3_sd>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ extcon = <&usb2phy0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ phy-supply = <&vcc5v0_usb_otg>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
||||
Reference in New Issue
Block a user