move media current 5.19 and edge 6.0 (#4262)

* move media current 5.19 and edge 6.0

* del old patch

config/kernel/linux-media-edge.config

@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 5.19.3 Kernel Configuration
+# Linux/arm64 6.0.0-rc7 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
 CONFIG_CC_IS_GCC=y
@@ -13,7 +13,6 @@ CONFIG_LD_VERSION=23200
 CONFIG_LLD_VERSION=0
 CONFIG_CC_CAN_LINK=y
 CONFIG_CC_CAN_LINK_STATIC=y
-CONFIG_CC_HAS_ASM_GOTO=y
 CONFIG_CC_HAS_ASM_INLINE=y
 CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
 CONFIG_PAHOLE_VERSION=122
@@ -74,6 +73,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
 CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y
 CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
 CONFIG_TIME_KUNIT_TEST=m
+CONFIG_CONTEXT_TRACKING=y
+CONFIG_CONTEXT_TRACKING_IDLE=y
 
 #
 # Timers subsystem
@@ -172,6 +173,7 @@ CONFIG_NUMA_BALANCING=y
 CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
 CONFIG_CGROUPS=y
 CONFIG_PAGE_COUNTER=y
+# CONFIG_CGROUP_FAVOR_DYNMODS is not set
 CONFIG_MEMCG=y
 CONFIG_MEMCG_SWAP=y
 CONFIG_MEMCG_KMEM=y
@@ -306,6 +308,7 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y
 # CONFIG_ARCH_BCM2835 is not set
 # CONFIG_ARCH_BCM4908 is not set
 # CONFIG_ARCH_BCM_IPROC is not set
+# CONFIG_ARCH_BCMBCA is not set
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_BITMAIN is not set
 # CONFIG_ARCH_BRCMSTB is not set
@@ -320,6 +323,7 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y
 # CONFIG_ARCH_MESON is not set
 # CONFIG_ARCH_MVEBU is not set
 # CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_NPCM is not set
 # CONFIG_ARCH_QCOM is not set
 # CONFIG_ARCH_REALTEK is not set
 # CONFIG_ARCH_RENESAS is not set
@@ -373,6 +377,8 @@ CONFIG_ARM64_ERRATUM_2051678=y
 CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
 CONFIG_ARM64_ERRATUM_2054223=y
 CONFIG_ARM64_ERRATUM_2067961=y
+CONFIG_ARM64_ERRATUM_2441009=y
+CONFIG_ARM64_ERRATUM_2457168=y
 CONFIG_CAVIUM_ERRATUM_22375=y
 CONFIG_CAVIUM_ERRATUM_23144=y
 CONFIG_CAVIUM_ERRATUM_23154=y
@@ -480,7 +486,6 @@ CONFIG_ARM64_TLB_RANGE=y
 CONFIG_AS_HAS_ARMV8_5=y
 CONFIG_ARM64_BTI=y
 CONFIG_ARM64_E0PD=y
-CONFIG_ARCH_RANDOM=y
 # end of ARMv8.5 architectural features
 
 #
@@ -523,6 +528,7 @@ CONFIG_PM_STD_PARTITION=""
 CONFIG_PM_SLEEP=y
 CONFIG_PM_SLEEP_SMP=y
 # CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_USERSPACE_AUTOSLEEP is not set
 # CONFIG_PM_WAKELOCKS is not set
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
@@ -556,7 +562,6 @@ CONFIG_DT_IDLE_GENPD=y
 #
 # ARM CPU Idle Drivers
 #
-CONFIG_ARM_CPUIDLE=y
 CONFIG_ARM_PSCI_CPUIDLE=y
 CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
 # end of ARM CPU Idle Drivers
@@ -609,6 +614,7 @@ CONFIG_ACPI_SPCR_TABLE=y
 CONFIG_ACPI_AC=y
 CONFIG_ACPI_BATTERY=y
 CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_VIDEO=y
 CONFIG_ACPI_FAN=y
 # CONFIG_ACPI_TAD is not set
 CONFIG_ACPI_DOCK=y
@@ -648,6 +654,7 @@ CONFIG_ACPI_PPTT=y
 CONFIG_ACPI_PCC=y
 CONFIG_PMIC_OPREGION=y
 CONFIG_ACPI_VIOT=y
+CONFIG_ACPI_PRMT=y
 CONFIG_IRQ_BYPASS_MANAGER=y
 CONFIG_HAVE_KVM=y
 CONFIG_HAVE_KVM_IRQCHIP=y
@@ -678,6 +685,7 @@ CONFIG_CRYPTO_SM4_ARM64_CE=m
 # CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set
 # CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set
 CONFIG_CRYPTO_GHASH_ARM64_CE=y
+# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set
 CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
 CONFIG_CRYPTO_AES_ARM64=y
 CONFIG_CRYPTO_AES_ARM64_CE=y
@@ -701,6 +709,7 @@ CONFIG_JUMP_LABEL=y
 CONFIG_UPROBES=y
 CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
 CONFIG_KRETPROBES=y
+CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
@@ -747,7 +756,7 @@ CONFIG_ARCH_SUPPORTS_LTO_CLANG=y
 CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y
 CONFIG_LTO_NONE=y
 CONFIG_ARCH_SUPPORTS_CFI_CLANG=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_CONTEXT_TRACKING_USER=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
 CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
 CONFIG_HAVE_MOVE_PUD=y
@@ -788,6 +797,7 @@ CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y
 CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
+CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y
 
 #
 # GCOV-based kernel profiling
@@ -992,9 +1002,11 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
 CONFIG_MEMORY_FAILURE=y
 # CONFIG_HWPOISON_INJECT is not set
+CONFIG_ARCH_WANTS_THP_SWAP=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 # CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set
 CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
+CONFIG_THP_SWAP=y
 # CONFIG_READ_ONLY_THP_FOR_FS is not set
 CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
 CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
@@ -1012,11 +1024,11 @@ CONFIG_PAGE_IDLE_FLAG=y
 CONFIG_IDLE_PAGE_TRACKING=y
 CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
 CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y
-CONFIG_ARCH_HAS_VM_GET_PAGE_PROT=y
 CONFIG_ARCH_HAS_PTE_DEVMAP=y
 CONFIG_ARCH_HAS_ZONE_DMA_SET=y
 CONFIG_ZONE_DMA=y
 CONFIG_ZONE_DMA32=y
+CONFIG_GET_FREE_REGION=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PERCPU_STATS=y
 # CONFIG_GUP_TEST is not set
@@ -1035,6 +1047,7 @@ CONFIG_DAMON_PADDR=y
 # CONFIG_DAMON_SYSFS is not set
 # CONFIG_DAMON_DBGFS is not set
 CONFIG_DAMON_RECLAIM=y
+CONFIG_DAMON_LRU_SORT=y
 # end of Data Access Monitoring
 # end of Memory Management options
 
@@ -1259,6 +1272,7 @@ CONFIG_NFT_FIB_NETDEV=m
 CONFIG_NFT_REJECT_NETDEV=m
 CONFIG_NF_FLOW_TABLE_INET=m
 CONFIG_NF_FLOW_TABLE=m
+CONFIG_NF_FLOW_TABLE_PROCFS=y
 CONFIG_NETFILTER_XTABLES=m
 CONFIG_NETFILTER_XTABLES_COMPAT=y
 
@@ -1601,6 +1615,7 @@ CONFIG_NET_DSA_TAG_OCELOT_8021Q=m
 CONFIG_NET_DSA_TAG_QCA=m
 CONFIG_NET_DSA_TAG_RTL4_A=m
 CONFIG_NET_DSA_TAG_RTL8_4=m
+CONFIG_NET_DSA_TAG_RZN1_A5PSW=m
 CONFIG_NET_DSA_TAG_LAN9303=m
 CONFIG_NET_DSA_TAG_SJA1105=m
 CONFIG_NET_DSA_TAG_TRAILER=m
@@ -1818,70 +1833,6 @@ CONFIG_CAN_BCM=m
 CONFIG_CAN_GW=m
 CONFIG_CAN_J1939=m
 # CONFIG_CAN_ISOTP is not set
-
-#
-# CAN Device Drivers
-#
-CONFIG_CAN_VCAN=m
-CONFIG_CAN_VXCAN=m
-CONFIG_CAN_SLCAN=m
-CONFIG_CAN_DEV=m
-CONFIG_CAN_CALC_BITTIMING=y
-# CONFIG_CAN_FLEXCAN is not set
-CONFIG_CAN_GRCAN=m
-CONFIG_CAN_KVASER_PCIEFD=m
-CONFIG_CAN_XILINXCAN=m
-CONFIG_CAN_C_CAN=m
-CONFIG_CAN_C_CAN_PLATFORM=m
-CONFIG_CAN_C_CAN_PCI=m
-CONFIG_CAN_CC770=m
-CONFIG_CAN_CC770_ISA=m
-CONFIG_CAN_CC770_PLATFORM=m
-# CONFIG_CAN_CTUCANFD_PCI is not set
-# CONFIG_CAN_CTUCANFD_PLATFORM is not set
-# CONFIG_CAN_IFI_CANFD is not set
-CONFIG_CAN_M_CAN=m
-CONFIG_CAN_M_CAN_PCI=m
-CONFIG_CAN_M_CAN_PLATFORM=m
-CONFIG_CAN_M_CAN_TCAN4X5X=m
-CONFIG_CAN_PEAK_PCIEFD=m
-CONFIG_CAN_SJA1000=m
-CONFIG_CAN_EMS_PCI=m
-CONFIG_CAN_F81601=m
-CONFIG_CAN_KVASER_PCI=m
-CONFIG_CAN_PEAK_PCI=m
-CONFIG_CAN_PEAK_PCIEC=y
-CONFIG_CAN_PLX_PCI=m
-CONFIG_CAN_SJA1000_ISA=m
-CONFIG_CAN_SJA1000_PLATFORM=m
-CONFIG_CAN_SOFTING=m
-
-#
-# CAN SPI interfaces
-#
-CONFIG_CAN_HI311X=m
-CONFIG_CAN_MCP251X=m
-CONFIG_CAN_MCP251XFD=m
-# CONFIG_CAN_MCP251XFD_SANITY is not set
-# end of CAN SPI interfaces
-
-#
-# CAN USB interfaces
-#
-CONFIG_CAN_8DEV_USB=m
-CONFIG_CAN_EMS_USB=m
-CONFIG_CAN_ESD_USB2=m
-CONFIG_CAN_ETAS_ES58X=m
-CONFIG_CAN_GS_USB=m
-CONFIG_CAN_KVASER_USB=m
-CONFIG_CAN_MCBA_USB=m
-CONFIG_CAN_PEAK_USB=m
-CONFIG_CAN_UCAN=m
-# end of CAN USB interfaces
-
-# CONFIG_CAN_DEBUG_DEVICES is not set
-# end of CAN Device Drivers
-
 CONFIG_BT=m
 CONFIG_BT_BREDR=y
 CONFIG_BT_RFCOMM=m
@@ -2093,6 +2044,7 @@ CONFIG_PCI_QUIRKS=y
 CONFIG_PCI_STUB=y
 # CONFIG_PCI_PF_STUB is not set
 CONFIG_PCI_ATS=y
+CONFIG_PCI_DOE=y
 CONFIG_PCI_ECAM=y
 CONFIG_PCI_IOV=y
 CONFIG_PCI_PRI=y
@@ -2187,6 +2139,7 @@ CONFIG_CXL_ACPI=m
 CONFIG_CXL_MEM=m
 CONFIG_CXL_PORT=m
 CONFIG_CXL_SUSPEND=y
+CONFIG_CXL_REGION=y
 # CONFIG_PCCARD is not set
 # CONFIG_RAPIDIO is not set
 
@@ -2285,6 +2238,7 @@ CONFIG_ARM_SCMI_TRANSPORT_VIRTIO=y
 CONFIG_ARM_SCMI_TRANSPORT_VIRTIO_VERSION1_COMPLIANCE=y
 # CONFIG_ARM_SCMI_TRANSPORT_VIRTIO_ATOMIC_ENABLE is not set
 CONFIG_ARM_SCMI_POWER_DOMAIN=y
+CONFIG_ARM_SCMI_POWER_CONTROL=m
 # end of ARM System Control and Management Interface Protocol
 
 CONFIG_ARM_SCPI_PROTOCOL=y
@@ -2549,7 +2503,6 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
 CONFIG_BLK_DEV_DRBD=m
 # CONFIG_DRBD_FAULT_INJECTION is not set
 CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_SX8=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -2559,10 +2512,12 @@ CONFIG_XEN_BLKDEV_FRONTEND=m
 CONFIG_XEN_BLKDEV_BACKEND=m
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_RBD=m
+CONFIG_BLK_DEV_UBLK=m
 
 #
 # NVME Support
 #
+CONFIG_NVME_COMMON=y
 CONFIG_NVME_CORE=y
 CONFIG_BLK_DEV_NVME=y
 CONFIG_NVME_MULTIPATH=y
@@ -2571,12 +2526,14 @@ CONFIG_NVME_HWMON=y
 CONFIG_NVME_FABRICS=m
 CONFIG_NVME_FC=m
 CONFIG_NVME_TCP=m
+CONFIG_NVME_AUTH=y
 CONFIG_NVME_TARGET=m
 CONFIG_NVME_TARGET_PASSTHRU=y
 CONFIG_NVME_TARGET_LOOP=m
 CONFIG_NVME_TARGET_FC=m
 CONFIG_NVME_TARGET_FCLOOP=m
 CONFIG_NVME_TARGET_TCP=m
+CONFIG_NVME_TARGET_AUTH=y
 # end of NVME Support
 
 #
@@ -2609,6 +2566,7 @@ CONFIG_XILINX_SDFEC=m
 CONFIG_MISC_RTSX=m
 # CONFIG_HISI_HIKEY_USB is not set
 # CONFIG_OPEN_DICE is not set
+CONFIG_VCPU_STALL_DETECTOR=m
 # CONFIG_C2PORT is not set
 
 #
@@ -2725,6 +2683,8 @@ CONFIG_SCSI_MPT3SAS_MAX_SGE=128
 CONFIG_SCSI_MPI3MR=m
 # CONFIG_SCSI_SMARTPQI is not set
 # CONFIG_SCSI_HPTIOP is not set
+CONFIG_SCSI_BUSLOGIC=m
+CONFIG_SCSI_FLASHPOINT=y
 # CONFIG_SCSI_MYRB is not set
 # CONFIG_SCSI_MYRS is not set
 # CONFIG_XEN_SCSI_FRONTEND is not set
@@ -3033,22 +2993,19 @@ CONFIG_NET_DSA_LANTIQ_GSWIP=m
 CONFIG_NET_DSA_MT7530=m
 CONFIG_NET_DSA_MV88E6060=m
 CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=m
-CONFIG_NET_DSA_MICROCHIP_KSZ9477=m
 CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=m
-CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI=m
+CONFIG_NET_DSA_MICROCHIP_KSZ_SPI=m
-CONFIG_NET_DSA_MICROCHIP_KSZ8795=m
-CONFIG_NET_DSA_MICROCHIP_KSZ8795_SPI=m
 CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=m
 CONFIG_NET_DSA_MV88E6XXX=m
 # CONFIG_NET_DSA_MV88E6XXX_PTP is not set
 # CONFIG_NET_DSA_MSCC_SEVILLE is not set
 CONFIG_NET_DSA_AR9331=m
+CONFIG_NET_DSA_QCA8K=m
 CONFIG_NET_DSA_SJA1105=m
 # CONFIG_NET_DSA_SJA1105_PTP is not set
 CONFIG_NET_DSA_XRS700X=m
 CONFIG_NET_DSA_XRS700X_I2C=m
 CONFIG_NET_DSA_XRS700X_MDIO=m
-CONFIG_NET_DSA_QCA8K=m
 CONFIG_NET_DSA_REALTEK=m
 CONFIG_NET_DSA_REALTEK_MDIO=m
 CONFIG_NET_DSA_REALTEK_SMI=m
@@ -3191,6 +3148,8 @@ CONFIG_I40EVF=m
 # CONFIG_ICE is not set
 CONFIG_FM10K=m
 # CONFIG_IGC is not set
+CONFIG_NET_VENDOR_WANGXUN=y
+# CONFIG_TXGBE is not set
 CONFIG_JME=m
 CONFIG_NET_VENDOR_LITEX=y
 CONFIG_LITEX_LITEETH=m
@@ -3257,7 +3216,6 @@ CONFIG_NATSEMI=m
 CONFIG_NS83820=m
 CONFIG_NET_VENDOR_NETERION=y
 # CONFIG_S2IO is not set
-# CONFIG_VXGE is not set
 CONFIG_NET_VENDOR_NETRONOME=y
 # CONFIG_NFP is not set
 CONFIG_NET_VENDOR_8390=y
@@ -3373,6 +3331,7 @@ CONFIG_BCM7XXX_PHY=m
 CONFIG_BCM84881_PHY=m
 CONFIG_BCM87XX_PHY=m
 CONFIG_BCM_NET_PHYLIB=m
+CONFIG_BCM_NET_PHYPTP=m
 CONFIG_CICADA_PHY=m
 # CONFIG_CORTINA_PHY is not set
 CONFIG_DAVICOM_PHY=m
@@ -3410,6 +3369,67 @@ CONFIG_DP83TD510_PHY=m
 CONFIG_VITESSE_PHY=m
 # CONFIG_XILINX_GMII2RGMII is not set
 # CONFIG_MICREL_KS8995MA is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAN_VXCAN=m
+CONFIG_CAN_NETLINK=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_CAN_RX_OFFLOAD=y
+# CONFIG_CAN_CAN327 is not set
+# CONFIG_CAN_FLEXCAN is not set
+CONFIG_CAN_GRCAN=m
+CONFIG_CAN_KVASER_PCIEFD=m
+CONFIG_CAN_SLCAN=m
+CONFIG_CAN_XILINXCAN=m
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
+CONFIG_CAN_C_CAN_PCI=m
+CONFIG_CAN_CC770=m
+CONFIG_CAN_CC770_ISA=m
+CONFIG_CAN_CC770_PLATFORM=m
+# CONFIG_CAN_CTUCANFD_PCI is not set
+# CONFIG_CAN_CTUCANFD_PLATFORM is not set
+# CONFIG_CAN_IFI_CANFD is not set
+CONFIG_CAN_M_CAN=m
+CONFIG_CAN_M_CAN_PCI=m
+CONFIG_CAN_M_CAN_PLATFORM=m
+CONFIG_CAN_M_CAN_TCAN4X5X=m
+CONFIG_CAN_PEAK_PCIEFD=m
+CONFIG_CAN_SJA1000=m
+CONFIG_CAN_EMS_PCI=m
+CONFIG_CAN_F81601=m
+CONFIG_CAN_KVASER_PCI=m
+CONFIG_CAN_PEAK_PCI=m
+CONFIG_CAN_PEAK_PCIEC=y
+CONFIG_CAN_PLX_PCI=m
+CONFIG_CAN_SJA1000_ISA=m
+CONFIG_CAN_SJA1000_PLATFORM=m
+CONFIG_CAN_SOFTING=m
+
+#
+# CAN SPI interfaces
+#
+CONFIG_CAN_HI311X=m
+CONFIG_CAN_MCP251X=m
+CONFIG_CAN_MCP251XFD=m
+# CONFIG_CAN_MCP251XFD_SANITY is not set
+# end of CAN SPI interfaces
+
+#
+# CAN USB interfaces
+#
+CONFIG_CAN_8DEV_USB=m
+CONFIG_CAN_EMS_USB=m
+CONFIG_CAN_ESD_USB=m
+CONFIG_CAN_ETAS_ES58X=m
+CONFIG_CAN_GS_USB=m
+CONFIG_CAN_KVASER_USB=m
+CONFIG_CAN_MCBA_USB=m
+CONFIG_CAN_PEAK_USB=m
+CONFIG_CAN_UCAN=m
+# end of CAN USB interfaces
+
+# CONFIG_CAN_DEBUG_DEVICES is not set
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_BUS=y
 CONFIG_FWNODE_MDIO=y
@@ -4212,7 +4232,6 @@ CONFIG_SERIAL_8250_NR_UARTS=8
 CONFIG_SERIAL_8250_RUNTIME_UARTS=8
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
-# CONFIG_SERIAL_8250_ASPEED_VUART is not set
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 # CONFIG_SERIAL_8250_DETECT_IRQ is not set
 CONFIG_SERIAL_8250_RSA=y
@@ -4313,6 +4332,7 @@ CONFIG_TCG_TPM=y
 CONFIG_HW_RANDOM_TPM=y
 # CONFIG_TCG_TIS is not set
 # CONFIG_TCG_TIS_SPI is not set
+# CONFIG_TCG_TIS_I2C is not set
 CONFIG_TCG_TIS_I2C_CR50=m
 # CONFIG_TCG_TIS_I2C_ATMEL is not set
 CONFIG_TCG_TIS_I2C_INFINEON=y
@@ -4470,6 +4490,7 @@ CONFIG_SPI_NXP_FLEXSPI=m
 CONFIG_SPI_GPIO=m
 CONFIG_SPI_FSL_LIB=m
 CONFIG_SPI_FSL_SPI=m
+CONFIG_SPI_MICROCHIP_CORE=m
 CONFIG_SPI_OC_TINY=m
 CONFIG_SPI_PL022=y
 # CONFIG_SPI_PXA2XX is not set
@@ -4593,7 +4614,6 @@ CONFIG_GPIO_LOGICVC=m
 CONFIG_GPIO_MB86S7X=m
 CONFIG_GPIO_PL061=y
 CONFIG_GPIO_ROCKCHIP=y
-CONFIG_GPIO_SAMA5D2_PIOBU=m
 # CONFIG_GPIO_SIFIVE is not set
 CONFIG_GPIO_SYSCON=y
 CONFIG_GPIO_TEGRA=y
@@ -4786,7 +4806,6 @@ CONFIG_HWMON_VID=m
 CONFIG_SENSORS_AD7314=m
 CONFIG_SENSORS_AD7414=m
 CONFIG_SENSORS_AD7418=m
-CONFIG_SENSORS_ADM1021=m
 CONFIG_SENSORS_ADM1025=m
 CONFIG_SENSORS_ADM1026=m
 CONFIG_SENSORS_ADM1029=m
@@ -4855,7 +4874,6 @@ CONFIG_SENSORS_MAX31730=m
 CONFIG_SENSORS_MAX6620=m
 CONFIG_SENSORS_MAX6621=m
 CONFIG_SENSORS_MAX6639=m
-CONFIG_SENSORS_MAX6642=m
 CONFIG_SENSORS_MAX6650=m
 CONFIG_SENSORS_MAX6697=m
 CONFIG_SENSORS_MAX31790=m
@@ -4914,6 +4932,7 @@ CONFIG_SENSORS_IRPS5401=m
 CONFIG_SENSORS_ISL68137=m
 CONFIG_SENSORS_LM25066=m
 # CONFIG_SENSORS_LM25066_REGULATOR is not set
+CONFIG_SENSORS_LT7182S=m
 CONFIG_SENSORS_LTC2978=m
 CONFIG_SENSORS_LTC2978_REGULATOR=y
 CONFIG_SENSORS_LTC3815=m
@@ -5520,7 +5539,6 @@ CONFIG_USB_PWC=m
 # CONFIG_USB_PWC_DEBUG is not set
 CONFIG_USB_PWC_INPUT_EVDEV=y
 CONFIG_USB_S2255=m
-CONFIG_USB_STKWEBCAM=m
 CONFIG_VIDEO_USBTV=m
 CONFIG_USB_VIDEO_CLASS=m
 CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
@@ -5866,6 +5884,7 @@ CONFIG_VIDEO_IR_I2C=m
 #
 CONFIG_VIDEO_APTINA_PLL=m
 CONFIG_VIDEO_CCS_PLL=m
+# CONFIG_VIDEO_AR0521 is not set
 CONFIG_VIDEO_HI556=m
 CONFIG_VIDEO_HI846=m
 # CONFIG_VIDEO_HI847 is not set
@@ -6285,6 +6304,7 @@ CONFIG_DVB_DUMMY_FE=m
 #
 # Graphics support
 #
+CONFIG_APERTURE_HELPERS=y
 CONFIG_TEGRA_HOST1X_CONTEXT_BUS=y
 CONFIG_TEGRA_HOST1X=m
 CONFIG_TEGRA_HOST1X_FIREWALL=y
@@ -6375,6 +6395,7 @@ CONFIG_DRM_PANEL_DSI_CM=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+# CONFIG_DRM_PANEL_EBBG_FT8719 is not set
 CONFIG_DRM_PANEL_ELIDA_KD35T133=m
 CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m
 CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
@@ -6471,6 +6492,7 @@ CONFIG_DRM_TOSHIBA_TC358764=m
 # CONFIG_DRM_TOSHIBA_TC358767 is not set
 CONFIG_DRM_TOSHIBA_TC358768=m
 # CONFIG_DRM_TOSHIBA_TC358775 is not set
+# CONFIG_DRM_TI_DLPC3433 is not set
 # CONFIG_DRM_TI_TFP410 is not set
 CONFIG_DRM_TI_SN65DSI83=m
 # CONFIG_DRM_TI_SN65DSI86 is not set
@@ -6495,8 +6517,10 @@ CONFIG_DRM_ETNAVIV=m
 CONFIG_DRM_ETNAVIV_THERMAL=y
 CONFIG_DRM_HISI_HIBMC=m
 CONFIG_DRM_HISI_KIRIN=m
+CONFIG_DRM_LOGICVC=m
 CONFIG_DRM_MXS=y
 CONFIG_DRM_MXSFB=m
+# CONFIG_DRM_IMX_LCDIF is not set
 # CONFIG_DRM_ARCPGU is not set
 CONFIG_DRM_BOCHS=m
 # CONFIG_DRM_CIRRUS_QEMU is not set
@@ -6678,7 +6702,9 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_PROC_FS=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
+CONFIG_SND_CTL_FAST_LOOKUP=y
 # CONFIG_SND_DEBUG is not set
+CONFIG_SND_CTL_INPUT_VALIDATION=y
 CONFIG_SND_VMASTER=y
 CONFIG_SND_CTL_LED=m
 CONFIG_SND_SEQUENCER=m
@@ -6787,6 +6813,7 @@ CONFIG_SND_HDA_INPUT_BEEP=y
 CONFIG_SND_HDA_INPUT_BEEP_MODE=1
 CONFIG_SND_HDA_PATCH_LOADER=y
 CONFIG_SND_HDA_SCODEC_CS35L41=m
+CONFIG_SND_HDA_CS_DSP_CONTROLS=m
 CONFIG_SND_HDA_SCODEC_CS35L41_I2C=m
 CONFIG_SND_HDA_SCODEC_CS35L41_SPI=m
 CONFIG_SND_HDA_CODEC_REALTEK=m
@@ -6835,12 +6862,14 @@ CONFIG_SND_SOC_AC97_BUS=y
 CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 CONFIG_SND_SOC_COMPRESS=y
 CONFIG_SND_SOC_UTILS_KUNIT_TEST=m
+CONFIG_SND_SOC_ACPI=m
 CONFIG_SND_SOC_ADI=m
 CONFIG_SND_SOC_ADI_AXI_I2S=m
 CONFIG_SND_SOC_ADI_AXI_SPDIF=m
 CONFIG_SND_SOC_AMD_ACP=m
 CONFIG_SND_SOC_AMD_CZ_DA7219MX98357_MACH=m
 CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m
+CONFIG_SND_SOC_AMD_ST_ES8336_MACH=m
 # CONFIG_SND_AMD_ACP_CONFIG is not set
 CONFIG_SND_ATMEL_SOC=m
 CONFIG_SND_SOC_MIKROE_PROTO=m
@@ -6865,6 +6894,7 @@ CONFIG_SND_SOC_FSL_ESAI=m
 CONFIG_SND_SOC_FSL_MICFIL=m
 CONFIG_SND_SOC_FSL_EASRC=m
 CONFIG_SND_SOC_FSL_XCVR=m
+CONFIG_SND_SOC_FSL_UTILS=m
 CONFIG_SND_SOC_FSL_RPMSG=m
 CONFIG_SND_SOC_IMX_AUDMUX=m
 # end of SoC Audio for Freescale CPUs
@@ -6909,6 +6939,7 @@ CONFIG_SND_SOC_TEGRA30_I2S=m
 CONFIG_SND_SOC_TEGRA210_AHUB=m
 CONFIG_SND_SOC_TEGRA210_DMIC=m
 CONFIG_SND_SOC_TEGRA210_I2S=m
+CONFIG_SND_SOC_TEGRA210_OPE=m
 CONFIG_SND_SOC_TEGRA186_ASRC=m
 CONFIG_SND_SOC_TEGRA186_DSPK=m
 CONFIG_SND_SOC_TEGRA210_ADMAIF=m
@@ -7054,6 +7085,7 @@ CONFIG_SND_SOC_ES8328_SPI=m
 CONFIG_SND_SOC_GTM601=m
 CONFIG_SND_SOC_HDAC_HDMI=m
 CONFIG_SND_SOC_HDAC_HDA=m
+CONFIG_SND_SOC_HDA=m
 CONFIG_SND_SOC_ICS43432=m
 CONFIG_SND_SOC_INNO_RK3036=m
 CONFIG_SND_SOC_ISABELLE=m
@@ -7167,6 +7199,7 @@ CONFIG_SND_SOC_TAS2552=m
 CONFIG_SND_SOC_TAS2562=m
 CONFIG_SND_SOC_TAS2764=m
 CONFIG_SND_SOC_TAS2770=m
+CONFIG_SND_SOC_TAS2780=m
 CONFIG_SND_SOC_TAS5086=m
 CONFIG_SND_SOC_TAS571X=m
 CONFIG_SND_SOC_TAS5720=m
@@ -7260,6 +7293,7 @@ CONFIG_SND_SOC_WM9705=m
 CONFIG_SND_SOC_WM9712=m
 CONFIG_SND_SOC_WM9713=m
 CONFIG_SND_SOC_WSA881X=m
+CONFIG_SND_SOC_WSA883X=m
 CONFIG_SND_SOC_ZL38060=m
 CONFIG_SND_SOC_LM4857=m
 CONFIG_SND_SOC_MAX9759=m
@@ -7445,6 +7479,7 @@ CONFIG_USB_HIDDEV=y
 #
 CONFIG_I2C_HID_ACPI=m
 CONFIG_I2C_HID_OF=m
+CONFIG_I2C_HID_OF_ELAN=m
 CONFIG_I2C_HID_OF_GOODIX=m
 # end of I2C HID support
 
@@ -7703,6 +7738,7 @@ CONFIG_USB_HSIC_USB3503=y
 CONFIG_USB_HSIC_USB4604=m
 CONFIG_USB_LINK_LAYER_TEST=m
 CONFIG_USB_CHAOSKEY=m
+CONFIG_USB_ONBOARD_HUB=m
 CONFIG_USB_ATM=m
 CONFIG_USB_SPEEDTOUCH=m
 CONFIG_USB_CXACRU=m
@@ -7843,7 +7879,9 @@ CONFIG_TYPEC_FUSB302=m
 CONFIG_TYPEC_UCSI=m
 CONFIG_UCSI_CCG=m
 CONFIG_UCSI_ACPI=m
+CONFIG_UCSI_STM32G0=m
 CONFIG_TYPEC_TPS6598X=m
+CONFIG_TYPEC_ANX7411=m
 CONFIG_TYPEC_RT1719=m
 CONFIG_TYPEC_HD3SS3220=m
 CONFIG_TYPEC_STUSB160X=m
@@ -7886,6 +7924,7 @@ CONFIG_MMC_SDHCI_ACPI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_OF_ARASAN=y
 CONFIG_MMC_SDHCI_OF_ASPEED=m
+CONFIG_MMC_SDHCI_OF_ASPEED_TEST=y
 CONFIG_MMC_SDHCI_OF_AT91=m
 CONFIG_MMC_SDHCI_OF_DWCMSHC=m
 CONFIG_MMC_SDHCI_CADENCE=y
@@ -8069,6 +8108,7 @@ CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_HYM8563=y
 # CONFIG_RTC_DRV_MAX6900 is not set
 CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_NCT3018Y=m
 CONFIG_RTC_DRV_RK808=y
 # CONFIG_RTC_DRV_RS5C372 is not set
 # CONFIG_RTC_DRV_ISL1208 is not set
@@ -8255,7 +8295,6 @@ CONFIG_VIRTIO=y
 CONFIG_VIRTIO_PCI_LIB=y
 CONFIG_VIRTIO_PCI_LIB_LEGACY=y
 CONFIG_VIRTIO_MENU=y
-# CONFIG_VIRTIO_HARDEN_NOTIFICATION is not set
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_PCI_LEGACY=y
 CONFIG_VIRTIO_VDPA=m
@@ -8395,20 +8434,21 @@ CONFIG_SERIO_NVEC_PS2=m
 CONFIG_NVEC_POWER=m
 CONFIG_NVEC_PAZ00=m
 CONFIG_STAGING_MEDIA=y
-CONFIG_VIDEO_HANTRO=m
-CONFIG_VIDEO_HANTRO_ROCKCHIP=y
-# CONFIG_VIDEO_MAX96712 is not set
-CONFIG_VIDEO_ROCKCHIP_VDEC=m
-CONFIG_VIDEO_ZORAN=m
-# CONFIG_VIDEO_ZORAN_DC30 is not set
-# CONFIG_VIDEO_ZORAN_ZR36060 is not set
-CONFIG_VIDEO_TEGRA=m
-CONFIG_VIDEO_TEGRA_TPG=y
 CONFIG_DVB_AV7110_IR=y
 CONFIG_DVB_AV7110=m
 CONFIG_DVB_AV7110_OSD=y
 CONFIG_DVB_BUDGET_PATCH=m
 CONFIG_DVB_SP8870=m
+CONFIG_VIDEO_HANTRO=m
+CONFIG_VIDEO_HANTRO_ROCKCHIP=y
+# CONFIG_VIDEO_MAX96712 is not set
+CONFIG_VIDEO_ROCKCHIP_VDEC=m
+CONFIG_VIDEO_STKWEBCAM=m
+CONFIG_VIDEO_TEGRA=m
+CONFIG_VIDEO_TEGRA_TPG=y
+CONFIG_VIDEO_ZORAN=m
+# CONFIG_VIDEO_ZORAN_DC30 is not set
+# CONFIG_VIDEO_ZORAN_ZR36060 is not set
 # CONFIG_STAGING_BOARD is not set
 # CONFIG_LTE_GDM724X is not set
 CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
@@ -8454,10 +8494,7 @@ CONFIG_HMS_ANYBUSS_BUS=m
 # CONFIG_ARCX_ANYBUS_CONTROLLER is not set
 # CONFIG_HMS_PROFINET is not set
 # CONFIG_QLGE is not set
-
+# CONFIG_VME_BUS is not set
-#
-# VME Device Drivers
-#
 # CONFIG_GOLDFISH is not set
 CONFIG_CHROME_PLATFORMS=y
 CONFIG_CHROMEOS_ACPI=m
@@ -8477,6 +8514,7 @@ CONFIG_CROS_EC_SYSFS=y
 CONFIG_CROS_EC_TYPEC=m
 CONFIG_CROS_USBPD_NOTIFY=y
 # CONFIG_CHROMEOS_PRIVACY_SCREEN is not set
+# CONFIG_CROS_KUNIT is not set
 # CONFIG_MELLANOX_PLATFORM is not set
 CONFIG_SURFACE_PLATFORMS=y
 # CONFIG_SURFACE_3_POWER_OPREGION is not set
@@ -8541,6 +8579,7 @@ CONFIG_TIMER_PROBE=y
 CONFIG_CLKSRC_MMIO=y
 CONFIG_ROCKCHIP_TIMER=y
 CONFIG_TEGRA_TIMER=y
+CONFIG_TEGRA186_TIMER=y
 CONFIG_ARM_ARCH_TIMER=y
 CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
 CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
@@ -8640,6 +8679,12 @@ CONFIG_SOC_BRCMSTB=y
 # CONFIG_FSL_RCPM is not set
 # end of NXP/Freescale QorIQ SoC drivers
 
+#
+# fujitsu SoC drivers
+#
+# CONFIG_A64FX_DIAG is not set
+# end of fujitsu SoC drivers
+
 #
 # i.MX SoC drivers
 #
@@ -9200,6 +9245,8 @@ CONFIG_HID_SENSOR_INCLINOMETER_3D=m
 CONFIG_HID_SENSOR_DEVICE_ROTATION=m
 # end of Inclinometer sensors
 
+CONFIG_IIO_FORMAT_KUNIT_TEST=m
+
 #
 # Triggers - standalone
 #
@@ -9313,11 +9360,11 @@ CONFIG_MAX31865=m
 # end of Temperature sensors
 
 # CONFIG_NTB is not set
-# CONFIG_VME_BUS is not set
 CONFIG_PWM=y
 CONFIG_PWM_SYSFS=y
 # CONFIG_PWM_DEBUG is not set
 CONFIG_PWM_ATMEL_TCB=m
+CONFIG_PWM_CLK=m
 CONFIG_PWM_CROS_EC=m
 CONFIG_PWM_DWC=m
 # CONFIG_PWM_FSL_FTM is not set
@@ -9348,7 +9395,9 @@ CONFIG_PARTITION_PERCPU=y
 CONFIG_ARCH_HAS_RESET_CONTROLLER=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RESET_SCMI=y
+CONFIG_RESET_SIMPLE=y
 # CONFIG_RESET_TI_SYSCON is not set
+CONFIG_RESET_TI_TPS380X=m
 CONFIG_RESET_TEGRA_BPMP=y
 
 #
@@ -9415,6 +9464,7 @@ CONFIG_ARM_SMMU_V3_PMU=m
 CONFIG_ARM_DMC620_PMU=m
 CONFIG_HISI_PMU=y
 # CONFIG_HISI_PCIE_PMU is not set
+CONFIG_HNS3_PMU=m
 # end of Performance monitor support
 
 CONFIG_RAS=y
@@ -9423,7 +9473,7 @@ CONFIG_RAS=y
 #
 # Android
 #
-# CONFIG_ANDROID is not set
+# CONFIG_ANDROID_BINDER_IPC is not set
 # end of Android
 
 # CONFIG_LIBNVDIMM is not set
@@ -9459,6 +9509,7 @@ CONFIG_ALTERA_FREEZE_BRIDGE=m
 CONFIG_FPGA_REGION=m
 CONFIG_OF_FPGA_REGION=m
 # CONFIG_FPGA_DFL is not set
+CONFIG_FPGA_MGR_MICROCHIP_SPI=m
 # CONFIG_FSI is not set
 CONFIG_TEE=y
 CONFIG_OPTEE=y
@@ -9768,27 +9819,6 @@ CONFIG_EROFS_FS_XATTR=y
 CONFIG_EROFS_FS_POSIX_ACL=y
 CONFIG_EROFS_FS_SECURITY=y
 # CONFIG_EROFS_FS_ZIP is not set
-CONFIG_AUFS_FS=m
-CONFIG_AUFS_BRANCH_MAX_127=y
-# CONFIG_AUFS_BRANCH_MAX_511 is not set
-# CONFIG_AUFS_BRANCH_MAX_1023 is not set
-# CONFIG_AUFS_BRANCH_MAX_32767 is not set
-CONFIG_AUFS_SBILIST=y
-CONFIG_AUFS_HNOTIFY=y
-CONFIG_AUFS_HFSNOTIFY=y
-CONFIG_AUFS_EXPORT=y
-CONFIG_AUFS_INO_T_64=y
-CONFIG_AUFS_XATTR=y
-CONFIG_AUFS_FHSM=y
-CONFIG_AUFS_RDU=y
-CONFIG_AUFS_DIRREN=y
-CONFIG_AUFS_SHWH=y
-CONFIG_AUFS_BR_RAMFS=y
-CONFIG_AUFS_BR_FUSE=y
-CONFIG_AUFS_POLL=y
-CONFIG_AUFS_BR_HFSPLUS=y
-CONFIG_AUFS_BDEV_LOOP=y
-# CONFIG_AUFS_DEBUG is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V2=m
@@ -9914,6 +9944,7 @@ CONFIG_NLS_MAC_ROMANIAN=m
 CONFIG_NLS_MAC_TURKISH=m
 CONFIG_NLS_UTF8=m
 CONFIG_DLM=m
+CONFIG_DLM_DEPRECATED_API=y
 # CONFIG_DLM_DEBUG is not set
 CONFIG_UNICODE=y
 # CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set
@@ -9963,9 +9994,12 @@ CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
 CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
 # CONFIG_SECURITY_TOMOYO_INSECURE_BUILTIN_SETTING is not set
 CONFIG_SECURITY_APPARMOR=y
+# CONFIG_SECURITY_APPARMOR_DEBUG is not set
+CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y
 CONFIG_SECURITY_APPARMOR_HASH=y
 CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
-# CONFIG_SECURITY_APPARMOR_DEBUG is not set
+CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y
+CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y
 # CONFIG_SECURITY_LOADPIN is not set
 CONFIG_SECURITY_YAMA=y
 CONFIG_SECURITY_SAFESETID=y
@@ -10090,7 +10124,7 @@ CONFIG_CRYPTO_ENGINE=m
 #
 CONFIG_CRYPTO_RSA=y
 CONFIG_CRYPTO_DH=y
-# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set
+CONFIG_CRYPTO_DH_RFC7919_GROUPS=y
 CONFIG_CRYPTO_ECC=m
 CONFIG_CRYPTO_ECDH=m
 CONFIG_CRYPTO_ECDSA=m
@@ -10124,6 +10158,7 @@ CONFIG_CRYPTO_XTS=y
 CONFIG_CRYPTO_KEYWRAP=m
 CONFIG_CRYPTO_NHPOLY1305=y
 CONFIG_CRYPTO_ADIANTUM=m
+# CONFIG_CRYPTO_HCTR2 is not set
 CONFIG_CRYPTO_ESSIV=m
 
 #
@@ -10176,6 +10211,7 @@ CONFIG_CRYPTO_FCRYPT=m
 CONFIG_CRYPTO_KHAZAD=m
 CONFIG_CRYPTO_CHACHA20=m
 CONFIG_CRYPTO_SEED=m
+# CONFIG_CRYPTO_ARIA is not set
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_SM4=m
 # CONFIG_CRYPTO_SM4_GENERIC is not set
@@ -10218,6 +10254,13 @@ CONFIG_CRYPTO_DEV_ATMEL_I2C=m
 CONFIG_CRYPTO_DEV_ATMEL_ECC=m
 CONFIG_CRYPTO_DEV_ATMEL_SHA204A=m
 # CONFIG_CRYPTO_DEV_CCP is not set
+# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
+# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
+# CONFIG_CRYPTO_DEV_QAT_C62X is not set
+# CONFIG_CRYPTO_DEV_QAT_4XXX is not set
+# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
+# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set
+# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set
 CONFIG_CRYPTO_DEV_NITROX=m
 CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m
 CONFIG_CRYPTO_DEV_CAVIUM_ZIP=m
@@ -10280,6 +10323,7 @@ CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
 CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
 CONFIG_ARCH_USE_SYM_ANNOTATIONS=y
 CONFIG_INDIRECT_PIO=y
+# CONFIG_TRACE_MMIO_ACCESS is not set
 
 #
 # Crypto library routines
@@ -10298,6 +10342,7 @@ CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y
 CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y
 CONFIG_CRYPTO_LIB_POLY1305=m
 CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
+CONFIG_CRYPTO_LIB_SHA1=y
 CONFIG_CRYPTO_LIB_SHA256=y
 # end of Crypto library routines
 
@@ -10436,12 +10481,13 @@ CONFIG_SG_POOL=y
 CONFIG_MEMREGION=y
 CONFIG_ARCH_STACKWALK=y
 CONFIG_STACKDEPOT=y
-CONFIG_STACK_HASH_ORDER=20
 CONFIG_SBITMAP=y
 # end of Library routines
 
+CONFIG_GENERIC_IOREMAP=y
 CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
 CONFIG_ASN1_ENCODER=y
+CONFIG_POLYNOMIAL=m
 
 #
 # Kernel hacking
@@ -10529,6 +10575,7 @@ CONFIG_ARCH_HAS_DEBUG_WX=y
 CONFIG_GENERIC_PTDUMP=y
 # CONFIG_PTDUMP_DEBUGFS is not set
 # CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SHRINKER_DEBUG is not set
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 # CONFIG_DEBUG_KMEMLEAK is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -10674,6 +10721,7 @@ CONFIG_PROBE_EVENTS=y
 # CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set
 # CONFIG_PREEMPTIRQ_DELAY_TEST is not set
 # CONFIG_KPROBE_EVENT_GEN_TEST is not set
+# CONFIG_RV is not set
 # CONFIG_SAMPLES is not set
 CONFIG_STRICT_DEVMEM=y
 # CONFIG_IO_STRICT_DEVMEM is not set
@@ -10701,6 +10749,7 @@ CONFIG_ARCH_HAS_KCOV=y
 CONFIG_CC_HAS_SANCOV_TRACE_PC=y
 CONFIG_RUNTIME_TESTING_MENU=y
 # CONFIG_LKDTM is not set
+# CONFIG_CPUMASK_KUNIT_TEST is not set
 # CONFIG_TEST_LIST_SORT is not set
 CONFIG_TEST_MIN_HEAP=m
 # CONFIG_TEST_SORT is not set

config/sources/families/media.conf

@@ -69,7 +69,7 @@ case $BRANCH in
 
 	current)
 
-	KERNELBRANCH="branch:linux-5.18.y"
+	KERNELBRANCH="branch:linux-5.19.y"
 	LINUXCONFIG='linux-media-'$BRANCH
 
 	if [[ $BOARD == station-p2 || $BOARD == station-m2 || $BOARD == quartz64a || $BOARD == bananapir2pro ]]; then
@@ -86,8 +86,8 @@ case $BRANCH in
 	;;
 
 	edge)
+		KERNELBRANCH="tag:v6.0"
 		KERNELPATCHDIR='media-'$BRANCH
-		KERNELBRANCH='branch:linux-5.19.y'
 		LINUXFAMILY=media
 		LINUXCONFIG='linux-media-'$BRANCH
 

packages/bsp/common/usr/lib/armbian/armbian-hardware-optimization

@@ -208,7 +208,7 @@ prepare_board() {
 			echo 32768 >/proc/sys/net/core/rps_sock_flow_entries
 			echo 32768 >/sys/class/net/eth0/queues/rx-0/rps_flow_cnt
 			;;
-		rk3399)
+		rk3399|media)
 			for i in $(awk -F':' '/gpu/{print $1}' </proc/interrupts | sed 's/\ //g'); do
 				echo 2 >/proc/irq/$i/smp_affinity
 			done

patch/kernel/archive/media-5.19/210-linux-0002-rockchip-from-list.patch

@@ -270,7 +270,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 8 insertions(+)
 
 diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
-index 368f10405e13..238d70df6c80 100644
+index 4b70cbfc6d5d..5329f983db15 100644
 --- a/drivers/mmc/core/core.c
 +++ b/drivers/mmc/core/core.c
 @@ -1356,6 +1356,14 @@ void mmc_power_off(struct mmc_host *host)
@@ -305,10 +305,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 14 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-index 39db0b85b4da..d0410ae4def2 100644
+index 49ae15708a0b..60348d517efb 100644
 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-@@ -975,6 +975,20 @@ usb_host0_ohci: usb@ff5d0000 {
+@@ -993,6 +993,20 @@ usb_host0_ohci: usb@ff5d0000 {
  		status = "disabled";
  	};
  
@@ -346,10 +346,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 6 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-index d0410ae4def2..cc46855aba46 100644
+index 60348d517efb..d7e44d174d7b 100644
 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-@@ -853,6 +853,8 @@ sdmmc: mmc@ff500000 {
+@@ -871,6 +871,8 @@ sdmmc: mmc@ff500000 {
  		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
  		fifo-depth = <0x100>;
  		max-frequency = <150000000>;
@@ -358,7 +358,7 @@ index d0410ae4def2..cc46855aba46 100644
  		status = "disabled";
  	};
  
-@@ -865,6 +867,8 @@ sdio: mmc@ff510000 {
+@@ -883,6 +885,8 @@ sdio: mmc@ff510000 {
  		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
  		fifo-depth = <0x100>;
  		max-frequency = <150000000>;
@@ -367,7 +367,7 @@ index d0410ae4def2..cc46855aba46 100644
  		status = "disabled";
  	};
  
-@@ -877,6 +881,8 @@ emmc: mmc@ff520000 {
+@@ -895,6 +899,8 @@ emmc: mmc@ff520000 {
  		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
  		fifo-depth = <0x100>;
  		max-frequency = <150000000>;

patch/kernel/archive/media-5.19/211-linux-0011-v4l2-from-list.patch

@@ -1,133 +1,3 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Mon, 6 Jul 2020 21:54:33 +0000
-Subject: [PATCH] media: rkvdec: h264: Fix reference frame_num wrap for second
- field
-
-When decoding the second field in a complementary field pair the second
-field is sharing the same frame_num with the first field.
-
-Currently the frame_num for the first field is wrapped when it matches the
-field being decoded, this cause issues to decode the second field in a
-complementary field pair.
-
-Fix this by using inclusive comparison, less than or equal.
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
-Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
----
- drivers/staging/media/rkvdec/rkvdec-h264.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
-index 951e19231da2..3becb0186062 100644
---- a/drivers/staging/media/rkvdec/rkvdec-h264.c
-+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
-@@ -752,7 +752,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
- 			continue;
- 
- 		if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM ||
--		    dpb[i].frame_num < dec_params->frame_num) {
-+		    dpb[i].frame_num <= dec_params->frame_num) {
- 			p[i] = dpb[i].frame_num;
- 			continue;
- 		}
-
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Mon, 6 Jul 2020 21:54:34 +0000
-Subject: [PATCH] media: rkvdec: Ensure decoded resolution fit coded resolution
-
-Ensure decoded CAPTURE buffer resolution is larger or equal to the coded
-OPTUPT buffer resolution.
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
----
- drivers/staging/media/rkvdec/rkvdec.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index ad2624c30843..efd316550807 100644
---- a/drivers/staging/media/rkvdec/rkvdec.c
-+++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -268,6 +268,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
- 		pix_mp->pixelformat = coded_desc->decoded_fmts[0];
- 
- 	/* Always apply the frmsize constraint of the coded end. */
-+	pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
-+	pix_mp->height = max(pix_mp->height, ctx->coded_fmt.fmt.pix_mp.height);
- 	v4l2_apply_frmsize_constraints(&pix_mp->width,
- 				       &pix_mp->height,
- 				       &coded_desc->frmsize);
-
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Mon, 6 Jul 2020 21:54:34 +0000
-Subject: [PATCH] media: rkvdec: h264: Validate and use pic width and height in
- mbs
-
-The width and height in mbs is currently configured based on OUTPUT buffer
-resolution, this works for frame pictures but can cause issues for field
-pictures.
-
-When frame_mbs_only_flag is 0 the height in mbs should be height of
-the field instead of height of frame.
-
-Validate pic_width_in_mbs_minus1 and pic_height_in_map_units_minus1
-against OUTPUT buffer resolution and use these values to configure HW.
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
----
- drivers/staging/media/rkvdec/rkvdec-h264.c |  4 ++--
- drivers/staging/media/rkvdec/rkvdec.c      | 10 ++++++++++
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
-index 3becb0186062..a379e43147fb 100644
---- a/drivers/staging/media/rkvdec/rkvdec-h264.c
-+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
-@@ -671,8 +671,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
- 		  LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4);
- 	WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO),
- 		  DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG);
--	WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.width, 16), PIC_WIDTH_IN_MBS);
--	WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.height, 16), PIC_HEIGHT_IN_MBS);
-+	WRITE_PPS(sps->pic_width_in_mbs_minus1 + 1, PIC_WIDTH_IN_MBS);
-+	WRITE_PPS(sps->pic_height_in_map_units_minus1 + 1, PIC_HEIGHT_IN_MBS);
- 	WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY),
- 		  FRAME_MBS_ONLY_FLAG);
- 	WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD),
-diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index efd316550807..c88e817cac0a 100644
---- a/drivers/staging/media/rkvdec/rkvdec.c
-+++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -29,8 +29,11 @@
- 
- static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
- {
-+	struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
-+
- 	if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
- 		const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
-+		unsigned int width, height;
- 		/*
- 		 * TODO: The hardware supports 10-bit and 4:2:2 profiles,
- 		 * but it's currently broken in the driver.
-@@ -45,6 +48,13 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
- 		if (sps->bit_depth_luma_minus8 != 0)
- 			/* Only 8-bit is supported */
- 			return -EINVAL;
-+
-+		width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
-+		height = (sps->pic_height_in_map_units_minus1 + 1) * 16;
-+
-+		if (width > ctx->coded_fmt.fmt.pix_mp.width ||
-+		    height > ctx->coded_fmt.fmt.pix_mp.height)
-+			return -EINVAL;
- 	}
- 	return 0;
- }
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Mon, 6 Jul 2020 21:54:35 +0000
@@ -298,10 +168,10 @@ index 287488016ff2..01f8a50586eb 100644
  		{ .format = V4L2_PIX_FMT_YVU410,  .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
  		{ .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 },
 diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
-index 51289d4741dc..e6f2c65e24ca 100644
+index 21470de62d72..cb7496c084f6 100644
 --- a/drivers/media/v4l2-core/v4l2-ioctl.c
 +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1299,6 +1299,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
+@@ -1306,6 +1306,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
  	case V4L2_PIX_FMT_NV61:		descr = "Y/CrCb 4:2:2"; break;
  	case V4L2_PIX_FMT_NV24:		descr = "Y/CbCr 4:4:4"; break;
  	case V4L2_PIX_FMT_NV42:		descr = "Y/CrCb 4:4:4"; break;
@@ -311,10 +181,10 @@ index 51289d4741dc..e6f2c65e24ca 100644
  	case V4L2_PIX_FMT_NV12_16L16:	descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break;
  	case V4L2_PIX_FMT_NV12_32L32:   descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break;
 diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index df8b9c486ba1..9845ce720b4e 100644
+index 343b95107fce..3a5d6290a379 100644
 --- a/include/uapi/linux/videodev2.h
 +++ b/include/uapi/linux/videodev2.h
-@@ -602,6 +602,9 @@ struct v4l2_pix_format {
+@@ -603,6 +603,9 @@ struct v4l2_pix_format {
  #define V4L2_PIX_FMT_NV24    v4l2_fourcc('N', 'V', '2', '4') /* 24  Y/CbCr 4:4:4  */
  #define V4L2_PIX_FMT_NV42    v4l2_fourcc('N', 'V', '4', '2') /* 24  Y/CrCb 4:4:4  */
  
@@ -342,10 +212,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
-index 503ae683d0fd..88f5f4bb320b 100644
+index 2992fb87cf72..54fc3a6d0902 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-h264.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
-@@ -893,9 +893,9 @@ static void config_registers(struct rkvdec_ctx *ctx,
+@@ -915,9 +915,9 @@ static void config_registers(struct rkvdec_ctx *ctx,
  	dma_addr_t rlc_addr;
  	dma_addr_t refer_addr;
  	u32 rlc_len;
@@ -358,7 +228,7 @@ index 503ae683d0fd..88f5f4bb320b 100644
  	u32 yuv_virstride = 0;
  	u32 offset;
  	dma_addr_t dst_addr;
-@@ -906,8 +906,8 @@ static void config_registers(struct rkvdec_ctx *ctx,
+@@ -928,8 +928,8 @@ static void config_registers(struct rkvdec_ctx *ctx,
  
  	f = &ctx->decoded_fmt;
  	dst_fmt = &f->fmt.pix_mp;
@@ -387,7 +257,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 15 insertions(+), 14 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index c88e817cac0a..d4ae792874bb 100644
+index 7bab7586918c..40cc791aef26 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
 @@ -27,6 +27,17 @@
@@ -408,7 +278,7 @@ index c88e817cac0a..d4ae792874bb 100644
  static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
  {
  	struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
-@@ -212,13 +223,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
+@@ -192,13 +203,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
  
  	rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
  	f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
@@ -425,7 +295,7 @@ index c88e817cac0a..d4ae792874bb 100644
  }
  
  static int rkvdec_enum_framesizes(struct file *file, void *priv,
-@@ -284,13 +291,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
+@@ -264,13 +271,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
  				       &pix_mp->height,
  				       &coded_desc->frmsize);
  
@@ -454,15 +324,15 @@ and 4:2:2 content.
 
 Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
 ---
- drivers/staging/media/rkvdec/rkvdec.c | 59 ++++++++++++++++++++++++---
+ drivers/staging/media/rkvdec/rkvdec.c | 67 +++++++++++++++++++++++----
  drivers/staging/media/rkvdec/rkvdec.h |  2 +
- 2 files changed, 55 insertions(+), 6 deletions(-)
+ 2 files changed, 61 insertions(+), 8 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index d4ae792874bb..3cbb1d26b972 100644
+index 40cc791aef26..e93e1cb0f829 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -38,6 +38,16 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
+@@ -38,19 +38,56 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
  	pix_mp->field = V4L2_FIELD_NONE;
  }
  
@@ -479,21 +349,24 @@ index d4ae792874bb..3cbb1d26b972 100644
  static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
  {
  	struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
-@@ -60,6 +70,10 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
+ 	const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc;
- 			/* Only 8-bit is supported */
- 			return -EINVAL;
  
-+		if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
+-	if (desc->ops->try_ctrl)
-+			/* Only current valid format */
+-		return desc->ops->try_ctrl(ctx, ctrl);
-+			return -EINVAL;
++	if (desc->ops->try_ctrl) {
++		int ret;
++		ret = desc->ops->try_ctrl(ctx, ctrl);
++		if (ret)
++			return ret;
++	}
++
++	if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
++		/* Only current valid format */
++		return -EINVAL;
++
++	return 0;
++}
 +
- 		width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
- 		height = (sps->pic_height_in_map_units_minus1 + 1) * 16;
- 
-@@ -70,8 +84,27 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
- 	return 0;
- }
- 
 +static int rkvdec_s_ctrl(struct v4l2_ctrl *ctrl)
 +{
 +	struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
@@ -508,17 +381,17 @@ index d4ae792874bb..3cbb1d26b972 100644
 +			rkvdec_fill_decoded_pixfmt(ctx, pix_mp);
 +		}
 +	}
-+
+ 
-+	return 0;
+ 	return 0;
-+}
+ }
-+
+ 
  static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = {
  	.try_ctrl = rkvdec_try_ctrl,
 +	.s_ctrl = rkvdec_s_ctrl,
  };
  
  static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
-@@ -221,6 +254,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
+@@ -201,6 +238,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
  {
  	struct v4l2_format *f = &ctx->decoded_fmt;
  
@@ -526,7 +399,7 @@ index d4ae792874bb..3cbb1d26b972 100644
  	rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
  	f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  	f->fmt.pix_mp.width = ctx->coded_fmt.fmt.pix_mp.width;
-@@ -276,13 +310,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
+@@ -256,13 +294,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
  	if (WARN_ON(!coded_desc))
  		return -EINVAL;
  
@@ -550,7 +423,7 @@ index d4ae792874bb..3cbb1d26b972 100644
  
  	/* Always apply the frmsize constraint of the coded end. */
  	pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
-@@ -346,6 +384,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
+@@ -326,6 +368,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
  		return ret;
  
  	ctx->decoded_fmt = *f;
@@ -558,7 +431,7 @@ index d4ae792874bb..3cbb1d26b972 100644
  	return 0;
  }
  
-@@ -446,6 +485,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
+@@ -429,6 +472,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
  	if (WARN_ON(!ctx->coded_fmt_desc))
  		return -EINVAL;
  
@@ -574,7 +447,7 @@ index d4ae792874bb..3cbb1d26b972 100644
  		return -EINVAL;
  
 diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
-index 2f4ea1786b93..c26c472baa6f 100644
+index 633335ebb9c4..b9e219438bc9 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.h
 +++ b/drivers/staging/media/rkvdec/rkvdec.h
 @@ -66,6 +66,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
@@ -585,7 +458,7 @@ index 2f4ea1786b93..c26c472baa6f 100644
  	int (*start)(struct rkvdec_ctx *ctx);
  	void (*stop)(struct rkvdec_ctx *ctx);
  	int (*run)(struct rkvdec_ctx *ctx);
-@@ -99,6 +100,7 @@ struct rkvdec_ctx {
+@@ -101,6 +102,7 @@ struct rkvdec_ctx {
  	struct v4l2_fh fh;
  	struct v4l2_format coded_fmt;
  	struct v4l2_format decoded_fmt;
@@ -609,15 +482,39 @@ for the provided SPS control.
 
 Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
 ---
- drivers/staging/media/rkvdec/rkvdec-h264.c | 20 ++++++++++++++++++++
+ drivers/staging/media/rkvdec/rkvdec-h264.c | 33 ++++++++++++++++------
- drivers/staging/media/rkvdec/rkvdec.c      | 19 +++++++++----------
+ drivers/staging/media/rkvdec/rkvdec.c      | 19 +++++++++----
- 2 files changed, 29 insertions(+), 10 deletions(-)
+ 2 files changed, 37 insertions(+), 15 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
-index 88f5f4bb320b..c9a551dbd9bc 100644
+index 54fc3a6d0902..af530b05a789 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-h264.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
-@@ -1021,6 +1021,25 @@ static int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx,
+@@ -1044,19 +1044,14 @@ static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
+ {
+ 	unsigned int width, height;
+ 
+-	/*
+-	 * TODO: The hardware supports 10-bit and 4:2:2 profiles,
+-	 * but it's currently broken in the driver.
+-	 * Reject them for now, until it's fixed.
+-	 */
+-	if (sps->chroma_format_idc > 1)
+-		/* Only 4:0:0 and 4:2:0 are supported */
++	if (sps->chroma_format_idc > 2)
++		/* Only 4:0:0, 4:2:0 and 4:2:2 are supported */
+ 		return -EINVAL;
+ 	if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
+ 		/* Luma and chroma bit depth mismatch */
+ 		return -EINVAL;
+-	if (sps->bit_depth_luma_minus8 != 0)
+-		/* Only 8-bit is supported */
++	if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
++		/* Only 8-bit and 10-bit is supported */
+ 		return -EINVAL;
+ 
+ 	width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
+@@ -1077,6 +1072,25 @@ static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
  	return 0;
  }
  
@@ -643,7 +540,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644
  static int rkvdec_h264_start(struct rkvdec_ctx *ctx)
  {
  	struct rkvdec_dev *rkvdec = ctx->dev;
-@@ -1124,6 +1143,7 @@ static int rkvdec_h264_run(struct rkvdec_ctx *ctx)
+@@ -1198,6 +1212,7 @@ static int rkvdec_h264_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
  
  const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops = {
  	.adjust_fmt = rkvdec_h264_adjust_fmt,
@@ -652,7 +549,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644
  	.stop = rkvdec_h264_stop,
  	.run = rkvdec_h264_run,
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index 3cbb1d26b972..bd106b23f4a0 100644
+index e93e1cb0f829..4f5436c89e08 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
 @@ -31,7 +31,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
@@ -664,34 +561,12 @@ index 3cbb1d26b972..bd106b23f4a0 100644
  	pix_mp->plane_fmt[0].sizeimage += 128 *
  		DIV_ROUND_UP(pix_mp->width, 16) *
  		DIV_ROUND_UP(pix_mp->height, 16);
-@@ -55,19 +55,15 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
+@@ -136,8 +136,11 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
- 	if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
+ 	.num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
- 		const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
+ };
- 		unsigned int width, height;
--		/*
--		 * TODO: The hardware supports 10-bit and 4:2:2 profiles,
--		 * but it's currently broken in the driver.
--		 * Reject them for now, until it's fixed.
--		 */
--		if (sps->chroma_format_idc > 1)
--			/* Only 4:0:0 and 4:2:0 are supported */
-+
-+		if (sps->chroma_format_idc > 2)
-+			/* Only 4:0:0, 4:2:0 and 4:2:2 are supported */
- 			return -EINVAL;
- 		if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
- 			/* Luma and chroma bit depth mismatch */
- 			return -EINVAL;
--		if (sps->bit_depth_luma_minus8 != 0)
--			/* Only 8-bit is supported */
-+		if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
-+			/* Only 8-bit and 10-bit is supported */
- 			return -EINVAL;
  
- 		if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
+-static const u32 rkvdec_h264_vp9_decoded_fmts[] = {
-@@ -155,6 +151,9 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
++static const u32 rkvdec_h264_decoded_fmts[] = {
- 
- static const u32 rkvdec_h264_vp9_decoded_fmts[] = {
  	V4L2_PIX_FMT_NV12,
 +	V4L2_PIX_FMT_NV15,
 +	V4L2_PIX_FMT_NV16,
@@ -699,3 +574,86 @@ index 3cbb1d26b972..bd106b23f4a0 100644
  };
  
  static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
+@@ -160,6 +163,10 @@ static const struct rkvdec_ctrls rkvdec_vp9_ctrls = {
+ 	.num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs),
+ };
+ 
++static const u32 rkvdec_vp9_decoded_fmts[] = {
++	V4L2_PIX_FMT_NV12,
++};
++
+ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+ 	{
+ 		.fourcc = V4L2_PIX_FMT_H264_SLICE,
+@@ -173,8 +180,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+ 		},
+ 		.ctrls = &rkvdec_h264_ctrls,
+ 		.ops = &rkvdec_h264_fmt_ops,
+-		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
+-		.decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
++		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
++		.decoded_fmts = rkvdec_h264_decoded_fmts,
+ 		.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
+ 	},
+ 	{
+@@ -189,8 +196,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+ 		},
+ 		.ctrls = &rkvdec_vp9_ctrls,
+ 		.ops = &rkvdec_vp9_fmt_ops,
+-		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
+-		.decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
++		.num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
++		.decoded_fmts = rkvdec_vp9_decoded_fmts,
+ 	}
+ };
+ 
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sun, 27 Mar 2022 14:18:07 +0200
+Subject: [PATCH] media: rkvdec-h264: Don't hardcode SPS/PPS parameters
+
+Some SPS/PPS parameters are currently hardcoded in the driver
+even though so do exist in the uapi which is stable by now.
+
+Use them instead of hardcoding them.
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ drivers/staging/media/rkvdec/rkvdec-h264.c | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
+index af530b05a789..f31b7c021d82 100644
+--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
++++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
+@@ -655,13 +655,14 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
+ 
+ #define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value)
+ 	/* write sps */
+-	WRITE_PPS(0xf, SEQ_PARAMETER_SET_ID);
+-	WRITE_PPS(0xff, PROFILE_IDC);
+-	WRITE_PPS(1, CONSTRAINT_SET3_FLAG);
++	WRITE_PPS(sps->seq_parameter_set_id, SEQ_PARAMETER_SET_ID);
++	WRITE_PPS(sps->profile_idc, PROFILE_IDC);
++	WRITE_PPS((sps->constraint_set_flags & 1 << 3) ? 1 : 0, CONSTRAINT_SET3_FLAG);
+ 	WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
+ 	WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA);
+ 	WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA);
+-	WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
++	WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS),
++		  QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
+ 	WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4);
+ 	WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES);
+ 	WRITE_PPS(sps->pic_order_cnt_type, PIC_ORDER_CNT_TYPE);
+@@ -688,8 +689,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
+ 		  DIRECT_8X8_INFERENCE_FLAG);
+ 
+ 	/* write pps */
+-	WRITE_PPS(0xff, PIC_PARAMETER_SET_ID);
+-	WRITE_PPS(0x1f, PPS_SEQ_PARAMETER_SET_ID);
++	WRITE_PPS(pps->pic_parameter_set_id, PIC_PARAMETER_SET_ID);
++	WRITE_PPS(pps->seq_parameter_set_id, PPS_SEQ_PARAMETER_SET_ID);
+ 	WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE),
+ 		  ENTROPY_CODING_MODE_FLAG);
+ 	WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT),

patch/kernel/archive/media-5.19/212-linux-0020-drm-from-list.patch

@@ -24,7 +24,7 @@ Reviewed-by: Sandy Huang <hjc@rock-chips.com>
  2 files changed, 10 insertions(+)
 
 diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
-index 25837b1d6639..f11080d63331 100644
+index 07741b678798..5ec38456dc5d 100644
 --- a/drivers/gpu/drm/drm_fourcc.c
 +++ b/drivers/gpu/drm/drm_fourcc.c
 @@ -261,6 +261,14 @@ const struct drm_format_info *__drm_format_info(u32 format)
@@ -43,7 +43,7 @@ index 25837b1d6639..f11080d63331 100644
  		  .num_planes = 3, .char_per_block = { 2, 2, 2 },
  		  .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
 diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
-index 7f652c96845b..37824734633c 100644
+index f1972154a594..b972d0adfa2e 100644
 --- a/include/uapi/drm/drm_fourcc.h
 +++ b/include/uapi/drm/drm_fourcc.h
 @@ -285,6 +285,8 @@ extern "C" {
@@ -76,10 +76,10 @@ Reviewed-by: Sandy Huang <hjc@rock-chips.com>
  3 files changed, 54 insertions(+), 8 deletions(-)
 
 diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index a25b98b7f5bd..91ded8a096ba 100644
+index 74562d40f639..9560f82ce880 100644
 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
 +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -262,6 +262,18 @@ static bool has_rb_swapped(uint32_t format)
+@@ -274,6 +274,18 @@ static bool has_uv_swapped(uint32_t format)
  	}
  }
  
@@ -98,21 +98,23 @@ index a25b98b7f5bd..91ded8a096ba 100644
  static enum vop_data_format vop_convert_format(uint32_t format)
  {
  	switch (format) {
-@@ -277,10 +289,13 @@ static enum vop_data_format vop_convert_format(uint32_t format)
+@@ -289,12 +301,15 @@ static enum vop_data_format vop_convert_format(uint32_t format)
  	case DRM_FORMAT_BGR565:
  		return VOP_FMT_RGB565;
  	case DRM_FORMAT_NV12:
 +	case DRM_FORMAT_NV15:
+ 	case DRM_FORMAT_NV21:
  		return VOP_FMT_YUV420SP;
  	case DRM_FORMAT_NV16:
 +	case DRM_FORMAT_NV20:
+ 	case DRM_FORMAT_NV61:
  		return VOP_FMT_YUV422SP;
  	case DRM_FORMAT_NV24:
 +	case DRM_FORMAT_NV30:
+ 	case DRM_FORMAT_NV42:
  		return VOP_FMT_YUV444SP;
  	default:
- 		DRM_ERROR("unsupported format[%08x]\n", format);
+@@ -948,7 +963,12 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
-@@ -931,7 +946,12 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
  	dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start;
  	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
  
@@ -126,7 +128,7 @@ index a25b98b7f5bd..91ded8a096ba 100644
  	offset += (src->y1 >> 16) * fb->pitches[0];
  	dma_addr = rk_obj->dma_addr + offset + fb->offsets[0];
  
-@@ -957,6 +977,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
+@@ -974,6 +994,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
  	}
  
  	VOP_WIN_SET(vop, win, format, format);
@@ -134,7 +136,7 @@ index a25b98b7f5bd..91ded8a096ba 100644
  	VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
  	VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
  	VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv);
-@@ -973,7 +994,11 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
+@@ -990,7 +1011,11 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
  		uv_obj = fb->obj[1];
  		rk_uv_obj = to_rockchip_obj(uv_obj);
  
@@ -148,23 +150,23 @@ index a25b98b7f5bd..91ded8a096ba 100644
  
  		dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1];
 diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
-index 857d97cdc67c..b7169010622a 100644
+index ba88addc1a75..567f226930b2 100644
 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
 +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
-@@ -165,6 +165,7 @@ struct vop_win_phy {
+@@ -179,6 +179,7 @@ struct vop_win_phy {
  	struct vop_reg enable;
  	struct vop_reg gate;
  	struct vop_reg format;
 +	struct vop_reg fmt_10;
  	struct vop_reg rb_swap;
+ 	struct vop_reg uv_swap;
  	struct vop_reg act_info;
- 	struct vop_reg dsp_info;
 diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
-index 1f7353f0684a..474cc8807ac9 100644
+index d03dd0402923..3b39b5a5f100 100644
 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
 +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
-@@ -50,6 +50,23 @@ static const uint32_t formats_win_full[] = {
+@@ -53,6 +53,23 @@ static const uint32_t formats_win_full[] = {
- 	DRM_FORMAT_NV24,
+ 	DRM_FORMAT_NV42,
  };
  
 +static const uint32_t formats_win_full_10[] = {
@@ -187,7 +189,7 @@ index 1f7353f0684a..474cc8807ac9 100644
  static const uint64_t format_modifiers_win_full[] = {
  	DRM_FORMAT_MOD_LINEAR,
  	DRM_FORMAT_MOD_INVALID,
-@@ -613,11 +630,12 @@ static const struct vop_scl_regs rk3288_win_full_scl = {
+@@ -621,11 +638,12 @@ static const struct vop_scl_regs rk3288_win_full_scl = {
  
  static const struct vop_win_phy rk3288_win01_data = {
  	.scl = &rk3288_win_full_scl,
@@ -200,9 +202,9 @@ index 1f7353f0684a..474cc8807ac9 100644
  	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 +	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
  	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+ 	.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
  	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
- 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+@@ -756,11 +774,12 @@ static const struct vop_intr rk3368_vop_intr = {
-@@ -747,11 +765,12 @@ static const struct vop_intr rk3368_vop_intr = {
  
  static const struct vop_win_phy rk3368_win01_data = {
  	.scl = &rk3288_win_full_scl,
@@ -215,9 +217,9 @@ index 1f7353f0684a..474cc8807ac9 100644
  	.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
 +	.fmt_10 = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 4),
  	.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
+ 	.uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15),
  	.x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
- 	.y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),
+@@ -906,11 +925,12 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = {
-@@ -896,11 +915,12 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = {
  
  static const struct vop_win_phy rk3399_win01_data = {
  	.scl = &rk3288_win_full_scl,
@@ -230,135 +232,5 @@ index 1f7353f0684a..474cc8807ac9 100644
  	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 +	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
  	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
- 	.y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
+ 	.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
- 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ 	.x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
-
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Qinglang Miao <miaoqinglang@huawei.com>
-Date: Tue, 1 Dec 2020 20:54:57 +0800
-Subject: [PATCH] drm/rockchip: cdn-dp: fix reference leak when
- pm_runtime_get_sync fails
-
-The PM reference count is not expected to be incremented on
-return in cdn_dp_clk_enable.
-
-However, pm_runtime_get_sync will increment the PM reference
-count even failed. Forgetting to putting operation will result
-in a reference leak here.
-
-Replace it with pm_runtime_resume_and_get to keep usage
-counter balanced.
-
-Fixes: efe0220fc2d2 ("drm/rockchip: cdn-dp: Fix error handling")
-Reported-by: Hulk Robot <hulkci@huawei.com>
-Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
----
- drivers/gpu/drm/rockchip/cdn-dp-core.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
-index 16497c31d9f9..e46963577854 100644
---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
-+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
-@@ -100,7 +100,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
- 		goto err_core_clk;
- 	}
- 
--	ret = pm_runtime_get_sync(dp->dev);
-+	ret = pm_runtime_resume_and_get(dp->dev);
- 	if (ret < 0) {
- 		DRM_DEV_ERROR(dp->dev, "cannot get pm runtime %d\n", ret);
- 		goto err_pm_runtime_get;
-
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Qinglang Miao <miaoqinglang@huawei.com>
-Date: Tue, 1 Dec 2020 20:54:58 +0800
-Subject: [PATCH] drm/rockchip: vop: fix reference leak when
- pm_runtime_get_sync fails
-
-The PM reference count is not expected to be incremented on
-return in functions vop_enable and vop_enable.
-
-However, pm_runtime_get_sync will increment the PM reference
-count even failed. Forgetting to putting operation will result
-in a reference leak here.
-
-Replace it with pm_runtime_resume_and_get to keep usage
-counter balanced.
-
-Fixes: 5e570373c015 ("drm/rockchip: vop: Enable pm domain before vop_initial")
-Reported-by: Hulk Robot <hulkci@huawei.com>
-Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
----
- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index 91ded8a096ba..967f29625d7c 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -603,7 +603,7 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
- 	struct vop *vop = to_vop(crtc);
- 	int ret, i;
- 
--	ret = pm_runtime_get_sync(vop->dev);
-+	ret = pm_runtime_resume_and_get(vop->dev);
- 	if (ret < 0) {
- 		DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret);
- 		return ret;
-@@ -1953,7 +1953,7 @@ static int vop_initial(struct vop *vop)
- 		return PTR_ERR(vop->dclk);
- 	}
- 
--	ret = pm_runtime_get_sync(vop->dev);
-+	ret = pm_runtime_resume_and_get(vop->dev);
- 	if (ret < 0) {
- 		DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret);
- 		return ret;
-
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Qinglang Miao <miaoqinglang@huawei.com>
-Date: Tue, 1 Dec 2020 20:54:59 +0800
-Subject: [PATCH] drm/rockchip: lvds: fix reference leak when
- pm_runtime_get_sync fails
-
-The PM reference count is not expected to be incremented on
-return in functions rk3288_lvds_poweron and px30_lvds_poweron.
-
-However, pm_runtime_get_sync will increment the PM reference
-count even failed. Forgetting to putting operation will result
-in a reference leak here.
-
-Replace it with pm_runtime_resume_and_get to keep usage
-counter balanced.
-
-Fixes: cca1705c3d89 ("drm/rockchip: lvds: Add PX30 support")
-Reported-by: Hulk Robot <hulkci@huawei.com>
-Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
----
- drivers/gpu/drm/rockchip/rockchip_lvds.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
-index be74c87a8be4..288462fd5d8e 100644
---- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
-@@ -146,7 +146,7 @@ static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
- 		DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
- 		return ret;
- 	}
--	ret = pm_runtime_get_sync(lvds->dev);
-+	ret = pm_runtime_resume_and_get(lvds->dev);
- 	if (ret < 0) {
- 		DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
- 		clk_disable(lvds->pclk);
-@@ -330,7 +330,7 @@ static int px30_lvds_poweron(struct rockchip_lvds *lvds)
- {
- 	int ret;
- 
--	ret = pm_runtime_get_sync(lvds->dev);
-+	ret = pm_runtime_resume_and_get(lvds->dev);
- 	if (ret < 0) {
- 		DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
- 		return ret;
-

patch/kernel/archive/media-5.19/214-linux-1001-v4l2-rockchip.patch

@@ -0,0 +1,626 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sat, 23 May 2020 10:18:16 +0000
+Subject: [PATCH] WIP: media: rkvdec: continue to gate clock when decoding
+ finish
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+---
+ drivers/staging/media/rkvdec/rkvdec.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
+index 4f5436c89e08..06c23512e1a7 100644
+--- a/drivers/staging/media/rkvdec/rkvdec.c
++++ b/drivers/staging/media/rkvdec/rkvdec.c
+@@ -1016,7 +1016,8 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
+ 	state = (status & RKVDEC_RDY_STA) ?
+ 		VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+ 
+-	writel(0, rkvdec->regs + RKVDEC_REG_INTERRUPT);
++	writel(RKVDEC_CONFIG_DEC_CLK_GATE_E,
++	       rkvdec->regs + RKVDEC_REG_INTERRUPT);
+ 	if (cancel_delayed_work(&rkvdec->watchdog_work)) {
+ 		struct rkvdec_ctx *ctx;
+ 
+@@ -1037,7 +1038,8 @@ static void rkvdec_watchdog_func(struct work_struct *work)
+ 	ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
+ 	if (ctx) {
+ 		dev_err(rkvdec->dev, "Frame processing timed out!\n");
+-		writel(RKVDEC_IRQ_DIS, rkvdec->regs + RKVDEC_REG_INTERRUPT);
++		writel(RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_IRQ_DIS,
++		       rkvdec->regs + RKVDEC_REG_INTERRUPT);
+ 		writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL);
+ 		rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR);
+ 	}
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sat, 23 May 2020 10:16:01 +0000
+Subject: [PATCH] WIP: media: rkvdec: pm runtime dont use autosuspend before
+ disable and cleanup
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+---
+ drivers/staging/media/rkvdec/rkvdec.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
+index 06c23512e1a7..630ef09ab70b 100644
+--- a/drivers/staging/media/rkvdec/rkvdec.c
++++ b/drivers/staging/media/rkvdec/rkvdec.c
+@@ -1127,9 +1127,9 @@ static int rkvdec_remove(struct platform_device *pdev)
+ {
+ 	struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev);
+ 
+-	rkvdec_v4l2_cleanup(rkvdec);
+-	pm_runtime_disable(&pdev->dev);
+ 	pm_runtime_dont_use_autosuspend(&pdev->dev);
++	pm_runtime_disable(&pdev->dev);
++	rkvdec_v4l2_cleanup(rkvdec);
+ 	return 0;
+ }
+ 
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Randy Li <ayaka@soulik.info>
+Date: Sun, 6 Jan 2019 01:48:37 +0800
+Subject: [PATCH] soc: rockchip: power-domain: export idle request
+
+We need to put the power status of HEVC IP into IDLE unless
+we can't reset that IP or the SoC would crash down.
+rockchip_pmu_idle_request(dev, true)---> enter idle
+rockchip_pmu_idle_request(dev, false)---> exit idle
+
+Signed-off-by: Caesar Wang <wxt@rock-chips.com>
+Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
+Signed-off-by: Randy Li <ayaka@soulik.info>
+---
+ drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
+ include/linux/rockchip_pmu.h      | 15 +++++++++++++++
+ include/soc/rockchip/pm_domains.h |  6 ++++++
+ 3 files changed, 44 insertions(+)
+ create mode 100644 include/linux/rockchip_pmu.h
+
+diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
+index 89795abac951..ffb5d62c9d52 100644
+--- a/drivers/soc/rockchip/pm_domains.c
++++ b/drivers/soc/rockchip/pm_domains.c
+@@ -309,6 +309,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
+ 	return 0;
+ }
+ 
++int rockchip_pmu_idle_request(struct device *dev, bool idle)
++{
++	struct generic_pm_domain *genpd;
++	struct rockchip_pm_domain *pd;
++	int ret;
++
++	if (IS_ERR_OR_NULL(dev))
++		return -EINVAL;
++
++	if (IS_ERR_OR_NULL(dev->pm_domain))
++		return -EINVAL;
++
++	genpd = pd_to_genpd(dev->pm_domain);
++	pd = to_rockchip_pd(genpd);
++
++	mutex_lock(&pd->pmu->mutex);
++	ret = rockchip_pmu_set_idle_request(pd, idle);
++	mutex_unlock(&pd->pmu->mutex);
++
++	return ret;
++}
++EXPORT_SYMBOL(rockchip_pmu_idle_request);
++
+ static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
+ {
+ 	int i;
+diff --git a/include/linux/rockchip_pmu.h b/include/linux/rockchip_pmu.h
+new file mode 100644
+index 000000000000..720b3314e71a
+--- /dev/null
++++ b/include/linux/rockchip_pmu.h
+@@ -0,0 +1,15 @@
++/*
++ * pm_domain.h - Definitions and headers related to device power domains.
++ *
++ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
++ *
++ * This file is released under the GPLv2.
++ */
++
++#ifndef _LINUX_ROCKCHIP_PM_H
++#define _LINUX_ROCKCHIP_PM_H
++#include <linux/device.h>
++
++int rockchip_pmu_idle_request(struct device *dev, bool idle);
++
++#endif /* _LINUX_ROCKCHIP_PM_H */
+diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
+index 7dbd941fc937..c5a59dd71754 100644
+--- a/include/soc/rockchip/pm_domains.h
++++ b/include/soc/rockchip/pm_domains.h
+@@ -10,6 +10,7 @@
+ 
+ int rockchip_pmu_block(void);
+ void rockchip_pmu_unblock(void);
++int rockchip_pmu_idle_request(struct device *dev, bool idle);
+ 
+ #else /* CONFIG_ROCKCHIP_PM_DOMAINS */
+ 
+@@ -20,6 +21,11 @@ static inline int rockchip_pmu_block(void)
+ 
+ static inline void rockchip_pmu_unblock(void) { }
+ 
++static inline int rockchip_pmu_idle_request(struct device *dev, bool idle)
++{
++	return -ENOTSUPP;
++}
++
+ #endif /* CONFIG_ROCKCHIP_PM_DOMAINS */
+ 
+ #endif /* __SOC_ROCKCHIP_PM_DOMAINS_H__ */
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Wed, 20 May 2020 17:04:47 +0200
+Subject: [PATCH] WIP: media: rkvdec: implement reset controls
+
+---
+ .../bindings/media/rockchip,vdec.yaml         | 19 +++++++
+ drivers/staging/media/rkvdec/rkvdec-regs.h    |  5 ++
+ drivers/staging/media/rkvdec/rkvdec.c         | 53 +++++++++++++++++++
+ drivers/staging/media/rkvdec/rkvdec.h         | 11 +++-
+ 4 files changed, 87 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
+index 3bcfb8e12333..dd6958df1de8 100644
+--- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
++++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
+@@ -53,6 +53,18 @@ properties:
+   iommus:
+     maxItems: 1
+ 
++  resets:
++    maxItems: 6
++
++  reset-names:
++    items:
++      - const: video_h
++      - const: video_a
++      - const: video_core
++      - const: video_cabac
++      - const: niu_a
++      - const: niu_h
++
+ required:
+   - compatible
+   - reg
+@@ -60,6 +72,8 @@ required:
+   - clocks
+   - clock-names
+   - power-domains
++  - resets
++  - reset-names
+ 
+ additionalProperties: false
+ 
+@@ -78,6 +92,11 @@ examples:
+         clock-names = "axi", "ahb", "cabac", "core";
+         power-domains = <&power RK3399_PD_VDU>;
+         iommus = <&vdec_mmu>;
++        resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>,
++                 <&cru SRST_VDU_CORE>, <&cru SRST_VDU_CA>,
++                 <&cru SRST_A_VDU_NOC>, <&cru SRST_H_VDU_NOC>;
++        reset-names = "video_h", "video_a", "video_core", "video_cabac",
++                      "niu_a", "niu_h";
+     };
+ 
+ ...
+diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
+index 15b9bee92016..3acc914888f6 100644
+--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
++++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
+@@ -28,6 +28,11 @@
+ #define RKVDEC_SOFTRST_EN_P				BIT(20)
+ #define RKVDEC_FORCE_SOFTRESET_VALID			BIT(21)
+ #define RKVDEC_SOFTRESET_RDY				BIT(22)
++#define RKVDEC_ERR_MASK					(RKVDEC_BUS_STA \
++							 | RKVDEC_ERR_STA \
++							 | RKVDEC_TIMEOUT_STA \
++							 | RKVDEC_BUF_EMPTY_STA \
++							 | RKVDEC_COLMV_REF_ERR_STA )
+ 
+ #define RKVDEC_REG_SYSCTRL				0x008
+ #define RKVDEC_IN_ENDIAN				BIT(0)
+diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
+index 630ef09ab70b..b6d5b26a93c2 100644
+--- a/drivers/staging/media/rkvdec/rkvdec.c
++++ b/drivers/staging/media/rkvdec/rkvdec.c
+@@ -10,12 +10,15 @@
+  */
+ 
+ #include <linux/clk.h>
++#include <linux/delay.h>
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm.h>
+ #include <linux/pm_runtime.h>
++#include <linux/reset.h>
++#include <linux/rockchip_pmu.h>
+ #include <linux/slab.h>
+ #include <linux/videodev2.h>
+ #include <linux/workqueue.h>
+@@ -717,6 +720,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx,
+ 
+ 	pm_runtime_mark_last_busy(rkvdec->dev);
+ 	pm_runtime_put_autosuspend(rkvdec->dev);
++
++	if (result == VB2_BUF_STATE_ERROR &&
++	    rkvdec->reset_mask == RESET_NONE)
++		rkvdec->reset_mask |= RESET_SOFT;
++
+ 	rkvdec_job_finish_no_pm(ctx, result);
+ }
+ 
+@@ -754,6 +762,33 @@ static void rkvdec_device_run(void *priv)
+ 
+ 	if (WARN_ON(!desc))
+ 		return;
++	if (rkvdec->reset_mask != RESET_NONE) {
++
++		if (rkvdec->reset_mask & RESET_SOFT) {
++			writel(RKVDEC_SOFTRST_EN_P,
++			       rkvdec->regs + RKVDEC_REG_INTERRUPT);
++			udelay(RKVDEC_RESET_DELAY);
++			if (readl(rkvdec->regs + RKVDEC_REG_INTERRUPT)
++			    & RKVDEC_SOFTRESET_RDY)
++				dev_info_ratelimited(rkvdec->dev,
++						      "softreset failed\n");
++		}
++
++		if (rkvdec->reset_mask & RESET_HARD) {
++			rockchip_pmu_idle_request(rkvdec->dev, true);
++			ret = reset_control_assert(rkvdec->rstc);
++			if (!ret) {
++				udelay(RKVDEC_RESET_DELAY);
++				ret = reset_control_deassert(rkvdec->rstc);
++			}
++			rockchip_pmu_idle_request(rkvdec->dev, false);
++			if (ret)
++				dev_notice_ratelimited(rkvdec->dev,
++							"hardreset failed\n");
++		}
++		rkvdec->reset_mask = RESET_NONE;
++		pm_runtime_suspend(rkvdec->dev);
++	}
+ 
+ 	ret = pm_runtime_resume_and_get(rkvdec->dev);
+ 	if (ret < 0) {
+@@ -1021,6 +1056,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
+ 	if (cancel_delayed_work(&rkvdec->watchdog_work)) {
+ 		struct rkvdec_ctx *ctx;
+ 
++		if (state == VB2_BUF_STATE_ERROR) {
++			rkvdec->reset_mask |= (status & RKVDEC_ERR_MASK) ?
++						RESET_HARD : RESET_SOFT;
++		}
++
+ 		ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
+ 		rkvdec_job_finish(ctx, state);
+ 	}
+@@ -1038,6 +1078,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
+ 	ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
+ 	if (ctx) {
+ 		dev_err(rkvdec->dev, "Frame processing timed out!\n");
++		rkvdec->reset_mask |= RESET_HARD;
+ 		writel(RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_IRQ_DIS,
+ 		       rkvdec->regs + RKVDEC_REG_INTERRUPT);
+ 		writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL);
+@@ -1107,6 +1148,18 @@ static int rkvdec_probe(struct platform_device *pdev)
+ 		return ret;
+ 	}
+ 
++
++	rkvdec->rstc = devm_reset_control_array_get(&pdev->dev, false, true);
++	if (IS_ERR(rkvdec->rstc)) {
++		dev_err(&pdev->dev,
++			"get resets failed %ld\n", PTR_ERR(rkvdec->rstc));
++		return PTR_ERR(rkvdec->rstc);
++	} else {
++		dev_dbg(&pdev->dev,
++			 "requested %d resets\n",
++			 reset_control_get_count(&pdev->dev));
++	}
++
+ 	pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
+ 	pm_runtime_use_autosuspend(&pdev->dev);
+ 	pm_runtime_enable(&pdev->dev);
+diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
+index b9e219438bc9..f02f79c405f0 100644
+--- a/drivers/staging/media/rkvdec/rkvdec.h
++++ b/drivers/staging/media/rkvdec/rkvdec.h
+@@ -11,10 +11,11 @@
+ #ifndef RKVDEC_H_
+ #define RKVDEC_H_
+ 
++#include <linux/clk.h>
+ #include <linux/platform_device.h>
++#include <linux/reset.h>
+ #include <linux/videodev2.h>
+ #include <linux/wait.h>
+-#include <linux/clk.h>
+ 
+ #include <media/v4l2-ctrls.h>
+ #include <media/v4l2-device.h>
+@@ -22,6 +23,12 @@
+ #include <media/videobuf2-core.h>
+ #include <media/videobuf2-dma-contig.h>
+ 
++#define RESET_NONE		0
++#define RESET_SOFT		BIT(0)
++#define RESET_HARD		BIT(1)
++
++#define RKVDEC_RESET_DELAY	5
++
+ struct rkvdec_ctx;
+ 
+ struct rkvdec_ctrl_desc {
+@@ -96,6 +103,8 @@ struct rkvdec_dev {
+ 	void __iomem *regs;
+ 	struct mutex vdev_lock; /* serializes ioctls */
+ 	struct delayed_work watchdog_work;
++	struct reset_control *rstc;
++	u8 reset_mask;
+ };
+ 
+ struct rkvdec_ctx {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Tue, 18 Aug 2020 11:38:04 +0200
+Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3399
+
+---
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index b0620c45820c..e797271ef6b4 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -1062,7 +1062,10 @@ power-domain@RK3399_PD_VCODEC {
+ 			power-domain@RK3399_PD_VDU {
+ 				reg = <RK3399_PD_VDU>;
+ 				clocks = <&cru ACLK_VDU>,
+-					 <&cru HCLK_VDU>;
++					 <&cru HCLK_VDU>,
++					 <&cru SCLK_VDU_CA>,
++					 <&cru SCLK_VDU_CORE>;
++
+ 				pm_qos = <&qos_video_m1_r>,
+ 					 <&qos_video_m1_w>;
+ 				#power-domain-cells = <0>;
+@@ -1345,6 +1348,11 @@ vdec: video-codec@ff660000 {
+ 		clock-names = "axi", "ahb", "cabac", "core";
+ 		iommus = <&vdec_mmu>;
+ 		power-domains = <&power RK3399_PD_VDU>;
++		resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>,
++			 <&cru SRST_VDU_CORE>, <&cru SRST_VDU_CA>,
++			 <&cru SRST_A_VDU_NOC>, <&cru SRST_H_VDU_NOC>;
++		reset-names = "video_h", "video_a", "video_core", "video_cabac",
++			       "niu_a", "niu_h";
+ 	};
+ 
+ 	vdec_mmu: iommu@ff660480 {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Fri, 1 Jan 2021 12:11:12 +0200
+Subject: [PATCH] arm64: dts: rockchip: fix RK3399 vdec register witdh
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index e797271ef6b4..748eb7368e6a 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -1341,7 +1341,7 @@ vpu_mmu: iommu@ff650800 {
+ 
+ 	vdec: video-codec@ff660000 {
+ 		compatible = "rockchip,rk3399-vdec";
+-		reg = <0x0 0xff660000 0x0 0x400>;
++		reg = <0x0 0xff660000 0x0 0x480>;
+ 		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
+ 		clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
+ 			 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sat, 21 Aug 2021 16:12:36 +0200
+Subject: [PATCH] media: hantro: rockchip: Increase RK3288's max ACLK
+
+Required to proper decode H.264@4K
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ drivers/staging/media/hantro/rockchip_vpu_hw.c | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
+index fc96501f3bc8..f31550c21172 100644
+--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
+@@ -15,7 +15,8 @@
+ #include "rockchip_vpu2_regs.h"
+ 
+ #define RK3066_ACLK_MAX_FREQ (300 * 1000 * 1000)
+-#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
++#define RK3288_ACLK_MAX_FREQ (600 * 1000 * 1000)
++#define RK3399_ACLK_MAX_FREQ (400 * 1000 * 1000)
+ 
+ /*
+  * Supported formats.
+@@ -273,13 +274,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
+ 	return 0;
+ }
+ 
+-static int rockchip_vpu_hw_init(struct hantro_dev *vpu)
++static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
+ {
+ 	/* Bump ACLK to max. possible freq. to improve performance. */
+ 	clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ);
+ 	return 0;
+ }
+ 
++static int rockchip_vpu_hw_init(struct hantro_dev *vpu)
++{
++	/* Bump ACLK to max. possible freq. to improve performance. */
++	clk_set_rate(vpu->clocks[0].clk, RK3399_ACLK_MAX_FREQ);
++	return 0;
++}
++
+ static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx)
+ {
+ 	struct hantro_dev *vpu = ctx->dev;
+@@ -507,7 +515,7 @@ const struct hantro_variant rk3288_vpu_variant = {
+ 	.codec_ops = rk3288_vpu_codec_ops,
+ 	.irqs = rockchip_vpu1_irqs,
+ 	.num_irqs = ARRAY_SIZE(rockchip_vpu1_irqs),
+-	.init = rockchip_vpu_hw_init,
++	.init = rk3288_vpu_hw_init,
+ 	.clk_names = rockchip_vpu_clk_names,
+ 	.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+ };
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sun, 3 Apr 2022 13:45:57 +0200
+Subject: [PATCH] media: hantro: rockchip: Enable H.264 codec for RK3399
+
+---
+ drivers/staging/media/hantro/rockchip_vpu_hw.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
+index f31550c21172..304d7b359295 100644
+--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
+@@ -544,7 +544,7 @@ const struct hantro_variant rk3399_vpu_variant = {
+ 	.dec_fmts = rk3399_vpu_dec_fmts,
+ 	.num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ 	.codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |
+-		 HANTRO_VP8_DECODER,
++		 HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
+ 	.codec_ops = rk3399_vpu_codec_ops,
+ 	.irqs = rockchip_vpu2_irqs,
+ 	.num_irqs = ARRAY_SIZE(rockchip_vpu2_irqs),
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sun, 4 Jul 2021 15:19:44 +0200
+Subject: [PATCH] media: rkvdec: disable QoS for VP9 (corruptions on RK3328
+ otherwise)
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ drivers/staging/media/rkvdec/rkvdec-regs.h | 2 ++
+ drivers/staging/media/rkvdec/rkvdec-vp9.c  | 8 ++++++++
+ 2 files changed, 10 insertions(+)
+
+diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
+index 3acc914888f6..265f5234f4eb 100644
+--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
++++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
+@@ -222,6 +222,8 @@
+ #define RKVDEC_REG_H264_ERR_E				0x134
+ #define RKVDEC_H264_ERR_EN_HIGHBITS(x)			((x) & 0x3fffffff)
+ 
++#define RKVDEC_QOS_CTRL					0x18C
++
+ #define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND		0x410
+ #define RKVDEC_REG_PREF_CHR_CACHE_COMMAND		0x450
+ 
+diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c
+index 311a12656072..ea270262bbed 100644
+--- a/drivers/staging/media/rkvdec/rkvdec-vp9.c
++++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c
+@@ -802,6 +802,7 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
+ 	struct rkvdec_dev *rkvdec = ctx->dev;
+ 	struct rkvdec_vp9_run run = { };
+ 	int ret;
++	u32 reg;
+ 
+ 	ret = rkvdec_vp9_run_preamble(ctx, &run);
+ 	if (ret) {
+@@ -823,6 +824,13 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
+ 	writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
+ 
+ 	writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN);
++
++	/* disable QOS for RK3328 - no effect on other SoCs */
++	reg = readl(rkvdec->regs + RKVDEC_QOS_CTRL);
++	reg |= 0xFFFF;
++	reg &= (~BIT(12));
++	writel(reg, rkvdec->regs + RKVDEC_QOS_CTRL);
++
+ 	/* Start decoding! */
+ 	writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E |
+ 	       RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E,
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Thu, 16 Jun 2022 13:15:09 +0200
+Subject: [PATCH] arm64: dts: use correct PLL for vdec core
+
+vdec core should use codec pll for proper operation, by default
+it uses general pll (GPLL) - as all other clocks would
+---
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index 748eb7368e6a..658ec3b00445 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -1346,6 +1346,8 @@ vdec: video-codec@ff660000 {
+ 		clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
+ 			 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
+ 		clock-names = "axi", "ahb", "cabac", "core";
++		assigned-clocks = <&cru ACLK_VDU>;
++		assigned-clock-parents = <&cru PLL_CPLL>;
+ 		iommus = <&vdec_mmu>;
+ 		power-domains = <&power RK3399_PD_VDU>;
+ 		resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>,
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Thu, 16 Jun 2022 13:18:22 +0200
+Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3328
+
+---
+ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+index 5519347232f6..431c4ec198be 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+@@ -674,6 +674,11 @@ vdec: video-codec@ff360000 {
+ 		assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
+ 				  <&cru SCLK_VDEC_CORE>;
+ 		assigned-clock-rates = <400000000>, <400000000>, <300000000>;
++		resets = <&cru SRST_VDEC_H>, <&cru SRST_VDEC_A>,
++			 <&cru SRST_VDEC_CORE>, <&cru SRST_VDEC_CABAC>,
++			 <&cru SRST_VDEC_NIU_A>, <&cru SRST_VDEC_NIU_H>;
++		reset-names = "video_h", "video_a", "video_core", "video_cabac",
++			       "niu_a", "niu_h";
+ 		iommus = <&vdec_mmu>;
+ 		power-domains = <&power RK3328_PD_VIDEO>;
+ 	};

patch/kernel/archive/media-5.19/215-linux-1002-for-libreelec.patch

@@ -0,0 +1,636 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Wed, 2 Sep 2020 19:52:02 +0200
+Subject: [PATCH] arm64: dts: rockchip: add gpu powerdomain, gpu opp-table and
+ cooling cell for RK3328
+
+Note: since the regulator that supplies the GPU usually also supplies
+other SoC components, we have to make sure voltage is never lower then
+1050 mV - also disable 500 MHz for now, since it will crash if rkvdec
+is running at the same time (voltage to high)
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 35 ++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+index 431c4ec198be..e4977669b16a 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+@@ -300,6 +300,11 @@ power: power-controller {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+ 
++			power-domain@RK3328_PD_GPU {
++				reg = <RK3328_PD_GPU>;
++				clocks = <&cru ACLK_GPU>;
++				#power-domain-cells = <0>;
++			};
+ 			power-domain@RK3328_PD_HEVC {
+ 				reg = <RK3328_PD_HEVC>;
+ 				#power-domain-cells = <0>;
+@@ -539,6 +544,11 @@ map0 {
+ 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ 					contribution = <4096>;
+ 				};
++				map1 {
++					trip = <&target>;
++					cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
++					contribution = <4096>;
++				};
+ 			};
+ 		};
+ 
+@@ -620,7 +630,32 @@ gpu: gpu@ff300000 {
+ 				  "ppmmu1";
+ 		clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
+ 		clock-names = "bus", "core";
++		operating-points-v2 = <&gpu_opp_table>;
++		power-domains = <&power RK3328_PD_GPU>;
+ 		resets = <&cru SRST_GPU_A>;
++		#cooling-cells = <2>;
++	};
++
++	gpu_opp_table: gpu-opp-table {
++		compatible = "operating-points-v2";
++
++		opp-200000000 {
++			opp-hz = /bits/ 64 <200000000>;
++			opp-microvolt = <1050000>;
++		};
++		opp-300000000 {
++			opp-hz = /bits/ 64 <300000000>;
++			opp-microvolt = <1050000>;
++		};
++		opp-400000000 {
++			opp-hz = /bits/ 64 <400000000>;
++			opp-microvolt = <1050000>;
++		};
++		opp-500000000 {
++			opp-hz = /bits/ 64 <500000000>;
++			opp-microvolt = <1150000>;
++			status = "disabled";
++		};
+ 	};
+ 
+ 	h265e_mmu: iommu@ff330200 {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Tue, 2 Feb 2021 17:22:21 +0200
+Subject: [PATCH] ARM: dts: RK3288 miqi add hdmi sound nodes
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 713f55e143c6..8d30c49f406e 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -78,6 +78,21 @@ vcc_sys: vsys-regulator {
+ 		regulator-always-on;
+ 		regulator-boot-on;
+ 	};
++
++	sound {
++		compatible = "simple-audio-card";
++		simple-audio-card,format = "i2s";
++		simple-audio-card,name = "HDMI";
++		simple-audio-card,mclk-fs = <512>;
++
++		simple-audio-card,codec {
++			sound-dai = <&hdmi>;
++		};
++
++		simple-audio-card,cpu {
++			sound-dai = <&i2s>;
++		};
++	};
+ };
+ 
+ &cpu0 {
+@@ -284,6 +299,11 @@ &i2c5 {
+ 	status = "okay";
+ };
+ 
++&i2s {
++	#sound-dai-cells = <0>;
++	status = "okay";
++};
++
+ &io_domains {
+ 	status = "okay";
+ 
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Fri, 2 Apr 2021 17:54:22 +0200
+Subject: [PATCH] ARM/arm64: dts: rockchip: align sound card names
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi     | 2 +-
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index 9c1e38c54eae..ee332fc9cf1f 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -75,7 +75,7 @@ sdio_pwrseq: sdio-pwrseq {
+ 	sound {
+ 		compatible = "simple-audio-card";
+ 		simple-audio-card,format = "i2s";
+-		simple-audio-card,name = "rockchip,tinker-codec";
++		simple-audio-card,name = "HDMI";
+ 		simple-audio-card,mclk-fs = <512>;
+ 
+ 		simple-audio-card,codec {
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index 658ec3b00445..925d320dea86 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -1892,7 +1892,7 @@ hdmi_sound: hdmi-sound {
+ 		compatible = "simple-audio-card";
+ 		simple-audio-card,format = "i2s";
+ 		simple-audio-card,mclk-fs = <256>;
+-		simple-audio-card,name = "hdmi-sound";
++		simple-audio-card,name = "HDMI";
+ 		status = "disabled";
+ 
+ 		simple-audio-card,cpu {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Wed, 10 Feb 2021 18:44:56 +0200
+Subject: [PATCH] HACK: drm/gem: suppress warning about missing vm_flags
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ drivers/gpu/drm/drm_gem.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
+index eb0c2d041f13..9256eadb8a3e 100644
+--- a/drivers/gpu/drm/drm_gem.c
++++ b/drivers/gpu/drm/drm_gem.c
+@@ -1053,7 +1053,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
+ 		ret = obj->funcs->mmap(obj, vma);
+ 		if (ret)
+ 			goto err_drm_gem_object_put;
+-		WARN_ON(!(vma->vm_flags & VM_DONTEXPAND));
++		//WARN_ON(!(vma->vm_flags & VM_DONTEXPAND));
+ 	} else {
+ 		if (!vma->vm_ops) {
+ 			ret = -EINVAL;
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sun, 25 Mar 2018 22:17:06 +0200
+Subject: [PATCH] ASoC: hdmi-codec: fix channel allocation
+
+---
+ sound/soc/codecs/hdmi-codec.c | 113 ++++++++++++++++------------------
+ 1 file changed, 52 insertions(+), 61 deletions(-)
+
+diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
+index b773466619b2..e53950e85631 100644
+--- a/sound/soc/codecs/hdmi-codec.c
++++ b/sound/soc/codecs/hdmi-codec.c
+@@ -194,78 +194,69 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
+  */
+ static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
+ 	{ .ca_id = 0x00, .n_ch = 2,
+-	  .mask = FL | FR},
+-	/* 2.1 */
+-	{ .ca_id = 0x01, .n_ch = 4,
+-	  .mask = FL | FR | LFE},
+-	/* Dolby Surround */
++	  .mask = FL | FR },
++	{ .ca_id = 0x03, .n_ch = 4,
++	  .mask = FL | FR | LFE | FC },
+ 	{ .ca_id = 0x02, .n_ch = 4,
+ 	  .mask = FL | FR | FC },
+-	/* surround51 */
++	{ .ca_id = 0x01, .n_ch = 4,
++	  .mask = FL | FR | LFE },
+ 	{ .ca_id = 0x0b, .n_ch = 6,
+-	  .mask = FL | FR | LFE | FC | RL | RR},
+-	/* surround40 */
+-	{ .ca_id = 0x08, .n_ch = 6,
+-	  .mask = FL | FR | RL | RR },
+-	/* surround41 */
+-	{ .ca_id = 0x09, .n_ch = 6,
+-	  .mask = FL | FR | LFE | RL | RR },
+-	/* surround50 */
++	  .mask = FL | FR | LFE | FC | RL | RR },
+ 	{ .ca_id = 0x0a, .n_ch = 6,
+ 	  .mask = FL | FR | FC | RL | RR },
+-	/* 6.1 */
+-	{ .ca_id = 0x0f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | RC },
+-	/* surround71 */
++	{ .ca_id = 0x09, .n_ch = 6,
++	  .mask = FL | FR | LFE | RL | RR },
++	{ .ca_id = 0x08, .n_ch = 6,
++	  .mask = FL | FR | RL | RR },
++	{ .ca_id = 0x07, .n_ch = 6,
++	  .mask = FL | FR | LFE | FC | RC },
++	{ .ca_id = 0x06, .n_ch = 6,
++	  .mask = FL | FR | FC | RC },
++	{ .ca_id = 0x05, .n_ch = 6,
++	  .mask = FL | FR | LFE | RC },
++	{ .ca_id = 0x04, .n_ch = 6,
++	  .mask = FL | FR | RC },
+ 	{ .ca_id = 0x13, .n_ch = 8,
+ 	  .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
+-	/* others */
+-	{ .ca_id = 0x03, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC },
+-	{ .ca_id = 0x04, .n_ch = 8,
+-	  .mask = FL | FR | RC},
+-	{ .ca_id = 0x05, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC },
+-	{ .ca_id = 0x06, .n_ch = 8,
+-	  .mask = FL | FR | FC | RC },
+-	{ .ca_id = 0x07, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RC },
+-	{ .ca_id = 0x0c, .n_ch = 8,
+-	  .mask = FL | FR | RC | RL | RR },
+-	{ .ca_id = 0x0d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RC },
+-	{ .ca_id = 0x0e, .n_ch = 8,
+-	  .mask = FL | FR | FC | RL | RR | RC },
+-	{ .ca_id = 0x10, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x11, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x12, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x14, .n_ch = 8,
+-	  .mask = FL | FR | FLC | FRC },
+-	{ .ca_id = 0x15, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FLC | FRC },
+-	{ .ca_id = 0x16, .n_ch = 8,
+-	  .mask = FL | FR | FC | FLC | FRC },
+-	{ .ca_id = 0x17, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | FLC | FRC },
+-	{ .ca_id = 0x18, .n_ch = 8,
+-	  .mask = FL | FR | RC | FLC | FRC },
+-	{ .ca_id = 0x19, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FLC | FRC },
+-	{ .ca_id = 0x1a, .n_ch = 8,
+-	  .mask = FL | FR | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1b, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1c, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x1e, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
++	{ .ca_id = 0x11, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
++	{ .ca_id = 0x10, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1c, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | FLC | FRC },
++	{ .ca_id = 0x0f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | RC },
++	{ .ca_id = 0x1b, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0e, .n_ch = 8,
++	  .mask = FL | FR | FC | RL | RR | RC },
++	{ .ca_id = 0x1a, .n_ch = 8,
++	  .mask = FL | FR | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RC },
++	{ .ca_id = 0x19, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FLC | FRC },
++	{ .ca_id = 0x0c, .n_ch = 8,
++	  .mask = FL | FR | RC | RL | RR },
++	{ .ca_id = 0x18, .n_ch = 8,
++	  .mask = FL | FR | RC | FLC | FRC },
++	{ .ca_id = 0x17, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | FLC | FRC },
++	{ .ca_id = 0x16, .n_ch = 8,
++	  .mask = FL | FR | FC | FLC | FRC },
++	{ .ca_id = 0x15, .n_ch = 8,
++	  .mask = FL | FR | LFE | FLC | FRC },
++	{ .ca_id = 0x14, .n_ch = 8,
++	  .mask = FL | FR | FLC | FRC },
+ };
+ 
+ struct hdmi_codec_priv {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sat, 27 Feb 2021 17:52:02 +0100
+Subject: [PATCH] arm64: dts: rockchip: add SPDIF nodes for RK3328 A1 board
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 23 ++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+index 40bf808642b9..27a1799027c2 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+@@ -57,6 +57,24 @@ ir-receiver {
+ 		gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ 		linux,rc-map-name = "rc-beelink-gs1";
+ 	};
++
++	spdif_sound: spdif-sound {
++		compatible = "simple-audio-card";
++		simple-audio-card,name = "SPDIF";
++
++		simple-audio-card,cpu {
++			sound-dai = <&spdif>;
++		};
++
++		simple-audio-card,codec {
++			sound-dai = <&spdif_dit>;
++		};
++	};
++
++	spdif_dit: spdif-dit {
++		compatible = "linux,spdif-dit";
++		#sound-dai-cells = <0>;
++	};
+ };
+ 
+ &analog_sound {
+@@ -325,6 +343,11 @@ &sdmmc {
+ 	status = "okay";
+ };
+ 
++&spdif {
++	pinctrl-0 = <&spdifm0_tx>;
++	status = "okay";
++};
++
+ &tsadc {
+ 	rockchip,hw-tshut-mode = <0>;
+ 	rockchip,hw-tshut-polarity = <0>;
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sat, 27 Feb 2021 18:01:13 +0100
+Subject: [PATCH] arm64: dts: rockchip: Add ir-receiver node for RK3328 ROC CC
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+index aa22a0c22265..a78fbddd21df 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+@@ -88,6 +88,13 @@ vcc_phy: vcc-phy-regulator {
+ 		regulator-boot-on;
+ 	};
+ 
++	ir-receiver {
++		compatible = "gpio-ir-receiver";
++		gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
++		pinctrl-0 = <&ir_int>;
++		pinctrl-names = "default";
++	};
++
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+@@ -308,6 +315,13 @@ &io_domains {
+ };
+ 
+ &pinctrl {
++
++	ir {
++		ir_int: ir-int {
++			rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
+ 	pmic {
+ 		pmic_int_l: pmic-int-l {
+ 			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Mon, 1 Mar 2021 21:24:15 +0100
+Subject: [PATCH] ARM: dts: add cec pinctrl for RK3288 miqi board
+
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 8d30c49f406e..6d90db5a3b75 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -145,6 +145,8 @@ &gpu {
+ 
+ &hdmi {
+ 	ddc-i2c-bus = <&i2c5>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&hdmi_cec_c0>;
+ 	status = "okay";
+ };
+ 
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Mon, 1 Mar 2021 19:22:15 +0100
+Subject: [PATCH] HACK: arm64: dts: enable FE phy for Beelink A1 also
+
+---
+ arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+index 27a1799027c2..7de9dfa71d89 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+@@ -147,6 +147,14 @@ rtl8211f: ethernet-phy@0 {
+ 	};
+ };
+ 
++&gmac2phy {
++	clock_in_out = "output";
++	assigned-clock-rate = <50000000>;
++	assigned-clocks = <&cru SCLK_MAC2PHY>;
++	assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
++	status = "okay";
++};
++
+ &gpu {
+ 	mali-supply = <&vdd_logic>;
+ };
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 26 Feb 2019 20:45:14 +0000
+Subject: [PATCH] WIP: dw-hdmi-cec: sleep 100ms on error
+
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c | 18 ++++++++++++++++--
+ 1 file changed, 16 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
+index c8f44bcb298a..d4280ce4542c 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
+@@ -4,6 +4,7 @@
+  *
+  * Copyright (C) 2015-2017 Russell King.
+  */
++#include <linux/delay.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+@@ -129,8 +130,15 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
+ 
+ 	dw_hdmi_write(cec, stat, HDMI_IH_CEC_STAT0);
+ 
+-	if (stat & CEC_STAT_ERROR_INIT) {
+-		cec->tx_status = CEC_TX_STATUS_ERROR;
++	/* Status with both done and error_initiator bits have been seen
++	 * on Rockchip RK3328 devices, transmit attempt seems to have failed
++	 * when this happens, report as low drive and block cec-framework
++	 * 100ms before core retransmits the failed message, this seems to
++	 * mitigate the issue with failed transmit attempts.
++	 */
++	if ((stat & (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) == (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) {
++		pr_debug("dw_hdmi_cec_hardirq: stat=%02x LOW_DRIVE\n", stat);
++		cec->tx_status = CEC_TX_STATUS_LOW_DRIVE;
+ 		cec->tx_done = true;
+ 		ret = IRQ_WAKE_THREAD;
+ 	} else if (stat & CEC_STAT_DONE) {
+@@ -141,6 +149,10 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
+ 		cec->tx_status = CEC_TX_STATUS_NACK;
+ 		cec->tx_done = true;
+ 		ret = IRQ_WAKE_THREAD;
++	} else if (stat & CEC_STAT_ERROR_INIT) {
++		cec->tx_status = CEC_TX_STATUS_ERROR;
++		cec->tx_done = true;
++		ret = IRQ_WAKE_THREAD;
+ 	}
+ 
+ 	if (stat & CEC_STAT_EOM) {
+@@ -173,6 +185,8 @@ static irqreturn_t dw_hdmi_cec_thread(int irq, void *data)
+ 
+ 	if (cec->tx_done) {
+ 		cec->tx_done = false;
++		if (cec->tx_status == CEC_TX_STATUS_LOW_DRIVE)
++			msleep(100);
+ 		cec_transmit_attempt_done(adap, cec->tx_status);
+ 	}
+ 	if (cec->rx_done) {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Wed, 5 May 2021 19:11:12 +0200
+Subject: [PATCH] arm64: boot: dts: Increase ACLK_PERILP0 clock rate for RK3399
+
+As per vendor kernel. Leaving this clock at the lower rate will
+result in poor DMA controller performance
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index 925d320dea86..037732441f92 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -1478,7 +1478,7 @@ cru: clock-controller@ff760000 {
+ 			<1000000000>,
+ 			 <150000000>,   <75000000>,
+ 			  <37500000>,
+-			 <100000000>,  <100000000>,
++			 <300000000>,  <100000000>,
+ 			  <50000000>, <600000000>,
+ 			 <100000000>,   <50000000>,
+ 			 <400000000>, <400000000>,
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sat, 21 Aug 2021 17:04:46 +0200
+Subject: [PATCH] arm64: dts: rockchip: Enable USB3 for rk3328 Beelink A1
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+index 7de9dfa71d89..e857e5a727f4 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+@@ -389,6 +389,11 @@ &usb_host0_ehci {
+ 	status = "okay";
+ };
+ 
++&usbdrd3 {
++	dr_mode = "host";
++	status = "okay";
++};
++
+ &vop {
+ 	status = "okay";
+ };
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sat, 30 Oct 2021 12:19:19 +0200
+Subject: [PATCH] WIP: drm: bridge: dw-hdmi: switch from .hw_parmas to .prepare
+ for i2s
+
+Seems to be the only way to get AES bits correctly as set by
+userspace.
+TODO: check other consequences.
+
+Signed-off-by: Alex Bee <knaerzche@gmail.com>
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+index f50b47ac11a8..d9b3c8c29e6f 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+@@ -34,9 +34,9 @@ static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
+ 	return audio->read(hdmi, offset);
+ }
+ 
+-static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
+-				 struct hdmi_codec_daifmt *fmt,
+-				 struct hdmi_codec_params *hparms)
++static int dw_hdmi_i2s_prepare(struct device *dev, void *data,
++			       struct hdmi_codec_daifmt *fmt,
++			       struct hdmi_codec_params *hparms)
+ {
+ 	struct dw_hdmi_i2s_audio_data *audio = data;
+ 	struct dw_hdmi *hdmi = audio->hdmi;
+@@ -178,7 +178,7 @@ static int dw_hdmi_i2s_hook_plugged_cb(struct device *dev, void *data,
+ }
+ 
+ static const struct hdmi_codec_ops dw_hdmi_i2s_ops = {
+-	.hw_params	= dw_hdmi_i2s_hw_params,
++	.prepare	= dw_hdmi_i2s_prepare,
+ 	.audio_startup  = dw_hdmi_i2s_audio_startup,
+ 	.audio_shutdown	= dw_hdmi_i2s_audio_shutdown,
+ 	.get_eld	= dw_hdmi_i2s_get_eld,

patch/kernel/archive/media-5.19/216-linux-2000-v4l2-wip-rkvdec-hevc.patch

@@ -11,7 +11,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 10 insertions(+), 2 deletions(-)
 
 diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
-index ef63bc205756..a808894e8c76 100644
+index 01ccda48d8c5..a536dab3f8a7 100644
 --- a/include/media/hevc-ctrls.h
 +++ b/include/media/hevc-ctrls.h
 @@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code {
@@ -49,7 +49,7 @@ index ef63bc205756..a808894e8c76 100644
  	__u64	flags;
  };
  
-@@ -202,7 +207,10 @@ struct v4l2_ctrl_hevc_slice_params {
+@@ -200,7 +205,10 @@ struct v4l2_ctrl_hevc_slice_params {
  	__u8	ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
  	__u8	ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
  
@@ -72,7 +72,7 @@ Subject: [PATCH] HACK: media: uapi: hevc: tiles and num_slices
  1 file changed, 5 insertions(+), 2 deletions(-)
 
 diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
-index a808894e8c76..f1b8756521b9 100644
+index a536dab3f8a7..c8618dc68fc7 100644
 --- a/include/media/hevc-ctrls.h
 +++ b/include/media/hevc-ctrls.h
 @@ -83,7 +83,8 @@ struct v4l2_ctrl_hevc_sps {
@@ -85,7 +85,7 @@ index a808894e8c76..f1b8756521b9 100644
  
  	__u64	flags;
  };
-@@ -210,7 +211,9 @@ struct v4l2_ctrl_hevc_slice_params {
+@@ -208,7 +209,9 @@ struct v4l2_ctrl_hevc_slice_params {
  	__u16	short_term_ref_pic_set_size;
  	__u16	long_term_ref_pic_set_size;
  
@@ -2338,13 +2338,13 @@ index 000000000000..c3cceba837c2
 +		memset(hw_ps, 0, sizeof(*hw_ps));
 +
 +		for (i = 0; i <= sl_params->num_ref_idx_l0_active_minus1; i++) {
-+			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i]].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
++			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i]].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR),
 +				  REF_PIC_LONG_TERM_L0(i));
 +			WRITE_RPS(sl_params->ref_idx_l0[i], REF_PIC_IDX_L0(i));
 +		}
 +
 +		for (i = 0; i <= sl_params->num_ref_idx_l1_active_minus1; i++) {
-+			WRITE_RPS(!!(dpb[sl_params->ref_idx_l1[i]].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
++			WRITE_RPS(!!(dpb[sl_params->ref_idx_l1[i]].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR),
 +				  REF_PIC_LONG_TERM_L1(i));
 +			WRITE_RPS(sl_params->ref_idx_l1[i], REF_PIC_IDX_L1(i));
 +		}
@@ -2665,10 +2665,10 @@ index 265f5234f4eb..4319ee3ccbbc 100644
  #define RKVDEC_MODE_VP9					2
  #define RKVDEC_RPS_MODE					BIT(24)
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index 63385d92880e..7340972faead 100644
+index b6d5b26a93c2..7e8674e7d501 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -147,6 +147,58 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
+@@ -134,6 +134,58 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
  	},
  };
  
@@ -2727,9 +2727,9 @@ index 63385d92880e..7340972faead 100644
  static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
  	.ctrls = rkvdec_h264_ctrl_descs,
  	.num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
-@@ -199,6 +251,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+@@ -187,6 +239,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
- 		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
  		.decoded_fmts = rkvdec_h264_decoded_fmts,
+ 		.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
  	},
 +	{
 +		.fourcc = V4L2_PIX_FMT_HEVC_SLICE,
@@ -2750,10 +2750,10 @@ index 63385d92880e..7340972faead 100644
  		.fourcc = V4L2_PIX_FMT_VP9_FRAME,
  		.frmsize = {
 diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
-index f360f2ef799f..53719e825c70 100644
+index f02f79c405f0..d6222a2588be 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.h
 +++ b/drivers/staging/media/rkvdec/rkvdec.h
-@@ -131,6 +131,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
+@@ -133,6 +133,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
  void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
  
  extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops;
@@ -2858,7 +2858,7 @@ index c3cceba837c2..5c341b5fa534 100644
  			       rkvdec->regs + RKVDEC_REG_H264_BASE_REFER(i));
  
 -		reg = RKVDEC_POC_REFER(i < sl_params->num_active_dpb_entries ? dpb[i].pic_order_cnt[0] : 0);
-+		reg = RKVDEC_POC_REFER(i < decode_params->num_active_dpb_entries ? dpb[i].pic_order_cnt[0] : 0);
++		reg = RKVDEC_POC_REFER(i < decode_params->num_active_dpb_entries ? dpb[i].pic_order_cnt_val : 0);
  		writel_relaxed(reg,
  			       rkvdec->regs + RKVDEC_REG_H264_POC_REFER0(i));
  	}
@@ -2874,10 +2874,10 @@ index c3cceba837c2..5c341b5fa534 100644
  			      V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS);
  	run->slices_params = ctrl ? ctrl->p_cur.p : NULL;
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index 7340972faead..722d9912b332 100644
+index 7e8674e7d501..0f877acfba27 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -163,6 +163,9 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
+@@ -150,6 +150,9 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
  	{
  		.cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX,
  	},
@@ -2894,18 +2894,54 @@ Date: Sat, 1 Aug 2020 12:24:58 +0000
 Subject: [PATCH] WIP: media: rkvdec: add HEVC format validation
 
 ---
- drivers/staging/media/rkvdec/rkvdec-hevc.c | 11 +++++++++++
+ drivers/staging/media/rkvdec/rkvdec-hevc.c | 55 +++++++++++++++++++++-
- drivers/staging/media/rkvdec/rkvdec.c      | 23 +++++++++++++++++++++-
+ drivers/staging/media/rkvdec/rkvdec.c      |  3 +-
- 2 files changed, 33 insertions(+), 1 deletion(-)
+ 2 files changed, 55 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
-index 5c341b5fa534..8ea2ad9f4f3a 100644
+index 5c341b5fa534..ac06039140bc 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
-@@ -2418,6 +2418,16 @@ static int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx,
+@@ -2208,13 +2208,13 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
+ 		memset(hw_ps, 0, sizeof(*hw_ps));
+ 
+ 		for (i = 0; i <= sl_params->num_ref_idx_l0_active_minus1; i++) {
+-			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i]].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR),
++			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i]].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
+ 				  REF_PIC_LONG_TERM_L0(i));
+ 			WRITE_RPS(sl_params->ref_idx_l0[i], REF_PIC_IDX_L0(i));
+ 		}
+ 
+ 		for (i = 0; i <= sl_params->num_ref_idx_l1_active_minus1; i++) {
+-			WRITE_RPS(!!(dpb[sl_params->ref_idx_l1[i]].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR),
++			WRITE_RPS(!!(dpb[sl_params->ref_idx_l1[i]].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
+ 				  REF_PIC_LONG_TERM_L1(i));
+ 			WRITE_RPS(sl_params->ref_idx_l1[i], REF_PIC_IDX_L1(i));
+ 		}
+@@ -2418,17 +2418,58 @@ static int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx,
  	return 0;
  }
  
++static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx,
++				    const struct v4l2_ctrl_hevc_sps *sps)
++{
++	if (sps->chroma_format_idc > 1)
++		/* Only 4:0:0 and 4:2:0 are supported */
++		return -EINVAL;
++	if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
++		/* Luma and chroma bit depth mismatch */
++		return -EINVAL;
++	if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
++		/* Only 8-bit and 10-bit is supported */
++		return -EINVAL;
++
++	if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width ||
++	    sps->pic_height_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.height)
++		return -EINVAL;
++
++	return 0;
++}
++
 +static u32 rkvdec_hevc_valid_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
 +{
 +	const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
@@ -2919,46 +2955,53 @@ index 5c341b5fa534..8ea2ad9f4f3a 100644
  static int rkvdec_hevc_start(struct rkvdec_ctx *ctx)
  {
  	struct rkvdec_dev *rkvdec = ctx->dev;
-@@ -2521,6 +2531,7 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx)
+ 	struct rkvdec_hevc_priv_tbl *priv_tbl;
+ 	struct rkvdec_hevc_ctx *hevc_ctx;
++	struct v4l2_ctrl *ctrl;
+ 	int ret;
  
++	ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
++			      V4L2_CID_MPEG_VIDEO_HEVC_SPS);
++	if (!ctrl)
++		return -EINVAL;
++
++	ret = rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps);
++	if (ret)
++		return ret;
++
+ 	hevc_ctx = kzalloc(sizeof(*hevc_ctx), GFP_KERNEL);
+ 	if (!hevc_ctx)
+ 		return -ENOMEM;
+ 
++
+ 	priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl),
+ 				      &hevc_ctx->priv_tbl.dma, GFP_KERNEL);
+ 	if (!priv_tbl) {
+@@ -2519,9 +2560,19 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx)
+ 	return 0;
+ }
+ 
++static int rkvdec_hevc_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
++{
++	if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_SPS)
++		return rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps);
++
++	return 0;
++}
++
  const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops = {
  	.adjust_fmt = rkvdec_hevc_adjust_fmt,
-+	.valid_fmt = rkvdec_hevc_valid_fmt,
  	.start = rkvdec_hevc_start,
  	.stop = rkvdec_hevc_stop,
  	.run = rkvdec_hevc_run,
++	.try_ctrl = rkvdec_hevc_try_ctrl,
++	.valid_fmt = rkvdec_hevc_valid_fmt,
+ };
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index 722d9912b332..62e728777cd4 100644
+index 0f877acfba27..9f6a619499ab 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -79,6 +79,26 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
+@@ -74,7 +74,7 @@ static int rkvdec_s_ctrl(struct v4l2_ctrl *ctrl)
- 		if (width > ctx->coded_fmt.fmt.pix_mp.width ||
- 		    height > ctx->coded_fmt.fmt.pix_mp.height)
- 			return -EINVAL;
-+	} else if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_SPS) {
-+		const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
-+
-+		if (sps->chroma_format_idc > 1)
-+			/* Only 4:0:0 and 4:2:0 are supported */
-+			return -EINVAL;
-+		if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
-+			/* Luma and chroma bit depth mismatch */
-+			return -EINVAL;
-+		if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
-+			/* Only 8-bit and 10-bit is supported */
-+			return -EINVAL;
-+
-+		if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
-+			/* Only current valid format */
-+			return -EINVAL;
-+
-+		if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width ||
-+		    sps->pic_height_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.height)
-+			return -EINVAL;
- 	}
- 	return 0;
- }
-@@ -87,7 +107,7 @@ static int rkvdec_s_ctrl(struct v4l2_ctrl *ctrl)
  {
  	struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
  
@@ -2967,7 +3010,7 @@ index 722d9912b332..62e728777cd4 100644
  		ctx->valid_fmt = rkvdec_valid_fmt(ctx, ctrl);
  		if (ctx->valid_fmt) {
  			struct v4l2_pix_format_mplane *pix_mp;
-@@ -156,6 +176,7 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
+@@ -143,6 +143,7 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
  	},
  	{
  		.cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_SPS,
@@ -2988,7 +3031,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
-index 8ea2ad9f4f3a..58ae8a1a4ff3 100644
+index ac06039140bc..99bfb937facc 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
 @@ -2165,9 +2165,9 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
@@ -3015,7 +3058,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
-index 58ae8a1a4ff3..55bf61a84165 100644
+index 99bfb937facc..b5bb4c083dbc 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
 @@ -2196,8 +2196,8 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
@@ -3053,11 +3096,11 @@ Subject: [PATCH] WIP: media: rkvdec: hevc: implement lowdelay
 
 Signed-off-by: Alex Bee <knaerzche@gmail.com>
 ---
- drivers/staging/media/rkvdec/rkvdec-hevc.c | 11 +++++++++--
+ drivers/staging/media/rkvdec/rkvdec-hevc.c | 12 ++++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
+ 1 file changed, 10 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
-index 55bf61a84165..db33f9d357cf 100644
+index b5bb4c083dbc..8467084165df 100644
 --- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
 +++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
 @@ -2187,6 +2187,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
@@ -3076,13 +3119,14 @@ index 55bf61a84165..db33f9d357cf 100644
  
  		hw_ps = &priv_tbl->rps[j];
  		memset(hw_ps, 0, sizeof(*hw_ps));
-@@ -2211,18 +2213,23 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
+@@ -2211,18 +2213,24 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
- 			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
+ 			WRITE_RPS(!!(dpb[sl_params->ref_idx_l0[i]].flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
  				  REF_PIC_LONG_TERM_L0(i));
  			WRITE_RPS(sl_params->ref_idx_l0[i], REF_PIC_IDX_L0(i));
 +
-+			if (dpb[sl_params->ref_idx_l0[i]].pic_order_cnt[0] > sl_params->slice_pic_order_cnt)
++			if (dpb[sl_params->ref_idx_l0[i]].pic_order_cnt_val > sl_params->slice_pic_order_cnt)
 +				lowdelay = 0;
++
  		}
  
  		for (i = 0; i <= sl_params->num_ref_idx_l1_active_minus1; i++) {
@@ -3090,7 +3134,7 @@ index 55bf61a84165..db33f9d357cf 100644
  				  REF_PIC_LONG_TERM_L1(i));
  			WRITE_RPS(sl_params->ref_idx_l1[i], REF_PIC_IDX_L1(i));
 +
-+			if (dpb[sl_params->ref_idx_l1[i]].pic_order_cnt[0] > sl_params->slice_pic_order_cnt)
++			if (dpb[sl_params->ref_idx_l1[i]].pic_order_cnt_val > sl_params->slice_pic_order_cnt)
 +				lowdelay = 0;
  		}
  
@@ -3120,12 +3164,12 @@ the better soultion than duplicatiing code for every newly added IP.
 
 Signed-off-by: Alex Bee <knaerzche@gmail.com>
 ---
- drivers/staging/media/rkvdec/rkvdec.c | 104 ++++++++++++++++++--------
+ drivers/staging/media/rkvdec/rkvdec.c | 105 ++++++++++++++++++--------
  drivers/staging/media/rkvdec/rkvdec.h |  10 +++
- 2 files changed, 84 insertions(+), 30 deletions(-)
+ 2 files changed, 85 insertions(+), 30 deletions(-)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index 62e728777cd4..a5552ccc9460 100644
+index 9f6a619499ab..2d1a388e20fe 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
 @@ -14,6 +14,7 @@
@@ -3136,53 +3180,53 @@ index 62e728777cd4..a5552ccc9460 100644
  #include <linux/platform_device.h>
  #include <linux/pm.h>
  #include <linux/pm_runtime.h>
-@@ -260,21 +261,6 @@ static const struct rkvdec_ctrls rkvdec_vp9_ctrls = {
+@@ -227,6 +228,22 @@ static const u32 rkvdec_vp9_decoded_fmts[] = {
  };
  
  static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
--	{
--		.fourcc = V4L2_PIX_FMT_H264_SLICE,
--		.frmsize = {
--			.min_width = 48,
--			.max_width = 4096,
--			.step_width = 16,
--			.min_height = 48,
--			.max_height = 2304,
--			.step_height = 16,
--		},
--		.ctrls = &rkvdec_h264_ctrls,
--		.ops = &rkvdec_h264_fmt_ops,
--		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
--		.decoded_fmts = rkvdec_h264_decoded_fmts,
--	},
- 	{
- 		.fourcc = V4L2_PIX_FMT_HEVC_SLICE,
- 		.frmsize = {
-@@ -289,6 +275,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
- 		.ops = &rkvdec_hevc_fmt_ops,
- 		.num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
- 		.decoded_fmts = rkvdec_hevc_decoded_fmts,
-+		.capability = RKVDEC_CAPABILITY_HEVC,
-+	},
 +	{
-+		.fourcc = V4L2_PIX_FMT_H264_SLICE,
++		.fourcc = V4L2_PIX_FMT_HEVC_SLICE,
 +		.frmsize = {
-+			.min_width = 48,
++			.min_width = 64,
 +			.max_width = 4096,
-+			.step_width = 16,
++			.step_width = 64,
-+			.min_height = 48,
++			.min_height = 64,
 +			.max_height = 2304,
 +			.step_height = 16,
 +		},
-+		.ctrls = &rkvdec_h264_ctrls,
++		.ctrls = &rkvdec_hevc_ctrls,
-+		.ops = &rkvdec_h264_fmt_ops,
++		.ops = &rkvdec_hevc_fmt_ops,
-+		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
++		.num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
-+		.decoded_fmts = rkvdec_h264_decoded_fmts,
++		.decoded_fmts = rkvdec_hevc_decoded_fmts,
++		.capability = RKVDEC_CAPABILITY_HEVC,
++	},
+ 	{
+ 		.fourcc = V4L2_PIX_FMT_H264_SLICE,
+ 		.frmsize = {
+@@ -242,21 +259,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+ 		.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
+ 		.decoded_fmts = rkvdec_h264_decoded_fmts,
+ 		.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
+-	},
+-	{
+-		.fourcc = V4L2_PIX_FMT_HEVC_SLICE,
+-		.frmsize = {
+-			.min_width = 64,
+-			.max_width = 4096,
+-			.step_width = 64,
+-			.min_height = 64,
+-			.max_height = 2304,
+-			.step_height = 16,
+-		},
+-		.ctrls = &rkvdec_hevc_ctrls,
+-		.ops = &rkvdec_hevc_fmt_ops,
+-		.num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
+-		.decoded_fmts = rkvdec_hevc_decoded_fmts,
 +		.capability = RKVDEC_CAPABILITY_H264,
  	},
  	{
  		.fourcc = V4L2_PIX_FMT_VP9_FRAME,
-@@ -304,16 +307,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+@@ -272,16 +275,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
  		.ops = &rkvdec_vp9_fmt_ops,
  		.num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
  		.decoded_fmts = rkvdec_vp9_decoded_fmts,
@@ -3217,7 +3261,7 @@ index 62e728777cd4..a5552ccc9460 100644
  			return &rkvdec_coded_fmts[i];
  	}
  
-@@ -336,7 +354,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
+@@ -304,7 +322,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
  {
  	struct v4l2_format *f = &ctx->coded_fmt;
  
@@ -3226,7 +3270,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc);
  
  	f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
-@@ -363,11 +381,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv,
+@@ -331,11 +349,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv,
  				  struct v4l2_frmsizeenum *fsize)
  {
  	const struct rkvdec_coded_fmt_desc *fmt;
@@ -3241,7 +3285,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	if (!fmt)
  		return -EINVAL;
  
-@@ -438,10 +458,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv,
+@@ -406,10 +426,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv,
  	struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv);
  	const struct rkvdec_coded_fmt_desc *desc;
  
@@ -3256,7 +3300,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	}
  
  	v4l2_apply_frmsize_constraints(&pix_mp->width,
-@@ -519,7 +540,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
+@@ -487,7 +508,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
  	if (ret)
  		return ret;
  
@@ -3266,7 +3310,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	if (!desc)
  		return -EINVAL;
  	ctx->coded_fmt_desc = desc;
-@@ -567,7 +589,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv,
+@@ -538,7 +560,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv,
  static int rkvdec_enum_output_fmt(struct file *file, void *priv,
  				  struct v4l2_fmtdesc *f)
  {
@@ -3278,7 +3322,7 @@ index 62e728777cd4..a5552ccc9460 100644
  		return -EINVAL;
  
  	f->pixelformat = rkvdec_coded_fmts[f->index].fourcc;
-@@ -975,14 +1000,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
+@@ -946,14 +971,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
  	int ret;
  
  	for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++)
@@ -3300,7 +3344,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	}
  
  	ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
-@@ -1186,8 +1214,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
+@@ -1157,8 +1185,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
  	}
  }
  
@@ -3319,7 +3363,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	{ /* sentinel */ }
  };
  MODULE_DEVICE_TABLE(of, of_rkvdec_match);
-@@ -1199,6 +1236,7 @@ static const char * const rkvdec_clk_names[] = {
+@@ -1170,6 +1207,7 @@ static const char * const rkvdec_clk_names[] = {
  static int rkvdec_probe(struct platform_device *pdev)
  {
  	struct rkvdec_dev *rkvdec;
@@ -3327,7 +3371,7 @@ index 62e728777cd4..a5552ccc9460 100644
  	unsigned int i;
  	int ret, irq;
  
-@@ -1224,6 +1262,12 @@ static int rkvdec_probe(struct platform_device *pdev)
+@@ -1195,6 +1233,13 @@ static int rkvdec_probe(struct platform_device *pdev)
  	if (ret)
  		return ret;
  
@@ -3336,12 +3380,13 @@ index 62e728777cd4..a5552ccc9460 100644
 +		return -EINVAL;
 +
 +	rkvdec->capabilities = variant->capabilities;
++
 +
  	rkvdec->regs = devm_platform_ioremap_resource(pdev, 0);
  	if (IS_ERR(rkvdec->regs))
  		return PTR_ERR(rkvdec->regs);
 diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
-index 53719e825c70..d2096ec351e1 100644
+index d6222a2588be..ad8e83884121 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.h
 +++ b/drivers/staging/media/rkvdec/rkvdec.h
 @@ -29,6 +29,10 @@
@@ -3366,15 +3411,15 @@ index 53719e825c70..d2096ec351e1 100644
  struct rkvdec_coded_fmt_ops {
  	int (*adjust_fmt)(struct rkvdec_ctx *ctx,
  			  struct v4l2_format *f);
-@@ -89,6 +97,7 @@ struct rkvdec_coded_fmt_desc {
+@@ -91,6 +99,7 @@ struct rkvdec_coded_fmt_desc {
- 	const struct rkvdec_coded_fmt_ops *ops;
  	unsigned int num_decoded_fmts;
  	const u32 *decoded_fmts;
+ 	u32 subsystem_flags;
 +	unsigned int capability;
  };
  
  struct rkvdec_dev {
-@@ -103,6 +112,7 @@ struct rkvdec_dev {
+@@ -105,6 +114,7 @@ struct rkvdec_dev {
  	struct delayed_work watchdog_work;
  	struct reset_control *rstc;
  	u8 reset_mask;
@@ -3397,10 +3442,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 8 insertions(+)
 
 diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
-index a5552ccc9460..5fc6d30fd7c4 100644
+index 2d1a388e20fe..c2de6fcb6419 100644
 --- a/drivers/staging/media/rkvdec/rkvdec.c
 +++ b/drivers/staging/media/rkvdec/rkvdec.c
-@@ -1220,11 +1220,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
+@@ -1191,11 +1191,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
  			   RKVDEC_CAPABILITY_VP9
  };
  
@@ -3432,10 +3477,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 20 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index eb9d3bdf1d5e..2c1f0a7e0603 100644
+index 7b2cde230b87..59fba3ac6aae 100644
 --- a/arch/arm/boot/dts/rk3288.dtsi
 +++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1247,6 +1247,25 @@ vpu_mmu: iommu@ff9a0800 {
+@@ -1248,6 +1248,25 @@ vpu_mmu: iommu@ff9a0800 {
  		power-domains = <&power RK3288_PD_VIDEO>;
  	};
  
@@ -3461,7 +3506,7 @@ index eb9d3bdf1d5e..2c1f0a7e0603 100644
  	hevc_mmu: iommu@ff9c0440 {
  		compatible = "rockchip,iommu";
  		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
-@@ -1254,7 +1273,7 @@ hevc_mmu: iommu@ff9c0440 {
+@@ -1255,7 +1274,7 @@ hevc_mmu: iommu@ff9c0440 {
  		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
  		clock-names = "aclk", "iface";
  		#iommu-cells = <0>;
@@ -3470,3 +3515,27 @@ index eb9d3bdf1d5e..2c1f0a7e0603 100644
  	};
  
  	gpu: gpu@ffa30000 {
+
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Alex Bee <knaerzche@gmail.com>
+Date: Sun, 3 Apr 2022 14:39:14 +0200
+Subject: [PATCH] WIP: media: rkvdec: hevc: Use chroma_format_idc from
+ v4l2_ctrl_hevc_sps
+
+---
+ drivers/staging/media/rkvdec/rkvdec-hevc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
+index 8467084165df..a7dc8262f6d7 100644
+--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
++++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
+@@ -2048,7 +2048,7 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
+ 	/* write sps */
+ 	WRITE_PPS(sps->video_parameter_set_id, VIDEO_PARAMETER_SET_ID);
+ 	WRITE_PPS(sps->seq_parameter_set_id, SEQ_PARAMETER_SET_ID);
+-	WRITE_PPS(1, CHROMA_FORMAT_IDC);
++	WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
+ 	WRITE_PPS(sps->pic_width_in_luma_samples, PIC_WIDTH_IN_LUMA_SAMPLES);
+ 	WRITE_PPS(sps->pic_height_in_luma_samples, PIC_HEIGHT_IN_LUMA_SAMPLES);
+ 	WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA);

patch/kernel/archive/media-5.19/217-linux-2001-v4l2-wip-iep-driver.patch

@@ -96,23 +96,46 @@ Subject: [PATCH] media: rockchip: Add Rockchip IEP driver
 
 Signed-off-by: Alex Bee <knaerzche@gmail.com>
 ---
- drivers/media/platform/Makefile               |    1 +
+ drivers/media/platform/rockchip/Kconfig       |    1 +
+ drivers/media/platform/rockchip/Makefile      |    1 +
+ drivers/media/platform/rockchip/iep/Kconfig   |   16 +
  drivers/media/platform/rockchip/iep/Makefile  |    5 +
  .../media/platform/rockchip/iep/iep-regs.h    |  291 +++++
- .../media/platform/rockchip/iep/Kconfig       |   16 +
  drivers/media/platform/rockchip/iep/iep.c     | 1089 +++++++++++++++++
  drivers/media/platform/rockchip/iep/iep.h     |  112 ++
- 6 files changed, 1512 insertions(+)
+ 7 files changed, 1515 insertions(+)
+ create mode 100644 drivers/media/platform/rockchip/iep/Kconfig
  create mode 100644 drivers/media/platform/rockchip/iep/Makefile
  create mode 100644 drivers/media/platform/rockchip/iep/iep-regs.h
  create mode 100644 drivers/media/platform/rockchip/iep/iep.c
  create mode 100644 drivers/media/platform/rockchip/iep/iep.h
 
-diff --git /dev/null b/drivers/media/platform/rockchip/iep/Kconfig
+diff --git a/drivers/media/platform/rockchip/Kconfig b/drivers/media/platform/rockchip/Kconfig
-index cf4adc64c953..79b850a71449 100644
+index b41d3960c1b4..9ff362805ded 100644
+--- a/drivers/media/platform/rockchip/Kconfig
++++ b/drivers/media/platform/rockchip/Kconfig
+@@ -2,5 +2,6 @@
+ 
+ comment "Rockchip media platform drivers"
+ 
++source "drivers/media/platform/rockchip/iep/Kconfig"
+ source "drivers/media/platform/rockchip/rga/Kconfig"
+ source "drivers/media/platform/rockchip/rkisp1/Kconfig"
+diff --git a/drivers/media/platform/rockchip/Makefile b/drivers/media/platform/rockchip/Makefile
+index 4f782b876ac9..c075ecc2fa14 100644
+--- a/drivers/media/platform/rockchip/Makefile
++++ b/drivers/media/platform/rockchip/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0-only
++obj-y += iep/
+ obj-y += rga/
+ obj-y += rkisp1/
+diff --git a/drivers/media/platform/rockchip/iep/Kconfig b/drivers/media/platform/rockchip/iep/Kconfig
+new file mode 100644
+index 000000000000..d95155a95133
 --- /dev/null
 +++ b/drivers/media/platform/rockchip/iep/Kconfig
-@@ -0,0 +1,16 @@ config VIDEO_RENESAS_VSP1
+@@ -0,0 +1,16 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 + 
 +config VIDEO_ROCKCHIP_IEP
@@ -129,25 +152,6 @@ index cf4adc64c953..79b850a71449 100644
 +	  images. The driver currently implements YUV deinterlacing only.
 +	  To compile this driver as a module, choose M here: the module
 +	  will be called rockchip-iep
-diff --git a/drivers/media/platform/rockchip/Kconfig b/drivers/media/platform/rockchip/Kconfig
---- a/drivers/media/platform/rockchip/Kconfig	2022-04-24 04:43:48.781195873 +0000
-+++ b/drivers/media/platform/rockchip/Kconfig	2022-04-24 04:39:04.394777975 +0000
-@@ -2,5 +2,6 @@
- 
- comment "Rockchip media platform drivers"
- 
-+source "drivers/media/platform/rockchip/iep/Kconfig"
- source "drivers/media/platform/rockchip/rga/Kconfig"
- source "drivers/media/platform/rockchip/rkisp1/Kconfig"
-diff --git a/drivers/media/platform/rockchip/Makefile b/drivers/media/platform/rockchip/Makefile
-index a148553babfc..08fcccdbbb49 100644
---- a/drivers/media/platform/rockchip/Makefile
-+++ b/drivers/media/platform/rockchip/Makefile
-@@ -1,3 +1,4 @@
- # SPDX-License-Identifier: GPL-2.0-only
-+obj-y += iep/
- obj-y += rga/
- obj-y += rkisp1/
 diff --git a/drivers/media/platform/rockchip/iep/Makefile b/drivers/media/platform/rockchip/iep/Makefile
 new file mode 100644
 index 000000000000..5c89b3277469
@@ -1683,7 +1687,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 22 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
-index e4c6a33b4b7e..54a3d0022363 100644
+index e4977669b16a..6c0cbc9cea61 100644
 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
 @@ -760,6 +760,28 @@ vop_mmu: iommu@ff373f00 {
@@ -1727,10 +1731,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 12 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-index b39a3390bd7d..f9769857d147 100644
+index 037732441f92..d90c90406a49 100644
 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-@@ -1346,14 +1346,25 @@ vdec_mmu: iommu@ff660480 {
+@@ -1367,14 +1367,25 @@ vdec_mmu: iommu@ff660480 {
  		#iommu-cells = <0>;
  	};
  
@@ -1769,11 +1773,11 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
  1 file changed, 12 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 2c1f0a7e0603..afcc4d9ec746 100644
+index 59fba3ac6aae..06545f423de2 100644
 --- a/arch/arm/boot/dts/rk3288.dtsi
 +++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -983,14 +983,25 @@ crypto: cypto-controller@ff8a0000 {
+@@ -984,14 +984,25 @@ crypto: crypto@ff8a0000 {
- 		status = "okay";
+ 		reset-names = "crypto-rst";
  	};
  
 +	iep: iep@ff90000 {

patch/kernel/archive/media-6.0/091-rk356x-dtsi.patch

@@ -0,0 +1,38 @@
+--- v6.0-rc3/arch/arm64/boot/dts/rockchip/rk356x.dtsi
++++ v6.0-rc3/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+@@ -287,7 +287,7 @@
+ 			 <&cru ACLK_USB3OTG0>;
+ 		clock-names = "ref_clk", "suspend_clk",
+ 			      "bus_clk";
+-		dr_mode = "otg";
++		dr_mode = "host";
+ 		phy_type = "utmi_wide";
+ 		power-domains = <&power RK3568_PD_PIPE>;
+ 		resets = <&cru SRST_USB3OTG0>;
+@@ -1031,6 +1031,25 @@
+ 		status = "disabled";
+ 	};
+ 
++	i2s2_2ch: i2s@fe420000 {
++		compatible = "rockchip,rk3568-i2s-tdm";
++		reg = <0x0 0xfe420000 0x0 0x1000>;
++		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
++		clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
++		clock-names = "mclk_tx", "mclk_rx", "hclk";
++		dmas = <&dmac1 4>, <&dmac1 5>;
++		dma-names = "tx", "rx";
++		rockchip,cru = <&cru>;
++		rockchip,grf = <&grf>;
++		pinctrl-0 = <&i2s2m0_sclktx
++			     &i2s2m0_lrcktx
++			     &i2s2m0_sdi
++			     &i2s2m0_sdo>;
++		pinctrl-names = "default";
++		#sound-dai-cells = <0>;
++		status = "disabled";
++	};
++
+ 	i2s3_2ch: i2s@fe430000 {
+ 		compatible = "rockchip,rk3568-i2s-tdm";
+ 		reg = <0x0 0xfe430000 0x0 0x1000>;
+

patch/kernel/archive/media-6.0/110-v95-rk3566-firefly-roc-pc.patch

@@ -49,7 +49,7 @@ index 000000000..fac2db500
 +
 +	hdmi-con {
 +		compatible = "hdmi-connector";
-+		type = "c";
++		type = "a";
 +
 +		port {
 +			hdmi_con_in: endpoint {
@@ -682,7 +682,7 @@ index 000000000..fac2db500
 +&uart0 {
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&uart0_xfer>;
-+	status = "okay";
++	status = "disabled";
 +};
 +
 +&uart1 {

patch/kernel/archive/media-6.0/120-v95-rk3568-bpi-r2pro.patch

@@ -23,84 +23,7 @@
  	};
  
  	hdmi-con {
-@@ -76,9 +85,75 @@
+@@ -119,6 +128,28 @@
- 		vin-supply = <&dc_12v>;
- 	};
- 
--	vcc5v0_sys: vcc5v0-sys {
-+	vcc5v0_sys: vcc5v0_sys {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc5v0_sys";
-+		regulator-always-on;
-+		regulator-boot-on;
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&dc_12v>;
-+	};
-+
-+	pcie30_avdd0v9: pcie30-avdd0v9 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "pcie30_avdd0v9";
-+		regulator-always-on;
-+		regulator-boot-on;
-+		regulator-min-microvolt = <900000>;
-+		regulator-max-microvolt = <900000>;
-+		vin-supply = <&vcc3v3_sys>;
-+	};
-+
-+	pcie30_avdd1v8: pcie30-avdd1v8 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "pcie30_avdd1v8";
-+		regulator-always-on;
-+		regulator-boot-on;
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		vin-supply = <&vcc3v3_sys>;
-+	};
-+
-+	/* pi6c pcie clock generator feeds both ports */
-+	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc3v3_pcie";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		enable-active-high;
-+		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
-+		startup-delay-us = <200000>;
-+		vin-supply = <&vcc5v0_sys>;
-+	};
-+
-+	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
-+	vcc3v3_minipcie: vcc3v3-minipcie-regulator {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc3v3_minipcie";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		enable-active-high;
-+		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
-+		startup-delay-us = <50000>;
-+		vin-supply = <&vcc3v3_pi6c_05>;
-+	};
-+
-+	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
-+	vcc3v3_ngff: vcc3v3-ngff-regulator {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc3v3_ngff";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		enable-active-high;
-+		gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
-+		startup-delay-us = <50000>;
-+		vin-supply = <&vcc3v3_pi6c_05>;
-+	};
-+
-+	vbus: vbus {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vbus";
- 		regulator-always-on;
- 		regulator-boot-on;
- 		regulator-min-microvolt = <5000000>;
-@@ -119,6 +194,28 @@
  		regulator-max-microvolt = <5000000>;
  		vin-supply = <&vcc5v0_usb>;
  	};
@@ -129,7 +52,7 @@
  };
  
  &combphy0 {
-@@ -134,6 +231,39 @@
+@@ -134,6 +165,39 @@
  &combphy2 {
  	/* used for SATA */
  	status = "okay";
@@ -169,17 +92,10 @@
  };
  
  &gmac0 {
-@@ -209,18 +339,56 @@
+@@ -216,15 +280,49 @@
- 	};
- };
- 
-+&hdmi_sound {
-+	status = "okay";
-+};
-+
  &i2c0 {
  	status = "okay";
-+
+ 
 +
 +	vdd_cpu: regulator@1c {
 +		compatible = "tcs,tcs4525";
@@ -198,7 +114,7 @@
 +			regulator-off-in-suspend;
 +		};
 +	};
- 
++
  	rk809: pmic@20 {
  		compatible = "rockchip,rk809";
  		reg = <0x20>;
@@ -228,27 +144,21 @@
  		vcc1-supply = <&vcc3v3_sys>;
  		vcc2-supply = <&vcc3v3_sys>;
  		vcc3-supply = <&vcc3v3_sys>;
-@@ -424,12 +592,32 @@
+@@ -427,6 +525,10 @@
+ 					regulator-off-in-suspend;
  				};
  			};
- 		};
++		};
 +
 +		codec {
 +			mic-in-differential;
-+		};
+ 		};
  	};
  };
+@@ -458,6 +560,18 @@
+ 	status = "okay";
+ };
  
- &i2c5 {
- 	/* pin 3 (SDA) + 4 (SCL) of header con2 */
- 	status = "disabled";
-+};
-+
-+&i2s0_8ch {
-+	/* hdmi sound */
-+	status = "okay";
-+};
-+
 +&i2s1_8ch {
 +	/* headphone */
 +	pinctrl-names = "default";
@@ -257,39 +167,14 @@
 +		     &i2s1m0_sdi0
 +		     &i2s1m0_sdo0>;
 +	rockchip,trcm-sync-tx-only;
-+	status = "okay";
- };
- 
- &mdio1 {
-@@ -439,6 +627,27 @@
- 	};
- };
- 
-+&pcie30phy {
-+	lane-map = /bits/ 8 <1 2>;
 +	status = "okay";
 +};
 +
-+&pcie3x1 {
-+	/* M.2 slot */
-+	num-lanes = <1>;
-+	reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
-+	vpcie3v3-supply = <&vcc3v3_ngff>;
-+	status = "okay";
-+};
 +
-+&pcie3x2 {
+ &mdio0 {
-+	/* mPCIe slot */
+ 	#address-cells = <1>;
-+	num-lanes = <1>;
+ 	#size-cells = <0>;
-+	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+@@ -543,6 +657,12 @@
-+	vpcie3v3-supply = <&vcc3v3_minipcie>;
-+	status = "okay";
-+};
-+
- &pinctrl {
- 	leds {
- 		blue_led_pin: blue-led-pin {
-@@ -463,6 +672,12 @@
  
  		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
  			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -302,24 +187,4 @@
  		};
  	};
  };
-@@ -628,6 +843,19 @@
- 	status = "okay";
- };
- 
-+&usb2phy1 {
-+	/* USB for PCIe/M2 */
-+	status = "okay";
-+};
-+
-+&usb2phy1_host {
-+	status = "okay";
-+};
-+
-+&usb2phy1_otg {
-+	status = "okay";
-+};
-+
- &vop {
- 	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- 	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
 

patch/kernel/archive/media-6.0/140-v95-rk3568-firefly-roc-pc.patch

@@ -51,7 +51,7 @@ index 000000000..fac2db500
 +
 +	hdmi-con {
 +		compatible = "hdmi-connector";
-+		type = "c";
++		type = "a";
 +
 +		port {
 +			hdmi_con_in: endpoint {

patch/kernel/archive/media-6.0/350-general-add-miniDP-dt-doc.patch

@@ -0,0 +1,73 @@
+diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml b/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
+new file mode 100644
+index 000000000000..8110fbe2ddc2
+--- /dev/null
++++ b/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
+@@ -0,0 +1,66 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/extcon/extcon-usbc-virtual-pd.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Type-C Virtual PD extcon
++
++maintainers:
++  - Jagan Teki <jagan@amarulasolutions.com>
++
++description: |
++  USB Type-C protocol supports various modes of operations includes PD,
++  USB3, and Altmode. If the platform design supports a Type-C connector
++  then configuring these modes can be done via enumeration.
++
++  However, there are some platforms that design these modes as separate
++  protocol connectors like design Display Port from on-chip USB3 controller.
++  So we can access Type-C Altmode Display Port via onboard Display Port
++  connector instead of a Type-C connector. These kinds of platforms require
++  an explicit extcon driver in order to handle Power Delivery and
++  Port Detection.
++
++properties:
++  compatible:
++    const: linux,extcon-usbc-virtual-pd
++
++  det-gpios:
++    description: Detect GPIO pin. Pin can be Display Port Detect or USB ID.
++    maxItems: 1
++
++  vpd-polarity:
++    description: USB Type-C Polarity. false for Normal and true for Flip.
++    type: boolean
++
++  vpd-super-speed:
++    description: USB Super Speed. false for USB2 and true for USB3.
++    type: boolean
++
++  vpd-data-role:
++    description: USB Data roles for Virtual Type-C.
++    $ref: /schemas/types.yaml#definitions/string
++
++    enum:
++      - host
++      - device
++      - display-port
++
++required:
++  - compatible
++  - det-gpios
++  - vpd-data-role
++
++additionalProperties: false
++
++examples:
++  - |
++    #include <dt-bindings/gpio/gpio.h>
++    #include <dt-bindings/pinctrl/rockchip.h>
++
++    virtual_pd: virtual-pd {
++        compatible = "linux,extcon-usbc-virtual-pd";
++        det-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
++        vpd-data-role = "display-port";
++        vpd-super-speed;
++    };
+

patch/kernel/archive/media-6.0/360-general-add-miniDP-virtual-extcon.patch

@@ -0,0 +1,337 @@
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 68f21d46614c..aeb161b19dae 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -6466,6 +6466,12 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4.git
+ F:	Documentation/filesystems/ext4/
+ F:	fs/ext4/
+ 
++EXTCON DRIVER FOR TYPE-C VIRTUAL PD
++M:	Jagan Teki <jagan@amarulasolutions.com>
++S:	Maintained
++F:	Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
++F:	drivers/extcon/extcon-usbc-virtual-pd.c
++
+ Extended Verification Module (EVM)
+ M:	Mimi Zohar <zohar@linux.ibm.com>
+ L:	linux-integrity@vger.kernel.org
+diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
+index aac507bff135..edd6c3c52699 100644
+--- a/drivers/extcon/Kconfig
++++ b/drivers/extcon/Kconfig
+@@ -186,4 +186,14 @@ config EXTCON_USBC_CROS_EC
+ 	  Say Y here to enable USB Type C cable detection extcon support when
+ 	  using Chrome OS EC based USB Type-C ports.
+ 
++config EXTCON_USBC_VIRTUAL_PD
++	tristate "Virtual Type-C PD EXTCON support"
++	depends on GPIOLIB || COMPILE_TEST
++	help
++	  Say Y here to enable Virtual Type-C PD extcon driver support, if
++	  hardware platform designed Type-C modes separately.
++
++	  Example, of designing Display Port separately from Type-C Altmode
++	  instead of accessing Altmode Display Port in Type-C connector.
++
+ endif
+diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile
+index 52096fd8a216..c35191eef0e1 100644
+--- a/drivers/extcon/Makefile
++++ b/drivers/extcon/Makefile
+@@ -25,3 +25,4 @@ obj-$(CONFIG_EXTCON_RT8973A)	+= extcon-rt8973a.o
+ obj-$(CONFIG_EXTCON_USB_GPIO)	+= extcon-usb-gpio.o
+ obj-$(CONFIG_EXTCON_USBC_CROS_EC) += extcon-usbc-cros-ec.o
+ obj-$(CONFIG_EXTCON_USBC_TUSB320) += extcon-usbc-tusb320.o
++obj-$(CONFIG_EXTCON_USBC_VIRTUAL_PD) += extcon-usbc-virtual-pd.o
+diff --git a/drivers/extcon/extcon-usbc-virtual-pd.c b/drivers/extcon/extcon-usbc-virtual-pd.c
+new file mode 100644
+index 000000000000..e0713670e33d
+--- /dev/null
++++ b/drivers/extcon/extcon-usbc-virtual-pd.c
+@@ -0,0 +1,285 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Type-C Virtual PD Extcon driver
++ *
++ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
++ * Copyright (c) 2019 Radxa Limited
++ * Copyright (c) 2019 Amarula Solutions(India)
++ */
++
++#include <linux/extcon-provider.h>
++#include <linux/gpio.h>
++#include <linux/interrupt.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of_gpio.h>
++#include <linux/platform_device.h>
++#include <linux/slab.h>
++
++static const unsigned int vpd_cable[] = {
++	EXTCON_USB,
++	EXTCON_USB_HOST,
++	EXTCON_DISP_DP,
++	EXTCON_NONE,
++};
++
++enum vpd_data_role {
++	DR_NONE,
++	DR_HOST,
++	DR_DEVICE,
++	DR_DISPLAY_PORT,
++};
++
++enum vpd_polarity {
++	POLARITY_NORMAL,
++	POLARITY_FLIP,
++};
++
++enum vpd_usb_ss {
++	USB_SS_USB2,
++	USB_SS_USB3,
++};
++
++struct vpd_extcon {
++	struct device *dev;
++	struct extcon_dev *extcon;
++	struct gpio_desc *det_gpio;
++
++	u8 polarity;
++	u8 usb_ss;
++	enum vpd_data_role data_role;
++
++	int irq;
++	bool enable_irq;
++	struct work_struct work;
++	struct delayed_work irq_work;
++};
++
++static void vpd_extcon_irq_work(struct work_struct *work)
++{
++	struct vpd_extcon *vpd = container_of(work, struct vpd_extcon, irq_work.work);
++	bool host_connected = false, device_connected = false, dp_connected = false;
++	union extcon_property_value property;
++	int det;
++
++	det = vpd->det_gpio ? gpiod_get_raw_value(vpd->det_gpio) : 0;
++	if (det) {
++		device_connected = (vpd->data_role == DR_DEVICE) ? true : false;
++		host_connected = (vpd->data_role == DR_HOST) ? true : false;
++		dp_connected = (vpd->data_role == DR_DISPLAY_PORT) ? true : false;
++	}
++
++	extcon_set_state(vpd->extcon, EXTCON_USB, host_connected);
++	extcon_set_state(vpd->extcon, EXTCON_USB_HOST, device_connected);
++	extcon_set_state(vpd->extcon, EXTCON_DISP_DP, dp_connected);
++
++	property.intval = vpd->polarity;
++	extcon_set_property(vpd->extcon, EXTCON_USB,
++			    EXTCON_PROP_USB_TYPEC_POLARITY, property);
++	extcon_set_property(vpd->extcon, EXTCON_USB_HOST,
++			    EXTCON_PROP_USB_TYPEC_POLARITY, property);
++	extcon_set_property(vpd->extcon, EXTCON_DISP_DP,
++			    EXTCON_PROP_USB_TYPEC_POLARITY, property);
++
++	property.intval = vpd->usb_ss;
++	extcon_set_property(vpd->extcon, EXTCON_USB,
++			    EXTCON_PROP_USB_SS, property);
++	extcon_set_property(vpd->extcon, EXTCON_USB_HOST,
++			    EXTCON_PROP_USB_SS, property);
++	extcon_set_property(vpd->extcon, EXTCON_DISP_DP,
++			    EXTCON_PROP_USB_SS, property);
++
++	extcon_sync(vpd->extcon, EXTCON_USB);
++	extcon_sync(vpd->extcon, EXTCON_USB_HOST);
++	extcon_sync(vpd->extcon, EXTCON_DISP_DP);
++}
++
++static irqreturn_t vpd_extcon_irq_handler(int irq, void *dev_id)
++{
++	struct vpd_extcon *vpd = dev_id;
++
++	schedule_delayed_work(&vpd->irq_work, msecs_to_jiffies(10));
++
++	return IRQ_HANDLED;
++}
++
++static enum vpd_data_role vpd_extcon_data_role(struct vpd_extcon *vpd)
++{
++	const char *const data_roles[] = {
++		[DR_NONE]		= "NONE",
++		[DR_HOST]		= "host",
++		[DR_DEVICE]		= "device",
++		[DR_DISPLAY_PORT]	= "display-port",
++	};
++	struct device *dev = vpd->dev;
++	int ret;
++	const char *dr;
++
++	ret = device_property_read_string(dev, "vpd-data-role", &dr);
++	if (ret < 0)
++		return DR_NONE;
++
++	ret = match_string(data_roles, ARRAY_SIZE(data_roles), dr);
++
++	return (ret < 0) ? DR_NONE : ret;
++}
++
++static int vpd_extcon_parse_dts(struct vpd_extcon *vpd)
++{
++	struct device *dev = vpd->dev;
++	bool val = false;
++	int ret;
++
++	val = device_property_read_bool(dev, "vpd-polarity");
++	if (val)
++		vpd->polarity = POLARITY_FLIP;
++	else
++		vpd->polarity = POLARITY_NORMAL;
++
++	val = device_property_read_bool(dev, "vpd-super-speed");
++	if (val)
++		vpd->usb_ss = USB_SS_USB3;
++	else
++		vpd->usb_ss = USB_SS_USB2;
++
++	vpd->data_role = vpd_extcon_data_role(vpd);
++
++	vpd->det_gpio = devm_gpiod_get_optional(dev, "det", GPIOD_OUT_LOW);
++	if (IS_ERR(vpd->det_gpio)) {
++		ret = PTR_ERR(vpd->det_gpio);
++		dev_warn(dev, "failed to get det gpio: %d\n", ret);
++		return ret;
++	}
++
++	vpd->irq = gpiod_to_irq(vpd->det_gpio);
++	if (vpd->irq < 0) {
++		dev_err(dev, "failed to get irq for gpio: %d\n", vpd->irq);
++		return vpd->irq;
++	}
++
++	ret = devm_request_threaded_irq(dev, vpd->irq, NULL,
++					vpd_extcon_irq_handler,
++					IRQF_TRIGGER_FALLING |
++					IRQF_TRIGGER_RISING | IRQF_ONESHOT,
++					NULL, vpd);
++	if (ret)
++		dev_err(dev, "failed to request gpio irq\n");
++
++	return ret;
++}
++
++static int vpd_extcon_probe(struct platform_device *pdev)
++{
++	struct vpd_extcon *vpd;
++	struct device *dev = &pdev->dev;
++	int ret;
++
++	vpd = devm_kzalloc(dev, sizeof(*vpd), GFP_KERNEL);
++	if (!vpd)
++		return -ENOMEM;
++
++	vpd->dev = dev;
++	ret = vpd_extcon_parse_dts(vpd);
++	if (ret)
++		return ret;
++
++	INIT_DELAYED_WORK(&vpd->irq_work, vpd_extcon_irq_work);
++
++	vpd->extcon = devm_extcon_dev_allocate(dev, vpd_cable);
++	if (IS_ERR(vpd->extcon)) {
++		dev_err(dev, "allocat extcon failed\n");
++		return PTR_ERR(vpd->extcon);
++	}
++
++	ret = devm_extcon_dev_register(dev, vpd->extcon);
++	if (ret) {
++		dev_err(dev, "register extcon failed: %d\n", ret);
++		return ret;
++	}
++
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB,
++				       EXTCON_PROP_USB_VBUS);
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
++				       EXTCON_PROP_USB_VBUS);
++
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB,
++				       EXTCON_PROP_USB_TYPEC_POLARITY);
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
++				       EXTCON_PROP_USB_TYPEC_POLARITY);
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB,
++				       EXTCON_PROP_USB_SS);
++	extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
++				       EXTCON_PROP_USB_SS);
++
++	extcon_set_property_capability(vpd->extcon, EXTCON_DISP_DP,
++				       EXTCON_PROP_USB_SS);
++	extcon_set_property_capability(vpd->extcon, EXTCON_DISP_DP,
++				       EXTCON_PROP_USB_TYPEC_POLARITY);
++
++	platform_set_drvdata(pdev, vpd);
++
++	vpd_extcon_irq_work(&vpd->irq_work.work);
++
++	return 0;
++}
++
++static int vpd_extcon_remove(struct platform_device *pdev)
++{
++	struct vpd_extcon *vpd = platform_get_drvdata(pdev);
++
++	cancel_delayed_work_sync(&vpd->irq_work);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM_SLEEP
++static int vpd_extcon_suspend(struct device *dev)
++{
++	struct vpd_extcon *vpd = dev_get_drvdata(dev);
++
++	if (!vpd->enable_irq) {
++		disable_irq_nosync(vpd->irq);
++		vpd->enable_irq = true;
++	}
++
++	return 0;
++}
++
++static int vpd_extcon_resume(struct device *dev)
++{
++	struct vpd_extcon *vpd = dev_get_drvdata(dev);
++
++	if (vpd->enable_irq) {
++		enable_irq(vpd->irq);
++		vpd->enable_irq = false;
++	}
++
++	return 0;
++}
++#endif
++
++static SIMPLE_DEV_PM_OPS(vpd_extcon_pm_ops,
++			 vpd_extcon_suspend, vpd_extcon_resume);
++
++static const struct of_device_id vpd_extcon_dt_match[] = {
++	{ .compatible = "linux,extcon-usbc-virtual-pd", },
++	{ /* sentinel */ }
++};
++
++static struct platform_driver vpd_extcon_driver = {
++	.probe		= vpd_extcon_probe,
++	.remove		= vpd_extcon_remove,
++	.driver		= {
++		.name	= "extcon-usbc-virtual-pd",
++		.pm	= &vpd_extcon_pm_ops,
++		.of_match_table = vpd_extcon_dt_match,
++	},
++};
++
++module_platform_driver(vpd_extcon_driver);
++
++MODULE_AUTHOR("Jagan Teki <jagan@amarulasolutions.com>");
++MODULE_DESCRIPTION("Type-C Virtual PD extcon driver");
++MODULE_LICENSE("GPL v2");
+

patch/kernel/archive/media-6.0/400-general-bluetooth-02-add-support-for-RTL8723CS.patch

@@ -0,0 +1,266 @@
+From 26e61cffb09c1f5519a4eeb9d9e99239d58b6c2d Mon Sep 17 00:00:00 2001
+From: Ondrej Jirman <megous@megous.com>
+Date: Thu, 1 Jul 2021 11:22:23 +0200
+Subject: [PATCH 302/467] Bluetooth: btrtl: add support for the RTL8723CS
+
+The Realtek RTL8723CS is SDIO WiFi chip. It also contains a Bluetooth
+module which is connected via UART to the host.
+
+It shares lmp subversion with 8703B, so Realtek's userspace
+initialization tool (rtk_hciattach) differentiates varieties of RTL8723CS
+(CG, VF, XX) with RTL8703B using vendor's command to read chip type.
+
+Also this chip declares support for some features it doesn't support
+so add a quirk to indicate that these features are broken.
+
+Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Ondrej Jirman <megous@megous.com>
+---
+ drivers/bluetooth/btrtl.c | 119 +++++++++++++++++++++++++++++++++++++-
+ drivers/bluetooth/btrtl.h |   5 ++
+ 2 files changed, 121 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c
+index 1f8afa024..fd293a9c4 100644
+--- a/drivers/bluetooth/btrtl.c
++++ b/drivers/bluetooth/btrtl.c
+@@ -17,7 +17,12 @@
+ 
+ #define VERSION "0.1"
+ 
++#define RTL_CHIP_8723CS_CG	3
++#define RTL_CHIP_8723CS_VF	4
++#define RTL_CHIP_8723CS_XX	5
+ #define RTL_EPATCH_SIGNATURE	"Realtech"
++#define RTL_ROM_LMP_3499	0x3499
++#define RTL_ROM_LMP_8703B	0x8703
+ #define RTL_ROM_LMP_8723A	0x1200
+ #define RTL_ROM_LMP_8723B	0x8723
+ #define RTL_ROM_LMP_8821A	0x8821
+@@ -30,6 +35,7 @@
+ #define IC_MATCH_FL_HCIREV	(1 << 1)
+ #define IC_MATCH_FL_HCIVER	(1 << 2)
+ #define IC_MATCH_FL_HCIBUS	(1 << 3)
++#define IC_MATCH_FL_CHIP_TYPE	(1 << 4)
+ #define IC_INFO(lmps, hcir, hciv, bus) \
+ 	.match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_HCIREV | \
+ 		       IC_MATCH_FL_HCIVER | IC_MATCH_FL_HCIBUS, \
+@@ -57,6 +63,7 @@ struct id_table {
+ 	__u16 hci_rev;
+ 	__u8 hci_ver;
+ 	__u8 hci_bus;
++	__u8 chip_type;
+ 	bool config_needed;
+ 	bool has_rom_version;
+ 	char *fw_name;
+@@ -96,6 +103,39 @@ static const struct id_table ic_id_table[] = {
+ 	  .fw_name  = "rtl_bt/rtl8723b_fw.bin",
+ 	  .cfg_name = "rtl_bt/rtl8723b_config" },
+ 
++	/* 8723CS-CG */
++	{ .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
++			 IC_MATCH_FL_HCIBUS,
++	  .lmp_subver = RTL_ROM_LMP_8703B,
++	  .chip_type = RTL_CHIP_8723CS_CG,
++	  .hci_bus = HCI_UART,
++	  .config_needed = true,
++	  .has_rom_version = true,
++	  .fw_name  = "rtl_bt/rtl8723cs_cg_fw.bin",
++	  .cfg_name = "rtl_bt/rtl8723cs_cg_config" },
++
++	/* 8723CS-VF */
++	{ .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
++			 IC_MATCH_FL_HCIBUS,
++	  .lmp_subver = RTL_ROM_LMP_8703B,
++	  .chip_type = RTL_CHIP_8723CS_VF,
++	  .hci_bus = HCI_UART,
++	  .config_needed = true,
++	  .has_rom_version = true,
++	  .fw_name  = "rtl_bt/rtl8723cs_vf_fw.bin",
++	  .cfg_name = "rtl_bt/rtl8723cs_vf_config" },
++
++	/* 8723CS-XX */
++	{ .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
++			 IC_MATCH_FL_HCIBUS,
++	  .lmp_subver = RTL_ROM_LMP_8703B,
++	  .chip_type = RTL_CHIP_8723CS_XX,
++	  .hci_bus = HCI_UART,
++	  .config_needed = true,
++	  .has_rom_version = true,
++	  .fw_name  = "rtl_bt/rtl8723cs_xx_fw.bin",
++	  .cfg_name = "rtl_bt/rtl8723cs_xx_config" },
++
+ 	/* 8723D */
+ 	{ IC_INFO(RTL_ROM_LMP_8723B, 0xd, 0x8, HCI_USB),
+ 	  .config_needed = true,
+@@ -175,7 +215,8 @@ static const struct id_table ic_id_table[] = {
+ 	};
+ 
+ static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev,
+-					     u8 hci_ver, u8 hci_bus)
++					     u8 hci_ver, u8 hci_bus,
++					     u8 chip_type)
+ {
+ 	int i;
+ 
+@@ -192,6 +233,9 @@ static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev,
+ 		if ((ic_id_table[i].match_flags & IC_MATCH_FL_HCIBUS) &&
+ 		    (ic_id_table[i].hci_bus != hci_bus))
+ 			continue;
++		if ((ic_id_table[i].match_flags & IC_MATCH_FL_CHIP_TYPE) &&
++		    (ic_id_table[i].chip_type != chip_type))
++			continue;
+ 
+ 		break;
+ 	}
+@@ -274,6 +318,7 @@ static int rtlbt_parse_firmware(struct hci_dev *hdev,
+ 		{ RTL_ROM_LMP_8723B, 1 },
+ 		{ RTL_ROM_LMP_8821A, 2 },
+ 		{ RTL_ROM_LMP_8761A, 3 },
++		{ RTL_ROM_LMP_8703B, 7 },
+ 		{ RTL_ROM_LMP_8822B, 8 },
+ 		{ RTL_ROM_LMP_8723B, 9 },	/* 8723D */
+ 		{ RTL_ROM_LMP_8821A, 10 },	/* 8821C */
+@@ -552,6 +597,48 @@ static int btrtl_setup_rtl8723b(struct hci_dev *hdev,
+ 	return ret;
+ }
+ 
++static bool rtl_has_chip_type(u16 lmp_subver)
++{
++	switch (lmp_subver) {
++	case RTL_ROM_LMP_8703B:
++		return true;
++	default:
++		break;
++	}
++
++	return  false;
++}
++
++static int rtl_read_chip_type(struct hci_dev *hdev, u8 *type)
++{
++	struct rtl_chip_type_evt *chip_type;
++	struct sk_buff *skb;
++	const unsigned char cmd_buf[] = {0x00, 0x94, 0xa0, 0x00, 0xb0};
++
++	/* Read RTL chip type command */
++	skb = __hci_cmd_sync(hdev, 0xfc61, 5, cmd_buf, HCI_INIT_TIMEOUT);
++	if (IS_ERR(skb)) {
++		rtl_dev_err(hdev, "Read chip type failed (%ld)",
++			    PTR_ERR(skb));
++		return PTR_ERR(skb);
++	}
++
++	if (skb->len != sizeof(*chip_type)) {
++		rtl_dev_err(hdev, "RTL chip type event length mismatch");
++		kfree_skb(skb);
++		return -EIO;
++	}
++
++	chip_type = (struct rtl_chip_type_evt *)skb->data;
++	rtl_dev_info(hdev, "chip_type status=%x type=%x",
++		     chip_type->status, chip_type->type);
++
++	*type = chip_type->type & 0x0f;
++
++	kfree_skb(skb);
++	return 0;
++}
++
+ void btrtl_free(struct btrtl_device_info *btrtl_dev)
+ {
+ 	kvfree(btrtl_dev->fw_data);
+@@ -568,7 +655,7 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
+ 	struct hci_rp_read_local_version *resp;
+ 	char cfg_name[40];
+ 	u16 hci_rev, lmp_subver;
+-	u8 hci_ver;
++	u8 hci_ver, chip_type = 0;
+ 	int ret;
+ 	u16 opcode;
+ 	u8 cmd[2];
+@@ -638,8 +725,14 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
+ out_free:
+ 	kfree_skb(skb);
+ 
++	if (rtl_has_chip_type(lmp_subver)) {
++		ret = rtl_read_chip_type(hdev, &chip_type);
++		if (ret)
++			goto err_free;
++	}
++
+ 	btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
+-					    hdev->bus);
++					    hdev->bus, chip_type);
+ 
+ 	if (!btrtl_dev->ic_info) {
+ 		rtl_dev_info(hdev, "unknown IC info, lmp subver %04x, hci rev %04x, hci ver %04x",
+@@ -757,7 +757,7 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
+ 		lmp_subver = le16_to_cpu(resp->lmp_subver);
+ 
+ 		btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
+-						    hdev->bus);
++						    hdev->bus, chip_type);
+ 	}
+ out_free:
+ 	kfree_skb(skb);
+@@ -722,6 +815,7 @@ int btrtl_download_firmware(struct hci_dev *hdev,
+ 	case RTL_ROM_LMP_8761A:
+ 	case RTL_ROM_LMP_8822B:
+ 	case RTL_ROM_LMP_8852A:
++	case RTL_ROM_LMP_8703B:
+ 		return btrtl_setup_rtl8723b(hdev, btrtl_dev);
+ 	default:
+ 		rtl_dev_info(hdev, "assuming no firmware upload needed");
+@@ -752,6 +846,19 @@ void btrtl_set_quirks(struct hci_dev *hdev, struct btrtl_device_info *btrtl_dev)
+ 		rtl_dev_dbg(hdev, "WBS supported not enabled.");
+ 		break;
+ 	}
++
++	switch (btrtl_dev->ic_info->lmp_subver) {
++	case RTL_ROM_LMP_8703B:
++		/* 8723CS reports two pages for local ext features,
++		 * but it doesn't support any features from page 2 -
++		 * it either responds with garbage or with error status
++		 */
++		set_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
++			&hdev->quirks);
++		break;
++	default:
++		break;
++	}
+ }
+ EXPORT_SYMBOL_GPL(btrtl_set_quirks);
+ 
+@@ -910,6 +1017,12 @@ MODULE_FIRMWARE("rtl_bt/rtl8723b_fw.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8723b_config.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8723bs_fw.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8723bs_config.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_fw.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_config.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_fw.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_config.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_fw.bin");
++MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_config.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8723ds_fw.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8723ds_config.bin");
+ MODULE_FIRMWARE("rtl_bt/rtl8761a_fw.bin");
+diff --git a/drivers/bluetooth/btrtl.h b/drivers/bluetooth/btrtl.h
+index 2c441bda3..1c6282241 100644
+--- a/drivers/bluetooth/btrtl.h
++++ b/drivers/bluetooth/btrtl.h
+@@ -14,6 +14,11 @@
+ 
+ struct btrtl_device_info;
+ 
++struct rtl_chip_type_evt {
++	__u8 status;
++	__u8 type;
++} __packed;
++
+ struct rtl_download_cmd {
+ 	__u8 index;
+ 	__u8 data[RTL_FRAG_LEN];
+-- 
+2.34.0
+

patch/kernel/archive/media-6.0/410-general-bluetooth-03-hci_h5-add-binding-RTL8723CS.patch

@@ -0,0 +1,31 @@
+From 8fc0422773dc5274fa32e2a5a6ce2e1f0a96d78c Mon Sep 17 00:00:00 2001
+From: Vasily Khoruzhick <anarsoul@gmail.com>
+Date: Wed, 31 Oct 2018 20:07:41 -0700
+Subject: [PATCH 304/467] Bluetooth: hci_h5: Add support for binding RTL8723CS
+ with device tree
+
+RTL8723CS is often used in ARM boards, so add ability to bind it
+using device tree.
+
+Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
+Signed-off-by: Ondrej Jirman <megous@megous.com>
+---
+ drivers/bluetooth/hci_h5.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/bluetooth/hci_h5.c b/drivers/bluetooth/hci_h5.c
+index d49a39d17..c9b54335a 100644
+--- a/drivers/bluetooth/hci_h5.c
++++ b/drivers/bluetooth/hci_h5.c
+@@ -1100,6 +1100,8 @@ static const struct of_device_id rtl_bluetooth_of_match[] = {
+ 	  .data = (const void *)&h5_data_rtl8723bs },
+ 	{ .compatible = "realtek,rtl8723ds-bt",
+ 	  .data = (const void *)&h5_data_rtl8723bs },
++	{ .compatible = "realtek,rtl8723cs-bt",
++	  .data = (const void *)&h5_data_rtl8723bs },
+ #endif
+ 	{ },
+ };
+-- 
+2.34.0
+

patch/kernel/archive/media-6.0/420-general-bluetooth-04-add-rtl8703bs.patch

@@ -0,0 +1,42 @@
+From f0c05140b92cca447cd55a93ad4de141d0f117f1 Mon Sep 17 00:00:00 2001
+From: Paolo Sabatino <paolo.sabatino@gmail.com>
+Date: Thu, 9 Dec 2021 22:47:36 +0000
+Subject: [PATCH] rtl8703bs: add chip type to list and info block
+
+---
+ drivers/bluetooth/btrtl.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c
+index ad4085eede4..2c227bf4e00 100644
+--- a/drivers/bluetooth/btrtl.c
++++ b/drivers/bluetooth/btrtl.c
+@@ -20,6 +20,7 @@
+ #define RTL_CHIP_8723CS_CG	3
+ #define RTL_CHIP_8723CS_VF	4
+ #define RTL_CHIP_8723CS_XX	5
++#define RTL_CHIP_8703BS		7
+ #define RTL_EPATCH_SIGNATURE	"Realtech"
+ #define RTL_ROM_LMP_3499	0x3499
+ #define RTL_ROM_LMP_8703B	0x8703
+@@ -136,6 +137,17 @@ static const struct id_table ic_id_table[] = {
+ 	  .fw_name  = "rtl_bt/rtl8723cs_xx_fw.bin",
+ 	  .cfg_name = "rtl_bt/rtl8723cs_xx_config" },
+ 
++	/* 8703BS */
++	{ .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
++			 IC_MATCH_FL_HCIBUS,
++	  .lmp_subver = RTL_ROM_LMP_8703B,
++	  .chip_type = RTL_CHIP_8703BS,
++	  .hci_bus = HCI_UART,
++	  .config_needed = true,
++	  .has_rom_version = true,
++	  .fw_name  = "rtl_bt/rtl8723cs_xx_fw.bin",
++	  .cfg_name = "rtl_bt/rtl8723cs_xx_config" },
++
+ 	/* 8723D */
+ 	{ IC_INFO(RTL_ROM_LMP_8723B, 0xd, 0x8, HCI_USB),
+ 	  .config_needed = true,
+-- 
+2.30.2
+

patch/kernel/archive/media-6.0/430-general-bluetooth-add-new-quirk.patch

@@ -0,0 +1,53 @@
+From f60f1605f5056d543e49fc625ffeeb05621f2ad3 Mon Sep 17 00:00:00 2001
+From: Vasily Khoruzhick
+Date: Wed, 31 Oct 2018 19:40:18 -0700
+Subject: Bluetooth: Add new quirk for broken local ext features max_page
+
+Some adapters (e.g. RTL8723CS) advertise that they have more than
+2 pages for local ext features, but they don't support any features
+declared in these pages. RTL8723CS reports max_page = 2 and declares
+support for sync train and secure connection, but it responds with
+either garbage or with error in status on corresponding commands.
+
+Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
+---
+ include/net/bluetooth/hci.h | 7 +++++++
+ net/bluetooth/hci_event.c   | 4 +++-
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
+index 16ab6ce87883..8e4c16210d18 100644
+--- a/include/net/bluetooth/hci.h
++++ b/include/net/bluetooth/hci.h
+@@ -238,6 +238,13 @@ enum {
+ 	 * HCI after resume.
+ 	 */
+ 	HCI_QUIRK_NO_SUSPEND_NOTIFIER,
++
++	/* When this quirk is set, max_page for local extended features
++	 * is set to 1, even if controller reports higher number. Some
++	 * controllers (e.g. RTL8723CS) report more pages, but they
++	 * don't actually support features declared there.
++	 */
++	HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
+ 
+ 	/*
+ 	* When this quirk is set, LE tx power is not queried on startup
+diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
+index cfeaee347db3..df3232828978 100644
+--- a/net/bluetooth/hci_event.c
++++ b/net/bluetooth/hci_event.c
+@@ -700,7 +700,9 @@ static void hci_cc_read_local_ext_features(struct hci_dev *hdev,
+ 	if (rp->status)
+ 		return;
+ 
+-	if (hdev->max_page < rp->max_page)
++	if (!test_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
++		      &hdev->quirks) &&
++	    hdev->max_page < rp->max_page)
+ 		hdev->max_page = rp->max_page;
+ 
+ 	if (rp->page < HCI_MAX_PAGES)
+-- 
+cgit v1.2.3
+

patch/kernel/archive/media-6.0/600-usb-fix.patch

@@ -0,0 +1,31 @@
+--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
++++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+@@ -1124,7 +1124,7 @@
+ 					  struct rockchip_usb2phy_port *rport,
+ 					  struct device_node *child_np)
+ {
+-	int ret;
++	int ret, id;
+ 
+ 	rport->port_id = USB2PHY_PORT_OTG;
+ 	rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+@@ -1162,13 +1162,15 @@
+ 
+ 		ret = devm_extcon_register_notifier(rphy->dev, rphy->edev,
+ 					EXTCON_USB_HOST, &rport->event_nb);
+-		if (ret)
++		if (ret) {
+ 			dev_err(rphy->dev, "register USB HOST notifier failed\n");
++			goto out;
++		}
+ 
+ 		if (!of_property_read_bool(rphy->dev->of_node, "extcon")) {
+ 			/* do initial sync of usb state */
+-			ret = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
+-			extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !ret);
++			id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
++			extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
+ 		}
+ 	}
+ 
+

patch/kernel/archive/station-p2-5.18/0010-v11-01-24-clk-rk3568-Mark-hclk_vo-as-critical.patch

@@ -1,12 +0,0 @@
-diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c
-index 606ae6cd918b2..f85902e2590c7 100644
---- a/drivers/clk/rockchip/clk-rk3568.c
-+++ b/drivers/clk/rockchip/clk-rk3568.c
-@@ -1591,6 +1591,7 @@ static const char *const rk3568_cru_critical_clocks[] __initconst = {
- 	"hclk_php",
- 	"pclk_php",
- 	"hclk_usb",
-+	"hclk_vo",
- };
- 
- static const char *const rk3568_pmucru_critical_clocks[] __initconst = {

patch/kernel/archive/station-p2-5.18/0020-v11-02-24-drm-rockchip-Embed-drm_encoder-into-rockchip_decoder.patch

@@ -1,586 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
-index c82901d9a9ccd..28fcc8efa33db 100644
---- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
-@@ -40,8 +40,6 @@
- 
- #define PSR_WAIT_LINE_FLAG_TIMEOUT_MS	100
- 
--#define to_dp(nm)	container_of(nm, struct rockchip_dp_device, nm)
--
- /**
-  * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
-  * @lcdsel_grf_reg: grf register offset of lcdc select
-@@ -59,7 +57,7 @@ struct rockchip_dp_chip_data {
- struct rockchip_dp_device {
- 	struct drm_device        *drm_dev;
- 	struct device            *dev;
--	struct drm_encoder       encoder;
-+	struct rockchip_encoder  encoder;
- 	struct drm_display_mode  mode;
- 
- 	struct clk               *pclk;
-@@ -73,6 +71,18 @@ struct rockchip_dp_device {
- 	struct analogix_dp_plat_data plat_data;
- };
- 
-+static struct rockchip_dp_device *encoder_to_dp(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct rockchip_dp_device, encoder);
-+}
-+
-+static struct rockchip_dp_device *pdata_encoder_to_dp(struct analogix_dp_plat_data *plat_data)
-+{
-+	return container_of(plat_data, struct rockchip_dp_device, plat_data);
-+}
-+
- static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
- {
- 	reset_control_assert(dp->rst);
-@@ -84,7 +94,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
- 
- static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
- {
--	struct rockchip_dp_device *dp = to_dp(plat_data);
-+	struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
- 	int ret;
- 
- 	ret = clk_prepare_enable(dp->pclk);
-@@ -105,7 +115,7 @@ static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
- 
- static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
- {
--	struct rockchip_dp_device *dp = to_dp(plat_data);
-+	struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
- 
- 	clk_disable_unprepare(dp->pclk);
- 
-@@ -166,7 +176,7 @@ struct drm_crtc *rockchip_dp_drm_get_new_crtc(struct drm_encoder *encoder,
- static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
- 					   struct drm_atomic_state *state)
- {
--	struct rockchip_dp_device *dp = to_dp(encoder);
-+	struct rockchip_dp_device *dp = encoder_to_dp(encoder);
- 	struct drm_crtc *crtc;
- 	struct drm_crtc_state *old_crtc_state;
- 	int ret;
-@@ -208,7 +218,7 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
- static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder,
- 					    struct drm_atomic_state *state)
- {
--	struct rockchip_dp_device *dp = to_dp(encoder);
-+	struct rockchip_dp_device *dp = encoder_to_dp(encoder);
- 	struct drm_crtc *crtc;
- 	struct drm_crtc_state *new_crtc_state = NULL;
- 	int ret;
-@@ -297,7 +307,7 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
- 
- static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
- {
--	struct drm_encoder *encoder = &dp->encoder;
-+	struct drm_encoder *encoder = &dp->encoder.encoder;
- 	struct drm_device *drm_dev = dp->drm_dev;
- 	struct device *dev = dp->dev;
- 	int ret;
-@@ -333,7 +343,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
- 		return ret;
- 	}
- 
--	dp->plat_data.encoder = &dp->encoder;
-+	dp->plat_data.encoder = &dp->encoder.encoder;
- 
- 	ret = analogix_dp_bind(dp->adp, drm_dev);
- 	if (ret)
-@@ -341,7 +351,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
- 
- 	return 0;
- err_cleanup_encoder:
--	dp->encoder.funcs->destroy(&dp->encoder);
-+	dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);
- 	return ret;
- }
- 
-@@ -351,7 +361,7 @@ static void rockchip_dp_unbind(struct device *dev, struct device *master,
- 	struct rockchip_dp_device *dp = dev_get_drvdata(dev);
- 
- 	analogix_dp_unbind(dp->adp);
--	dp->encoder.funcs->destroy(&dp->encoder);
-+	dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);
- }
- 
- static const struct component_ops rockchip_dp_component_ops = {
-diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
-index d3e6c93739bf6..8584e19792be2 100644
---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
-+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
-@@ -26,11 +26,17 @@
- #include "cdn-dp-reg.h"
- #include "rockchip_drm_vop.h"
- 
--#define connector_to_dp(c) \
--		container_of(c, struct cdn_dp_device, connector)
-+static inline struct cdn_dp_device *connector_to_dp(struct drm_connector *connector)
-+{
-+	return container_of(connector, struct cdn_dp_device, connector);
-+}
- 
--#define encoder_to_dp(c) \
--		container_of(c, struct cdn_dp_device, encoder)
-+static inline struct cdn_dp_device *encoder_to_dp(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct cdn_dp_device, encoder);
-+}
- 
- #define GRF_SOC_CON9		0x6224
- #define DP_SEL_VOP_LIT		BIT(12)
-@@ -1050,7 +1056,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
- 
- 	INIT_WORK(&dp->event_work, cdn_dp_pd_event_work);
- 
--	encoder = &dp->encoder;
-+	encoder = &dp->encoder.encoder;
- 
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
- 							     dev->of_node);
-@@ -1115,7 +1121,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data)
- static void cdn_dp_unbind(struct device *dev, struct device *master, void *data)
- {
- 	struct cdn_dp_device *dp = dev_get_drvdata(dev);
--	struct drm_encoder *encoder = &dp->encoder;
-+	struct drm_encoder *encoder = &dp->encoder.encoder;
- 	struct drm_connector *connector = &dp->connector;
- 
- 	cancel_work_sync(&dp->event_work);
-diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
-index 6d0c5032ef3ad..f7d4cecb46ba4 100644
---- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
-+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
-@@ -66,7 +66,7 @@ struct cdn_dp_device {
- 	struct device *dev;
- 	struct drm_device *drm_dev;
- 	struct drm_connector connector;
--	struct drm_encoder encoder;
-+	struct rockchip_encoder encoder;
- 	struct drm_display_mode mode;
- 	struct platform_device *audio_pdev;
- 	struct work_struct event_work;
-diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
-index 4ed7a68681978..110e83aad9bb4 100644
---- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
-@@ -181,8 +181,6 @@
- 
- #define HIWORD_UPDATE(val, mask)	(val | (mask) << 16)
- 
--#define to_dsi(nm)	container_of(nm, struct dw_mipi_dsi_rockchip, nm)
--
- enum {
- 	DW_DSI_USAGE_IDLE,
- 	DW_DSI_USAGE_DSI,
-@@ -236,7 +234,7 @@ struct rockchip_dw_dsi_chip_data {
- 
- struct dw_mipi_dsi_rockchip {
- 	struct device *dev;
--	struct drm_encoder encoder;
-+	struct rockchip_encoder encoder;
- 	void __iomem *base;
- 
- 	struct regmap *grf_regmap;
-@@ -271,6 +269,13 @@ struct dw_mipi_dsi_rockchip {
- 	bool dsi_bound;
- };
- 
-+static struct dw_mipi_dsi_rockchip *to_dsi(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct dw_mipi_dsi_rockchip, encoder);
-+}
-+
- struct dphy_pll_parameter_map {
- 	unsigned int max_mbps;
- 	u8 hsfreqrange;
-@@ -770,7 +775,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
- 	int ret, mux;
- 
- 	mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node,
--						&dsi->encoder);
-+						&dsi->encoder.encoder);
- 	if (mux < 0)
- 		return;
- 
-@@ -801,7 +806,7 @@ dw_mipi_dsi_encoder_helper_funcs = {
- static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi,
- 					   struct drm_device *drm_dev)
- {
--	struct drm_encoder *encoder = &dsi->encoder;
-+	struct drm_encoder *encoder = &dsi->encoder.encoder;
- 	int ret;
- 
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
-@@ -959,7 +964,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
- 		goto out_pll_clk;
- 	}
- 
--	ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
-+	ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder.encoder);
- 	if (ret) {
- 		DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
- 		goto out_pll_clk;
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 8677c82716784..06c9ddef6f362 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -67,7 +67,7 @@ struct rockchip_hdmi_chip_data {
- struct rockchip_hdmi {
- 	struct device *dev;
- 	struct regmap *regmap;
--	struct drm_encoder encoder;
-+	struct rockchip_encoder encoder;
- 	const struct rockchip_hdmi_chip_data *chip_data;
- 	struct clk *vpll_clk;
- 	struct clk *grf_clk;
-@@ -75,7 +75,12 @@ struct rockchip_hdmi {
- 	struct phy *phy;
- };
- 
--#define to_rockchip_hdmi(x)	container_of(x, struct rockchip_hdmi, x)
-+static struct rockchip_hdmi *to_rockchip_hdmi(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct rockchip_hdmi, encoder);
-+}
- 
- static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
- 	{
-@@ -511,7 +516,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 	hdmi->dev = &pdev->dev;
- 	hdmi->chip_data = plat_data->phy_data;
- 	plat_data->phy_data = hdmi;
--	encoder = &hdmi->encoder;
-+	encoder = &hdmi->encoder.encoder;
- 
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
- 	/*
-diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c
-index 046e8ec2a71c5..0a4f72021d6af 100644
---- a/drivers/gpu/drm/rockchip/inno_hdmi.c
-+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c
-@@ -26,8 +26,6 @@
- 
- #include "inno_hdmi.h"
- 
--#define to_inno_hdmi(x)	container_of(x, struct inno_hdmi, x)
--
- struct hdmi_data_info {
- 	int vic;
- 	bool sink_is_hdmi;
-@@ -56,7 +54,7 @@ struct inno_hdmi {
- 	void __iomem *regs;
- 
- 	struct drm_connector	connector;
--	struct drm_encoder	encoder;
-+	struct rockchip_encoder	encoder;
- 
- 	struct inno_hdmi_i2c *i2c;
- 	struct i2c_adapter *ddc;
-@@ -67,6 +65,18 @@ struct inno_hdmi {
- 	struct drm_display_mode previous_mode;
- };
- 
-+static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct inno_hdmi, encoder);
-+}
-+
-+static struct inno_hdmi *connector_to_inno_hdmi(struct drm_connector *connector)
-+{
-+	return container_of(connector, struct inno_hdmi, connector);
-+}
-+
- enum {
- 	CSC_ITU601_16_235_TO_RGB_0_255_8BIT,
- 	CSC_ITU601_0_255_TO_RGB_0_255_8BIT,
-@@ -483,7 +493,7 @@ static void inno_hdmi_encoder_mode_set(struct drm_encoder *encoder,
- 				       struct drm_display_mode *mode,
- 				       struct drm_display_mode *adj_mode)
- {
--	struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
-+	struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
- 
- 	inno_hdmi_setup(hdmi, adj_mode);
- 
-@@ -493,14 +503,14 @@ static void inno_hdmi_encoder_mode_set(struct drm_encoder *encoder,
- 
- static void inno_hdmi_encoder_enable(struct drm_encoder *encoder)
- {
--	struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
-+	struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
- 
- 	inno_hdmi_set_pwr_mode(hdmi, NORMAL);
- }
- 
- static void inno_hdmi_encoder_disable(struct drm_encoder *encoder)
- {
--	struct inno_hdmi *hdmi = to_inno_hdmi(encoder);
-+	struct inno_hdmi *hdmi = encoder_to_inno_hdmi(encoder);
- 
- 	inno_hdmi_set_pwr_mode(hdmi, LOWER_PWR);
- }
-@@ -536,7 +546,7 @@ static struct drm_encoder_helper_funcs inno_hdmi_encoder_helper_funcs = {
- static enum drm_connector_status
- inno_hdmi_connector_detect(struct drm_connector *connector, bool force)
- {
--	struct inno_hdmi *hdmi = to_inno_hdmi(connector);
-+	struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector);
- 
- 	return (hdmi_readb(hdmi, HDMI_STATUS) & m_HOTPLUG) ?
- 		connector_status_connected : connector_status_disconnected;
-@@ -544,7 +554,7 @@ inno_hdmi_connector_detect(struct drm_connector *connector, bool force)
- 
- static int inno_hdmi_connector_get_modes(struct drm_connector *connector)
- {
--	struct inno_hdmi *hdmi = to_inno_hdmi(connector);
-+	struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector);
- 	struct edid *edid;
- 	int ret = 0;
- 
-@@ -599,7 +609,7 @@ static struct drm_connector_helper_funcs inno_hdmi_connector_helper_funcs = {
- 
- static int inno_hdmi_register(struct drm_device *drm, struct inno_hdmi *hdmi)
- {
--	struct drm_encoder *encoder = &hdmi->encoder;
-+	struct drm_encoder *encoder = &hdmi->encoder.encoder;
- 	struct device *dev = hdmi->dev;
- 
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
-@@ -879,7 +889,7 @@ static int inno_hdmi_bind(struct device *dev, struct device *master,
- 	return 0;
- err_cleanup_hdmi:
- 	hdmi->connector.funcs->destroy(&hdmi->connector);
--	hdmi->encoder.funcs->destroy(&hdmi->encoder);
-+	hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
- err_put_adapter:
- 	i2c_put_adapter(hdmi->ddc);
- err_disable_clk:
-@@ -893,7 +903,7 @@ static void inno_hdmi_unbind(struct device *dev, struct device *master,
- 	struct inno_hdmi *hdmi = dev_get_drvdata(dev);
- 
- 	hdmi->connector.funcs->destroy(&hdmi->connector);
--	hdmi->encoder.funcs->destroy(&hdmi->encoder);
-+	hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
- 
- 	i2c_put_adapter(hdmi->ddc);
- 	clk_disable_unprepare(hdmi->pclk);
-diff --git a/drivers/gpu/drm/rockchip/rk3066_hdmi.c b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
-index 1c546c3a89984..319240c33dcc0 100644
---- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c
-+++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
-@@ -47,7 +47,7 @@ struct rk3066_hdmi {
- 	void __iomem *regs;
- 
- 	struct drm_connector connector;
--	struct drm_encoder encoder;
-+	struct rockchip_encoder encoder;
- 
- 	struct rk3066_hdmi_i2c *i2c;
- 	struct i2c_adapter *ddc;
-@@ -58,7 +58,17 @@ struct rk3066_hdmi {
- 	struct drm_display_mode previous_mode;
- };
- 
--#define to_rk3066_hdmi(x) container_of(x, struct rk3066_hdmi, x)
-+static struct rk3066_hdmi *encoder_to_rk3066_hdmi(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct rk3066_hdmi, encoder);
-+}
-+
-+static struct rk3066_hdmi *connector_to_rk3066_hdmi(struct drm_connector *connector)
-+{
-+	return container_of(connector, struct rk3066_hdmi, connector);
-+}
- 
- static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
- {
-@@ -380,7 +390,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_encoder *encoder,
- 			     struct drm_display_mode *mode,
- 			     struct drm_display_mode *adj_mode)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
-+	struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
- 
- 	/* Store the display mode for plugin/DPMS poweron events. */
- 	memcpy(&hdmi->previous_mode, adj_mode, sizeof(hdmi->previous_mode));
-@@ -388,7 +398,7 @@ rk3066_hdmi_encoder_mode_set(struct drm_encoder *encoder,
- 
- static void rk3066_hdmi_encoder_enable(struct drm_encoder *encoder)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
-+	struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
- 	int mux, val;
- 
- 	mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
-@@ -407,7 +417,7 @@ static void rk3066_hdmi_encoder_enable(struct drm_encoder *encoder)
- 
- static void rk3066_hdmi_encoder_disable(struct drm_encoder *encoder)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
-+	struct rk3066_hdmi *hdmi = encoder_to_rk3066_hdmi(encoder);
- 
- 	DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n");
- 
-@@ -455,7 +465,7 @@ struct drm_encoder_helper_funcs rk3066_hdmi_encoder_helper_funcs = {
- static enum drm_connector_status
- rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
-+	struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
- 
- 	return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ?
- 		connector_status_connected : connector_status_disconnected;
-@@ -463,7 +473,7 @@ rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force)
- 
- static int rk3066_hdmi_connector_get_modes(struct drm_connector *connector)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
-+	struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
- 	struct edid *edid;
- 	int ret = 0;
- 
-@@ -496,9 +506,9 @@ rk3066_hdmi_connector_mode_valid(struct drm_connector *connector,
- static struct drm_encoder *
- rk3066_hdmi_connector_best_encoder(struct drm_connector *connector)
- {
--	struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
-+	struct rk3066_hdmi *hdmi = connector_to_rk3066_hdmi(connector);
- 
--	return &hdmi->encoder;
-+	return &hdmi->encoder.encoder;
- }
- 
- static int
-@@ -538,7 +548,7 @@ struct drm_connector_helper_funcs rk3066_hdmi_connector_helper_funcs = {
- static int
- rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi)
- {
--	struct drm_encoder *encoder = &hdmi->encoder;
-+	struct drm_encoder *encoder = &hdmi->encoder.encoder;
- 	struct device *dev = hdmi->dev;
- 
- 	encoder->possible_crtcs =
-@@ -816,7 +826,7 @@ static int rk3066_hdmi_bind(struct device *dev, struct device *master,
- 
- err_cleanup_hdmi:
- 	hdmi->connector.funcs->destroy(&hdmi->connector);
--	hdmi->encoder.funcs->destroy(&hdmi->encoder);
-+	hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
- err_disable_i2c:
- 	i2c_put_adapter(hdmi->ddc);
- err_disable_hclk:
-@@ -831,7 +841,7 @@ static void rk3066_hdmi_unbind(struct device *dev, struct device *master,
- 	struct rk3066_hdmi *hdmi = dev_get_drvdata(dev);
- 
- 	hdmi->connector.funcs->destroy(&hdmi->connector);
--	hdmi->encoder.funcs->destroy(&hdmi->encoder);
-+	hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
- 
- 	i2c_put_adapter(hdmi->ddc);
- 	clk_disable_unprepare(hdmi->hclk);
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-index 008c44aef4001..048ab277de653 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-@@ -49,6 +49,10 @@ struct rockchip_drm_private {
- 	struct drm_mm mm;
- };
- 
-+struct rockchip_encoder {
-+	struct drm_encoder encoder;
-+};
-+
- int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
- 				   struct device *dev);
- void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
-@@ -66,4 +70,10 @@ extern struct platform_driver rockchip_dp_driver;
- extern struct platform_driver rockchip_lvds_driver;
- extern struct platform_driver vop_platform_driver;
- extern struct platform_driver rk3066_hdmi_driver;
-+
-+static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
-+{
-+	return container_of(encoder, struct rockchip_encoder, encoder);
-+}
-+
- #endif /* _ROCKCHIP_DRM_DRV_H_ */
-diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
-index 0b972418067e8..25d8c24ef7729 100644
---- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
-@@ -36,12 +36,6 @@
- 
- struct rockchip_lvds;
- 
--#define connector_to_lvds(c) \
--		container_of(c, struct rockchip_lvds, connector)
--
--#define encoder_to_lvds(c) \
--		container_of(c, struct rockchip_lvds, encoder)
--
- /**
-  * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
-  * @probe: LVDS platform probe function
-@@ -65,10 +59,22 @@ struct rockchip_lvds {
- 	struct drm_panel *panel;
- 	struct drm_bridge *bridge;
- 	struct drm_connector connector;
--	struct drm_encoder encoder;
-+	struct rockchip_encoder encoder;
- 	struct dev_pin_info *pins;
- };
- 
-+static inline struct rockchip_lvds *connector_to_lvds(struct drm_connector *connector)
-+{
-+	return container_of(connector, struct rockchip_lvds, connector);
-+}
-+
-+static inline struct rockchip_lvds *encoder_to_lvds(struct drm_encoder *encoder)
-+{
-+	struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
-+
-+	return container_of(rkencoder, struct rockchip_lvds, encoder);
-+}
-+
- static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset,
- 				 u32 val)
- {
-@@ -599,7 +605,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master,
- 		goto err_put_remote;
- 	}
- 
--	encoder = &lvds->encoder;
-+	encoder = &lvds->encoder.encoder;
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
- 							     dev->of_node);
- 
-@@ -674,10 +680,10 @@ static void rockchip_lvds_unbind(struct device *dev, struct device *master,
- 	const struct drm_encoder_helper_funcs *encoder_funcs;
- 
- 	encoder_funcs = lvds->soc_data->helper_funcs;
--	encoder_funcs->disable(&lvds->encoder);
-+	encoder_funcs->disable(&lvds->encoder.encoder);
- 	pm_runtime_disable(dev);
- 	drm_connector_cleanup(&lvds->connector);
--	drm_encoder_cleanup(&lvds->encoder);
-+	drm_encoder_cleanup(&lvds->encoder.encoder);
- }
- 
- static const struct component_ops rockchip_lvds_component_ops = {

patch/kernel/archive/station-p2-5.18/0030-v11-03-24-drm-rockchip-Add-crtc_endpoint_id-to-rockchip_encoder.patch

@@ -1,66 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-index 7efd12312354b..0dc09d92d92d6 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-@@ -244,6 +244,39 @@ static const struct dev_pm_ops rockchip_drm_pm_ops = {
- static struct platform_driver *rockchip_sub_drivers[MAX_ROCKCHIP_SUB_DRIVERS];
- static int num_rockchip_sub_drivers;
- 
-+/*
-+ * Get the endpoint id of the remote endpoint of the given encoder. This
-+ * information is used by the VOP2 driver to identify the encoder.
-+ *
-+ * @rkencoder: The encoder to get the remote endpoint id from
-+ * @np: The encoder device node
-+ * @port: The number of the port leading to the VOP2
-+ * @reg: The endpoint number leading to the VOP2
-+ */
-+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rkencoder,
-+					      struct device_node *np, int port, int reg)
-+{
-+	struct of_endpoint ep;
-+	struct device_node *en, *ren;
-+	int ret;
-+
-+	en = of_graph_get_endpoint_by_regs(np, port, reg);
-+	if (!en)
-+		return -ENOENT;
-+
-+	ren = of_graph_get_remote_endpoint(en);
-+	if (!ren)
-+		return -ENOENT;
-+
-+	ret = of_graph_parse_endpoint(ren, &ep);
-+	if (ret)
-+		return ret;
-+
-+	rkencoder->crtc_endpoint_id = ep.id;
-+
-+	return 0;
-+}
-+
- /*
-  * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
-  * Should be called from the component bind stage of the drivers
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-index 048ab277de653..a27ab928e1d2f 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-@@ -50,6 +50,7 @@ struct rockchip_drm_private {
- };
- 
- struct rockchip_encoder {
-+	int crtc_endpoint_id;
- 	struct drm_encoder encoder;
- };
- 
-@@ -60,7 +61,8 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
- void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
- 				  struct device *dev);
- int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
--
-+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,
-+					      struct device_node *np, int port, int reg);
- int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
- extern struct platform_driver cdn_dp_driver;
- extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;

patch/kernel/archive/station-p2-5.18/0040-v11-04-24-drm-rockchip-dw_hdmi-rename-vpll-clock-to-reference-clock.patch

@@ -1,75 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 06c9ddef6f362..912181429880a 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -69,7 +69,7 @@ struct rockchip_hdmi {
- 	struct regmap *regmap;
- 	struct rockchip_encoder encoder;
- 	const struct rockchip_hdmi_chip_data *chip_data;
--	struct clk *vpll_clk;
-+	struct clk *ref_clk;
- 	struct clk *grf_clk;
- 	struct dw_hdmi *hdmi;
- 	struct phy *phy;
-@@ -201,14 +201,15 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
- 		return PTR_ERR(hdmi->regmap);
- 	}
- 
--	hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll");
--	if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) {
--		hdmi->vpll_clk = NULL;
--	} else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) {
-+	hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref");
-+	if (!hdmi->ref_clk)
-+		hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll");
-+
-+	if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) {
- 		return -EPROBE_DEFER;
--	} else if (IS_ERR(hdmi->vpll_clk)) {
--		DRM_DEV_ERROR(hdmi->dev, "failed to get vpll clock\n");
--		return PTR_ERR(hdmi->vpll_clk);
-+	} else if (IS_ERR(hdmi->ref_clk)) {
-+		DRM_DEV_ERROR(hdmi->dev, "failed to get reference clock\n");
-+		return PTR_ERR(hdmi->ref_clk);
- 	}
- 
- 	hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
-@@ -262,7 +263,7 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
- {
- 	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
- 
--	clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000);
-+	clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);
- }
- 
- static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
-@@ -542,9 +543,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 		return ret;
- 	}
- 
--	ret = clk_prepare_enable(hdmi->vpll_clk);
-+	ret = clk_prepare_enable(hdmi->ref_clk);
- 	if (ret) {
--		DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
-+		DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n",
- 			      ret);
- 		return ret;
- 	}
-@@ -563,7 +564,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 	if (IS_ERR(hdmi->hdmi)) {
- 		ret = PTR_ERR(hdmi->hdmi);
- 		drm_encoder_cleanup(encoder);
--		clk_disable_unprepare(hdmi->vpll_clk);
-+		clk_disable_unprepare(hdmi->ref_clk);
- 	}
- 
- 	return ret;
-@@ -575,7 +576,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
- 	struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
- 
- 	dw_hdmi_unbind(hdmi->hdmi);
--	clk_disable_unprepare(hdmi->vpll_clk);
-+	clk_disable_unprepare(hdmi->ref_clk);
- }
- 
- static const struct component_ops dw_hdmi_rockchip_ops = {

patch/kernel/archive/station-p2-5.18/0050-v11-05-24-dt-bindings-display-rockchip-dw-hdmi-use-ref-as-clock-name.patch

@@ -1,30 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-index da3b889ad8fcd..0400f67e5f2c9 100644
---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-@@ -36,7 +36,8 @@ properties:
-       # order when present.
-       - description: The HDMI CEC controller main clock
-       - description: Power for GRF IO
--      - description: External clock for some HDMI PHY
-+      - description: External clock for some HDMI PHY (old clock name, deprecated)
-+      - description: External clock for some HDMI PHY (new name)
- 
-   clock-names:
-     minItems: 2
-@@ -47,10 +48,14 @@ properties:
-           - cec
-           - grf
-           - vpll
-+          - ref
-       - enum:
-           - grf
-           - vpll
--      - const: vpll
-+          - ref
-+      - enum:
-+          - vpll
-+          - ref
- 
-   ddc-i2c-bus:
-     $ref: /schemas/types.yaml#/definitions/phandle

patch/kernel/archive/station-p2-5.18/0060-v11-06-24-arm64-dts-rockchip-rk3399-rename-HDMI-ref-clock-to-ref.patch

@@ -1,13 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-index 080457a68e3c7..d0add619b0d22 100644
---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
-@@ -1884,7 +1884,7 @@ hdmi: hdmi@ff940000 {
- 			 <&cru SCLK_HDMI_CEC>,
- 			 <&cru PCLK_VIO_GRF>,
- 			 <&cru PLL_VPLL>;
--		clock-names = "iahb", "isfr", "cec", "grf", "vpll";
-+		clock-names = "iahb", "isfr", "cec", "grf", "ref";
- 		power-domains = <&power RK3399_PD_HDCP>;
- 		reg-io-width = <4>;
- 		rockchip,grf = <&grf>;

patch/kernel/archive/station-p2-5.18/0070-v11-07-24-drm-rockchip-dw_hdmi-add-rk3568-support.patch

@@ -1,70 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 912181429880a..b64cc62c7b5af 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -50,6 +50,10 @@
- #define RK3399_GRF_SOC_CON20		0x6250
- #define RK3399_HDMI_LCDC_SEL		BIT(6)
- 
-+#define RK3568_GRF_VO_CON1		0x0364
-+#define RK3568_HDMI_SDAIN_MSK		BIT(15)
-+#define RK3568_HDMI_SCLIN_MSK		BIT(14)
-+
- #define HIWORD_UPDATE(val, mask)	(val | (mask) << 16)
- 
- /**
-@@ -473,6 +477,19 @@ static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
- 	.use_drm_infoframe = true,
- };
- 
-+static struct rockchip_hdmi_chip_data rk3568_chip_data = {
-+	.lcdsel_grf_reg = -1,
-+};
-+
-+static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
-+	.mode_valid = dw_hdmi_rockchip_mode_valid,
-+	.mpll_cfg   = rockchip_mpll_cfg,
-+	.cur_ctr    = rockchip_cur_ctr,
-+	.phy_config = rockchip_phy_config,
-+	.phy_data = &rk3568_chip_data,
-+	.use_drm_infoframe = true,
-+};
-+
- static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
- 	{ .compatible = "rockchip,rk3228-dw-hdmi",
- 	  .data = &rk3228_hdmi_drv_data
-@@ -486,6 +503,9 @@ static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
- 	{ .compatible = "rockchip,rk3399-dw-hdmi",
- 	  .data = &rk3399_hdmi_drv_data
- 	},
-+	{ .compatible = "rockchip,rk3568-dw-hdmi",
-+	  .data = &rk3568_hdmi_drv_data
-+	},
- 	{},
- };
- MODULE_DEVICE_TABLE(of, dw_hdmi_rockchip_dt_ids);
-@@ -520,6 +540,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 	encoder = &hdmi->encoder.encoder;
- 
- 	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
-+	rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
-+						  dev->of_node, 0, 0);
-+
- 	/*
- 	 * If we failed to find the CRTC(s) which this encoder is
- 	 * supposed to be connected to, it's because the CRTC has
-@@ -550,6 +573,14 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 		return ret;
- 	}
- 
-+	if (hdmi->chip_data == &rk3568_chip_data) {
-+		regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
-+			     HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK |
-+					   RK3568_HDMI_SCLIN_MSK,
-+					   RK3568_HDMI_SDAIN_MSK |
-+					   RK3568_HDMI_SCLIN_MSK));
-+	}
-+
- 	drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);
- 	drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
- 

patch/kernel/archive/station-p2-5.18/0080-v11-08-24-dt-bindings-display-rockchip-dw-hdmi-Add-compatible-for-rk3568-HDMI.patch

@@ -1,12 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-index 0400f67e5f2c9..e6b8437a1e2d1 100644
---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-@@ -23,6 +23,7 @@ properties:
-       - rockchip,rk3288-dw-hdmi
-       - rockchip,rk3328-dw-hdmi
-       - rockchip,rk3399-dw-hdmi
-+      - rockchip,rk3568-dw-hdmi
- 
-   reg-io-width:
-     const: 4

patch/kernel/archive/station-p2-5.18/0090-v11-09-24-drm-rockchip-dw_hdmi-add-regulator-support.patch

@@ -1,93 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index b64cc62c7b5af..fe4f9556239ac 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -9,6 +9,7 @@
- #include <linux/platform_device.h>
- #include <linux/phy/phy.h>
- #include <linux/regmap.h>
-+#include <linux/regulator/consumer.h>
- 
- #include <drm/bridge/dw_hdmi.h>
- #include <drm/drm_edid.h>
-@@ -76,6 +77,8 @@ struct rockchip_hdmi {
- 	struct clk *ref_clk;
- 	struct clk *grf_clk;
- 	struct dw_hdmi *hdmi;
-+	struct regulator *avdd_0v9;
-+	struct regulator *avdd_1v8;
- 	struct phy *phy;
- };
- 
-@@ -226,6 +229,14 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
- 		return PTR_ERR(hdmi->grf_clk);
- 	}
- 
-+	hdmi->avdd_0v9 = devm_regulator_get(hdmi->dev, "avdd-0v9");
-+	if (IS_ERR(hdmi->avdd_0v9))
-+		return PTR_ERR(hdmi->avdd_0v9);
-+
-+	hdmi->avdd_1v8 = devm_regulator_get(hdmi->dev, "avdd-1v8");
-+	if (IS_ERR(hdmi->avdd_1v8))
-+		return PTR_ERR(hdmi->avdd_1v8);
-+
- 	return 0;
- }
- 
-@@ -566,11 +577,23 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 		return ret;
- 	}
- 
-+	ret = regulator_enable(hdmi->avdd_0v9);
-+	if (ret) {
-+		DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd0v9: %d\n", ret);
-+		goto err_avdd_0v9;
-+	}
-+
-+	ret = regulator_enable(hdmi->avdd_1v8);
-+	if (ret) {
-+		DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd1v8: %d\n", ret);
-+		goto err_avdd_1v8;
-+	}
-+
- 	ret = clk_prepare_enable(hdmi->ref_clk);
- 	if (ret) {
- 		DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference clock: %d\n",
- 			      ret);
--		return ret;
-+		goto err_clk;
- 	}
- 
- 	if (hdmi->chip_data == &rk3568_chip_data) {
-@@ -594,10 +617,19 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 	 */
- 	if (IS_ERR(hdmi->hdmi)) {
- 		ret = PTR_ERR(hdmi->hdmi);
--		drm_encoder_cleanup(encoder);
--		clk_disable_unprepare(hdmi->ref_clk);
-+		goto err_bind;
- 	}
- 
-+	return 0;
-+
-+err_bind:
-+	clk_disable_unprepare(hdmi->ref_clk);
-+	drm_encoder_cleanup(encoder);
-+err_clk:
-+	regulator_disable(hdmi->avdd_1v8);
-+err_avdd_1v8:
-+	regulator_disable(hdmi->avdd_0v9);
-+err_avdd_0v9:
- 	return ret;
- }
- 
-@@ -608,6 +640,9 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
- 
- 	dw_hdmi_unbind(hdmi->hdmi);
- 	clk_disable_unprepare(hdmi->ref_clk);
-+
-+	regulator_disable(hdmi->avdd_1v8);
-+	regulator_disable(hdmi->avdd_0v9);
- }
- 
- static const struct component_ops dw_hdmi_rockchip_ops = {

patch/kernel/archive/station-p2-5.18/0100-v11-10-24-dt-bindings-display-rockchip-dw-hdmi-Add-regulator-support.patch

@@ -1,22 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-index e6b8437a1e2d1..38ebb69830287 100644
---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-@@ -28,6 +28,17 @@ properties:
-   reg-io-width:
-     const: 4
- 
-+  avdd-0v9-supply:
-+    description:
-+      A 0.9V supply that powers up the SoC internal circuitry. The actual pin name
-+      varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes
-+      HDMI_AVDD_1V0.
-+
-+  avdd-1v8-supply:
-+    description:
-+      A 1.8V supply that powers up the SoC internal circuitry. The pin name on the
-+      SoC usually is HDMI_TX_AVDD_1V8.
-+
-   clocks:
-     minItems: 2
-     items:

patch/kernel/archive/station-p2-5.18/0110-v11-11-24-drm-rockchip-dw_hdmi-Use-auto-generated-tables.patch

@@ -1,154 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index fe4f9556239ac..cb43e7b47157d 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -91,80 +91,88 @@ static struct rockchip_hdmi *to_rockchip_hdmi(struct drm_encoder *encoder)
- 
- static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
- 	{
--		27000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+		30666000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2153, 0x0000 },
-+			{ 0x40f3, 0x0000 },
- 		},
--	}, {
--		36000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+	},  {
-+		36800000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2153, 0x0000 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		40000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+	},  {
-+		46000000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		54000000, {
--			{ 0x0072, 0x0001},
--			{ 0x2142, 0x0001},
--			{ 0x40a2, 0x0001},
-+	},  {
-+		61333000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		65000000, {
--			{ 0x0072, 0x0001},
--			{ 0x2142, 0x0001},
--			{ 0x40a2, 0x0001},
-+	},  {
-+		73600000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		66000000, {
--			{ 0x013e, 0x0003},
--			{ 0x217e, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		92000000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		74250000, {
--			{ 0x0072, 0x0001},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		122666000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		83500000, {
--			{ 0x0072, 0x0001},
-+	},  {
-+		147200000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		108000000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		184000000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		106500000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		226666000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		146250000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		272000000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
- 		},
--	}, {
--		148500000, {
--			{ 0x0051, 0x0003},
--			{ 0x214c, 0x0003},
--			{ 0x4064, 0x0003}
-+	},  {
-+		340000000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x3b4c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
- 		},
--	}, {
-+	},  {
-+		600000000, {
-+			{ 0x1a40, 0x0003 },
-+			{ 0x3b4c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
-+		},
-+	},  {
- 		~0UL, {
--			{ 0x00a0, 0x000a },
--			{ 0x2001, 0x000f },
--			{ 0x4002, 0x000f },
-+			{ 0x0000, 0x0000 },
-+			{ 0x0000, 0x0000 },
-+			{ 0x0000, 0x0000 },
- 		},
- 	}
- };

patch/kernel/archive/station-p2-5.18/0120-v11-12-24-drm-rockchip-dw_hdmi-relax-mode_valid-hook.patch

@@ -1,13 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index cb43e7b47157d..a77a46a709809 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -259,7 +259,7 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data,
- 	int i;
- 
- 	for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
--		if (pclk == mpll_cfg[i].mpixelclock) {
-+		if (pclk <= mpll_cfg[i].mpixelclock) {
- 			valid = true;
- 			break;
- 		}

patch/kernel/archive/station-p2-5.18/0130-v11-13-24-drm-rockchip-dw_hdmi-Set-cur_ctr-to-0-always.patch

@@ -1,27 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index a77a46a709809..ed480f6548f0e 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -180,20 +180,8 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
- static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
- 	/*      pixelclk    bpp8    bpp10   bpp12 */
- 	{
--		40000000,  { 0x0018, 0x0018, 0x0018 },
--	}, {
--		65000000,  { 0x0028, 0x0028, 0x0028 },
--	}, {
--		66000000,  { 0x0038, 0x0038, 0x0038 },
--	}, {
--		74250000,  { 0x0028, 0x0038, 0x0038 },
--	}, {
--		83500000,  { 0x0028, 0x0038, 0x0038 },
--	}, {
--		146250000, { 0x0038, 0x0038, 0x0038 },
--	}, {
--		148500000, { 0x0000, 0x0038, 0x0038 },
--	}, {
-+		600000000, { 0x0000, 0x0000, 0x0000 },
-+	},  {
- 		~0UL,      { 0x0000, 0x0000, 0x0000},
- 	}
- };

patch/kernel/archive/station-p2-5.18/0140-v11-14-24-drm-rockchip-dw_hdmi-add-default-594Mhz-clk-for-4K-60hz.patch

@@ -1,12 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index ed480f6548f0e..de8720fd7d5d6 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -191,6 +191,7 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
- 	{ 74250000,  0x8009, 0x0004, 0x0272},
- 	{ 148500000, 0x802b, 0x0004, 0x028d},
- 	{ 297000000, 0x8039, 0x0005, 0x028d},
-+	{ 594000000, 0x8039, 0x0000, 0x019d},
- 	{ ~0UL,	     0x0000, 0x0000, 0x0000}
- };
- 

patch/kernel/archive/station-p2-5.18/0150-v11-15-24-dt-bindings-display-rockchip-dw-hdmi-Make-unwedge-pinctrl-optional.patch

@@ -1,12 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-index 38ebb69830287..d7cb2b2be60e8 100644
---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-@@ -89,6 +89,7 @@ properties:
-       The unwedge pinctrl entry shall drive the DDC SDA line low. This is
-       intended to work around a hardware errata that can cause the DDC I2C
-       bus to be wedged.
-+    minItems: 1
-     items:
-       - const: default
-       - const: unwedge

patch/kernel/archive/station-p2-5.18/0160-v11-16-24-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch

@@ -1,113 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-index 3839eef5e4f76..595fa2562cb8e 100644
---- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-@@ -18,3 +18,7 @@ power-domain@RK3568_PD_PIPE {
- 		#power-domain-cells = <0>;
- 	};
- };
-+
-+&vop {
-+	compatible = "rockchip,rk3566-vop";
-+};
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-index 5b0f528d68180..4deab90e83834 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-@@ -114,3 +114,7 @@ power-domain@RK3568_PD_PIPE {
- 		#power-domain-cells = <0>;
- 	};
- };
-+
-+&vop {
-+	compatible = "rockchip,rk3568-vop";
-+};
-diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-index 7cdef800cb3ce..fdb7a9a6ca743 100644
---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-@@ -129,6 +129,11 @@ opp-1800000000 {
- 		};
- 	};
- 
-+	display_subsystem: display-subsystem {
-+		compatible = "rockchip,display-subsystem";
-+		ports = <&vop_out>;
-+	};
-+
- 	firmware {
- 		scmi: scmi {
- 			compatible = "arm,scmi-smc";
-@@ -569,6 +574,52 @@ gmac1_mtl_tx_setup: tx-queues-config {
- 		};
- 	};
- 
-+	vop: vop@fe040000 {
-+		reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
-+		reg-names = "regs", "gamma_lut";
-+		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
-+			 <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
-+		clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
-+		iommus = <&vop_mmu>;
-+		power-domains = <&power RK3568_PD_VO>;
-+		rockchip,grf = <&grf>;
-+		status = "disabled";
-+
-+		vop_out: ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			vp0: port@0 {
-+				reg = <0>;
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+			};
-+
-+			vp1: port@1 {
-+				reg = <1>;
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+			};
-+
-+			vp2: port@2 {
-+				reg = <2>;
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+			};
-+		};
-+	};
-+
-+	vop_mmu: iommu@fe043e00 {
-+		compatible = "rockchip,rk3568-iommu";
-+		reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
-+		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
-+		clock-names = "aclk", "iface";
-+		#iommu-cells = <0>;
-+		status = "disabled";
-+	};
-+
- 	qos_gpu: qos@fe128000 {
- 		compatible = "rockchip,rk3568-qos", "syscon";
- 		reg = <0x0 0xfe128000 0x0 0x20>;
-diff --git a/include/dt-bindings/soc/rockchip,vop2.h b/include/dt-bindings/soc/rockchip,vop2.h
-new file mode 100644
-index 0000000000000..6e66a802b96a5
---- /dev/null
-+++ b/include/dt-bindings/soc/rockchip,vop2.h
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
-+
-+#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H
-+#define __DT_BINDINGS_ROCKCHIP_VOP2_H
-+
-+#define ROCKCHIP_VOP2_EP_RGB0	1
-+#define ROCKCHIP_VOP2_EP_HDMI0	2
-+#define ROCKCHIP_VOP2_EP_EDP0	3
-+#define ROCKCHIP_VOP2_EP_MIPI0	4
-+#define ROCKCHIP_VOP2_EP_LVDS0	5
-+#define ROCKCHIP_VOP2_EP_MIPI1	6
-+#define ROCKCHIP_VOP2_EP_LVDS1	7
-+
-+#endif /* __DT_BINDINGS_ROCKCHIP_VOP2_H */

patch/kernel/archive/station-p2-5.18/0170-v11-17-24-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch

@@ -1,43 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-index fdb7a9a6ca743..1a359bbf65300 100644
---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-@@ -620,6 +620,38 @@ vop_mmu: iommu@fe043e00 {
- 		status = "disabled";
- 	};
- 
-+	hdmi: hdmi@fe0a0000 {
-+		compatible = "rockchip,rk3568-dw-hdmi";
-+		reg = <0x0 0xfe0a0000 0x0 0x20000>;
-+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cru PCLK_HDMI_HOST>,
-+			 <&cru CLK_HDMI_SFR>,
-+			 <&cru CLK_HDMI_CEC>,
-+			 <&pmucru CLK_HDMI_REF>,
-+			 <&cru HCLK_VO>;
-+		clock-names = "iahb", "isfr", "cec", "ref";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
-+		power-domains = <&power RK3568_PD_VO>;
-+		reg-io-width = <4>;
-+		rockchip,grf = <&grf>;
-+		#sound-dai-cells = <0>;
-+		status = "disabled";
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			hdmi_in: port@0 {
-+				reg = <0>;
-+			};
-+
-+			hdmi_out: port@1 {
-+				reg = <1>;
-+			};
-+		};
-+	};
-+
- 	qos_gpu: qos@fe128000 {
- 		compatible = "rockchip,rk3568-qos", "syscon";
- 		reg = <0x0 0xfe128000 0x0 0x20>;

patch/kernel/archive/station-p2-5.18/0180-v11-18-24-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch

@@ -1,76 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-index a794a0ea5c701..096b66d7697e2 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-@@ -8,6 +8,7 @@
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/leds/common.h>
- #include <dt-bindings/pinctrl/rockchip.h>
-+#include <dt-bindings/soc/rockchip,vop2.h>
- #include "rk3568.dtsi"
- 
- / {
-@@ -34,6 +35,17 @@ dc_12v: dc-12v {
- 		regulator-max-microvolt = <12000000>;
- 	};
- 
-+	hdmi-con {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&hdmi_out_con>;
-+			};
-+		};
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 
-@@ -189,6 +201,24 @@ &gpu {
- 	status = "okay";
- };
- 
-+&hdmi {
-+	avdd-0v9-supply = <&vdda0v9_image>;
-+	avdd-1v8-supply = <&vcca1v8_image>;
-+	status = "okay";
-+};
-+
-+&hdmi_in {
-+	hdmi_in_vp0: endpoint {
-+		remote-endpoint = <&vp0_out_hdmi>;
-+	};
-+};
-+
-+&hdmi_out {
-+	hdmi_out_con: endpoint {
-+		remote-endpoint = <&hdmi_con_in>;
-+	};
-+};
-+
- &i2c0 {
- 	status = "okay";
- 
-@@ -589,3 +619,20 @@ &usb2phy1_otg {
- 	phy-supply = <&vcc5v0_usb_host>;
- 	status = "okay";
- };
-+
-+&vop {
-+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-+	status = "okay";
-+};
-+
-+&vop_mmu {
-+	status = "okay";
-+};
-+
-+&vp0 {
-+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-+		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-+		remote-endpoint = <&hdmi_in_vp0>;
-+	};
-+};

patch/kernel/archive/station-p2-5.18/0190-v11-19-24-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz64a.patch

@@ -1,76 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-index dd7f4b9b686b8..6504f7ab3ea77 100644
---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-@@ -4,6 +4,7 @@
- 
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/pinctrl/rockchip.h>
-+#include <dt-bindings/soc/rockchip,vop2.h>
- #include "rk3566.dtsi"
- 
- / {
-@@ -35,6 +36,17 @@ fan: gpio_fan {
- 		#cooling-cells = <2>;
- 	};
- 
-+	hdmi-con {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&hdmi_out_con>;
-+			};
-+		};
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 
-@@ -248,6 +260,24 @@ &gpu {
- 	status = "okay";
- };
- 
-+&hdmi {
-+	avdd-0v9-supply = <&vdda_0v9>;
-+	avdd-1v8-supply = <&vcc_1v8>;
-+	status = "okay";
-+};
-+
-+&hdmi_in {
-+	hdmi_in_vp0: endpoint {
-+		remote-endpoint = <&vp0_out_hdmi>;
-+	};
-+};
-+
-+&hdmi_out {
-+	hdmi_out_con: endpoint {
-+		remote-endpoint = <&hdmi_con_in>;
-+	};
-+};
-+
- &i2c0 {
- 	status = "okay";
- 
-@@ -685,3 +715,20 @@ &usb2phy1_otg {
- 	phy-supply = <&vcc5v0_usb20_host>;
- 	status = "okay";
- };
-+
-+&vop {
-+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-+	status = "okay";
-+};
-+
-+&vop_mmu {
-+	status = "okay";
-+};
-+
-+&vp0 {
-+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-+		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-+		remote-endpoint = <&hdmi_in_vp0>;
-+	};
-+};

patch/kernel/archive/station-p2-5.18/0200-v11-21-24-drm-rockchip-Make-VOP-driver-optional.patch

@@ -1,49 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
-index fa5cfda4e90e3..22cf6c8402c89 100644
---- a/drivers/gpu/drm/rockchip/Kconfig
-+++ b/drivers/gpu/drm/rockchip/Kconfig
-@@ -23,8 +23,16 @@ config DRM_ROCKCHIP
- 
- if DRM_ROCKCHIP
- 
-+config ROCKCHIP_VOP
-+	bool "Rockchip VOP driver"
-+	default y
-+	help
-+	  This selects support for the VOP driver. You should enable it
-+	  on older SoCs.
-+
- config ROCKCHIP_ANALOGIX_DP
- 	bool "Rockchip specific extensions for Analogix DP driver"
-+	depends on ROCKCHIP_VOP
- 	help
- 	  This selects support for Rockchip SoC specific extensions
- 	  for the Analogix Core DP driver. If you want to enable DP
-diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
-index 1a56f696558ca..dfc5512fdb9f1 100644
---- a/drivers/gpu/drm/rockchip/Makefile
-+++ b/drivers/gpu/drm/rockchip/Makefile
-@@ -4,8 +4,9 @@
- # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
- 
- rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \
--		rockchip_drm_gem.o rockchip_drm_vop.o rockchip_vop_reg.o
-+		rockchip_drm_gem.o
- 
-+rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o
- rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
- rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o
- rockchipdrm-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-index 0dc09d92d92d6..6ab0460819467 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-@@ -481,7 +481,7 @@ static int __init rockchip_drm_init(void)
- 		return -ENODEV;
- 
- 	num_rockchip_sub_drivers = 0;
--	ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_DRM_ROCKCHIP);
-+	ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
- 	ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
- 				CONFIG_ROCKCHIP_LVDS);
- 	ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,

patch/kernel/archive/station-p2-5.18/0220-v11-23-24-dt-bindings-display-rockchip-Add-binding-for-VOP2.patch

@@ -1,146 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
-new file mode 100644
-index 0000000000000..655d9b327f7d3
---- /dev/null
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
-@@ -0,0 +1,140 @@
-+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: Rockchip SoC display controller (VOP2)
-+
-+description:
-+  VOP2 (Video Output Processor v2) is the display controller for the Rockchip
-+  series of SoCs which transfers the image data from a video memory
-+  buffer to an external LCD interface.
-+
-+maintainers:
-+  - Sandy Huang <hjc@rock-chips.com>
-+  - Heiko Stuebner <heiko@sntech.de>
-+
-+properties:
-+  compatible:
-+    enum:
-+      - rockchip,rk3566-vop
-+      - rockchip,rk3568-vop
-+
-+  reg:
-+    minItems: 1
-+    items:
-+      - description:
-+          Must contain one entry corresponding to the base address and length
-+          of the register space.
-+      - description:
-+          Can optionally contain a second entry corresponding to
-+          the CRTC gamma LUT address.
-+
-+  interrupts:
-+    maxItems: 1
-+    description:
-+      The VOP interrupt is shared by several interrupt sources, such as
-+      frame start (VSYNC), line flag and other status interrupts.
-+
-+  clocks:
-+    items:
-+      - description: Clock for ddr buffer transfer.
-+      - description: Clock for the ahb bus to R/W the phy regs.
-+      - description: Pixel clock for video port 0.
-+      - description: Pixel clock for video port 1.
-+      - description: Pixel clock for video port 2.
-+
-+  clock-names:
-+    items:
-+      - const: aclk
-+      - const: hclk
-+      - const: dclk_vp0
-+      - const: dclk_vp1
-+      - const: dclk_vp2
-+
-+  rockchip,grf:
-+    $ref: /schemas/types.yaml#/definitions/phandle
-+    description:
-+      Phandle to GRF regs used for misc control
-+
-+  ports:
-+    $ref: /schemas/graph.yaml#/properties/ports
-+
-+    properties:
-+      port@0:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description:
-+          Output endpoint of VP0
-+
-+      port@1:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description:
-+          Output endpoint of VP1
-+
-+      port@2:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description:
-+          Output endpoint of VP2
-+
-+  iommus:
-+    maxItems: 1
-+
-+  power-domains:
-+    maxItems: 1
-+
-+required:
-+  - compatible
-+  - reg
-+  - interrupts
-+  - clocks
-+  - clock-names
-+  - ports
-+
-+additionalProperties: false
-+
-+examples:
-+  - |
-+        #include <dt-bindings/clock/rk3568-cru.h>
-+        #include <dt-bindings/interrupt-controller/arm-gic.h>
-+        #include <dt-bindings/power/rk3568-power.h>
-+        bus {
-+            #address-cells = <2>;
-+            #size-cells = <2>;
-+            vop: vop@fe040000 {
-+                compatible = "rockchip,rk3568-vop";
-+                reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
-+                interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
-+                clocks = <&cru ACLK_VOP>,
-+                         <&cru HCLK_VOP>,
-+                         <&cru DCLK_VOP0>,
-+                         <&cru DCLK_VOP1>,
-+                         <&cru DCLK_VOP2>;
-+                clock-names = "aclk",
-+                              "hclk",
-+                              "dclk_vp0",
-+                              "dclk_vp1",
-+                              "dclk_vp2";
-+                power-domains = <&power RK3568_PD_VO>;
-+                iommus = <&vop_mmu>;
-+                vop_out: ports {
-+                    #address-cells = <1>;
-+                    #size-cells = <0>;
-+                    vp0: port@0 {
-+                        reg = <0>;
-+                        #address-cells = <1>;
-+                        #size-cells = <0>;
-+                    };
-+                    vp1: port@1 {
-+                        reg = <1>;
-+                        #address-cells = <1>;
-+                        #size-cells = <0>;
-+                    };
-+                    vp2: port@2 {
-+                        reg = <2>;
-+                        #address-cells = <1>;
-+                        #size-cells = <0>;
-+                    };
-+                };
-+            };
-+        };

patch/kernel/archive/station-p2-5.18/0230-v11-24-24-dt-bindings-display-rockchip-dw-hdmi-fix-ports-description.patch

@@ -1,41 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-index d7cb2b2be60e8..7e59dee15a5f4 100644
---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
-@@ -97,27 +97,21 @@ properties:
-   ports:
-     $ref: /schemas/graph.yaml#/properties/ports
- 
--    properties:
--      port:
--        $ref: /schemas/graph.yaml#/$defs/port-base
--        unevaluatedProperties: false
-+    patternProperties:
-+      "^port(@0)?$":
-+        $ref: /schemas/graph.yaml#/properties/port
-         description: Input of the DWC HDMI TX
--
-         properties:
-+          endpoint:
-+            description: Connection to the VOP
-           endpoint@0:
--            $ref: /schemas/graph.yaml#/properties/endpoint
-             description: Connection to the VOPB
--
-           endpoint@1:
--            $ref: /schemas/graph.yaml#/properties/endpoint
-             description: Connection to the VOPL
--
--        required:
--          - endpoint@0
--          - endpoint@1
--
--    required:
--      - port
-+    properties:
-+      port@1:
-+        $ref: /schemas/graph.yaml#/properties/port
-+        description: Output of the DWC HDMI TX
- 
-   rockchip,grf:
-     $ref: /schemas/types.yaml#/definitions/phandle

patch/kernel/archive/station-p2-5.18/0240-v5-1-5-dt-bindings-soc-grf-add-rk3566-pipe-grf-compatible.patch

@@ -1,12 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-index b2ba7bed89b2..3be3cfd52f7b 100644
---- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-@@ -15,6 +15,7 @@ properties:
-       - items:
-           - enum:
-               - rockchip,rk3288-sgrf
-+              - rockchip,rk3566-pipe-grf
-               - rockchip,rk3568-usb2phy-grf
-               - rockchip,rv1108-usbgrf
-           - const: syscon

patch/kernel/archive/station-p2-5.18/0250-v5-2-5-soc-rockchip-set-dwc3-clock-for-rk3566.patch

@@ -1,35 +0,0 @@
-diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
-index 494cf2b5bf7b..384461b70684 100644
---- a/drivers/soc/rockchip/grf.c
-+++ b/drivers/soc/rockchip/grf.c
-@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
- 	.num_values = ARRAY_SIZE(rk3399_defaults),
- };
- 
-+#define RK3566_GRF_USB3OTG0_CON1	0x0104
-+
-+static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
-+	{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
-+	{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
-+	{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
-+};
-+
-+static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
-+	.values = rk3566_defaults,
-+	.num_values = ARRAY_SIZE(rk3566_defaults),
-+};
-+
-+
- static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
- 	{
- 		.compatible = "rockchip,rk3036-grf",
-@@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
- 	}, {
- 		.compatible = "rockchip,rk3399-grf",
- 		.data = (void *)&rk3399_grf,
-+	}, {
-+		.compatible = "rockchip,rk3566-pipe-grf",
-+		.data = (void *)&rk3566_pipegrf,
- 	},
- 	{ /* sentinel */ },
- };

patch/kernel/archive/station-p2-5.18/0260-v5-3-5-arm64-dts-rockchip-add-rk356x-dwc3-usb3-nodes.patch

@@ -1,103 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-index 3839eef5e4f7..0b957068ff89 100644
---- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
-@@ -6,6 +6,10 @@ / {
- 	compatible = "rockchip,rk3566";
- };
- 
-+&pipegrf {
-+	compatible = "rockchip,rk3566-pipe-grf", "syscon";
-+};
-+
- &power {
- 	power-domain@RK3568_PD_PIPE {
- 		reg = <RK3568_PD_PIPE>;
-@@ -18,3 +22,10 @@ power-domain@RK3568_PD_PIPE {
- 		#power-domain-cells = <0>;
- 	};
- };
-+
-+&usb_host0_xhci {
-+	phys = <&usb2phy0_otg>;
-+	phy-names = "usb2-phy";
-+	extcon = <&usb2phy0>;
-+	maximum-speed = "high-speed";
-+};
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-index 5b0f528d6818..8ba9334f9753 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-@@ -99,6 +99,10 @@ opp-1992000000 {
- 	};
- };
- 
-+&pipegrf {
-+	compatible = "rockchip,rk3568-pipe-grf", "syscon";
-+};
-+
- &power {
- 	power-domain@RK3568_PD_PIPE {
- 		reg = <RK3568_PD_PIPE>;
-@@ -114,3 +118,8 @@ power-domain@RK3568_PD_PIPE {
- 		#power-domain-cells = <0>;
- 	};
- };
-+
-+&usb_host0_xhci {
-+	phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
-+	phy-names = "usb2-phy", "usb3-phy";
-+};
-diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-index 7cdef800cb3c..ca20d7b91fe5 100644
---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-@@ -230,6 +230,40 @@ scmi_shmem: sram@0 {
- 		};
- 	};
- 
-+	usb_host0_xhci: usb@fcc00000 {
-+		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
-+		reg = <0x0 0xfcc00000 0x0 0x400000>;
-+		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
-+			 <&cru ACLK_USB3OTG0>;
-+		clock-names = "ref_clk", "suspend_clk",
-+			      "bus_clk";
-+		dr_mode = "host";
-+		phy_type = "utmi_wide";
-+		power-domains = <&power RK3568_PD_PIPE>;
-+		resets = <&cru SRST_USB3OTG0>;
-+		snps,dis_u2_susphy_quirk;
-+		status = "disabled";
-+	};
-+
-+	usb_host1_xhci: usb@fd000000 {
-+		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
-+		reg = <0x0 0xfd000000 0x0 0x400000>;
-+		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
-+			 <&cru ACLK_USB3OTG1>;
-+		clock-names = "ref_clk", "suspend_clk",
-+			      "bus_clk";
-+		dr_mode = "host";
-+		phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>;
-+		phy-names = "usb2-phy", "usb3-phy";
-+		phy_type = "utmi_wide";
-+		power-domains = <&power RK3568_PD_PIPE>;
-+		resets = <&cru SRST_USB3OTG1>;
-+		snps,dis_u2_susphy_quirk;
-+		status = "disabled";
-+	};
-+
- 	gic: interrupt-controller@fd400000 {
- 		compatible = "arm,gic-v3";
- 		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
-@@ -297,7 +331,6 @@ pmu_io_domains: io-domains {
- 	};
- 
- 	pipegrf: syscon@fdc50000 {
--		compatible = "rockchip,rk3568-pipe-grf", "syscon";
- 		reg = <0x0 0xfdc50000 0x0 0x1000>;
- 	};
- 

patch/kernel/archive/station-p2-5.18/0270-v5-4-5-arm64-dts-rockchip-enable-dwc3-on-quartz64-a.patch

@@ -1,62 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-index dd7f4b9b686b..141a433429b5 100644
---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
-@@ -151,6 +151,16 @@ vcc5v0_usb20_host: vcc5v0_usb20_host {
- 		vin-supply = <&vcc5v0_usb>;
- 	};
- 
-+	vcc5v0_usb20_otg: vcc5v0_usb20_otg {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
-+		regulator-name = "vcc5v0_usb20_otg";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&dcdc_boost>;
-+	};
-+
- 	vcc3v3_sd: vcc3v3_sd {
- 		compatible = "regulator-fixed";
- 		enable-active-low;
-@@ -187,6 +197,10 @@ vcc_wl: vcc_wl {
- 	};
- };
- 
-+&combphy1 {
-+	status = "okay";
-+};
-+
- &cpu0 {
- 	cpu-supply = <&vdd_cpu>;
- };
-@@ -672,6 +686,29 @@ &usb_host1_ohci {
- 	status = "okay";
- };
- 
-+&usb_host0_xhci {
-+	status = "okay";
-+};
-+
-+/* usb3 controller is muxed with sata1 */
-+&usb_host1_xhci {
-+	status = "okay";
-+};
-+
-+&usb2phy0 {
-+	status = "okay";
-+};
-+
-+&usb2phy0_host {
-+	phy-supply = <&vcc5v0_usb20_host>;
-+	status = "okay";
-+};
-+
-+&usb2phy0_otg {
-+	phy-supply = <&vcc5v0_usb20_otg>;
-+	status = "okay";
-+};
-+
- &usb2phy1 {
- 	status = "okay";
- };

patch/kernel/archive/station-p2-5.18/0280-v5-5-5-arm64-dts-rockchip-add-usb3-support-to-rk3568-evb1-v10.patch

@@ -1,85 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-index a794a0ea5c70..622be8be9813 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
-@@ -103,6 +103,18 @@ vcc5v0_usb_host: vcc5v0-usb-host {
- 		vin-supply = <&vcc5v0_usb>;
- 	};
- 
-+	vcc5v0_usb_otg: vcc5v0-usb-otg {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-+		regulator-name = "vcc5v0_usb_otg";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&vcc5v0_usb>;
-+	};
-+
- 	vcc3v3_lcd0_n: vcc3v3-lcd0-n {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc3v3_lcd0_n";
-@@ -136,6 +148,14 @@ regulator-state-mem {
- 	};
- };
- 
-+&combphy0 {
-+	status = "okay";
-+};
-+
-+&combphy1 {
-+	status = "okay";
-+};
-+
- &cpu0 {
- 	cpu-supply = <&vdd_cpu>;
- };
-@@ -507,6 +527,9 @@ usb {
- 		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
- 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
-+		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
- 	};
- };
- 
-@@ -568,6 +591,11 @@ &usb_host0_ohci {
- 	status = "okay";
- };
- 
-+&usb_host0_xhci {
-+	extcon = <&usb2phy0>;
-+	status = "okay";
-+};
-+
- &usb_host1_ehci {
- 	status = "okay";
- };
-@@ -576,6 +604,24 @@ &usb_host1_ohci {
- 	status = "okay";
- };
- 
-+&usb_host1_xhci {
-+	status = "okay";
-+};
-+
-+&usb2phy0 {
-+	status = "okay";
-+};
-+
-+&usb2phy0_host {
-+	phy-supply = <&vcc5v0_usb_host>;
-+	status = "okay";
-+};
-+
-+&usb2phy0_otg {
-+	vbus-supply = <&vcc5v0_usb_otg>;
-+	status = "okay";
-+};
-+
- &usb2phy1 {
- 	status = "okay";
- };

patch/kernel/archive/station-p2-5.18/0290-1-2-arm64-dts-rockchip-Add-USB-nodes-for-BPI-R2-Pro.patch

@@ -1,115 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-index 067fe4a6b178..879557595a64 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-@@ -73,6 +73,50 @@ vcc5v0_sys: vcc5v0-sys {
- 		regulator-max-microvolt = <5000000>;
- 		vin-supply = <&dc_12v>;
- 	};
-+
-+	vcc5v0_usb: vcc5v0_usb {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc5v0_usb";
-+		regulator-always-on;
-+		regulator-boot-on;
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&dc_12v>;
-+	};
-+
-+	vcc5v0_usb_host: vcc5v0-usb-host {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&vcc5v0_usb_host_en>;
-+		regulator-name = "vcc5v0_usb_host";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&vcc5v0_usb>;
-+	};
-+
-+	vcc5v0_usb_otg: vcc5v0-usb-otg {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&vcc5v0_usb_otg_en>;
-+		regulator-name = "vcc5v0_usb_otg";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		vin-supply = <&vcc5v0_usb>;
-+	};
-+};
-+
-+&combphy0 {
-+	/* used for USB3 */
-+	status = "okay";
-+};
-+
-+&combphy1 {
-+	/* used for USB3 */
-+	status = "okay";
- };
- 
- &gmac0 {
-@@ -368,6 +412,16 @@ pmic_int: pmic_int {
- 				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- 		};
- 	};
-+
-+	usb {
-+		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
-+			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+
-+		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
-+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
- };
- 
- &pmu_io_domains {
-@@ -485,3 +539,42 @@ &uart9 {
- 	pinctrl-0 = <&uart9m1_xfer>;
- 	status = "disabled";
- };
-+
-+&usb_host0_ehci {
-+	status = "okay";
-+};
-+
-+&usb_host0_ohci {
-+	status = "okay";
-+};
-+
-+&usb_host0_xhci {
-+	extcon = <&usb2phy0>;
-+	status = "okay";
-+};
-+
-+&usb_host1_ehci {
-+	status = "okay";
-+};
-+
-+&usb_host1_ohci {
-+	status = "okay";
-+};
-+
-+&usb_host1_xhci {
-+	status = "okay";
-+};
-+
-+&usb2phy0 {
-+	status = "okay";
-+};
-+
-+&usb2phy0_host {
-+	phy-supply = <&vcc5v0_usb_host>;
-+	status = "okay";
-+};
-+
-+&usb2phy0_otg {
-+	phy-supply = <&vcc5v0_usb_otg>;
-+	status = "okay";
-+};

patch/kernel/archive/station-p2-5.18/0300-2-2-arm64-dts-rockchip-Add-SATA-support-to-BPI-R2-Pro.patch

@@ -1,27 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-index 879557595a64..40cf2236c0b6 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-@@ -119,6 +119,11 @@ &combphy1 {
- 	status = "okay";
- };
- 
-+&combphy2 {
-+	/* used for SATA */
-+	status = "okay";
-+};
-+
- &gmac0 {
- 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
-@@ -484,6 +489,10 @@ &saradc {
- 	status = "okay";
- };
- 
-+&sata2 {
-+	status = "okay";
-+};
-+
- &sdhci {
- 	bus-width = <8>;
- 	max-frequency = <200000000>;

patch/kernel/archive/station-p2-5.18/0310-drm-rockchip-Refactor-IOMMU-initialisation.patch

@@ -1,187 +0,0 @@
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-index 4eaeb430c83a..7efd12312354 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
-@@ -7,7 +7,6 @@
-  */
- 
- #include <linux/dma-mapping.h>
--#include <linux/dma-iommu.h>
- #include <linux/pm_runtime.h>
- #include <linux/module.h>
- #include <linux/of_graph.h>
-@@ -34,7 +33,6 @@
- #define DRIVER_MAJOR	1
- #define DRIVER_MINOR	0
- 
--static bool is_support_iommu = true;
- static const struct drm_driver rockchip_drm_driver;
- 
- /*
-@@ -48,7 +46,7 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
- 	struct rockchip_drm_private *private = drm_dev->dev_private;
- 	int ret;
- 
--	if (!is_support_iommu)
-+	if (!private->domain)
- 		return 0;
- 
- 	ret = iommu_attach_device(private->domain, dev);
-@@ -64,12 +62,22 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
- 				    struct device *dev)
- {
- 	struct rockchip_drm_private *private = drm_dev->dev_private;
--	struct iommu_domain *domain = private->domain;
- 
--	if (!is_support_iommu)
-+	if (!private->domain)
- 		return;
- 
--	iommu_detach_device(domain, dev);
-+	iommu_detach_device(private->domain, dev);
-+}
-+
-+void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
-+				  struct device *dev)
-+{
-+	struct rockchip_drm_private *private = drm_dev->dev_private;
-+
-+	if (!device_iommu_mapped(dev))
-+		private->iommu_dev = ERR_PTR(-ENODEV);
-+	else if (!private->iommu_dev)
-+		private->iommu_dev = dev;
- }
- 
- static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
-@@ -78,10 +86,10 @@ static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
- 	struct iommu_domain_geometry *geometry;
- 	u64 start, end;
- 
--	if (!is_support_iommu)
-+	if (IS_ERR_OR_NULL(private->iommu_dev))
- 		return 0;
- 
--	private->domain = iommu_domain_alloc(&platform_bus_type);
-+	private->domain = iommu_domain_alloc(private->iommu_dev->bus);
- 	if (!private->domain)
- 		return -ENOMEM;
- 
-@@ -101,7 +109,7 @@ static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
- {
- 	struct rockchip_drm_private *private = drm_dev->dev_private;
- 
--	if (!is_support_iommu)
-+	if (!private->domain)
- 		return;
- 
- 	drm_mm_takedown(&private->mm);
-@@ -137,24 +145,24 @@ static int rockchip_drm_bind(struct device *dev)
- 
- 	drm_dev->dev_private = private;
- 
--	ret = rockchip_drm_init_iommu(drm_dev);
--	if (ret)
--		goto err_free;
--
- 	ret = drmm_mode_config_init(drm_dev);
- 	if (ret)
--		goto err_iommu_cleanup;
-+		goto err_free;
- 
- 	rockchip_drm_mode_config_init(drm_dev);
- 
- 	/* Try to bind all sub drivers. */
- 	ret = component_bind_all(dev, drm_dev);
- 	if (ret)
--		goto err_iommu_cleanup;
-+		goto err_free;
-+
-+	ret = rockchip_drm_init_iommu(drm_dev);
-+	if (ret)
-+		goto err_unbind_all;
- 
- 	ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc);
- 	if (ret)
--		goto err_unbind_all;
-+		goto err_iommu_cleanup;
- 
- 	drm_mode_config_reset(drm_dev);
- 
-@@ -170,10 +178,10 @@ static int rockchip_drm_bind(struct device *dev)
- 	return 0;
- err_kms_helper_poll_fini:
- 	drm_kms_helper_poll_fini(drm_dev);
--err_unbind_all:
--	component_unbind_all(dev, drm_dev);
- err_iommu_cleanup:
- 	rockchip_iommu_cleanup(drm_dev);
-+err_unbind_all:
-+	component_unbind_all(dev, drm_dev);
- err_free:
- 	drm_dev_put(drm_dev);
- 	return ret;
-@@ -342,8 +350,6 @@ static int rockchip_drm_platform_of_probe(struct device *dev)
- 		return -ENODEV;
- 
- 	for (i = 0;; i++) {
--		struct device_node *iommu;
--
- 		port = of_parse_phandle(np, "ports", i);
- 		if (!port)
- 			break;
-@@ -353,21 +359,7 @@ static int rockchip_drm_platform_of_probe(struct device *dev)
- 			continue;
- 		}
- 
--		iommu = of_parse_phandle(port->parent, "iommus", 0);
--		if (!iommu || !of_device_is_available(iommu)) {
--			DRM_DEV_DEBUG(dev,
--				      "no iommu attached for %pOF, using non-iommu buffers\n",
--				      port->parent);
--			/*
--			 * if there is a crtc not support iommu, force set all
--			 * crtc use non-iommu buffer.
--			 */
--			is_support_iommu = false;
--		}
--
- 		found = true;
--
--		of_node_put(iommu);
- 		of_node_put(port);
- 	}
- 
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-index 143a48330f84..008c44aef400 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
-@@ -44,6 +44,7 @@ struct rockchip_crtc_state {
-  */
- struct rockchip_drm_private {
- 	struct iommu_domain *domain;
-+	struct device *iommu_dev;
- 	struct mutex mm_lock;
- 	struct drm_mm mm;
- };
-@@ -52,6 +53,8 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
- 				   struct device *dev);
- void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
- 				    struct device *dev);
-+void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
-+				  struct device *dev);
- int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
- 
- int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index 3e8d9e2d1b67..4c38c53e9f65 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -2175,6 +2175,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
- 		}
- 	}
- 
-+	rockchip_drm_dma_init_device(drm_dev, dev);
-+
- 	return 0;
- 
- err_disable_pm_runtime:

patch/kernel/archive/station-p2-5.18/0320-RFC-v2-1-4-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch

@@ -1,63 +0,0 @@
-diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
-index 19f0035d4410..46dee0714382 100644
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -1522,11 +1522,11 @@ static void
- mt7530_hw_vlan_add(struct mt7530_priv *priv,
- 		   struct mt7530_hw_vlan_entry *entry)
- {
-+	struct dsa_port *dp = dsa_to_port(priv->ds, entry->port);
- 	u8 new_members;
- 	u32 val;
- 
--	new_members = entry->old_members | BIT(entry->port) |
--		      BIT(MT7530_CPU_PORT);
-+	new_members = entry->old_members | BIT(entry->port);
- 
- 	/* Validate the entry with independent learning, create egress tag per
- 	 * VLAN and joining the port as one of the port members.
-@@ -1537,22 +1537,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *priv,
- 
- 	/* Decide whether adding tag or not for those outgoing packets from the
- 	 * port inside the VLAN.
--	 */
--	val = entry->untagged ? MT7530_VLAN_EGRESS_UNTAG :
--				MT7530_VLAN_EGRESS_TAG;
--	mt7530_rmw(priv, MT7530_VAWD2,
--		   ETAG_CTRL_P_MASK(entry->port),
--		   ETAG_CTRL_P(entry->port, val));
--
--	/* CPU port is always taken as a tagged port for serving more than one
-+	 * CPU port is always taken as a tagged port for serving more than one
- 	 * VLANs across and also being applied with egress type stack mode for
- 	 * that VLAN tags would be appended after hardware special tag used as
- 	 * DSA tag.
- 	 */
-+	if (dsa_port_is_cpu(dp))
-+		val = MT7530_VLAN_EGRESS_STACK;
-+	else if (entry->untagged)
-+		val = MT7530_VLAN_EGRESS_UNTAG;
-+	else
-+		val = MT7530_VLAN_EGRESS_TAG;
- 	mt7530_rmw(priv, MT7530_VAWD2,
--		   ETAG_CTRL_P_MASK(MT7530_CPU_PORT),
--		   ETAG_CTRL_P(MT7530_CPU_PORT,
--			       MT7530_VLAN_EGRESS_STACK));
-+		   ETAG_CTRL_P_MASK(entry->port),
-+		   ETAG_CTRL_P(entry->port, val));
- }
- 
- static void
-@@ -1571,11 +1569,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *priv,
- 		return;
- 	}
- 
--	/* If certain member apart from CPU port is still alive in the VLAN,
--	 * the entry would be kept valid. Otherwise, the entry is got to be
--	 * disabled.
--	 */
--	if (new_members && new_members != BIT(MT7530_CPU_PORT)) {
-+	if (new_members) {
- 		val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) |
- 		      VLAN_VALID;
- 		mt7530_write(priv, MT7530_VAWD1, val);

patch/kernel/archive/station-p2-5.18/0330-RFC-v2-2-4-net-dsa-mt7530-rework-mt753-01-_setup.patch

@@ -1,61 +0,0 @@
-diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
-index 46dee0714382..144c29f8fefc 100644
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -2087,11 +2087,12 @@ static int
- mt7530_setup(struct dsa_switch *ds)
- {
- 	struct mt7530_priv *priv = ds->priv;
-+	struct device_node *dn = NULL;
- 	struct device_node *phy_node;
- 	struct device_node *mac_np;
- 	struct mt7530_dummy_poll p;
- 	phy_interface_t interface;
--	struct device_node *dn;
-+	struct dsa_port *cpu_dp;
- 	u32 id, val;
- 	int ret, i;
- 
-@@ -2099,7 +2100,19 @@ mt7530_setup(struct dsa_switch *ds)
- 	 * controller also is the container for two GMACs nodes representing
- 	 * as two netdev instances.
- 	 */
--	dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent;
-+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {
-+		dn = cpu_dp->master->dev.of_node->parent;
-+		/* It doesn't matter which CPU port is found first,
-+		 * their masters should share the same parent OF node
-+		 */
-+		break;
-+	}
-+
-+	if (!dn) {
-+		dev_err(ds->dev, "parent OF node of DSA master not found");
-+		return -EINVAL;
-+	}
-+
- 	ds->assisted_learning_on_cpu_port = true;
- 	ds->mtu_enforcement_ingress = true;
- 
-@@ -2260,6 +2273,7 @@ mt7531_setup(struct dsa_switch *ds)
- {
- 	struct mt7530_priv *priv = ds->priv;
- 	struct mt7530_dummy_poll p;
-+	struct dsa_port *cpu_dp;
- 	u32 val, id;
- 	int ret, i;
- 
-@@ -2332,8 +2346,11 @@ mt7531_setup(struct dsa_switch *ds)
- 				 CORE_PLL_GROUP4, val);
- 
- 	/* BPDU to CPU port */
--	mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
--		   BIT(MT7530_CPU_PORT));
-+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {
-+		mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
-+			   BIT(cpu_dp->index));
-+		break;
-+	}
- 	mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
- 		   MT753X_BPDU_CPU_ONLY);
- 

patch/kernel/archive/station-p2-5.18/0340-RFC-v2-3-4-net-dsa-mt7530-get-cpu-port-via-dp--cpu_dp-instead-of-constant.patch

@@ -1,100 +0,0 @@
-diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
-index 144c29f8fefc..8bf27937e577 100644
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -1033,6 +1033,7 @@ static int
- mt7530_port_enable(struct dsa_switch *ds, int port,
- 		   struct phy_device *phy)
- {
-+	struct dsa_port *dp = dsa_to_port(ds, port);
- 	struct mt7530_priv *priv = ds->priv;
- 
- 	mutex_lock(&priv->reg_mutex);
-@@ -1041,7 +1042,11 @@ mt7530_port_enable(struct dsa_switch *ds, int port,
- 	 * restore the port matrix if the port is the member of a certain
- 	 * bridge.
- 	 */
--	priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT));
-+	if (dsa_port_is_user(dp)) {
-+		struct dsa_port *cpu_dp = dp->cpu_dp;
-+
-+		priv->ports[port].pm |= PCR_MATRIX(BIT(cpu_dp->index));
-+	}
- 	priv->ports[port].enable = true;
- 	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
- 		   priv->ports[port].pm);
-@@ -1190,7 +1195,8 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port,
- 			struct netlink_ext_ack *extack)
- {
- 	struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
--	u32 port_bitmap = BIT(MT7530_CPU_PORT);
-+	struct dsa_port *cpu_dp = dp->cpu_dp;
-+	u32 port_bitmap = BIT(cpu_dp->index);
- 	struct mt7530_priv *priv = ds->priv;
- 
- 	mutex_lock(&priv->reg_mutex);
-@@ -1267,9 +1273,12 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
- 	 * the CPU port get out of VLAN filtering mode.
- 	 */
- 	if (all_user_ports_removed) {
--		mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT),
-+		struct dsa_port *dp = dsa_to_port(ds, port);
-+		struct dsa_port *cpu_dp = dp->cpu_dp;
-+
-+		mt7530_write(priv, MT7530_PCR_P(cpu_dp->index),
- 			     PCR_MATRIX(dsa_user_ports(priv->ds)));
--		mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), PORT_SPEC_TAG
-+		mt7530_write(priv, MT7530_PVC_P(cpu_dp->index), PORT_SPEC_TAG
- 			     | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
- 	}
- }
-@@ -1307,6 +1316,7 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
- 			 struct dsa_bridge bridge)
- {
- 	struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
-+	struct dsa_port *cpu_dp = dp->cpu_dp;
- 	struct mt7530_priv *priv = ds->priv;
- 
- 	mutex_lock(&priv->reg_mutex);
-@@ -1335,8 +1345,8 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
- 	 */
- 	if (priv->ports[port].enable)
- 		mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
--			   PCR_MATRIX(BIT(MT7530_CPU_PORT)));
--	priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT));
-+			   PCR_MATRIX(BIT(cpu_dp->index)));
-+	priv->ports[port].pm = PCR_MATRIX(BIT(cpu_dp->index));
- 
- 	/* When a port is removed from the bridge, the port would be set up
- 	 * back to the default as is at initial boot which is a VLAN-unaware
-@@ -1503,6 +1513,9 @@ static int
- mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
- 			   struct netlink_ext_ack *extack)
- {
-+	struct dsa_port *dp = dsa_to_port(ds, port);
-+	struct dsa_port *cpu_dp = dp->cpu_dp;
-+
- 	if (vlan_filtering) {
- 		/* The port is being kept as VLAN-unaware port when bridge is
- 		 * set up with vlan_filtering not being set, Otherwise, the
-@@ -1510,7 +1523,7 @@ mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
- 		 * for becoming a VLAN-aware port.
- 		 */
- 		mt7530_port_set_vlan_aware(ds, port);
--		mt7530_port_set_vlan_aware(ds, MT7530_CPU_PORT);
-+		mt7530_port_set_vlan_aware(ds, cpu_dp->index);
- 	} else {
- 		mt7530_port_set_vlan_unaware(ds, port);
- 	}
-diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
-index 91508e2feef9..5895bcfc0f7d 100644
---- a/drivers/net/dsa/mt7530.h
-+++ b/drivers/net/dsa/mt7530.h
-@@ -8,7 +8,6 @@
- 
- #define MT7530_NUM_PORTS		7
- #define MT7530_NUM_PHYS			5
--#define MT7530_CPU_PORT			6
- #define MT7530_NUM_FDB_RECORDS		2048
- #define MT7530_ALL_MEMBERS		0xff
- 

patch/kernel/archive/station-p2-5.18/0350-1-3-arm64-dts-rockchip-set-display-regulators-to-always-on-on-BPI-R2-Pro.patch

@@ -1,28 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-index 2700fb18a3bc..0950f9659bb4 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-@@ -225,6 +225,7 @@ regulator-state-mem {
- 
- 			vdd_gpu: DCDC_REG2 {
- 				regulator-name = "vdd_gpu";
-+				regulator-always-on;
- 				regulator-init-microvolt = <900000>;
- 				regulator-initial-mode = <0x2>;
- 				regulator-min-microvolt = <500000>;
-@@ -274,6 +275,7 @@ regulator-state-mem {
- 
- 			vdda0v9_image: LDO_REG1 {
- 				regulator-name = "vdda0v9_image";
-+				regulator-always-on;
- 				regulator-min-microvolt = <900000>;
- 				regulator-max-microvolt = <900000>;
- 
-@@ -369,6 +371,7 @@ regulator-state-mem {
- 
- 			vcca1v8_image: LDO_REG9 {
- 				regulator-name = "vcca1v8_image";
-+				regulator-always-on;
- 				regulator-min-microvolt = <1800000>;
- 				regulator-max-microvolt = <1800000>;
- 

patch/kernel/archive/station-p2-5.18/0360-2-3-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-BPI-R2-Pro.patch

@@ -1,76 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-index 0950f9659bb4..cc3591251bab 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-@@ -8,6 +8,7 @@
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/leds/common.h>
- #include <dt-bindings/pinctrl/rockchip.h>
-+#include <dt-bindings/soc/rockchip,vop2.h>
- #include "rk3568.dtsi"
- 
- / {
-@@ -54,6 +55,17 @@ dc_12v: dc-12v {
- 		regulator-max-microvolt = <12000000>;
- 	};
- 
-+	hdmi-con {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&hdmi_out_con>;
-+			};
-+		};
-+	};
-+
- 	vcc3v3_sys: vcc3v3-sys {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc3v3_sys";
-@@ -184,6 +196,24 @@ &gmac1m1_rgmii_clk
- 	status = "okay";
- };
- 
-+&hdmi {
-+	avdd-0v9-supply = <&vdda0v9_image>;
-+	avdd-1v8-supply = <&vcca1v8_image>;
-+	status = "okay";
-+};
-+
-+&hdmi_in {
-+	hdmi_in_vp0: endpoint {
-+		remote-endpoint = <&vp0_out_hdmi>;
-+	};
-+};
-+
-+&hdmi_out {
-+	hdmi_out_con: endpoint {
-+		remote-endpoint = <&hdmi_con_in>;
-+	};
-+};
-+
- &i2c0 {
- 	status = "okay";
- 
-@@ -600,3 +630,20 @@ &usb2phy0_otg {
- 	phy-supply = <&vcc5v0_usb_otg>;
- 	status = "okay";
- };
-+
-+&vop {
-+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
-+	status = "okay";
-+};
-+
-+&vop_mmu {
-+	status = "okay";
-+};
-+
-+&vp0 {
-+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
-+		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
-+		remote-endpoint = <&hdmi_in_vp0>;
-+	};
-+};

patch/kernel/archive/station-p2-5.18/0370-3-3-arm64-dts-rockchip-enable-the-gpu-on-BPI-R2-Pro.patch

@@ -1,25 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-index cc3591251bab..10f68d054f76 100644
---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
-@@ -196,6 +196,11 @@ &gmac1m1_rgmii_clk
- 	status = "okay";
- };
- 
-+&gpu {
-+	mali-supply = <&vdd_gpu>;
-+	status = "okay";
-+};
-+
- &hdmi {
- 	avdd-0v9-supply = <&vdda0v9_image>;
- 	avdd-1v8-supply = <&vcca1v8_image>;
-@@ -566,6 +571,8 @@ &spi3 {
- };
- 
- &tsadc {
-+	rockchip,hw-tshut-mode = <1>;
-+	rockchip,hw-tshut-polarity = <0>;
- 	status = "okay";
- };
- 

patch/kernel/archive/station-p2-5.18/0380-RFC-v3-1-5-dt-bindings-phy-rockchip-add-PCIe-v3-phy.patch

@@ -1,88 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
-new file mode 100644
-index 000000000000..ac82f551bbfb
---- /dev/null
-+++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
-@@ -0,0 +1,82 @@
-+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: Rockchip PCIe v3 phy
-+
-+maintainers:
-+  - Heiko Stuebner <heiko@sntech.de>
-+
-+properties:
-+  compatible:
-+    enum:
-+      - rockchip,rk3568-pcie3-phy
-+
-+  reg:
-+    maxItems: 1
-+
-+  clocks:
-+    minItems: 3
-+    maxItems: 3
-+
-+  clock-names:
-+    items:
-+      - const: refclk_m
-+      - const: refclk_n
-+      - const: pclk
-+
-+    minItems: 3
-+
-+  lane-map:
-+    description: which lanes (by position) should be mapped to which
-+      controller (value). 0 means lane unused, higher value means used.
-+      (controller-number +1 )
-+    $ref: /schemas/types.yaml#/definitions/uint32-array
-+    minItems: 2
-+    maxItems: 16
-+    items:
-+      minimum: 0
-+      maximum: 16
-+
-+  "#phy-cells":
-+    const: 0
-+
-+  resets:
-+    maxItems: 1
-+
-+  reset-names:
-+    const: phy
-+
-+  rockchip,phy-grf:
-+    $ref: /schemas/types.yaml#/definitions/phandle
-+    description: phandle to the syscon managing the phy "general register files"
-+
-+  rockchip,pipe-grf:
-+    $ref: /schemas/types.yaml#/definitions/phandle
-+    description: phandle to the syscon managing the pipe "general register files"
-+
-+required:
-+  - compatible
-+  - reg
-+  - rockchip,phy-grf
-+  - "#phy-cells"
-+
-+additionalProperties: false
-+
-+examples:
-+  - |
-+    #include <dt-bindings/clock/rk3568-cru.h>
-+    pcie30phy: phy@fe8c0000 {
-+      compatible = "rockchip,rk3568-pcie3-phy";
-+      reg = <0x0 0xfe8c0000 0x0 0x20000>;
-+      #phy-cells = <0>;
-+      clocks = <&pmucru CLK_PCIE30PHY_REF_M>,
-+               <&pmucru CLK_PCIE30PHY_REF_N>,
-+               <&cru PCLK_PCIE30PHY>;
-+      clock-names = "refclk_m", "refclk_n", "pclk";
-+      resets = <&cru SRST_PCIE30PHY>;
-+      reset-names = "phy";
-+      rockchip,phy-grf = <&pcie30_phy_grf>;
-+    };

patch/kernel/archive/station-p2-5.18/0390-RFC-v3-2-5-dt-bindings-soc-grf-add-pcie30--phy-pipe--grf.patch

@@ -1,15 +0,0 @@
-diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-index 3be3cfd52f7b..a854e1f10d63 100644
---- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
-@@ -16,7 +16,10 @@ properties:
-           - enum:
-               - rockchip,rk3288-sgrf
-               - rockchip,rk3566-pipe-grf
-+              - rockchip,rk3568-pcie3-phy-grf
-               - rockchip,rk3568-usb2phy-grf
-+              - rockchip,rk3588-pcie3-phy-grf
-+              - rockchip,rk3588-pcie3-pipe-grf
-               - rockchip,rv1108-usbgrf
-           - const: syscon
-       - items:

patch/kernel/archive/station-p2-5.18/0400-RFC-v3-3-5-phy-rockchip-Support-PCIe-v3.patch

@@ -1,372 +0,0 @@
-diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
-index 9022e395c056..94360fc96a6f 100644
---- a/drivers/phy/rockchip/Kconfig
-+++ b/drivers/phy/rockchip/Kconfig
-@@ -83,6 +83,15 @@ config PHY_ROCKCHIP_PCIE
- 	help
- 	  Enable this to support the Rockchip PCIe PHY.
- 
-+config PHY_ROCKCHIP_SNPS_PCIE3
-+	tristate "Rockchip Snps PCIe3 PHY Driver"
-+	depends on (ARCH_ROCKCHIP && OF) || COMPILE_TEST
-+	depends on HAS_IOMEM
-+	select GENERIC_PHY
-+	select MFD_SYSCON
-+	help
-+	  Enable this to support the Rockchip snps PCIe3 PHY.
-+
- config PHY_ROCKCHIP_TYPEC
- 	tristate "Rockchip TYPEC PHY Driver"
- 	depends on OF && (ARCH_ROCKCHIP || COMPILE_TEST)
-diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile
-index a5041efb5b8f..7eab129230d1 100644
---- a/drivers/phy/rockchip/Makefile
-+++ b/drivers/phy/rockchip/Makefile
-@@ -8,5 +8,6 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI)	+= phy-rockchip-inno-hdmi.o
- obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2)	+= phy-rockchip-inno-usb2.o
- obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY)	+= phy-rockchip-naneng-combphy.o
- obj-$(CONFIG_PHY_ROCKCHIP_PCIE)		+= phy-rockchip-pcie.o
-+obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3)	+= phy-rockchip-snps-pcie3.o
- obj-$(CONFIG_PHY_ROCKCHIP_TYPEC)	+= phy-rockchip-typec.o
- obj-$(CONFIG_PHY_ROCKCHIP_USB)		+= phy-rockchip-usb.o
-diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
-new file mode 100644
-index 000000000000..9d8fadff8a04
---- /dev/null
-+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
-@@ -0,0 +1,317 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Rockchip PCIE3.0 phy driver
-+ *
-+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+#include <linux/iopoll.h>
-+#include <linux/kernel.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/module.h>
-+#include <linux/of_device.h>
-+#include <linux/phy/pcie.h>
-+#include <linux/phy/phy.h>
-+#include <linux/regmap.h>
-+#include <linux/reset.h>
-+
-+/* Register for RK3568 */
-+#define GRF_PCIE30PHY_CON1			0x4
-+#define GRF_PCIE30PHY_CON6			0x18
-+#define GRF_PCIE30PHY_CON9			0x24
-+#define GRF_PCIE30PHY_STATUS0			0x80
-+#define SRAM_INIT_DONE(reg)			(reg & BIT(14))
-+
-+#define RK3568_BIFURCATION_LANE_0_1		BIT(0)
-+
-+/* Register for RK3588 */
-+#define PHP_GRF_PCIESEL_CON			0x100
-+#define RK3588_PCIE3PHY_GRF_CMN_CON0		0x0
-+#define RK3588_PCIE3PHY_GRF_PHY0_STATUS1	0x904
-+#define RK3588_PCIE3PHY_GRF_PHY1_STATUS1	0xa04
-+#define RK3588_SRAM_INIT_DONE(reg)		(reg & BIT(0))
-+
-+#define RK3588_BIFURCATION_LANE_0_1		BIT(0)
-+#define RK3588_BIFURCATION_LANE_2_3		BIT(1)
-+#define RK3588_LANE_AGGREGATION		BIT(2)
-+
-+struct rockchip_p3phy_ops;
-+
-+struct rockchip_p3phy_priv {
-+	const struct rockchip_p3phy_ops *ops;
-+	void __iomem *mmio;
-+	/* mode: RC, EP */
-+	int mode;
-+	/* pcie30_phymode: Aggregation, Bifurcation */
-+	int pcie30_phymode;
-+	struct regmap *phy_grf;
-+	struct regmap *pipe_grf;
-+	struct reset_control *p30phy;
-+	struct phy *phy;
-+	struct clk_bulk_data *clks;
-+	int num_clks;
-+	int num_lanes;
-+	u8 lanes[4];
-+};
-+
-+struct rockchip_p3phy_ops {
-+	int (*phy_init)(struct rockchip_p3phy_priv *priv);
-+};
-+
-+static int rockchip_p3phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
-+{
-+	struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
-+
-+	/* Actually We don't care EP/RC mode, but just record it */
-+	switch (submode) {
-+	case PHY_MODE_PCIE_RC:
-+		priv->mode = PHY_MODE_PCIE_RC;
-+		break;
-+	case PHY_MODE_PCIE_EP:
-+		priv->mode = PHY_MODE_PCIE_EP;
-+		break;
-+	default:
-+		dev_err(&phy->dev, "%s, invalid mode\n", __func__);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
-+{
-+	struct phy *phy = priv->phy;
-+	bool bifurcation = false;
-+	int ret;
-+	u32 reg;
-+
-+	/* Deassert PCIe PMA output clamp mode */
-+	regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, BIT(15) | BIT(31));
-+
-+	for (int i = 0; i < priv->num_lanes; i++) {
-+		dev_info(&phy->dev, "lane number %d, val %d\n", i, priv->lanes[i]);
-+		if (priv->lanes[i] > 1)
-+			bifurcation = true;
-+	}
-+
-+	/* Set bifurcation if needed, and it doesn't care RC/EP */
-+	if (bifurcation) {
-+		dev_info(&phy->dev, "bifurcation enabled\n");
-+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
-+			     (0xf << 16) | RK3568_BIFURCATION_LANE_0_1);
-+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1,
-+			     BIT(15) | BIT(31));
-+	} else {
-+		dev_info(&phy->dev, "bifurcation disabled\n");
-+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
-+			     (0xf << 16) & ~RK3568_BIFURCATION_LANE_0_1);
-+	}
-+
-+	reset_control_deassert(priv->p30phy);
-+
-+	ret = regmap_read_poll_timeout(priv->phy_grf,
-+				       GRF_PCIE30PHY_STATUS0,
-+				       reg, SRAM_INIT_DONE(reg),
-+				       0, 500);
-+	if (ret)
-+		dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n",
-+		       __func__, reg);
-+	return ret;
-+}
-+
-+static const struct rockchip_p3phy_ops rk3568_ops = {
-+	.phy_init = rockchip_p3phy_rk3568_init,
-+};
-+
-+static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
-+{
-+	u32 reg = 0;
-+	u8 mode = 0;
-+	int ret;
-+
-+	/* Deassert PCIe PMA output clamp mode */
-+	regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, BIT(8) | BIT(24));
-+
-+	/* Set bifurcation if needed */
-+	for (int i = 0; i < priv->num_lanes; i++) {
-+		if (!priv->lanes[i])
-+			mode |= (BIT(i) << 3);
-+
-+		if (priv->lanes[i] > 1)
-+			mode |= (BIT(i) >> 1);
-+	}
-+
-+	if (!mode)
-+		reg = RK3588_LANE_AGGREGATION;
-+	else {
-+		if (mode & (BIT(0) | BIT(1)))
-+			reg |= RK3588_BIFURCATION_LANE_0_1;
-+
-+		if (mode & (BIT(2) | BIT(3)))
-+			reg |= RK3588_BIFURCATION_LANE_2_3;
-+	}
-+
-+	regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, (0x7<<16) | reg);
-+
-+	/* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */
-+	if (!IS_ERR(priv->pipe_grf)) {
-+		reg = (mode & (BIT(6) | BIT(7))) >> 6;
-+		if (reg)
-+			regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON,
-+				     (reg << 16) | reg);
-+	}
-+
-+	reset_control_deassert(priv->p30phy);
-+
-+	ret = regmap_read_poll_timeout(priv->phy_grf,
-+				       RK3588_PCIE3PHY_GRF_PHY0_STATUS1,
-+				       reg, RK3588_SRAM_INIT_DONE(reg),
-+				       0, 500);
-+	ret |= regmap_read_poll_timeout(priv->phy_grf,
-+					RK3588_PCIE3PHY_GRF_PHY1_STATUS1,
-+					reg, RK3588_SRAM_INIT_DONE(reg),
-+					0, 500);
-+	if (ret)
-+		pr_err("%s: lock failed 0x%x, check input refclk and power supply\n",
-+		       __func__, reg);
-+	return ret;
-+}
-+
-+static const struct rockchip_p3phy_ops rk3588_ops = {
-+	.phy_init = rockchip_p3phy_rk3588_init,
-+};
-+
-+static int rochchip_p3phy_init(struct phy *phy)
-+{
-+	struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
-+	int ret;
-+
-+	ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks);
-+	if (ret) {
-+		pr_err("failed to enable PCIe bulk clks %d\n", ret);
-+		return ret;
-+	}
-+
-+	reset_control_assert(priv->p30phy);
-+	udelay(1);
-+
-+	if (priv->ops->phy_init) {
-+		ret = priv->ops->phy_init(priv);
-+		if (ret)
-+			clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
-+	}
-+
-+	return ret;
-+}
-+
-+static int rochchip_p3phy_exit(struct phy *phy)
-+{
-+	struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
-+
-+	clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
-+	reset_control_assert(priv->p30phy);
-+	return 0;
-+}
-+
-+static const struct phy_ops rochchip_p3phy_ops = {
-+	.init = rochchip_p3phy_init,
-+	.exit = rochchip_p3phy_exit,
-+	.set_mode = rockchip_p3phy_set_mode,
-+	.owner = THIS_MODULE,
-+};
-+
-+static int rockchip_p3phy_probe(struct platform_device *pdev)
-+{
-+	struct phy_provider *phy_provider;
-+	struct device *dev = &pdev->dev;
-+	struct rockchip_p3phy_priv *priv;
-+	struct device_node *np = dev->of_node;
-+	struct resource *res;
-+	int ret;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	priv->mmio = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(priv->mmio)) {
-+		ret = PTR_ERR(priv->mmio);
-+		return ret;
-+	}
-+
-+	priv->ops = of_device_get_match_data(&pdev->dev);
-+	if (!priv->ops) {
-+		dev_err(&pdev->dev, "no of match data provided\n");
-+		return -EINVAL;
-+	}
-+
-+	priv->phy_grf = syscon_regmap_lookup_by_phandle(np, "rockchip,phy-grf");
-+	if (IS_ERR(priv->phy_grf)) {
-+		dev_err(dev, "failed to find rockchip,phy_grf regmap\n");
-+		return PTR_ERR(priv->phy_grf);
-+	}
-+
-+	priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node,
-+							 "rockchip,pipe-grf");
-+	if (IS_ERR(priv->pipe_grf))
-+		dev_info(dev, "failed to find rockchip,pipe_grf regmap\n");
-+
-+	priv->num_lanes = of_property_read_variable_u8_array(dev->of_node, "lane-map",
-+							     priv->lanes, 2,
-+							     ARRAY_SIZE(priv->lanes));
-+
-+	/* if no lane-map assume aggregation */
-+	if (priv->num_lanes == -EINVAL) {
-+		dev_dbg(dev, "no lane-map property found\n");
-+		priv->num_lanes = 1;
-+		priv->lanes[0] = 1;
-+	} else if (priv->num_lanes < 0) {
-+		dev_err(dev, "failed to read lane-map property %d\n", priv->num_lanes);
-+		return priv->num_lanes;
-+	}
-+
-+	priv->phy = devm_phy_create(dev, NULL, &rochchip_p3phy_ops);
-+	if (IS_ERR(priv->phy)) {
-+		dev_err(dev, "failed to create combphy\n");
-+		return PTR_ERR(priv->phy);
-+	}
-+
-+	priv->p30phy = devm_reset_control_get_optional_exclusive(dev, "phy");
-+	if (IS_ERR(priv->p30phy)) {
-+		return dev_err_probe(dev, PTR_ERR(priv->p30phy),
-+				     "failed to get phy reset control\n");
-+	}
-+	if (!priv->p30phy)
-+		dev_info(dev, "no phy reset control specified\n");
-+
-+	priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks);
-+	if (priv->num_clks < 1)
-+		return -ENODEV;
-+
-+	dev_set_drvdata(dev, priv);
-+	phy_set_drvdata(priv->phy, priv);
-+	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-+	return PTR_ERR_OR_ZERO(phy_provider);
-+}
-+
-+static const struct of_device_id rockchip_p3phy_of_match[] = {
-+	{ .compatible = "rockchip,rk3568-pcie3-phy", .data = &rk3568_ops },
-+	{ .compatible = "rockchip,rk3588-pcie3-phy", .data = &rk3588_ops },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, rockchip_p3phy_of_match);
-+
-+static struct platform_driver rockchip_p3phy_driver = {
-+	.probe	= rockchip_p3phy_probe,
-+	.driver = {
-+		.name = "rockchip-snps-pcie3-phy",
-+		.of_match_table = rockchip_p3phy_of_match,
-+	},
-+};
-+module_platform_driver(rockchip_p3phy_driver);
-+MODULE_DESCRIPTION("Rockchip Synopsys PCIe 3.0 PHY driver");
-+MODULE_LICENSE("GPL");
-diff --git a/include/linux/phy/pcie.h b/include/linux/phy/pcie.h
-new file mode 100644
-index 000000000000..93c997f520fe
---- /dev/null
-+++ b/include/linux/phy/pcie.h
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
-+ */
-+#ifndef __PHY_PCIE_H
-+#define __PHY_PCIE_H
-+
-+#define PHY_MODE_PCIE_RC 20
-+#define PHY_MODE_PCIE_EP 21
-+#define PHY_MODE_PCIE_BIFURCATION 22
-+
-+#endif