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add support for NanoPi R4SE

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This commit is contained in:
Bochun Bai
2023-05-13 23:04:45 +00:00
committed by igorpecovnik
parent df3c7eb461
commit 3cb92f6204
3 changed files with 275 additions and 0 deletions
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10
config/boards/nanopi-r4se.conf Normal file
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# Rockchip RK3399 hexa core 4GB RAM SoC 2 x GBE 32GB eMMC USB3 USB-C
BOARD_NAME="NanoPi R4SE"
BOARDFAMILY="rk3399"
BOOTCONFIG="nanopi-r4se-rk3399_defconfig"
KERNEL_TARGET="current"
DEFAULT_CONSOLE="serial"
MODULES_BLACKLIST="rockchipdrm analogix_dp dw_mipi_dsi dw_hdmi gpu_sched lima hantro_vpu panfrost"
HAS_VIDEO_OUTPUT="no"
BOOTBRANCH_BOARD="tag:v2022.04"
BOOTPATCHDIR="u-boot-rockchip64-v2022.04"

126
patch/kernel/archive/rockchip64-5.15/add-board-nanopi-r4se.patch Normal file
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 52def0cf2..cc1d8ec30 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
new file mode 100644
index 000000000..a15620a73
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPC-T4 board device tree source
+ *
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ *
+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
+ * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
+ * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi-r4s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R4SE";
+ compatible = "friendlyelec,nanopi-r4se", "rockchip,rk3399";
+ /delete-node/ display-subsystem;
+
+ gpio-leds {
+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
+
+ /delete-node/ led-0;
+
+ sys_led: led-sys {
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ label = "red:power";
+ default-state = "on";
+ };
+ };
+
+ gpio-keys {
+ pinctrl-0 = <&reset_button_pin>;
+
+ /delete-node/ power;
+
+ reset {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&pinctrl {
+ gpio-leds {
+ /delete-node/ status-led-pin;
+
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rockchip-key {
+ /delete-node/ power-key;
+
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&sdhci {
+ status = "okay";
+};
+
+&gmac {
+ nvmem-cells = <&mac_address>;
+ nvmem-cell-names = "mac-address";
+};
+
+&i2c2 {
+ eeprom@51 {
+ compatible = "microchip,24c02", "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ size = <256>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_address: mac-address@fa {
+ reg = <0xfa 0x06>;
+ };
+ };
+};

139
patch/u-boot/u-boot-rockchip64-v2022.04/board-nanopi-r4se.patch Normal file
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@@ -0,0 +1,139 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 644ba961..11dcac8f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -154,6 +154,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopi-m4b.dtb \
rk3399-nanopi-neo4.dtb \
rk3399-nanopi-r4s.dtb \
+ rk3399-nanopi-r4se.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
rk3399-puma-haikou.dtb \
diff --git a/arch/arm/dts/rk3399-nanopi-r4se-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-r4se-u-boot.dtsi
new file mode 100644
index 00000000..cd164252
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-r4se-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RK3399-based FriendlyElec boards device tree source
+ *
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ * Copyright (C) 2020 Xiaobo <peterwillcn@gmail.com>
+ */
+
+#include "rk3399-nanopi4-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
diff --git a/arch/arm/dts/rk3399-nanopi-r4se.dts b/arch/arm/dts/rk3399-nanopi-r4se.dts
new file mode 100755
index 00000000..19e12eaf
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-r4se.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPC-T4 board device tree source
+ *
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ *
+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
+ * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
+ * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi-r4s.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R4SE";
+ compatible = "friendlyelec,nanopi-r4se", "rockchip,rk3399";
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&sdhci {
+ status = "okay";
+};
diff --git a/configs/nanopi-r4se-rk3399_defconfig b/configs/nanopi-r4se-rk3399_defconfig
new file mode 100644
index 00000000..7d176ce2
--- /dev/null
+++ b/configs/nanopi-r4se-rk3399_defconfig
@@ -0,0 +1,64 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y