JDM170/build
1
0
Fork 0
mirror of https://github.com/armbian/build synced 2025-09-24 19:47:06 +07:00
Code Issues Packages Projects Releases Wiki Activity

sunxi-6.16: add armbian patches

Browse Source
This commit is contained in:
The-going
2025-09-20 23:39:44 +03:00
committed by Igor
parent 2b3a4c382a
commit 25ff95075e
178 changed files with 39899 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
patch/kernel/archive/sunxi-6.16/patches.armbian/ARM-dts-sun8i-nanopiduo2-Use-key-0-as-power-button.patch Normal file
View File

@@ -0,0 +1,31 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Mon, 26 Jun 2023 13:29:46 +0000
Subject: ARM: dts: sun8i: nanopiduo2: Use key-0 as power button
The onboard button key-0 was not marked as power button. This meant
that once the board was suspended, there was no way to bring it back
to life. Mark key-0 as power button so that it can be used to bring
the board back to life
---
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
@@ -42,8 +42,9 @@ gpio-keys {
key-0 {
label = "k1";
- linux,code = <BTN_0>;
+ linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
+ wakeup-source;
};
};
--
Armbian

31
patch/kernel/archive/sunxi-6.16/patches.armbian/ARM-dts-sun8i-nanopiduo2-enable-ethernet.patch Normal file
View File

@@ -0,0 +1,31 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Mon, 26 Jun 2023 13:53:14 +0000
Subject: ARM: dts: sun8i: nanopiduo2: enable ethernet
NanoPi Duo2 has pinout for ethernet. Lets enable the same in dts
---
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts
@@ -105,6 +105,13 @@ &ehci0 {
status = "okay";
};
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
--
Armbian

42
patch/kernel/archive/sunxi-6.16/patches.armbian/ARM64-dts-sun50i-h616-BigTreeTech-CB1-Enable-EMAC1.patch Normal file
View File

@@ -0,0 +1,42 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: JohnTheCoolingFan <ivan8215145640@gmail.com>
Date: Thu, 13 Jun 2024 11:50:55 +0000
Subject: ARM64: dts: sun50i-h616: BigTreeTech CB1: Enable EMAC1
Signed-off-by: JohnTheCoolingFan <ivan8215145640@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 18 ++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
index e7af3a976b6c..dbf43ff63b8e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
@@ -154,6 +154,24 @@ &gpu {
status = "okay";
};
+&emac1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
vmmc-supply = <&reg_dldo1>;
broken-cd;
--
Armbian

57
patch/kernel/archive/sunxi-6.16/patches.armbian/ARM64-dts-sun50i-h616-BigTreeTech-CB1-Enable-HDMI.patch Normal file
View File

@@ -0,0 +1,57 @@
From f3157390fffbb9dcc634e99d1d0e6728997d789b Mon Sep 17 00:00:00 2001
From: JohnTheCoolingFan <ivan8215145640@gmail.com>
Date: Thu, 13 Jun 2024 11:07:35 +0000
Subject: ARM64: dts: sun50i-h616: BigTreeTech CB1: Enable HDMI
Signed-off-by: JohnTheCoolingFan <ivan8215145640@gmail.com>
---
.../sun50i-h616-bigtreetech-cb1.dtsi | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
index 0168ff3d9972..e7af3a976b6c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
@@ -26,6 +26,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -267,6 +278,21 @@ reg_dldo1: dldo1 {
};
};
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_aldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&cpu0 {
cpu-supply = <&reg_dcdc2>;
status = "okay";
--
2.51.0

842
patch/kernel/archive/sunxi-6.16/patches.armbian/ASoC-AC200-Initial-driver.patch Normal file
View File

@@ -0,0 +1,842 @@
From c1601a5d5088a43c4a92fcb3ea1f4529de6a584c Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Thu, 1 Sep 2022 17:36:53 +0200
Subject: ASoC: AC200: Initial driver
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
sound/soc/codecs/Kconfig | 10 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/ac200.c | 772 ++++++++++++++++++++++++++++++++++++++
3 files changed, 784 insertions(+)
create mode 100644 sound/soc/codecs/ac200.c
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 28ec636f5a7b..57b3d80cbf02 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -16,6 +16,7 @@ config SND_SOC_ALL_CODECS
depends on COMPILE_TEST
imply SND_SOC_88PM860X
imply SND_SOC_AB8500_CODEC
+ imply SND_SOC_AC200_CODEC
imply SND_SOC_AC97_CODEC
imply SND_SOC_AD1836
imply SND_SOC_AD193X_SPI
@@ -425,6 +426,15 @@ config SND_SOC_AB8500_CODEC
tristate
depends on ABX500_CORE
+config SND_SOC_AC200_CODEC
+ tristate "AC200 Codec"
+ depends on MFD_AC200
+ help
+ Enable support for X-Powers AC200 analog audio codec.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-soc-ac200.
+
config SND_SOC_AC97_CODEC
tristate "Build generic ASoC AC97 CODEC driver"
select SND_AC97_CODEC
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index e1923e1d283f..031ab53e43d1 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
snd-soc-88pm860x-y := 88pm860x-codec.o
snd-soc-ab8500-codec-y := ab8500-codec.o
+snd-soc-ac200-y := ac200.o
snd-soc-ac97-y := ac97.o
snd-soc-ad1836-y := ad1836.o
snd-soc-ad193x-y := ad193x.o
@@ -425,6 +426,7 @@ snd-soc-simple-mux-y := simple-mux.o
obj-$(CONFIG_SND_SOC_88PM860X) += snd-soc-88pm860x.o
obj-$(CONFIG_SND_SOC_AB8500_CODEC) += snd-soc-ab8500-codec.o
+obj-$(CONFIG_SND_SOC_AC200_CODEC) += snd-soc-ac200.o
obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
obj-$(CONFIG_SND_SOC_AD1836) += snd-soc-ad1836.o
obj-$(CONFIG_SND_SOC_AD193X) += snd-soc-ad193x.o
diff --git a/sound/soc/codecs/ac200.c b/sound/soc/codecs/ac200.c
new file mode 100644
index 000000000000..662de230dc83
--- /dev/null
+++ b/sound/soc/codecs/ac200.c
@@ -0,0 +1,772 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * X-Powers AC200 Codec Driver
+ *
+ * Copyright (C) 2022 Jernej Skrabec <jernej.skrabec@gmail.com>
+ */
+
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/tlv.h>
+
+#define AC200_CODEC_RATES (SNDRV_PCM_RATE_8000 | \
+ SNDRV_PCM_RATE_11025 | \
+ SNDRV_PCM_RATE_16000 | \
+ SNDRV_PCM_RATE_22050 | \
+ SNDRV_PCM_RATE_32000 | \
+ SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000 | \
+ SNDRV_PCM_RATE_96000 | \
+ SNDRV_PCM_RATE_192000 | \
+ SNDRV_PCM_RATE_KNOT)
+
+#define AC200_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
+ SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+#define AC200_SYS_AUDIO_CTL0 0x0010
+#define AC200_SYS_AUDIO_CTL0_MCLK_GATING BIT(1)
+#define AC200_SYS_AUDIO_CTL0_RST_INVALID BIT(0)
+#define AC200_SYS_AUDIO_CTL1 0x0012
+#define AC200_SYS_AUDIO_CTL1_I2S_IO_EN BIT(0)
+
+#define AC200_SYS_CLK_CTL 0x2000
+#define AC200_SYS_CLK_CTL_I2S 15
+#define AC200_SYS_CLK_CTL_ADC 3
+#define AC200_SYS_CLK_CTL_DAC 2
+#define AC200_SYS_MOD_RST 0x2002
+#define AC200_SYS_MOD_RST_I2S 15
+#define AC200_SYS_MOD_RST_ADC 3
+#define AC200_SYS_MOD_RST_DAC 2
+#define AC200_SYS_SR_CTL 0x2004
+#define AC200_SYS_SR_CTL_SR_MASK GENMASK(3, 0)
+#define AC200_SYS_SR_CTL_SR(x) (x)
+#define AC200_I2S_CTL 0x2100
+#define AC200_I2S_CTL_SDO_EN 3
+#define AC200_I2S_CTL_TX_EN 2
+#define AC200_I2S_CTL_RX_EN 1
+#define AC200_I2S_CTL_GEN 0
+#define AC200_I2S_CLK 0x2102
+#define AC200_I2S_CLK_BCLK_OUT BIT(15)
+#define AC200_I2S_CLK_LRCK_OUT BIT(14)
+#define AC200_I2S_CLK_BCLKDIV_MASK GENMASK(13, 10)
+#define AC200_I2S_CLK_BCLKDIV(x) ((x) << 10)
+#define AC200_I2S_CLK_LRCK_MASK GENMASK(9, 0)
+#define AC200_I2S_CLK_LRCK(x) ((x) - 1)
+#define AC200_I2S_FMT0 0x2104
+#define AC200_I2S_FMT0_MODE_MASK GENMASK(15, 14)
+#define AC200_I2S_FMT0_MODE(x) ((x) << 14)
+#define AC200_I2S_FMT0_MODE_PCM 0
+#define AC200_I2S_FMT0_MODE_LEFT 1
+#define AC200_I2S_FMT0_MODE_RIGHT 2
+#define AC200_I2S_FMT0_TX_OFFSET_MASK GENMASK(11, 10)
+#define AC200_I2S_FMT0_TX_OFFSET(x) ((x) << 10)
+#define AC200_I2S_FMT0_RX_OFFSET_MASK GENMASK(9, 8)
+#define AC200_I2S_FMT0_RX_OFFSET(x) ((x) << 8)
+#define AC200_I2S_FMT0_SR_MASK GENMASK(6, 4)
+#define AC200_I2S_FMT0_SR(x) ((x) << 4)
+#define AC200_I2S_FMT0_SW_MASK GENMASK(3, 1)
+#define AC200_I2S_FMT0_SW(x) ((x) << 1)
+#define AC200_I2S_FMT1 0x2108
+#define AC200_I2S_FMT1_BCLK_POL_INVERT BIT(15)
+#define AC200_I2S_FMT1_LRCK_POL_INVERT BIT(14)
+#define AC200_I2S_MIX_SRC 0x2114
+#define AC200_I2S_MIX_SRC_LMIX_DAC 13
+#define AC200_I2S_MIX_SRC_LMIX_ADC 12
+#define AC200_I2S_MIX_SRC_RMIX_DAC 9
+#define AC200_I2S_MIX_SRC_RMIX_ADC 8
+#define AC200_I2S_MIX_GAIN 0x2116
+#define AC200_I2S_MIX_GAIN_LMIX_DAC 13
+#define AC200_I2S_MIX_GAIN_LMIX_ADC 12
+#define AC200_I2S_MIX_GAIN_RMIX_DAC 9
+#define AC200_I2S_MIX_GAIN_RMIX_ADC 8
+#define AC200_I2S_DAC_VOL 0x2118
+#define AC200_I2S_DAC_VOL_LEFT 8
+#define AC200_I2S_DAC_VOL_RIGHT 0
+#define AC200_I2S_ADC_VOL 0x211A
+#define AC200_I2S_ADC_VOL_LEFT 8
+#define AC200_I2S_ADC_VOL_RIGHT 0
+#define AC200_DAC_CTL 0x2200
+#define AC200_DAC_CTL_DAC_EN 15
+#define AC200_DAC_MIX_SRC 0x2202
+#define AC200_DAC_MIX_SRC_LMIX_DAC 13
+#define AC200_DAC_MIX_SRC_LMIX_ADC 12
+#define AC200_DAC_MIX_SRC_RMIX_DAC 9
+#define AC200_DAC_MIX_SRC_RMIX_ADC 8
+#define AC200_DAC_MIX_GAIN 0x2204
+#define AC200_DAC_MIX_GAIN_LMIX_DAC 13
+#define AC200_DAC_MIX_GAIN_LMIX_ADC 12
+#define AC200_DAC_MIX_GAIN_RMIX_DAC 9
+#define AC200_DAC_MIX_GAIN_RMIX_ADC 8
+#define AC200_OUT_MIX_CTL 0x2220
+#define AC200_OUT_MIX_CTL_RDAC_EN 15
+#define AC200_OUT_MIX_CTL_LDAC_EN 14
+#define AC200_OUT_MIX_CTL_RMIX_EN 13
+#define AC200_OUT_MIX_CTL_LMIX_EN 12
+#define AC200_OUT_MIX_CTL_MIC1_VOL 4
+#define AC200_OUT_MIX_CTL_MIC2_VOL 0
+#define AC200_OUT_MIX_SRC 0x2222
+#define AC200_OUT_MIX_SRC_RMIX_MIC1 14
+#define AC200_OUT_MIX_SRC_RMIX_MIC2 13
+#define AC200_OUT_MIX_SRC_RMIX_RDAC 9
+#define AC200_OUT_MIX_SRC_RMIX_LDAC 8
+#define AC200_OUT_MIX_SRC_LMIX_MIC1 6
+#define AC200_OUT_MIX_SRC_LMIX_MIC2 5
+#define AC200_OUT_MIX_SRC_LMIX_RDAC 1
+#define AC200_OUT_MIX_SRC_LMIX_LDAC 0
+#define AC200_LINEOUT_CTL 0x2224
+#define AC200_LINEOUT_CTL_EN 15
+#define AC200_LINEOUT_CTL_LEN 14
+#define AC200_LINEOUT_CTL_REN 13
+#define AC200_LINEOUT_CTL_LMONO 12
+#define AC200_LINEOUT_CTL_RMONO 11
+#define AC200_LINEOUT_CTL_VOL 0
+#define AC200_ADC_CTL 0x2300
+#define AC200_ADC_CTL_ADC_EN 15
+#define AC200_MBIAS_CTL 0x2310
+#define AC200_MBIAS_CTL_MBIAS_EN 15
+#define AC200_MBIAS_CTL_ADDA_BIAS_EN 3
+#define AC200_ADC_MIC_CTL 0x2320
+#define AC200_ADC_MIC_CTL_RADC_EN 15
+#define AC200_ADC_MIC_CTL_LADC_EN 14
+#define AC200_ADC_MIC_CTL_ADC_VOL 8
+#define AC200_ADC_MIC_CTL_MIC1_GAIN_EN 7
+#define AC200_ADC_MIC_CTL_MIC1_BOOST 4
+#define AC200_ADC_MIC_CTL_MIC2_GAIN_EN 3
+#define AC200_ADC_MIC_CTL_MIC2_BOOST 0
+#define AC200_ADC_MIX_SRC 0x2322
+#define AC200_ADC_MIX_SRC_RMIX_MIC1 14
+#define AC200_ADC_MIX_SRC_RMIX_MIC2 13
+#define AC200_ADC_MIX_SRC_RMIX_RMIX 9
+#define AC200_ADC_MIX_SRC_RMIX_LMIX 8
+#define AC200_ADC_MIX_SRC_LMIX_MIC1 6
+#define AC200_ADC_MIX_SRC_LMIX_MIC2 5
+#define AC200_ADC_MIX_SRC_LMIX_LMIX 1
+#define AC200_ADC_MIX_SRC_LMIX_RMIX 0
+
+struct ac200_codec {
+ struct regmap *regmap;
+ unsigned int format;
+};
+
+struct ac200_map {
+ int match;
+ int value;
+};
+
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(mixer_scale, -600, 600, 0);
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(gain_scale, -450, 150, 0);
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(lineout_scale, -4650, 150, 1);
+static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(codec_scale, -12000, 75, 1);
+static const unsigned int mic_scale[] = {
+ TLV_DB_RANGE_HEAD(2),
+ 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
+ 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
+};
+
+static const struct snd_kcontrol_new ac200_codec_controls[] = {
+ SOC_DOUBLE_TLV("Master Playback Volume", AC200_I2S_DAC_VOL,
+ AC200_I2S_DAC_VOL_LEFT, AC200_I2S_DAC_VOL_RIGHT,
+ 0xff, 0, codec_scale),
+ SOC_DOUBLE_TLV("Master Capture Volume", AC200_I2S_ADC_VOL,
+ AC200_I2S_ADC_VOL_LEFT, AC200_I2S_ADC_VOL_RIGHT,
+ 0xff, 0, codec_scale),
+ SOC_DOUBLE_TLV("I2S ADC Capture Volume", AC200_I2S_MIX_GAIN,
+ AC200_I2S_MIX_GAIN_LMIX_ADC, AC200_I2S_MIX_GAIN_RMIX_ADC,
+ 0x1, 1, mixer_scale),
+ SOC_DOUBLE_TLV("I2S DAC Capture Volume", AC200_I2S_MIX_GAIN,
+ AC200_I2S_MIX_GAIN_LMIX_DAC, AC200_I2S_MIX_GAIN_RMIX_DAC,
+ 0x1, 1, mixer_scale),
+ SOC_DOUBLE_TLV("DAC I2S Playback Volume", AC200_DAC_MIX_GAIN,
+ AC200_DAC_MIX_GAIN_LMIX_DAC, AC200_DAC_MIX_GAIN_RMIX_DAC,
+ 0x1, 1, mixer_scale),
+ SOC_DOUBLE_TLV("ADC Playback Volume", AC200_DAC_MIX_GAIN,
+ AC200_DAC_MIX_GAIN_LMIX_ADC, AC200_DAC_MIX_GAIN_RMIX_ADC,
+ 0x1, 1, mixer_scale),
+ SOC_SINGLE_TLV("MIC1 Playback Volume", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_MIC1_VOL, 0x7, 0, gain_scale),
+ SOC_SINGLE_TLV("MIC2 Playback Volume", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_MIC2_VOL, 0x7, 0, gain_scale),
+ SOC_SINGLE_TLV("ADC Volume", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_ADC_VOL, 0x07, 0, gain_scale),
+ SOC_SINGLE_TLV("Line Out Playback Volume", AC200_LINEOUT_CTL,
+ AC200_LINEOUT_CTL_VOL, 0x1f, 0, lineout_scale),
+ SOC_SINGLE_TLV("MIC1 Boost Volume", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_MIC1_BOOST, 0x07, 0, mic_scale),
+ SOC_SINGLE_TLV("MIC2 Boost Volume", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_MIC2_BOOST, 0x07, 0, mic_scale),
+ SOC_DOUBLE("Line Out Playback Switch", AC200_LINEOUT_CTL,
+ AC200_LINEOUT_CTL_LEN, AC200_LINEOUT_CTL_REN, 1, 0),
+};
+
+static const struct snd_kcontrol_new i2s_mixer[] = {
+ SOC_DAPM_DOUBLE("I2S DAC Capture Switch", AC200_I2S_MIX_SRC,
+ AC200_I2S_MIX_SRC_LMIX_DAC,
+ AC200_I2S_MIX_SRC_RMIX_DAC, 1, 0),
+ SOC_DAPM_DOUBLE("I2S ADC Capture Switch", AC200_I2S_MIX_SRC,
+ AC200_I2S_MIX_SRC_LMIX_ADC,
+ AC200_I2S_MIX_SRC_RMIX_ADC, 1, 0),
+};
+
+static const struct snd_kcontrol_new dac_mixer[] = {
+ SOC_DAPM_DOUBLE("DAC I2S Playback Switch", AC200_DAC_MIX_SRC,
+ AC200_DAC_MIX_SRC_LMIX_DAC,
+ AC200_DAC_MIX_SRC_RMIX_DAC, 1, 0),
+ SOC_DAPM_DOUBLE("ADC Playback Switch", AC200_DAC_MIX_SRC,
+ AC200_DAC_MIX_SRC_LMIX_ADC,
+ AC200_DAC_MIX_SRC_RMIX_ADC, 1, 0),
+};
+
+static const struct snd_kcontrol_new output_mixer[] = {
+ SOC_DAPM_DOUBLE("MIC1 Playback Switch", AC200_OUT_MIX_SRC,
+ AC200_OUT_MIX_SRC_LMIX_MIC1,
+ AC200_OUT_MIX_SRC_RMIX_MIC1, 1, 0),
+ SOC_DAPM_DOUBLE("MIC2 Playback Switch", AC200_OUT_MIX_SRC,
+ AC200_OUT_MIX_SRC_LMIX_MIC2,
+ AC200_OUT_MIX_SRC_RMIX_MIC2, 1, 0),
+ SOC_DAPM_DOUBLE("DAC Playback Switch", AC200_OUT_MIX_SRC,
+ AC200_OUT_MIX_SRC_LMIX_LDAC,
+ AC200_OUT_MIX_SRC_RMIX_RDAC, 1, 0),
+ SOC_DAPM_DOUBLE("DAC Reversed Playback Switch", AC200_OUT_MIX_SRC,
+ AC200_OUT_MIX_SRC_LMIX_RDAC,
+ AC200_OUT_MIX_SRC_RMIX_LDAC, 1, 0),
+};
+
+static const struct snd_kcontrol_new input_mixer[] = {
+ SOC_DAPM_DOUBLE("MIC1 Capture Switch", AC200_ADC_MIX_SRC,
+ AC200_ADC_MIX_SRC_LMIX_MIC1,
+ AC200_ADC_MIX_SRC_RMIX_MIC1, 1, 0),
+ SOC_DAPM_DOUBLE("MIC2 Capture Switch", AC200_ADC_MIX_SRC,
+ AC200_ADC_MIX_SRC_LMIX_MIC2,
+ AC200_ADC_MIX_SRC_RMIX_MIC2, 1, 0),
+ SOC_DAPM_DOUBLE("Output Mixer Capture Switch", AC200_ADC_MIX_SRC,
+ AC200_ADC_MIX_SRC_LMIX_LMIX,
+ AC200_ADC_MIX_SRC_RMIX_RMIX, 1, 0),
+ SOC_DAPM_DOUBLE("Output Mixer Reverse Capture Switch",
+ AC200_ADC_MIX_SRC,
+ AC200_ADC_MIX_SRC_LMIX_RMIX,
+ AC200_ADC_MIX_SRC_RMIX_LMIX, 1, 0),
+};
+
+const char * const lineout_mux_enum_text[] = {
+ "Stereo", "Mono",
+};
+
+static SOC_ENUM_DOUBLE_DECL(lineout_mux_enum, AC200_LINEOUT_CTL,
+ AC200_LINEOUT_CTL_LMONO, AC200_LINEOUT_CTL_RMONO,
+ lineout_mux_enum_text);
+
+static const struct snd_kcontrol_new lineout_mux =
+ SOC_DAPM_ENUM("Line Out Source Playback Route", lineout_mux_enum);
+
+static const struct snd_soc_dapm_widget ac200_codec_dapm_widgets[] = {
+ /* Regulator */
+ SND_SOC_DAPM_REGULATOR_SUPPLY("avcc", 0, 0),
+
+ /* System clocks */
+ SND_SOC_DAPM_SUPPLY("CLK SYS I2S", AC200_SYS_CLK_CTL,
+ AC200_SYS_CLK_CTL_I2S, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("CLK SYS DAC", AC200_SYS_CLK_CTL,
+ AC200_SYS_CLK_CTL_DAC, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("CLK SYS ADC", AC200_SYS_CLK_CTL,
+ AC200_SYS_CLK_CTL_ADC, 0, NULL, 0),
+
+ /* Module resets */
+ SND_SOC_DAPM_SUPPLY("RST SYS I2S", AC200_SYS_MOD_RST,
+ AC200_SYS_MOD_RST_I2S, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("RST SYS DAC", AC200_SYS_MOD_RST,
+ AC200_SYS_MOD_RST_DAC, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("RST SYS ADC", AC200_SYS_MOD_RST,
+ AC200_SYS_MOD_RST_DAC, 0, NULL, 0),
+
+ /* I2S gates */
+ SND_SOC_DAPM_SUPPLY("CLK I2S GEN", AC200_I2S_CTL,
+ AC200_I2S_CTL_GEN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("CLK I2S SDO", AC200_I2S_CTL,
+ AC200_I2S_CTL_SDO_EN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("CLK I2S TX", AC200_I2S_CTL,
+ AC200_I2S_CTL_TX_EN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("CLK I2S RX", AC200_I2S_CTL,
+ AC200_I2S_CTL_RX_EN, 0, NULL, 0),
+
+ /* Module supplies */
+ SND_SOC_DAPM_SUPPLY("ADC Enable", AC200_ADC_CTL,
+ AC200_ADC_CTL_ADC_EN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("DAC Enable", AC200_DAC_CTL,
+ AC200_DAC_CTL_DAC_EN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("Line Out Enable", AC200_LINEOUT_CTL,
+ AC200_LINEOUT_CTL_EN, 0, NULL, 0),
+
+ /* Bias */
+ SND_SOC_DAPM_SUPPLY("MIC Bias", AC200_MBIAS_CTL,
+ AC200_MBIAS_CTL_MBIAS_EN, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("ADDA Bias", AC200_MBIAS_CTL,
+ AC200_MBIAS_CTL_ADDA_BIAS_EN, 0, NULL, 0),
+
+ /* DAC */
+ SND_SOC_DAPM_DAC("Left DAC", "Playback", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_LDAC_EN, 0),
+ SND_SOC_DAPM_DAC("Right DAC", "Playback", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_RDAC_EN, 0),
+
+ /* ADC */
+ SND_SOC_DAPM_ADC("Left ADC", "Capture", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_LADC_EN, 0),
+ SND_SOC_DAPM_ADC("Right ADC", "Capture", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_RADC_EN, 0),
+
+ /* Mixers */
+ SND_SOC_DAPM_MIXER("Left Output Mixer", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_LMIX_EN, 0,
+ output_mixer, ARRAY_SIZE(output_mixer)),
+ SND_SOC_DAPM_MIXER("Right Output Mixer", AC200_OUT_MIX_CTL,
+ AC200_OUT_MIX_CTL_RMIX_EN, 0,
+ output_mixer, ARRAY_SIZE(output_mixer)),
+
+ SND_SOC_DAPM_MIXER("Left Input Mixer", SND_SOC_NOPM, 0, 0,
+ input_mixer, ARRAY_SIZE(input_mixer)),
+ SND_SOC_DAPM_MIXER("Right Input Mixer", SND_SOC_NOPM, 0, 0,
+ input_mixer, ARRAY_SIZE(input_mixer)),
+
+ SND_SOC_DAPM_MIXER("Left DAC Mixer", SND_SOC_NOPM, 0, 0,
+ dac_mixer, ARRAY_SIZE(dac_mixer)),
+ SND_SOC_DAPM_MIXER("Right DAC Mixer", SND_SOC_NOPM, 0, 0,
+ dac_mixer, ARRAY_SIZE(dac_mixer)),
+
+ SND_SOC_DAPM_MIXER("Left I2S Mixer", SND_SOC_NOPM, 0, 0,
+ i2s_mixer, ARRAY_SIZE(i2s_mixer)),
+ SND_SOC_DAPM_MIXER("Right I2S Mixer", SND_SOC_NOPM, 0, 0,
+ i2s_mixer, ARRAY_SIZE(i2s_mixer)),
+
+ /* Muxes */
+ SND_SOC_DAPM_MUX("Line Out Source Playback Route",
+ SND_SOC_NOPM, 0, 0, &lineout_mux),
+
+ /* Gain/attenuation */
+ SND_SOC_DAPM_PGA("MIC1 Amplifier", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_MIC1_GAIN_EN, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("MIC2 Amplifier", AC200_ADC_MIC_CTL,
+ AC200_ADC_MIC_CTL_MIC2_GAIN_EN, 0, NULL, 0),
+
+ /* Inputs */
+ SND_SOC_DAPM_INPUT("MIC1"),
+ SND_SOC_DAPM_INPUT("MIC2"),
+
+ /* Outputs */
+ SND_SOC_DAPM_OUTPUT("LINEOUT"),
+};
+
+static const struct snd_soc_dapm_route ac200_codec_dapm_routes[] = {
+ { "RST SYS I2S", NULL, "CLK SYS I2S" },
+ { "RST SYS ADC", NULL, "CLK SYS ADC" },
+ { "RST SYS DAC", NULL, "CLK SYS DAC" },
+
+ { "CLK I2S GEN", NULL, "RST SYS I2S" },
+ { "CLK I2S SDO", NULL, "CLK I2S GEN" },
+ { "CLK I2S TX", NULL, "CLK I2S SDO" },
+ { "CLK I2S RX", NULL, "CLK I2S SDO" },
+
+ { "ADC Enable", NULL, "RST SYS ADC" },
+ { "ADC Enable", NULL, "ADDA Bias" },
+ { "ADC Enable", NULL, "avcc" },
+ { "DAC Enable", NULL, "RST SYS DAC" },
+ { "DAC Enable", NULL, "ADDA Bias" },
+ { "DAC Enable", NULL, "avcc" },
+
+ { "Left DAC", NULL, "DAC Enable" },
+ { "Left DAC", NULL, "CLK I2S RX" },
+ { "Right DAC", NULL, "DAC Enable" },
+ { "Right DAC", NULL, "CLK I2S RX" },
+
+ { "Left ADC", NULL, "ADC Enable" },
+ { "Left ADC", NULL, "CLK I2S TX" },
+ { "Right ADC", NULL, "ADC Enable" },
+ { "Right ADC", NULL, "CLK I2S TX" },
+
+ { "Left Output Mixer", "MIC1 Playback Switch", "MIC1 Amplifier" },
+ { "Left Output Mixer", "MIC2 Playback Switch", "MIC2 Amplifier" },
+ { "Left Output Mixer", "DAC Playback Switch", "Left DAC Mixer" },
+ { "Left Output Mixer", "DAC Reversed Playback Switch", "Right DAC Mixer" },
+
+ { "Right Output Mixer", "MIC1 Playback Switch", "MIC1 Amplifier" },
+ { "Right Output Mixer", "MIC2 Playback Switch", "MIC2 Amplifier" },
+ { "Right Output Mixer", "DAC Playback Switch", "Right DAC Mixer" },
+ { "Right Output Mixer", "DAC Reversed Playback Switch", "Left DAC Mixer" },
+
+ { "Left Input Mixer", "MIC1 Capture Switch", "MIC1 Amplifier" },
+ { "Left Input Mixer", "MIC2 Capture Switch", "MIC2 Amplifier" },
+ { "Left Input Mixer", "Output Mixer Capture Switch", "Left Output Mixer" },
+ { "Left Input Mixer", "Output Mixer Reverse Capture Switch", "Right Output Mixer" },
+
+ { "Right Input Mixer", "MIC1 Capture Switch", "MIC1 Amplifier" },
+ { "Right Input Mixer", "MIC2 Capture Switch", "MIC2 Amplifier" },
+ { "Right Input Mixer", "Output Mixer Capture Switch", "Right Output Mixer" },
+ { "Right Input Mixer", "Output Mixer Reverse Capture Switch", "Left Output Mixer" },
+
+ { "Left I2S Mixer", "I2S DAC Capture Switch", "Left DAC" },
+ { "Left I2S Mixer", "I2S ADC Capture Switch", "Left Input Mixer" },
+ { "Right I2S Mixer", "I2S DAC Capture Switch", "Right DAC" },
+ { "Right I2S Mixer", "I2S ADC Capture Switch", "Right Input Mixer" },
+
+ { "Left DAC Mixer", "DAC I2S Playback Switch", "Left DAC" },
+ { "Left DAC Mixer", "ADC Playback Switch", "Left Input Mixer" },
+ { "Right DAC Mixer", "DAC I2S Playback Switch", "Right DAC" },
+ { "Right DAC Mixer", "ADC Playback Switch", "Right Input Mixer" },
+
+ { "Line Out Source Playback Route", "Stereo", "Left Output Mixer" },
+ { "Line Out Source Playback Route", "Stereo", "Right Output Mixer" },
+ { "Line Out Source Playback Route", "Mono", "Right Output Mixer" },
+ { "Line Out Source Playback Route", "Mono", "Left Output Mixer" },
+
+ { "Left ADC", NULL, "Left I2S Mixer" },
+ { "Right ADC", NULL, "Right I2S Mixer" },
+
+ { "LINEOUT", NULL, "Line Out Enable", },
+ { "LINEOUT", NULL, "Line Out Source Playback Route" },
+
+ { "MIC1", NULL, "MIC Bias" },
+ { "MIC2", NULL, "MIC Bias" },
+ { "MIC1 Amplifier", NULL, "MIC1" },
+ { "MIC2 Amplifier", NULL, "MIC2" },
+};
+
+static int ac200_get_sr_sw(unsigned int width)
+{
+ switch (width) {
+ case 8:
+ return 1;
+ case 12:
+ return 2;
+ case 16:
+ return 3;
+ case 20:
+ return 4;
+ case 24:
+ return 5;
+ case 28:
+ return 6;
+ case 32:
+ return 7;
+ }
+
+ return -EINVAL;
+}
+
+static const struct ac200_map ac200_bclk_div_map[] = {
+ { .match = 1, .value = 1 },
+ { .match = 2, .value = 2 },
+ { .match = 4, .value = 3 },
+ { .match = 6, .value = 4 },
+ { .match = 8, .value = 5 },
+ { .match = 12, .value = 6 },
+ { .match = 16, .value = 7 },
+ { .match = 24, .value = 8 },
+ { .match = 32, .value = 9 },
+ { .match = 48, .value = 10 },
+ { .match = 64, .value = 11 },
+ { .match = 96, .value = 12 },
+ { .match = 128, .value = 13 },
+ { .match = 176, .value = 14 },
+ { .match = 192, .value = 15 },
+};
+
+static int ac200_get_bclk_div(unsigned int sample_rate, unsigned int period)
+{
+ unsigned int sysclk_rate = (sample_rate % 4000) ? 22579200 : 24576000;
+ unsigned int div = sysclk_rate / sample_rate / period;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ac200_bclk_div_map); i++) {
+ const struct ac200_map *bdiv = &ac200_bclk_div_map[i];
+
+ if (bdiv->match == div)
+ return bdiv->value;
+ }
+
+ return -EINVAL;
+}
+
+static const struct ac200_map ac200_ssr_map[] = {
+ { .match = 8000, .value = 0 },
+ { .match = 11025, .value = 1 },
+ { .match = 12000, .value = 2 },
+ { .match = 16000, .value = 3 },
+ { .match = 22050, .value = 4 },
+ { .match = 24000, .value = 5 },
+ { .match = 32000, .value = 6 },
+ { .match = 44100, .value = 7 },
+ { .match = 48000, .value = 8 },
+ { .match = 96000, .value = 9 },
+ { .match = 192000, .value = 10 },
+};
+
+static int ac200_get_ssr(unsigned int sample_rate)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ac200_ssr_map); i++) {
+ const struct ac200_map *ssr = &ac200_ssr_map[i];
+
+ if (ssr->match == sample_rate)
+ return ssr->value;
+ }
+
+ return -EINVAL;
+}
+
+static int ac200_codec_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct ac200_codec *priv = snd_soc_dai_get_drvdata(dai);
+ unsigned int slot_width = params_physical_width(params);
+ unsigned int sample_rate = params_rate(params);
+ int sr, period, sw, bclkdiv, ssr;
+
+ sr = ac200_get_sr_sw(params_width(params));
+ if (sr < 0)
+ return sr;
+
+ sw = ac200_get_sr_sw(slot_width);
+ if (sw < 0)
+ return sw;
+
+ regmap_update_bits(priv->regmap, AC200_I2S_FMT0,
+ AC200_I2S_FMT0_SR_MASK |
+ AC200_I2S_FMT0_SW_MASK,
+ AC200_I2S_FMT0_SR(sr) |
+ AC200_I2S_FMT0_SW(sw));
+
+ switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ case SND_SOC_DAIFMT_RIGHT_J:
+ case SND_SOC_DAIFMT_LEFT_J:
+ period = slot_width;
+ break;
+ case SND_SOC_DAIFMT_DSP_A:
+ case SND_SOC_DAIFMT_DSP_B:
+ period = slot_width * 2;
+ break;
+ }
+
+ bclkdiv = ac200_get_bclk_div(sample_rate, period);
+ if (bclkdiv < 0)
+ return bclkdiv;
+
+ regmap_update_bits(priv->regmap, AC200_I2S_CLK,
+ AC200_I2S_CLK_LRCK_MASK |
+ AC200_I2S_CLK_BCLKDIV_MASK,
+ AC200_I2S_CLK_LRCK(period) |
+ AC200_I2S_CLK_BCLKDIV(bclkdiv));
+
+ ssr = ac200_get_ssr(sample_rate);
+ if (ssr < 0)
+ return ssr;
+
+ regmap_update_bits(priv->regmap, AC200_SYS_SR_CTL,
+ AC200_SYS_SR_CTL_SR_MASK,
+ AC200_SYS_SR_CTL_SR(ssr));
+
+ return 0;
+}
+
+static int ac200_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ struct ac200_codec *priv = snd_soc_dai_get_drvdata(dai);
+ unsigned long offset, mode, value;
+
+ priv->format = fmt;
+
+ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
+ case SND_SOC_DAIFMT_CBP_CFP:
+ value = AC200_I2S_CLK_BCLK_OUT | AC200_I2S_CLK_LRCK_OUT;
+ break;
+ case SND_SOC_DAIFMT_CBC_CFP:
+ value = AC200_I2S_CLK_LRCK_OUT;
+ break;
+ case SND_SOC_DAIFMT_CBP_CFC:
+ value = AC200_I2S_CLK_BCLK_OUT;
+ break;
+ case SND_SOC_DAIFMT_CBC_CFC:
+ value = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ regmap_update_bits(priv->regmap, AC200_I2S_CLK,
+ AC200_I2S_CLK_BCLK_OUT |
+ AC200_I2S_CLK_LRCK_OUT, value);
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ mode = AC200_I2S_FMT0_MODE_LEFT;
+ offset = 1;
+ break;
+ case SND_SOC_DAIFMT_RIGHT_J:
+ mode = AC200_I2S_FMT0_MODE_RIGHT;
+ offset = 0;
+ break;
+ case SND_SOC_DAIFMT_LEFT_J:
+ mode = AC200_I2S_FMT0_MODE_LEFT;
+ offset = 0;
+ break;
+ case SND_SOC_DAIFMT_DSP_A:
+ mode = AC200_I2S_FMT0_MODE_PCM;
+ offset = 1;
+ break;
+ case SND_SOC_DAIFMT_DSP_B:
+ mode = AC200_I2S_FMT0_MODE_PCM;
+ offset = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ regmap_update_bits(priv->regmap, AC200_I2S_FMT0,
+ AC200_I2S_FMT0_MODE_MASK |
+ AC200_I2S_FMT0_TX_OFFSET_MASK |
+ AC200_I2S_FMT0_RX_OFFSET_MASK,
+ AC200_I2S_FMT0_MODE(mode) |
+ AC200_I2S_FMT0_TX_OFFSET(offset) |
+ AC200_I2S_FMT0_RX_OFFSET(offset));
+
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ value = 0;
+ break;
+ case SND_SOC_DAIFMT_NB_IF:
+ value = AC200_I2S_FMT1_LRCK_POL_INVERT;
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ value = AC200_I2S_FMT1_BCLK_POL_INVERT;
+ break;
+ case SND_SOC_DAIFMT_IB_IF:
+ value = AC200_I2S_FMT1_BCLK_POL_INVERT |
+ AC200_I2S_FMT1_LRCK_POL_INVERT;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ regmap_update_bits(priv->regmap, AC200_I2S_FMT1,
+ AC200_I2S_FMT1_BCLK_POL_INVERT |
+ AC200_I2S_FMT1_LRCK_POL_INVERT, value);
+
+
+ return 0;
+}
+
+static const struct snd_soc_dai_ops ac200_codec_dai_ops = {
+ .hw_params = ac200_codec_hw_params,
+ .set_fmt = ac200_codec_set_fmt,
+};
+
+static struct snd_soc_dai_driver ac200_codec_dai = {
+ .name = "ac200-dai",
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = AC200_CODEC_RATES,
+ .formats = AC200_CODEC_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = AC200_CODEC_RATES,
+ .formats = AC200_CODEC_FORMATS,
+ },
+ .ops = &ac200_codec_dai_ops,
+ .symmetric_rate = 1,
+ .symmetric_sample_bits = 1,
+};
+
+static int ac200_codec_component_probe(struct snd_soc_component *component)
+{
+ struct ac200_codec *priv = snd_soc_component_get_drvdata(component);
+
+ snd_soc_component_init_regmap(component, priv->regmap);
+
+ return 0;
+}
+
+static struct snd_soc_component_driver ac200_soc_component = {
+ .controls = ac200_codec_controls,
+ .num_controls = ARRAY_SIZE(ac200_codec_controls),
+ .dapm_widgets = ac200_codec_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(ac200_codec_dapm_widgets),
+ .dapm_routes = ac200_codec_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(ac200_codec_dapm_routes),
+ .probe = ac200_codec_component_probe,
+};
+
+static int ac200_codec_probe(struct platform_device *pdev)
+{
+ struct ac200_codec *priv;
+ int ret;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(struct ac200_codec), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!priv->regmap)
+ return -EPROBE_DEFER;
+
+ platform_set_drvdata(pdev, priv);
+
+ ret = regmap_write(priv->regmap, AC200_SYS_AUDIO_CTL0,
+ AC200_SYS_AUDIO_CTL0_RST_INVALID |
+ AC200_SYS_AUDIO_CTL0_MCLK_GATING);
+ if (ret)
+ return ret;
+
+ ret = regmap_write(priv->regmap, AC200_SYS_AUDIO_CTL1,
+ AC200_SYS_AUDIO_CTL1_I2S_IO_EN);
+ if (ret)
+ return ret;
+
+ ret = devm_snd_soc_register_component(&pdev->dev, &ac200_soc_component,
+ &ac200_codec_dai, 1);
+
+ if (ret)
+ dev_err(&pdev->dev, "Failed to register codec: %d\n", ret);
+
+ return ret;
+}
+
+static void ac200_codec_remove(struct platform_device *pdev)
+{
+ struct ac200_codec *priv = dev_get_drvdata(&pdev->dev);
+
+ regmap_write(priv->regmap, AC200_SYS_AUDIO_CTL0, 0);
+ regmap_write(priv->regmap, AC200_SYS_AUDIO_CTL1, 0);
+}
+
+static const struct of_device_id ac200_codec_match[] = {
+ { .compatible = "x-powers,ac200-codec" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ac200_codec_match);
+
+static struct platform_driver ac200_codec_driver = {
+ .driver = {
+ .name = "ac200-codec",
+ .of_match_table = ac200_codec_match,
+ },
+ .probe = ac200_codec_probe,
+ .remove = ac200_codec_remove,
+};
+module_platform_driver(ac200_codec_driver);
+
+MODULE_DESCRIPTION("X-Powers AC200 Codec Driver");
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@gmail.com>");
+MODULE_LICENSE("GPL");
--
2.51.0

377
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-BananaPi-BPI-M4-Zero-overlays.patch Normal file
View File

@@ -0,0 +1,377 @@
From 43a7177563683a1e7d192138f65073d687ed068b Mon Sep 17 00:00:00 2001
From: Patrick Yavitz <pyavitz@armbian.com>
Date: Tue, 7 Jan 2025 06:39:30 -0500
Subject: Add BananaPi BPI-M4-Zero overlays
Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 13 ++++++
...sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtso | 13 ++++++
...sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtso | 13 ++++++
.../sun50i-h616-bananapi-m4-pg-6-7-uart1.dtso | 13 ++++++
...h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtso | 16 +++++++
.../sun50i-h616-bananapi-m4-ph-2-3-uart5.dtso | 13 ++++++
...un50i-h616-bananapi-m4-pi-13-14-uart4.dtso | 13 ++++++
...16-bananapi-m4-pi-15-16-rts-cts-uart4.dtso | 16 +++++++
.../sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtso | 13 ++++++
.../sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtso | 13 ++++++
.../sun50i-h616-bananapi-m4-sdio-wifi-bt.dtso | 44 +++++++++++++++++++
...-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtso | 32 ++++++++++++++
...n50i-h616-bananapi-m4-spi1-cs0-spidev.dtso | 24 ++++++++++
...n50i-h616-bananapi-m4-spi1-cs1-spidev.dtso | 13 ++++++
14 files changed, 249 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-6-7-uart1.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-ph-2-3-uart5.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-13-14-uart4.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-15-16-rts-cts-uart4.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-sdio-wifi-bt.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-spidev.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs1-spidev.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index ccb89b5bf495..3e87d21c9d14 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -49,6 +49,19 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-uart2.dtbo \
sun50i-h6-uart3.dtbo \
sun50i-h6-w1-gpio.dtbo \
+ sun50i-h616-bananapi-m4-pg-6-7-uart1.dtbo \
+ sun50i-h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtbo \
+ sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtbo \
+ sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtbo \
+ sun50i-h616-bananapi-m4-ph-2-3-uart5.dtbo \
+ sun50i-h616-bananapi-m4-pi-13-14-uart4.dtbo \
+ sun50i-h616-bananapi-m4-pi-15-16-rts-cts-uart4.dtbo \
+ sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtbo \
+ sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtbo \
+ sun50i-h616-bananapi-m4-sdio-wifi-bt.dtbo \
+ sun50i-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtbo \
+ sun50i-h616-bananapi-m4-spi1-cs0-spidev.dtbo \
+ sun50i-h616-bananapi-m4-spi1-cs1-spidev.dtbo \
sun50i-h616-gpu.dtbo \
sun50i-h616-i2c0-pi.dtbo \
sun50i-h616-i2c1-pi.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtso
new file mode 100644
index 000000000000..4e78aa8f1f27
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-15-16-i2c4.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c4>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtso
new file mode 100644
index 000000000000..3419eee0b70b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-17-18-i2c3.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c3>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-6-7-uart1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-6-7-uart1.dtso
new file mode 100644
index 000000000000..7001781f42d2
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-6-7-uart1.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtso
new file mode 100644
index 000000000000..1317a9b3b52f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pg-8-9-rts-cts-uart1.dtso
@@ -0,0 +1,16 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart1>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-ph-2-3-uart5.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-ph-2-3-uart5.dtso
new file mode 100644
index 000000000000..aaa96e46d708
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-ph-2-3-uart5.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart5>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-13-14-uart4.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-13-14-uart4.dtso
new file mode 100644
index 000000000000..0373f7d25449
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-13-14-uart4.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart4>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-15-16-rts-cts-uart4.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-15-16-rts-cts-uart4.dtso
new file mode 100644
index 000000000000..ef9394c8519c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-15-16-rts-cts-uart4.dtso
@@ -0,0 +1,16 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart4>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-0 = <&uart4_pi_pins>, <&uart4_pi_rts_cts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtso
new file mode 100644
index 000000000000..60c75e4d61b5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-5-6-i2c0.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c0>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtso
new file mode 100644
index 000000000000..99c7e2b8c5f6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-pi-7-8-i2c1.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-sdio-wifi-bt.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-sdio-wifi-bt.dtso
new file mode 100644
index 000000000000..307f6e5e921c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-sdio-wifi-bt.dtso
@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ model = "BananaPi BPI-M4-Zero v2";
+ };
+ };
+
+ /* SDIO WIFI */
+ fragment@1 {
+ target = <&mmc1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ /* BLUETOOTH */
+ fragment@2 {
+ target = <&uart1>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43540-bt";
+ host-wakeup-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&pio 6 19 GPIO_ACTIVE_HIGH>;
+ max-speed = <1500000>;
+ vbat-supply = <&reg_vcc3v3>;
+ vddio-supply = <&reg_vcc1v8>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtso
new file mode 100644
index 000000000000..7fa3b94bcc8d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-cs1-spidev.dtso
@@ -0,0 +1,32 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>, <&spi1_cs1_pin>;
+
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ };
+
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <50000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-spidev.dtso
new file mode 100644
index 000000000000..fef73f1afa52
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs0-spidev.dtso
@@ -0,0 +1,24 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>;
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs1-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs1-spidev.dtso
new file mode 100644
index 000000000000..840357f2e9e0
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-bananapi-m4-spi1-cs1-spidev.dtso
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
--
2.35.3

43
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-BananaPi-BPI-M4-Zero-pinctrl.patch Normal file
View File

@@ -0,0 +1,43 @@
From 074c33f4b2b60ea6d76968099f8210c61bbad7e1 Mon Sep 17 00:00:00 2001
From: Patrick Yavitz <pyavitz@armbian.com>
Date: Thu, 12 Dec 2024 06:49:59 -0500
Subject: Add BananaPi BPI-M4-Zero pinctrl
Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 8de963bee2ac..2e418ffdfcdb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -409,6 +409,12 @@ i2c0_pins: i2c0-pins {
function = "i2c0";
};
+ /omit-if-no-ref/
+ i2c1_pi_pins: i2c1-pi-pins {
+ pins = "PI7", "PI8";
+ function = "i2c1";
+ };
+
/omit-if-no-ref/
i2c2_ph_pins: i2c2-ph-pins {
pins = "PH2", "PH3";
@@ -571,6 +577,12 @@ spi1_cs0_pin: spi1-cs0-pin {
function = "spi1";
};
+ /omit-if-no-ref/
+ spi1_cs1_pin: spi1-cs1-pin {
+ pins = "PH9";
+ function = "spi1";
+ };
+
spdif_tx_pin: spdif-tx-pin {
pins = "PH4";
function = "spdif";
--
2.35.3

154
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-FB_TFT-ST7796S-driver.patch Normal file
View File

@@ -0,0 +1,154 @@
From 0987e0158d63711b01a2435fa515d80a5b540422 Mon Sep 17 00:00:00 2001
From: Alan <Alan>
Date: Sat, 20 May 2023 14:33:52 +0800
Subject: Add: FB_TFT ST7796S driver
---
drivers/staging/fbtft/Kconfig | 10 +++
drivers/staging/fbtft/Makefile | 1 +
drivers/staging/fbtft/fb_st7796s.c | 100 +++++++++++++++++++++++++++++
3 files changed, 111 insertions(+)
create mode 100644 drivers/staging/fbtft/fb_st7796s.c
diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
index c2655768209a..c72954ea0e19 100644
--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
@@ -145,6 +145,16 @@ config FB_TFT_ST7789V
Say Y if you have such a display that utilizes this controller.
+config FB_TFT_ST7796S
+ tristate "FB driver for the ST7796S LCD Controller"
+ depends on FB_TFT
+ help
+ This enables generic framebuffer support for the Sitronix ST7796S
+ display controller. The controller is intended for small color
+ displays with a resolution of up to 480x320 pixels.
+
+ Say Y if you have such a display that utilizes this controller.
+
config FB_TFT_TINYLCD
tristate "FB driver for tinylcd.com display"
help
diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
index e9cdf0f0a7da..7b2098b8a1bd 100644
--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_FB_TFT_SSD1331) += fb_ssd1331.o
obj-$(CONFIG_FB_TFT_SSD1351) += fb_ssd1351.o
obj-$(CONFIG_FB_TFT_ST7735R) += fb_st7735r.o
obj-$(CONFIG_FB_TFT_ST7789V) += fb_st7789v.o
+obj-$(CONFIG_FB_TFT_ST7796S) += fb_st7796s.o
obj-$(CONFIG_FB_TFT_TINYLCD) += fb_tinylcd.o
obj-$(CONFIG_FB_TFT_TLS8204) += fb_tls8204.o
obj-$(CONFIG_FB_TFT_UC1611) += fb_uc1611.o
diff --git a/drivers/staging/fbtft/fb_st7796s.c b/drivers/staging/fbtft/fb_st7796s.c
new file mode 100644
index 000000000000..cad489cef595
--- /dev/null
+++ b/drivers/staging/fbtft/fb_st7796s.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the ST7796S LCD Controller
+ *
+ * Copyright (c) 2023 Alan Ma
+ * Copyright (c) 2014 Petr Olivka
+ * Copyright (c) 2013 Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+#define DRVNAME "fb_st7796s"
+#define WIDTH 480
+#define HEIGHT 320
+
+static const s16 default_init_sequence[] = {
+ -1, 0xC0, 0x0C, 0x02,
+ -1, 0xC1, 0x44,
+ -1, 0xC5, 0x00, 0x16, 0x80,
+ -1, 0x36, 0x28,
+ /* Interface Mode Control */
+ -1, 0x3A, 0x55,
+ -1, 0XB0, 0x00,
+ /* Frame rate 70HZ */
+ -1, 0xB1, 0xB0,
+ -1, 0xB4, 0x02,
+ /* RGB/MCU Interface Control */
+ -1, 0xB6, 0x02, 0x02,
+ -1, 0xE9, 0x00,
+ -1, 0XF7, 0xA9, 0x51, 0x2C, 0x82,
+ /* SLP_OUT - Sleep out */
+ -1, MIPI_DCS_EXIT_SLEEP_MODE,
+ -2, 50,
+ /* DISP_ON */
+ -1, MIPI_DCS_SET_DISPLAY_ON,
+ -3
+};
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
+
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
+
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+static int set_var(struct fbtft_par *par)
+{
+ switch (par->info->var.rotate) {
+ case 270:
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ 0x80 | (par->bgr << 3));
+ break;
+ case 180:
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ 0xE0 | (par->bgr << 3));
+ break;
+ case 90:
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ 0x40 | (par->bgr << 3));
+ break;
+ default:
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+ 0x20 | (par->bgr << 3));
+ break;
+ }
+
+ return 0;
+}
+
+static struct fbtft_display display = {
+ .regwidth = 8,
+ .width = WIDTH,
+ .height = HEIGHT,
+ .init_sequence = default_init_sequence,
+ .fbtftops = {
+ .set_addr_win = set_addr_win,
+ .set_var = set_var,
+ },
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7796s", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:st7796s");
+MODULE_ALIAS("platform:st7796s");
+
+MODULE_DESCRIPTION("FB driver for the ST7796S LCD Controller");
+MODULE_AUTHOR("Alan Ma");
+MODULE_LICENSE("GPL");
--
2.35.3

56
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-HDMI-support-for-pcDuino-1-and-2-by-including-HDMI-and-DE-n.patch Normal file
View File

@@ -0,0 +1,56 @@
From 23514cbc264217bcb6c2e6f199c38d0f713061ea Mon Sep 17 00:00:00 2001
From: Ryzer58 <ryestar101@gmail.com>
Date: Mon, 24 Feb 2025 23:12:01 +0000
Subject: Add HDMI support for pcDuino 1 and 2 by including HDMI and DE nodes
Signed-off-by: Ryzer58 <ryestar101@gmail.com>
---
.../boot/dts/allwinner/sun4i-a10-pcduino.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-pcduino.dts
index a332d61fd561..b54f54ecc026 100644
--- a/arch/arm/boot/dts/allwinner/sun4i-a10-pcduino.dts
+++ b/arch/arm/boot/dts/allwinner/sun4i-a10-pcduino.dts
@@ -74,6 +74,17 @@ led-1 {
};
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
@@ -127,6 +138,20 @@ axp209: pmic@34 {
};
};
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mdio {
status = "okay";
--
2.51.0

56
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-HDMI-support-for-pcDuino-3-by-including-HDMI-and-DE-nodes.patch Normal file
View File

@@ -0,0 +1,56 @@
From 8225e98fe295d59bbf4cd5017e04110077ff4d99 Mon Sep 17 00:00:00 2001
From: Ryzer58 <ryestar101@gmail.com>
Date: Mon, 2 Jun 2025 00:29:48 +0100
Subject: Add HDMI support for pcDuino 3 by including HDMI and DE nodes
Signed-off-by: Ryzer58 <ryestar101@gmail.com>
---
.../boot/dts/allwinner/sun7i-a20-pcduino3.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-pcduino3.dts
index 928b86a95f34..9a339912298b 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-pcduino3.dts
@@ -75,6 +75,17 @@ led-1 {
};
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
@@ -137,6 +148,20 @@ axp209: pmic@34 {
};
};
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
#include "axp209.dtsi"
&ir0 {
--
2.51.0

1548
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-dump_reg-and-sunxi-sysinfo-drivers.patch Normal file
View File

File diff suppressed because it is too large Load Diff

609
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-sunxi-addr-driver-Used-to-fix-uwe5622-bluetooth-MAC-address.patch Normal file
View File

@@ -0,0 +1,609 @@
From 836de5e4296b33c8145b3e6bbc09a7836f059212 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 20:18:18 +0000
Subject: Add sunxi-addr driver - Used to fix uwe5622 bluetooth MAC addresses
---
drivers/misc/Kconfig | 1 +
drivers/misc/Makefile | 1 +
drivers/misc/sunxi-addr/Kconfig | 6 +
drivers/misc/sunxi-addr/Makefile | 5 +
drivers/misc/sunxi-addr/sha256.c | 178 ++++++++++++++
drivers/misc/sunxi-addr/sunxi-addr.c | 356 +++++++++++++++++++++++++++
6 files changed, 547 insertions(+)
create mode 100644 drivers/misc/sunxi-addr/Kconfig
create mode 100644 drivers/misc/sunxi-addr/Makefile
create mode 100644 drivers/misc/sunxi-addr/sha256.c
create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 1525637d1b4b..58682aa3d99c 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -667,4 +667,5 @@ source "drivers/misc/pvpanic/Kconfig"
source "drivers/misc/mchp_pci1xxxx/Kconfig"
source "drivers/misc/keba/Kconfig"
source "drivers/misc/amd-sbi/Kconfig"
+source "drivers/misc/sunxi-addr/Kconfig"
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 634517bc9a2b..42059a5025fb 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -76,3 +76,4 @@ obj-$(CONFIG_MCHP_LAN966X_PCI) += lan966x-pci.o
obj-y += keba/
obj-y += amd-sbi/
obj-$(CONFIG_MODEM_POWER) += modem-power.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi-addr/
diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
new file mode 100644
index 000000000000..801dd2c02a56
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Kconfig
@@ -0,0 +1,6 @@
+config SUNXI_ADDR_MGT
+ tristate "Allwinner Network MAC Addess Manager"
+ depends on BT || ETHERNET || WLAN
+ depends on NVMEM_SUNXI_SID
+ help
+ allwinner network mac address management
diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
new file mode 100644
index 000000000000..f01fd4783566
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for wifi mac addr manager drivers
+#
+sunxi_addr-objs := sunxi-addr.o sha256.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi_addr.o
diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
new file mode 100644
index 000000000000..78825810c53f
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sha256.c
@@ -0,0 +1,178 @@
+/*
+ * Local implement of sha256.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+/****************************** MACROS ******************************/
+#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
+#define CH(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
+#define MAJ(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
+#define EP0(x) (ROTRIGHT(x, 2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
+#define EP1(x) (ROTRIGHT(x, 6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
+#define SIG0(x) (ROTRIGHT(x, 7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
+#define SIG1(x) (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
+
+/**************************** VARIABLES *****************************/
+static const uint32_t k[64] = {
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+ 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+ 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+ 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+ 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+ 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+ 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+ 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+ 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+ 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+ 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
+};
+
+struct sha256_ctx {
+ uint8_t data[64]; /* current 512-bit chunk of message data, just like a buffer */
+ uint32_t datalen; /* sign the data length of current chunk */
+ uint64_t bitlen; /* the bit length of the total message */
+ uint32_t state[8]; /* store the middle state of hash abstract */
+};
+
+/*********************** FUNCTION DEFINITIONS ***********************/
+static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
+{
+ uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
+
+ /* initialization */
+ for (i = 0, j = 0; i < 16; ++i, j += 4)
+ m[i] = (data[j] << 24) | (data[j + 1] << 16) |
+ (data[j + 2] << 8) | (data[j + 3]);
+ for ( ; i < 64; ++i)
+ m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
+
+ a = ctx->state[0];
+ b = ctx->state[1];
+ c = ctx->state[2];
+ d = ctx->state[3];
+ e = ctx->state[4];
+ f = ctx->state[5];
+ g = ctx->state[6];
+ h = ctx->state[7];
+
+ for (i = 0; i < 64; ++i) {
+ t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
+ t2 = EP0(a) + MAJ(a, b, c);
+ h = g;
+ g = f;
+ f = e;
+ e = d + t1;
+ d = c;
+ c = b;
+ b = a;
+ a = t1 + t2;
+ }
+
+ ctx->state[0] += a;
+ ctx->state[1] += b;
+ ctx->state[2] += c;
+ ctx->state[3] += d;
+ ctx->state[4] += e;
+ ctx->state[5] += f;
+ ctx->state[6] += g;
+ ctx->state[7] += h;
+}
+
+static void sha256_init(struct sha256_ctx *ctx)
+{
+ ctx->datalen = 0;
+ ctx->bitlen = 0;
+ ctx->state[0] = 0x6a09e667;
+ ctx->state[1] = 0xbb67ae85;
+ ctx->state[2] = 0x3c6ef372;
+ ctx->state[3] = 0xa54ff53a;
+ ctx->state[4] = 0x510e527f;
+ ctx->state[5] = 0x9b05688c;
+ ctx->state[6] = 0x1f83d9ab;
+ ctx->state[7] = 0x5be0cd19;
+}
+
+static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
+{
+ uint32_t i;
+
+ for (i = 0; i < len; ++i) {
+ ctx->data[ctx->datalen] = data[i];
+ ctx->datalen++;
+ if (ctx->datalen == 64) {
+ /* 64 byte = 512 bit means the buffer ctx->data has
+ * fully stored one chunk of message,
+ * so do the sha256 hash map for the current chunk.
+ */
+ sha256_transform(ctx, ctx->data);
+ ctx->bitlen += 512;
+ ctx->datalen = 0;
+ }
+ }
+}
+
+static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
+{
+ uint32_t i;
+
+ i = ctx->datalen;
+
+ /* Pad whatever data is left in the buffer. */
+ if (ctx->datalen < 56) {
+ ctx->data[i++] = 0x80; /* pad 10000000 = 0x80 */
+ while (i < 56)
+ ctx->data[i++] = 0x00;
+ } else {
+ ctx->data[i++] = 0x80;
+ while (i < 64)
+ ctx->data[i++] = 0x00;
+ sha256_transform(ctx, ctx->data);
+ memset(ctx->data, 0, 56);
+ }
+
+ /* Append to the padding the total message's length in bits and transform. */
+ ctx->bitlen += ctx->datalen * 8;
+ ctx->data[63] = ctx->bitlen;
+ ctx->data[62] = ctx->bitlen >> 8;
+ ctx->data[61] = ctx->bitlen >> 16;
+ ctx->data[60] = ctx->bitlen >> 24;
+ ctx->data[59] = ctx->bitlen >> 32;
+ ctx->data[58] = ctx->bitlen >> 40;
+ ctx->data[57] = ctx->bitlen >> 48;
+ ctx->data[56] = ctx->bitlen >> 56;
+ sha256_transform(ctx, ctx->data);
+
+ /* copying the final state to the output hash(use big endian). */
+ for (i = 0; i < 4; ++i) {
+ hash[i] = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 4] = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 8] = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
+ }
+}
+
+int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
+{
+ struct sha256_ctx ctx;
+
+ sha256_init(&ctx);
+ sha256_update(&ctx, plaintext, psize);
+ sha256_final(&ctx, output);
+ return 0;
+}
diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
new file mode 100644
index 000000000000..c8a50c8dbac6
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sunxi-addr.c
@@ -0,0 +1,356 @@
+/*
+ * The driver of SUNXI NET MAC ADDR Manager.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#define DEBUG
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/miscdevice.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+
+#define MODULE_CUR_VERSION "v1.0.9"
+
+#define MATCH_STR_LEN 20
+#define ADDR_VAL_LEN 6
+#define ADDR_STR_LEN 18
+#define ID_LEN 16
+#define HASH_LEN 32
+
+#define TYPE_ANY 0
+#define TYPE_BURN 1
+#define TYPE_IDGEN 2
+#define TYPE_USER 3
+#define TYPE_RAND 4
+
+#define ADDR_FMT_STR 0
+#define ADDR_FMT_VAL 1
+
+#define IS_TYPE_INVALID(x) ((x < TYPE_ANY) || (x > TYPE_RAND))
+
+#define ADDR_CLASS_ATTR_ADD(name) \
+static ssize_t addr_##name##_show(const struct class *class, \
+ const struct class_attribute *attr, char *buffer) \
+{ \
+ char addr[ADDR_STR_LEN]; \
+ if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
+ return 0; \
+ return sprintf(buffer, "%.17s\n", addr); \
+} \
+static ssize_t addr_##name##_store(const struct class *class, \
+ const struct class_attribute *attr, \
+ const char *buffer, size_t count) \
+{ \
+ if (count != ADDR_STR_LEN) { \
+ ADDR_MGT_ERR("Length wrong."); \
+ return -EINVAL; \
+ } \
+ set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
+ return count; \
+} \
+static CLASS_ATTR_RW(addr_##name);
+
+struct addr_mgt_info {
+ unsigned int type_def;
+ unsigned int type_cur;
+ unsigned int flag;
+ char *addr;
+ char *name;
+};
+
+static struct addr_mgt_info info[] = {
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
+ {TYPE_ANY, TYPE_ANY, 0, NULL, "bt" },
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
+};
+
+extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
+extern int sunxi_get_soc_chipid(unsigned char *chipid);
+
+static int addr_parse(int fmt, const char *addr, int check)
+{
+ char val_buf[ADDR_VAL_LEN];
+ char cmp_buf[ADDR_VAL_LEN];
+ int ret = ADDR_VAL_LEN;
+
+ if (fmt == ADDR_FMT_STR)
+ ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &val_buf[0], &val_buf[1], &val_buf[2],
+ &val_buf[3], &val_buf[4], &val_buf[5]);
+ else
+ memcpy(val_buf, addr, ADDR_VAL_LEN);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+
+ if (check && (val_buf[0] & 0x3))
+ return -1;
+
+ memset(cmp_buf, 0x00, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ return 0;
+}
+
+static struct addr_mgt_info *addr_find_by_name(char *name)
+{
+ int i = 0;
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ if (strcmp(info[i].name, name) == 0)
+ return &info[i];
+ }
+ return NULL;
+}
+
+static int get_addr_by_name(int fmt, char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (IS_TYPE_INVALID(t->type_cur)) {
+ ADDR_MGT_ERR("addr type invalid");
+ return -1;
+ }
+
+ if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
+ return -1;
+ }
+
+ if (fmt == ADDR_FMT_STR)
+ sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
+ t->addr[0], t->addr[1], t->addr[2],
+ t->addr[3], t->addr[4], t->addr[5]);
+ else
+ memcpy(addr, t->addr, ADDR_VAL_LEN);
+
+ return t->type_cur;
+}
+
+static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (addr_parse(fmt, addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", addr);
+ return -1;
+ }
+
+ t->type_cur = type;
+ if (fmt == ADDR_FMT_STR)
+ sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &t->addr[0], &t->addr[1], &t->addr[2],
+ &t->addr[3], &t->addr[4], &t->addr[5]);
+ else
+ memcpy(t->addr, addr, ADDR_VAL_LEN);
+
+ return 0;
+}
+
+int get_custom_mac_address(int fmt, char *name, char *addr)
+{
+ return get_addr_by_name(fmt, addr, name);
+}
+EXPORT_SYMBOL_GPL(get_custom_mac_address);
+
+static int addr_factory(struct device_node *np,
+ int idx, int type, char *mac, char *name)
+{
+ int ret, i;
+ char match[MATCH_STR_LEN];
+ const char *p;
+ char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
+ struct timespec64 curtime;
+
+ switch (type) {
+ case TYPE_BURN:
+ sprintf(match, "addr_%s", name);
+ ret = of_property_read_string_index(np, match, 0, &p);
+ if (ret)
+ return -1;
+
+ ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &mac[0], &mac[1], &mac[2],
+ &mac[3], &mac[4], &mac[5]);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+ break;
+ case TYPE_IDGEN:
+ if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
+ return -1;
+ if (sunxi_get_soc_chipid(id))
+ return -1;
+ memset(cmp_buf, 0x00, ID_LEN);
+ if (memcmp(id, cmp_buf, ID_LEN) == 0)
+ return -1;
+ if (hmac_sha256(id, ID_LEN, hash))
+ return -1;
+ memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
+ break;
+ case TYPE_RAND:
+ for (i = 0; i < ADDR_VAL_LEN; i++) {
+ ktime_get_real_ts64(&curtime);
+ mac[i] = (char)curtime.tv_nsec;
+ }
+ break;
+ default:
+ ADDR_MGT_ERR("unsupport type: %d", type);
+ return -1;
+ }
+ return 0;
+}
+
+static int addr_init(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ int type, i, j;
+ char match[MATCH_STR_LEN];
+ char addr[ADDR_VAL_LEN];
+ int type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
+
+ /* init addr type and value */
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ sprintf(match, "type_addr_%s", info[i].name);
+ if (of_property_read_u32(np, match, &type)) {
+ ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
+ info[i].name, info[i].type_def);
+ } else {
+ info[i].type_def = type;
+ info[i].type_cur = type;
+ }
+
+ if (IS_TYPE_INVALID(info[i].type_def))
+ return -1;
+ if (info[i].type_def != TYPE_ANY) {
+ if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
+ return -1;
+ } else {
+ for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
+ if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
+ info[i].type_cur = type_tab[j];
+ break;
+ }
+ }
+ }
+
+ if (info[i].flag)
+ addr[0] &= 0xFC;
+
+ if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
+ return -1;
+ else {
+ info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
+ memcpy(info[i].addr, addr, ADDR_VAL_LEN);
+ }
+ }
+ return 0;
+}
+
+static ssize_t summary_show(const struct class *class,
+ const struct class_attribute *attr, char *buffer)
+{
+ int i = 0, ret = 0;
+
+ ret += sprintf(&buffer[ret], "name cfg cur address\n");
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ ret += sprintf(&buffer[ret],
+ "%4s %d %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+ info[i].name, info[i].type_def, info[i].type_cur,
+ info[i].addr[0], info[i].addr[1], info[i].addr[2],
+ info[i].addr[3], info[i].addr[4], info[i].addr[5]);
+ }
+ return ret;
+}
+static CLASS_ATTR_RO(summary);
+
+ADDR_CLASS_ATTR_ADD(wifi);
+ADDR_CLASS_ATTR_ADD(bt);
+ADDR_CLASS_ATTR_ADD(eth);
+
+static struct attribute *addr_class_attrs[] = {
+ &class_attr_summary.attr,
+ &class_attr_addr_wifi.attr,
+ &class_attr_addr_bt.attr,
+ &class_attr_addr_eth.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(addr_class);
+
+static struct class addr_class = {
+ .name = "addr_mgt",
+ .class_groups = addr_class_groups,
+};
+
+static const struct of_device_id addr_mgt_ids[] = {
+ { .compatible = "allwinner,sunxi-addr_mgt" },
+ { /* Sentinel */ }
+};
+
+static int addr_mgt_probe(struct platform_device *pdev)
+{
+ int status;
+
+ ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
+ status = class_register(&addr_class);
+ if (status < 0) {
+ ADDR_MGT_ERR("class register error, status: %d.", status);
+ return -1;
+ }
+
+ if (addr_init(pdev)) {
+ ADDR_MGT_ERR("failed to init addr.");
+ class_unregister(&addr_class);
+ return -1;
+ }
+ ADDR_MGT_DBG("success.");
+ return 0;
+}
+
+static void addr_mgt_remove(struct platform_device *pdev)
+{
+ class_unregister(&addr_class);
+}
+
+static struct platform_driver addr_mgt_driver = {
+ .probe = addr_mgt_probe,
+ .remove = addr_mgt_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "sunxi-addr-mgt",
+ .of_match_table = addr_mgt_ids,
+ },
+};
+
+module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
+
+MODULE_AUTHOR("Allwinnertech");
+MODULE_DESCRIPTION("Network MAC Addess Manager");
+MODULE_LICENSE("GPL");
--
2.35.3

88
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-wifi-nodes-for-Inovato-Quadra.patch Normal file
View File

@@ -0,0 +1,88 @@
From 6b1d64060b59702b34bf07068aeff10139c69400 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Tue, 19 Sep 2023 11:06:01 +0000
Subject: Add wifi nodes for Inovato Quadra
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h6-inovato-quadra.dts | 56 +++++++++++++++++++
2 files changed, 57 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-inovato-quadra.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 1edcb7023ef8..aedee0882dc9 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-inovato-quadra.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h313-tanix-tx1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-inovato-quadra.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-inovato-quadra.dts
new file mode 100644
index 000000000000..551ad69f18a6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-inovato-quadra.dts
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2023 Gunjan Gupta <gunjan@armbian.com>
+
+/dts-v1/;
+
+#include "sun50i-h6-tanix.dtsi"
+
+/ {
+ model = "Inovato Quadra";
+ compatible = "oranth,inovato-quadra", "allwinner,sun50i-h6";
+
+ aliases {
+ ethernet1 = &xr819;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "red";
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+
+ led-1 {
+ label = "blue";
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+ default-state = "on";
+ };
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+
+ xr819: sdio_wifi@1 {
+ compatible = "xradio,xr819";
+ interrupt-names = "host-wake";
+ interrupt-parent = <&r_pio>;
+ interrupts = <1 0 IRQ_TYPE_EDGE_RISING>;
+ local-mac-address = [dc 44 6d c0 ff ee];
+ reg = <1>;
+ };
+};
+
+&sound_hdmi {
+ status = "okay";
+};
+
+&wifi_pwrseq {
+ post-power-on-delay-ms = <0xc8>;
+};
--
2.51.0

273
patch/kernel/archive/sunxi-6.16/patches.armbian/Add-ws2812-RGB-driver-for-allwinner-H616.patch Normal file
View File

@@ -0,0 +1,273 @@
From 4546be7fd3812ee3a733beececa504bf7cb4bfac Mon Sep 17 00:00:00 2001
From: Alan <Alan>
Date: Sat, 20 May 2023 17:26:21 +0800
Subject: Add: ws2812 RGB driver for allwinner H616
---
drivers/leds/rgb/Kconfig | 7 +
drivers/leds/rgb/Makefile | 1 +
drivers/leds/rgb/leds-ws2812.c | 227 +++++++++++++++++++++++++++++++++
3 files changed, 235 insertions(+)
create mode 100644 drivers/leds/rgb/leds-ws2812.c
diff --git a/drivers/leds/rgb/Kconfig b/drivers/leds/rgb/Kconfig
index 222d943d826a..3b7761f39f44 100644
--- a/drivers/leds/rgb/Kconfig
+++ b/drivers/leds/rgb/Kconfig
@@ -76,3 +76,10 @@ config LEDS_MT6370_RGB
will be called "leds-mt6370-rgb".
endif # LEDS_CLASS_MULTICOLOR
+
+config LEDS_WS2812
+ tristate "WS2812 RGB support for allwinner H616"
+ depends on PINCTRL_SUN50I_H616
+
+ help
+ Say Y here if you want to use the WS2812.
\ No newline at end of file
diff --git a/drivers/leds/rgb/Makefile b/drivers/leds/rgb/Makefile
index a501fd27f179..8f7646ead3c1 100644
--- a/drivers/leds/rgb/Makefile
+++ b/drivers/leds/rgb/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_LEDS_NCP5623) += leds-ncp5623.o
obj-$(CONFIG_LEDS_PWM_MULTICOLOR) += leds-pwm-multicolor.o
obj-$(CONFIG_LEDS_QCOM_LPG) += leds-qcom-lpg.o
obj-$(CONFIG_LEDS_MT6370_RGB) += leds-mt6370-rgb.o
+obj-$(CONFIG_LEDS_WS2812) += leds-ws2812.o
diff --git a/drivers/leds/rgb/leds-ws2812.c b/drivers/leds/rgb/leds-ws2812.c
new file mode 100644
index 000000000000..c9981724bba9
--- /dev/null
+++ b/drivers/leds/rgb/leds-ws2812.c
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023, The Linux Foundation. All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <asm/uaccess.h>
+#include <linux/moduleparam.h>
+#include <linux/ioctl.h>
+#include <linux/version.h>
+#include <linux/errno.h>
+#include <linux/rbtree.h>
+#include <linux/ktime.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+#include <linux/time.h>
+#include <linux/hrtimer.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+
+#define GPIO_BASE 0x0300B000
+#define GPIO_DAT_OFFSET(n) ((n)*0x0024 + 0x10)
+
+static uint32_t ws2812_pin = 0;
+static volatile uint32_t *ws2812_gpio_port;
+static volatile uint32_t ws2812_gpio_bit;
+static volatile uint32_t ws2812_set_val = 0;
+static volatile uint32_t ws2812_reset_val = 0;
+
+DEFINE_SPINLOCK(lock);
+
+// ws2812 reset
+static void ws2812_rst(void)
+{
+ *ws2812_gpio_port &= ~ws2812_gpio_bit;
+ udelay(200);// RES low voltage time, Above 50µs
+}
+
+static void ws2812_Write_24Bits(uint32_t grb)
+{
+ uint8_t i;
+ for (i = 0; i < 24; i++)
+ {
+ if (grb & 0x800000)
+ {
+ // loop for delay about 700ns
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ // loop for delay about 600ns
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ }
+ else
+ {
+ // loop for delay about 200ns
+ *ws2812_gpio_port = ws2812_set_val;
+ *ws2812_gpio_port = ws2812_set_val;
+ // loop for delay about 800ns
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ *ws2812_gpio_port = ws2812_reset_val;
+ }
+ grb <<= 1;
+ }
+}
+
+static void ws2812_write_array(uint32_t *rgb, uint32_t cnt)
+{
+ uint32_t i = 0;
+ unsigned long flags;
+
+ for (i = 0; i < cnt; i++)
+ {
+ // rgb -> grb
+ rgb[i] = (((rgb[i] >> 16) & 0xff) << 8) | (((rgb[i] >> 8) & 0xff) << 16) | ((rgb[i]) & 0xff);
+ }
+
+ spin_lock_irqsave(&lock, flags);
+ ws2812_set_val = *ws2812_gpio_port | ws2812_gpio_bit;
+ ws2812_reset_val = *ws2812_gpio_port & (~ws2812_gpio_bit);
+ ws2812_rst();
+ for (i = 0; i < cnt; i++)
+ {
+ ws2812_Write_24Bits(rgb[i]);
+ }
+ spin_unlock_irqrestore(&lock, flags);
+}
+
+ssize_t ws2812_read(struct file *file, char __user *user, size_t bytesize, loff_t *this_loff_t)
+{
+ return 0;
+}
+
+ssize_t ws2812_write(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos)
+{
+ uint32_t rgb[255];
+ unsigned long ret = 0;
+
+ if (count > 255 * 4) count = 255 * 4;
+ ret = copy_from_user(&rgb[0], user_buf, count);
+ if (ret < 0)
+ {
+ printk("copy_from_user fail!!!\n");
+ return -1;
+ }
+
+ ws2812_write_array((uint32_t *)rgb, count / 4);
+
+ return 0;
+}
+
+int ws2812_open(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+int ws2812_close(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static struct file_operations ws2812_ops = {
+ .owner = THIS_MODULE,
+ .open = ws2812_open,
+ .release = ws2812_close,
+ .write = ws2812_write,
+};
+
+static struct miscdevice ws2812_misc_dev = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = "ws2812-led",
+ .fops = &ws2812_ops,
+};
+
+static int ws2812_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct device_node *ws2812_gpio_node = pdev->dev.of_node;
+ uint32_t rgb_cnt = 0;
+ uint32_t rgb[255];
+
+ of_property_read_u32(ws2812_gpio_node, "rgb_cnt", &rgb_cnt);
+ if (rgb_cnt > 255)
+ rgb_cnt = 255;
+
+ of_property_read_u32_array(ws2812_gpio_node, "rgb_value", rgb, rgb_cnt);
+ ws2812_pin = of_get_named_gpio(ws2812_gpio_node, "gpios", 0);
+ if (!gpio_is_valid(ws2812_pin))
+ {
+ printk(KERN_ERR "ws2812: gpio: %d is invalid\n", ws2812_pin);
+ return -ENODEV;
+ }
+
+ ws2812_gpio_port = ioremap(GPIO_BASE + GPIO_DAT_OFFSET((ws2812_pin >> 5)), 4);
+ ws2812_gpio_bit = 1 << (ws2812_pin & 0x001F);
+
+ if (gpio_request(ws2812_pin, "ws2812-gpio"))
+ {
+ printk(KERN_ERR "ws2812: gpio %d request failed!\n", ws2812_pin);
+ gpio_free(ws2812_pin);
+ return -ENODEV;
+ }
+ gpio_direction_output(ws2812_pin, 0);
+
+ ret = misc_register(&ws2812_misc_dev);
+ msleep(50);
+
+ ws2812_write_array(rgb, rgb_cnt);
+
+ return 0;
+}
+
+static void ws2812_remove(struct platform_device *pdev)
+{
+ misc_deregister(&ws2812_misc_dev);
+ gpio_free(ws2812_pin);
+}
+
+static const struct of_device_id ws2812_of_match[] = {
+ {.compatible = "rgb-ws2812"},
+ {/* sentinel */}};
+
+MODULE_DEVICE_TABLE(of, ws2812_of_match);
+
+static struct platform_driver ws2812_driver = {
+ .probe = ws2812_probe,
+ .remove = ws2812_remove,
+ .driver = {
+ .name = "ws2812_ctl",
+ .of_match_table = ws2812_of_match,
+ },
+};
+
+module_platform_driver(ws2812_driver);
+
+MODULE_AUTHOR("MacLodge, Alan Ma <tech@biqu3d.com>");
+MODULE_DESCRIPTION("WS2812 RGB driver for Allwinner");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ws2812_ctl");
--
2.35.3

58
patch/kernel/archive/sunxi-6.16/patches.armbian/BigTreeTech-CB1-dts-i2c-gpio-mode-adjustment-and-ws2812-rgb_val.patch Normal file
View File

@@ -0,0 +1,58 @@
From 20dc0b0f3da7895d50f2824b4608c5e44729f892 Mon Sep 17 00:00:00 2001
From: JohnTheCoolingFan <ivan8215145640@gmail.com>
Date: Sat, 25 Jan 2025 11:30:04 +0000
Subject: BigTreeTech CB1: dts: i2c gpio mode adjustment and ws2812 rgb_value
Signed-off-by: JohnTheCoolingFan <ivan8215145640@gmail.com>
---
.../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts | 4 ++--
.../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts | 4 ++--
.../arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
index f878c23f1d90..b059ea08fec0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-emmc.dts
@@ -21,8 +21,8 @@ &ws2812 {
};
&i2c_gpio {
- gpios = <&pio 8 6 GPIO_ACTIVE_HIGH>, /* SDA PI6 */
- <&pio 8 4 GPIO_ACTIVE_HIGH>; /* SCL PI4 */
+ gpios = <&pio 8 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>, /* SDA PI6 */
+ <&pio 8 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* SCL PI4 */
};
&can0_pin_irq {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
index e18dd854d74b..cc10be714676 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1-sd.dts
@@ -12,8 +12,8 @@ &ws2812 {
};
&i2c_gpio {
- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>, /* SDA PC12 */
- <&pio 2 10 GPIO_ACTIVE_HIGH>; /* SCL PC10 */
+ gpios = <&pio 2 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>, /* SDA PC12 */
+ <&pio 2 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* SCL PC10 */
};
&can0_pin_irq {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
index 3b3a196eaa93..d18695148ef5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
@@ -108,7 +108,7 @@ ws2812: ws2812 {
compatible = "rgb-ws2812";
pinctrl-names = "default";
rgb_cnt = <2>;
- rgb_value = <0x010000 0x010000>;
+ rgb_value = <0x000001 0x010000>;
status = "disabled";
};
--
2.35.3

24
patch/kernel/archive/sunxi-6.16/patches.armbian/Compile-the-pwm-overlay.patch Normal file
View File

@@ -0,0 +1,24 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:26:16 +0000
Subject: Compile the pwm overlay
---
arch/arm64/boot/dts/allwinner/overlay/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-i2c0.dtbo \
sun50i-h6-i2c1.dtbo \
sun50i-h6-i2c2.dtbo \
+ sun50i-h6-pwm.dtbo \
sun50i-h6-ruart.dtbo \
sun50i-h6-spi-add-cs1.dtbo \
sun50i-h6-spi-jedec-nor.dtbo \
--
Armbian

29
patch/kernel/archive/sunxi-6.16/patches.armbian/Correct-perf-interrupt-source-number-as-referenced-in-the-Allwi.patch Normal file
View File

@@ -0,0 +1,29 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ryzer58 <ryestar101@gmail.com>
Date: Sat, 30 Nov 2024 20:40:29 +0000
Subject: Correct perf interrupt source number as referenced in the Allwinner
A10 User manual
to resolve conflict with UART2.
Signed-off-by: Ryzer58 <ryestar101@gmail.com>
---
arch/arm/boot/dts/allwinner/sun4i-a10.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
@@ -185,7 +185,7 @@ de: display-engine {
pmu {
compatible = "arm,cortex-a8-pmu";
- interrupts = <3>;
+ interrupts = <66>;
};
reserved-memory {
--
Armbian

63
patch/kernel/archive/sunxi-6.16/patches.armbian/Doc-dt-bindings-usb-add-binding-for-DWC3-controller-on-Allwinne.patch Normal file
View File

@@ -0,0 +1,63 @@
From 846209f909c9cf9d7a29a72328ed27b9ee504ac1 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 25 Dec 2017 12:08:01 +0800
Subject: Doc:dt-bindings:usb: add binding for DWC3 controller on Allwinner SoC
The Allwinner H6 SoC uses DWC3 controller for USB3.
Add its device tree binding document.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../bindings/usb/allwinner,dwc3.txt | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
diff --git a/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
new file mode 100644
index 000000000000..3f7714636785
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
@@ -0,0 +1,39 @@
+Allwinner SuperSpeed DWC3 USB SoC controller
+
+Required properties:
+- compatible: should contain "allwinner,sun50i-h6-dwc3" for H6 SoC
+- clocks: A list of phandle + clock-specifier pairs for the
+ clocks listed in clock-names
+- clock-names: Should contain the following:
+ "bus" The bus clock of the DWC3 part
+- resets: A list of phandle + reset-specifier pairs for the
+ resets listed in reset-names
+- reset-names: Should contain the following:
+ "bus" The bus reset of the DWC3 part
+
+Required child node:
+A child node must exist to represent the core DWC3 IP block. The name of
+the node is not important. The content of the node is defined in dwc3.txt.
+
+Phy documentation is provided in the following places:
+Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt
+
+Example device nodes:
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&ccu CLK_BUS_XHCI>;
+ clock-names = "bus";
+ resets = <&ccu RST_BUS_XHCI>;
+ reset-names = "bus";
+
+ dwc3: dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x5200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+ };
--
2.35.3

26
patch/kernel/archive/sunxi-6.16/patches.armbian/Enable-DMA-support-for-the-Allwinner-A10-EMAC-which-already-exi.patch Normal file
View File

@@ -0,0 +1,26 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ryzer58 <ryestar101@gmail.com>
Date: Sat, 30 Nov 2024 22:29:50 +0000
Subject: Enable DMA support for the Allwinner A10 EMAC, which already exist in
the sun4i-emac driver
---
arch/arm/boot/dts/allwinner/sun4i-a10.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi
@@ -315,6 +315,8 @@ emac: ethernet@1c0b000 {
interrupts = <55>;
clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
+ dmas = <&dma SUN4I_DMA_DEDICATED 7>;
+ dma-names = "rx";
pinctrl-names = "default";
pinctrl-0 = <&emac_pins>;
status = "disabled";
--
Armbian

29
patch/kernel/archive/sunxi-6.16/patches.armbian/Enable-creation-of-__symbols__-node.patch Normal file
View File

@@ -0,0 +1,29 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Patrick Yavitz <pyavitz@gmail.com>
Date: Mon, 23 Dec 2024 10:14:57 -0500
Subject: Enable creation of __symbols__ node
Signed-off-by: Patrick Yavitz <pyavitz@gmail.com>
---
scripts/Makefile.dtbs | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/scripts/Makefile.dtbs b/scripts/Makefile.dtbs
index 111111111111..222222222222 100644
--- a/scripts/Makefile.dtbs
+++ b/scripts/Makefile.dtbs
@@ -102,6 +102,11 @@ else
DTC_FLAGS += -Wunique_unit_address_if_enabled
endif
+ifeq ($(CONFIG_OF_OVERLAY),y)
+# enable creation of __symbols__ node
+DTC_FLAGS += -@
+endif
+
ifneq ($(findstring 2,$(KBUILD_EXTRA_WARN)),)
DTC_FLAGS += -Wnode_name_chars_strict \
-Wproperty_name_chars_strict \
--
Armbian

211
patch/kernel/archive/sunxi-6.16/patches.armbian/Fix-ghost-touches-on-tsc2007-tft-screen.patch Normal file
View File

@@ -0,0 +1,211 @@
From b75f5bf0d822ac325c205a489941f33256ed4b9a Mon Sep 17 00:00:00 2001
From: JohnTheCoolingFan <ivan8215145640@gmail.com>
Date: Sat, 25 Jan 2025 12:54:16 +0000
Subject: Fix ghost touches on tsc2007 tft screen
Signed-off-by: JohnTheCoolingFan <ivan8215145640@gmail.com>
---
.../sun50i-h616-bigtreetech-cb1.dtsi | 1 +
drivers/input/touchscreen/tsc2007.h | 1 +
drivers/input/touchscreen/tsc2007_core.c | 96 +++++++++----------
include/linux/platform_data/tsc2007.h | 1 +
4 files changed, 49 insertions(+), 50 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
index 2022990e4bc0..3b3a196eaa93 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
@@ -125,6 +125,7 @@ tft_tp: ns2009@48 {
reg = <0x48>;
status = "disabled";
ti,x-plate-ohms = <660>;
+ ti,y-plate-ohms = <660>;
ti,rt-thr = <3000>;
ti,fuzzx = <32>;
ti,fuzzy = <16>;
diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
index 46ae4e4183b8..c84b687b5399 100644
--- a/drivers/input/touchscreen/tsc2007.h
+++ b/drivers/input/touchscreen/tsc2007.h
@@ -67,6 +67,7 @@ struct tsc2007 {
struct touchscreen_properties prop;
u16 model;
u16 x_plate_ohms;
+ u16 y_plate_ohms;
u16 max_rt;
u16 rt_thr;
u8 touched;
diff --git a/drivers/input/touchscreen/tsc2007_core.c b/drivers/input/touchscreen/tsc2007_core.c
index 2abcaff3fe0a..12e7b5cbcabf 100644
--- a/drivers/input/touchscreen/tsc2007_core.c
+++ b/drivers/input/touchscreen/tsc2007_core.c
@@ -70,22 +70,20 @@ static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc)
u32 tsc2007_calculate_resistance(struct tsc2007 *tsc, struct ts_event *tc)
{
- u32 rt = 0;
-
- /* range filtering */
- if (tc->x == MAX_12BIT)
+ if (tc->x == MAX_12BIT){
tc->x = 0;
+ }
- if (likely(tc->x && tc->z1)) {
- /* compute touch resistance using equation #1 */
- rt = tc->z2 - tc->z1;
- rt *= tc->x;
- rt *= tsc->x_plate_ohms;
- rt /= tc->z1;
- rt = (rt + 2047) >> 12;
+ if (tc->y == MAX_12BIT){
+ tc->y = 0;
}
- return rt;
+
+ if (likely(tc->x && tc->y && tc->z1)) {
+ return (tsc->x_plate_ohms * tc->x / 4096) * ((4096 / tc->z1) - 1) - tsc->y_plate_ohms * (1 - tc->y / 4096);
+ } else{
+ return 0;
+ }
}
bool tsc2007_is_pen_down(struct tsc2007 *ts)
@@ -179,6 +177,7 @@ static irqreturn_t tsc2007_soft_poll(int irq, void *handle)
struct input_dev *input = ts->input;
struct ts_event tc;
u32 rt;
+ bool skipSync = false;
if(!ts->stopped) {
@@ -188,45 +187,31 @@ static irqreturn_t tsc2007_soft_poll(int irq, void *handle)
rt = tsc2007_calculate_resistance(ts, &tc);
- if (rt == 0 || rt == 256) {
-
- /*
- * Sample found inconsistent by debouncing or pressure is
- * beyond the maximum. Don't report it to user space,
- * repeat at least once more the measurement.
- */
- dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt);
-
- } else {
-
- if (rt < ts->rt_thr) {
-
- dev_dbg(&ts->client->dev,
- "DOWN point(%4d,%4d), resistance (%4u)\n",
- tc.x, tc.y, rt);
-
- rt = ts->max_rt - rt;
+ if (likely(rt)) {
- input_report_key(input, BTN_TOUCH, 1);
- input_report_abs(input, ABS_X, tc.y);
- input_report_abs(input, ABS_Y, 4096 - tc.x);
- input_report_abs(input, ABS_PRESSURE, rt);
+ /* range >= 0 && <= 4096 */
+ if (rt > 0 && rt <= ts->max_rt) {
+ rt = ts->max_rt - rt;
+ input_report_key(input, BTN_TOUCH, 1);
+ input_report_abs(input, ABS_X, tc.y);
+ input_report_abs(input, ABS_Y, 4096 - tc.x);
+ input_report_abs(input, ABS_PRESSURE, rt);
+ input_sync(input);
- input_sync(input);
- ts->touched = 1;
-
- } else if (ts->touched == 1) {
-
- dev_dbg(&ts->client->dev, "UP\n");
-
- input_report_key(input, BTN_TOUCH, 0);
- input_report_abs(input, ABS_PRESSURE, 0);
- input_sync(input);
- ts->touched = 0;
+ } else {
+ //Discard Input Ghost or inconsistent
+ skipSync= true;
}
+ }else{
+ // No touch event or missing data for rt calculation
+ skipSync= true;
}
+ }
-
+ if(skipSync){
+ input_report_key(input, BTN_TOUCH, 0);
+ input_report_abs(input, ABS_PRESSURE, 0);
+ input_sync(input);
}
return IRQ_HANDLED;
@@ -328,6 +313,13 @@ static int tsc2007_probe_properties(struct device *dev, struct tsc2007 *ts)
return -EINVAL;
}
+ if (!device_property_read_u32(dev, "ti,y-plate-ohms", &val32)) {
+ ts->y_plate_ohms = val32;
+ } else {
+ dev_err(dev, "Missing ti,y-plate-ohms device property\n");
+ return -EINVAL;
+ }
+
ts->gpiod = devm_gpiod_get_optional(dev, NULL, GPIOD_IN);
if (IS_ERR(ts->gpiod))
return PTR_ERR(ts->gpiod);
@@ -346,6 +338,7 @@ static int tsc2007_probe_pdev(struct device *dev, struct tsc2007 *ts,
{
ts->model = pdata->model;
ts->x_plate_ohms = pdata->x_plate_ohms;
+ ts->y_plate_ohms = pdata->y_plate_ohms;
ts->max_rt = pdata->max_rt ? : MAX_12BIT;
ts->poll_period = msecs_to_jiffies(pdata->poll_period ? : 1);
ts->get_pendown_state = pdata->get_pendown_state;
@@ -359,6 +352,11 @@ static int tsc2007_probe_pdev(struct device *dev, struct tsc2007 *ts,
return -EINVAL;
}
+ if (pdata->y_plate_ohms == 0) {
+ dev_err(dev, "y_plate_ohms is not set up in platform data\n");
+ return -EINVAL;
+ }
+
return 0;
}
@@ -457,11 +455,9 @@ static int tsc2007_probe(struct i2c_client *client)
return err;
}
} else {
- INIT_WORK(&ts->work_i2c_poll,
- tsc2007_ts_work_i2c_poll);
+ INIT_WORK(&ts->work_i2c_poll, tsc2007_ts_work_i2c_poll);
timer_setup(&ts->timer, tsc2007_ts_irq_poll_timer, 0);
- ts->timer.expires = jiffies +
- msecs_to_jiffies(POLL_INTERVAL_MS);
+ ts->timer.expires = jiffies + msecs_to_jiffies(POLL_INTERVAL_MS);
add_timer(&ts->timer);
}
diff --git a/include/linux/platform_data/tsc2007.h b/include/linux/platform_data/tsc2007.h
index a0ca52c41ccb..f88e580322f0 100644
--- a/include/linux/platform_data/tsc2007.h
+++ b/include/linux/platform_data/tsc2007.h
@@ -7,6 +7,7 @@
struct tsc2007_platform_data {
u16 model; /* 2007. */
u16 x_plate_ohms; /* must be non-zero value */
+ u16 y_plate_ohms; /* must be non-zero value */
u16 max_rt; /* max. resistance above which samples are ignored */
unsigned long poll_period; /* time (in ms) between samples */
int fuzzx; /* fuzz factor for X, Y and pressure axes */
--
2.35.3

26
patch/kernel/archive/sunxi-6.16/patches.armbian/Fix-include-uapi-spi-spidev-module.patch Normal file
View File

@@ -0,0 +1,26 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 28 Apr 2022 15:45:14 +0300
Subject: Fix include uapi spi spidev module
---
drivers/spi/spidev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 111111111111..222222222222 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -21,8 +21,7 @@
#include <linux/slab.h>
#include <linux/compat.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spidev.h>
+#include <uapi/linux/spi/spidev.h>
#include <linux/uaccess.h>
--
Armbian

48
patch/kernel/archive/sunxi-6.16/patches.armbian/Input-axp20x-pek-allow-wakeup-after-shutdown.patch Normal file
View File

@@ -0,0 +1,48 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 2 Jan 2021 15:52:27 -0600
Subject: Input: axp20x-pek - allow wakeup after shutdown
While the AXP20x PMIC handles the power button itself after shutting
down, it is not always possible to use the PMIC's built-in shutdown
feature, such as when other wakeup sources are needed (for example, an
IR remote or wake-on-LAN) that require firmware support. In that case,
the PMIC remains on, but suspended, until the board is powered back on.
During this "fake" off state, IRQ configuration is similar to system
sleep, where enable_irq_wake() must be call on an IRQ for it to be
wakeup capable. Run the suspend callback to arm the power button IRQs
during the shutdown process, so the power button works in this state.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/input/misc/axp20x-pek.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/input/misc/axp20x-pek.c b/drivers/input/misc/axp20x-pek.c
index 111111111111..222222222222 100644
--- a/drivers/input/misc/axp20x-pek.c
+++ b/drivers/input/misc/axp20x-pek.c
@@ -384,6 +384,11 @@ static const struct dev_pm_ops axp20x_pek_pm_ops = {
.resume_noirq = pm_sleep_ptr(axp20x_pek_resume_noirq),
};
+static void axp20x_pek_shutdown(struct platform_device *pdev)
+{
+ axp20x_pek_suspend(&pdev->dev);
+}
+
static const struct platform_device_id axp_pek_id_match[] = {
{
.name = "axp20x-pek",
@@ -399,6 +404,7 @@ MODULE_DEVICE_TABLE(platform, axp_pek_id_match);
static struct platform_driver axp20x_pek_driver = {
.probe = axp20x_pek_probe,
+ .shutdown = axp20x_pek_shutdown,
.id_table = axp_pek_id_match,
.driver = {
.name = "axp20x-pek",
--
Armbian

39
patch/kernel/archive/sunxi-6.16/patches.armbian/LED-green_power_on-red_status_heartbeat-arch-arm64-boot-dts-all.patch Normal file
View File

@@ -0,0 +1,39 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Wed, 31 May 2023 08:12:00 +0000
Subject: LED-green_power_on-red_status_heartbeat
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -27,16 +27,17 @@ leds {
compatible = "gpio-leds";
led-0 {
- function = LED_FUNCTION_POWER;
+ function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
- default-state = "on";
+ linux,default-trigger = "heartbeat";
};
led-1 {
- function = LED_FUNCTION_STATUS;
+ function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ default-state = "on";
};
};
--
Armbian

27
patch/kernel/archive/sunxi-6.16/patches.armbian/Makefile-CONFIG_SHELL-fix-for-builddeb-packaging.patch Normal file
View File

@@ -0,0 +1,27 @@
From 836e3c6dde4128b0c846e8baeffb6a8e8ea58e00 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 11:28:14 +0300
Subject: Makefile: CONFIG_SHELL fix for builddeb packaging
---
Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index c1cd1b5fc269..d829884494af 100644
--- a/Makefile
+++ b/Makefile
@@ -436,7 +436,9 @@ KCONFIG_CONFIG ?= .config
export KCONFIG_CONFIG
# SHELL used by kbuild
-CONFIG_SHELL := sh
+CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+ else if [ -x /bin/bash ]; then echo /bin/bash; \
+ else echo sh; fi ; fi)
HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
--
2.35.3

70
patch/kernel/archive/sunxi-6.16/patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch Normal file
View File

@@ -0,0 +1,70 @@
From 17c23b36efb63cd249c5cfc8ce4a6b790f1dfeda Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:23:56 +0000
Subject: Move sun50i-h6-pwm settings to its own overlay
---
.../allwinner/overlay/sun50i-h6-fixup.scr-cmd | 14 -----------
.../dts/allwinner/overlay/sun50i-h6-pwm.dtso | 25 +++++++++++++++++++
2 files changed, 25 insertions(+), 14 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
index d8e79ba4531b..f757db7aa4ad 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
@@ -54,20 +54,6 @@ if test "${param_pps_falling_edge}" = "1"; then
fdt set /pps@0 assert-falling-edge
fi
-for f in ${overlays}; do
- if test "${f}" = "pwm"; then
- setenv bootargs_new ""
- for arg in ${bootargs}; do
- if test "${arg}" = "console=ttyS0,115200"; then
- echo "Warning: Disabling ttyS0 console due to enabled PWM overlay"
- else
- setenv bootargs_new "${bootargs_new} ${arg}"
- fi
- done
- setenv bootargs "${bootargs_new}"
- fi
-done
-
if test -n "${param_w1_pin}"; then
setenv tmp_bank "${param_w1_pin}"
setenv tmp_pin "${param_w1_pin}"
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dtso
new file mode 100644
index 000000000000..a8aa74ed1988
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dtso
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h6-pwm";
+
+ fragment@0 {
+ target = <&pio>;
+ __overlay__ {
+ pwm_pin: pwm-pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+ };
+ };
+};
--
2.35.3

195
patch/kernel/archive/sunxi-6.16/patches.armbian/Optimize-TSC2007-touchscreen-add-polling-method.patch Normal file
View File

@@ -0,0 +1,195 @@
From baabc51678faaf2020ee7791e2a52e39517cbc93 Mon Sep 17 00:00:00 2001
From: Alan <Alan>
Date: Sat, 20 May 2023 14:44:07 +0800
Subject: Optimize: TSC2007 touchscreen add polling method
---
drivers/input/touchscreen/tsc2007.h | 6 ++
drivers/input/touchscreen/tsc2007_core.c | 110 +++++++++++++++++++++--
2 files changed, 108 insertions(+), 8 deletions(-)
diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
index e346fb4f7552..46ae4e4183b8 100644
--- a/drivers/input/touchscreen/tsc2007.h
+++ b/drivers/input/touchscreen/tsc2007.h
@@ -68,10 +68,13 @@ struct tsc2007 {
u16 model;
u16 x_plate_ohms;
u16 max_rt;
+ u16 rt_thr;
+ u8 touched;
unsigned long poll_period; /* in jiffies */
int fuzzx;
int fuzzy;
int fuzzz;
+ bool ignore_nak;
struct gpio_desc *gpiod;
int irq;
@@ -83,6 +86,9 @@ struct tsc2007 {
void (*clear_penirq)(void);
struct mutex mlock;
+
+ struct timer_list timer;
+ struct work_struct work_i2c_poll;
};
int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
diff --git a/drivers/input/touchscreen/tsc2007_core.c b/drivers/input/touchscreen/tsc2007_core.c
index 5252301686ec..2abcaff3fe0a 100644
--- a/drivers/input/touchscreen/tsc2007_core.c
+++ b/drivers/input/touchscreen/tsc2007_core.c
@@ -28,6 +28,8 @@
#include <linux/platform_data/tsc2007.h>
#include "tsc2007.h"
+#define POLL_INTERVAL_MS 17 /* 17ms = 60fps */
+
int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
{
s32 data;
@@ -171,6 +173,65 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
return IRQ_HANDLED;
}
+static irqreturn_t tsc2007_soft_poll(int irq, void *handle)
+{
+ struct tsc2007 *ts = handle;
+ struct input_dev *input = ts->input;
+ struct ts_event tc;
+ u32 rt;
+
+ if(!ts->stopped) {
+
+ mutex_lock(&ts->mlock);
+ tsc2007_read_values(ts, &tc);
+ mutex_unlock(&ts->mlock);
+
+ rt = tsc2007_calculate_resistance(ts, &tc);
+
+ if (rt == 0 || rt == 256) {
+
+ /*
+ * Sample found inconsistent by debouncing or pressure is
+ * beyond the maximum. Don't report it to user space,
+ * repeat at least once more the measurement.
+ */
+ dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt);
+
+ } else {
+
+ if (rt < ts->rt_thr) {
+
+ dev_dbg(&ts->client->dev,
+ "DOWN point(%4d,%4d), resistance (%4u)\n",
+ tc.x, tc.y, rt);
+
+ rt = ts->max_rt - rt;
+
+ input_report_key(input, BTN_TOUCH, 1);
+ input_report_abs(input, ABS_X, tc.y);
+ input_report_abs(input, ABS_Y, 4096 - tc.x);
+ input_report_abs(input, ABS_PRESSURE, rt);
+
+ input_sync(input);
+ ts->touched = 1;
+
+ } else if (ts->touched == 1) {
+
+ dev_dbg(&ts->client->dev, "UP\n");
+
+ input_report_key(input, BTN_TOUCH, 0);
+ input_report_abs(input, ABS_PRESSURE, 0);
+ input_sync(input);
+ ts->touched = 0;
+ }
+ }
+
+
+ }
+
+ return IRQ_HANDLED;
+}
+
static void tsc2007_stop(struct tsc2007 *ts)
{
ts->stopped = true;
@@ -215,11 +276,32 @@ static int tsc2007_get_pendown_state_gpio(struct device *dev)
return gpiod_get_value_cansleep(ts->gpiod);
}
+static void tsc2007_ts_irq_poll_timer(struct timer_list *t)
+{
+ struct tsc2007 *ts = from_timer(ts, t, timer);
+
+ schedule_work(&ts->work_i2c_poll);
+ mod_timer(&ts->timer, jiffies + msecs_to_jiffies(POLL_INTERVAL_MS));
+}
+
+static void tsc2007_ts_work_i2c_poll(struct work_struct *work)
+{
+ struct tsc2007 *ts = container_of(work,
+ struct tsc2007, work_i2c_poll);
+
+ tsc2007_soft_poll(0, ts);
+}
+
static int tsc2007_probe_properties(struct device *dev, struct tsc2007 *ts)
{
u32 val32;
u64 val64;
+ ts->ignore_nak = device_property_read_bool(dev, "i2c,ignore-nak");
+
+ if (!device_property_read_u32(dev, "ti,rt-thr", &val32))
+ ts->rt_thr = val32;
+
if (!device_property_read_u32(dev, "ti,max-rt", &val32))
ts->max_rt = val32;
else
@@ -316,6 +398,9 @@ static int tsc2007_probe(struct i2c_client *client)
if (!input_dev)
return -ENOMEM;
+ if (ts->ignore_nak)
+ client->flags |= I2C_M_IGNORE_NAK;
+
i2c_set_clientdata(client, ts);
ts->client = client;
@@ -361,14 +446,23 @@ static int tsc2007_probe(struct i2c_client *client)
pdata->init_platform_hw();
}
- err = devm_request_threaded_irq(&client->dev, ts->irq,
- NULL, tsc2007_soft_irq,
- IRQF_ONESHOT,
- client->dev.driver->name, ts);
- if (err) {
- dev_err(&client->dev, "Failed to request irq %d: %d\n",
- ts->irq, err);
- return err;
+ if (ts->gpiod) {
+ err = devm_request_threaded_irq(&client->dev, ts->irq,
+ NULL, tsc2007_soft_irq,
+ IRQF_ONESHOT,
+ client->dev.driver->name, ts);
+ if (err) {
+ dev_err(&client->dev, "Failed to request irq %d: %d\n",
+ ts->irq, err);
+ return err;
+ }
+ } else {
+ INIT_WORK(&ts->work_i2c_poll,
+ tsc2007_ts_work_i2c_poll);
+ timer_setup(&ts->timer, tsc2007_ts_irq_poll_timer, 0);
+ ts->timer.expires = jiffies +
+ msecs_to_jiffies(POLL_INTERVAL_MS);
+ add_timer(&ts->timer);
}
tsc2007_stop(ts);
--
2.35.3

49
patch/kernel/archive/sunxi-6.16/patches.armbian/Revert-drm-sun4i-hdmi-switch-to-struct-drm_edid.patch Normal file
View File

@@ -0,0 +1,49 @@
From aec6c912e969a433916d8f40b663fb3bef57cdf3 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 9 Sep 2024 14:40:49 +0300
Subject: Revert "drm/sun4i: hdmi: switch to struct drm_edid"
This reverts commit bd730c77fa37fe2dda4b6e23f6921ef8a9b1bb97.
---
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
index ab0938ba61f7..22024fd34b2b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
@@ -190,24 +190,20 @@ sun4i_hdmi_connector_clock_valid(const struct drm_connector *connector,
static int sun4i_hdmi_get_modes(struct drm_connector *connector)
{
struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector);
- const struct drm_edid *drm_edid;
+ struct edid *edid;
int ret;
- drm_edid = drm_edid_read_ddc(connector, hdmi->ddc_i2c ?: hdmi->i2c);
-
- drm_edid_connector_update(connector, drm_edid);
- cec_s_phys_addr(hdmi->cec_adap,
- connector->display_info.source_physical_address, false);
-
- if (!drm_edid)
+ edid = drm_get_edid(connector, hdmi->ddc_i2c ?: hdmi->i2c);
+ if (!edid)
return 0;
DRM_DEBUG_DRIVER("Monitor is %s monitor\n",
connector->display_info.is_hdmi ? "an HDMI" : "a DVI");
-
- ret = drm_edid_connector_add_modes(connector);
- drm_edid_free(drm_edid);
+ drm_connector_update_edid_property(connector, edid);
+ cec_s_phys_addr_from_edid(hdmi->cec_adap, edid);
+ ret = drm_add_edid_modes(connector, edid);
+ kfree(edid);
return ret;
}
--
2.35.3

4239
patch/kernel/archive/sunxi-6.16/patches.armbian/Sound-for-H616-H618-Allwinner-SOCs.patch Normal file
View File

File diff suppressed because it is too large Load Diff

53
patch/kernel/archive/sunxi-6.16/patches.armbian/Temp_fix-mailbox-arch-arm64-boot-dts-allwinner-sun50i-a64-pinep.patch Normal file
View File

@@ -0,0 +1,53 @@
From ef5deb15a48bd970f378ae63a058ecd70bf42834 Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Mon, 26 Jun 2023 14:29:56 +0000
Subject: Temp_fix mailbox
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index d502c1392b8e..5c986e66ab6d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -42,7 +42,7 @@ bat: battery {
resistance-temp-table = <20 150>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 =
- <4334000 100>,
+ <4334000 100>,
<4319700 99>,
<4304300 98>,
<4292200 97>,
@@ -144,7 +144,7 @@ bat: battery {
<3393500 1>,
<3256000 0>;
x-powers,ocv-capacity-table =
- <0xc0 0>,
+ <0xc0 0>,
<0xc1 1>,
<0xc2 1>,
<0xc3 2>,
@@ -191,7 +191,7 @@ ppkb_battery: keyboard-battery {
factory-internal-resistance-micro-ohms = <120000>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 =
- <4147328 100>,
+ <4147328 100>,
<4132636 99>,
<4121720 98>,
<4110905 97>,
@@ -778,6 +778,7 @@ &mmc1 {
non-removable;
post-power-on-delay-ms = <1>; /* wifi power is always on */
status = "okay";
+ keep-power-in-suspend;
rtl8723cs: wifi@1 {
reg = <1>;
--
2.35.3

135
patch/kernel/archive/sunxi-6.16/patches.armbian/add-dtb-overlay-for-zero2w.patch Normal file
View File

@@ -0,0 +1,135 @@
From 4b2f43e4e23c5e6184568a6b0bf0e85fce4aefb3 Mon Sep 17 00:00:00 2001
From: chraac <chraac@gmail.com>
Date: Fri, 5 Apr 2024 10:57:18 +0800
Subject: add dtb overlay for zero2w
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 4 ++++
.../allwinner/overlay/sun50i-h616-gpu.dtso | 14 +++++++++++
.../overlay/sun50i-h616-i2c0-pi.dtso | 23 +++++++++++++++++++
.../overlay/sun50i-h616-i2c1-pi.dtso | 16 +++++++++++++
.../overlay/sun50i-h616-i2c2-pi.dtso | 23 +++++++++++++++++++
5 files changed, 80 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-gpu.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c0-pi.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c1-pi.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-pi.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 718909b607a6..ccb89b5bf495 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -49,6 +49,10 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-uart2.dtbo \
sun50i-h6-uart3.dtbo \
sun50i-h6-w1-gpio.dtbo \
+ sun50i-h616-gpu.dtbo \
+ sun50i-h616-i2c0-pi.dtbo \
+ sun50i-h616-i2c1-pi.dtbo \
+ sun50i-h616-i2c2-pi.dtbo \
sun50i-h616-i2c2-ph.dtbo \
sun50i-h616-i2c3-pg.dtbo \
sun50i-h616-i2c3-ph.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-gpu.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-gpu.dtso
new file mode 100644
index 000000000000..ac8846ac7d27
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-gpu.dtso
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&gpu>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c0-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c0-pi.dtso
new file mode 100644
index 000000000000..b5003934c895
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c0-pi.dtso
@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&i2c0>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&uart2>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c1-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c1-pi.dtso
new file mode 100644
index 000000000000..05f3100967ff
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c1-pi.dtso
@@ -0,0 +1,16 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&i2c1>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pi_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-pi.dtso
new file mode 100644
index 000000000000..0f7d7e9968d6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-pi.dtso
@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&i2c2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pi_pins>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&uart3>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+};
--
2.35.3

431
patch/kernel/archive/sunxi-6.16/patches.armbian/add-initial-support-for-orangepi3-lts.patch Normal file
View File

@@ -0,0 +1,431 @@
From c8c7ccf8c9b5f40503fdad69170c21279337dac4 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sat, 16 Apr 2022 11:51:35 +0300
Subject: add initial support for orangepi3-lts
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h6-orangepi-3-lts.dts | 399 ++++++++++++++++++
2 files changed, 400 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 17f357097503..1edcb7023ef8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -44,6 +44,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
new file mode 100644
index 000000000000..dd6b4e15263e
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -0,0 +1,399 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi 3 LTS";
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "green-led";
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+ default-state = "on";
+ };
+
+ power {
+ label = "red-led";
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC jack */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <150000>;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vcc33_wifi: vcc33-wifi {
+ /* Always on 3.3V regulator for WiFi and BT */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+ };
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc33_wifi>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&ac200_codec {
+ avcc-supply = <&reg_aldo2>;
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
+&analog {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&reg_dcdca>;
+};
+
+&de {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_gmac_3v3>;
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <300>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&reg_dcdcc>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_bldo2>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ motorcomm,clk-out-frequency-hz = <125000000>;
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
+ reset-assert-us = <15000>;
+ reset-deassert-us = <40000>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_cldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc33_wifi>;
+ vqmmc-supply = <&reg_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_cldo1>;
+ vqmmc-supply = <&reg_bldo2>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <&reg_bldo2>;
+ vcc-pd-supply = <&reg_cldo1>;
+ vcc-pg-supply = <&reg_vcc_wifi_io>;
+};
+
+&pwm {
+ status = "okay";
+};
+
+&r_ir {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp805: pmic@36 {
+ compatible = "x-powers,axp805", "x-powers,axp806";
+ reg = <0x36>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
+ vina-supply = <&reg_vcc5v>;
+ vinb-supply = <&reg_vcc5v>;
+ vinc-supply = <&reg_vcc5v>;
+ vind-supply = <&reg_vcc5v>;
+ vine-supply = <&reg_vcc5v>;
+ aldoin-supply = <&reg_vcc5v>;
+ bldoin-supply = <&reg_vcc5v>;
+ cldoin-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl-led-ir";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-audio-tv-ephy-mac";
+ regulator-enable-ramp-delay = <100000>;
+ };
+
+ /* ALDO3 is shorted to CLDO1 */
+ reg_aldo3: aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18-dram-bias-pll";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
+ };
+
+ reg_bldo3: bldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pm-pg-dcxoio-wifi";
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ reg_cldo1: cldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1160000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-enable-ramp-delay = <32000>;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-gpu";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-name = "vdd-sys";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&sound_hdmi {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "disabled";
+};
+
+&usb2otg {
+ /*
+ * This board doesn't have a controllable VBUS even though it
+ * does have an ID pin. Using it as anything but a USB host is
+ * unsafe.
+ */
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb2phy {
+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
+ usb0_vbus-supply = <&reg_vcc5v>;
+ usb3_vbus-supply = <&reg_vcc5v>;
+ status = "okay";
+};
+
+&usb3phy {
+ status = "okay";
+};
--
2.51.0

73
patch/kernel/archive/sunxi-6.16/patches.armbian/add-nodes-for-sunxi-info-sunxi-addr-and-sunxi-dump-reg.patch Normal file
View File

@@ -0,0 +1,73 @@
From 542310e242c48b0a793d12532d7f2ff2f6679658 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sat, 16 Apr 2022 11:51:35 +0300
Subject: add nodes for sunxi-info, sunxi-addr and sunxi-dump-reg
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++++++++++++++++++
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 19 +++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index ccc771600042..12179289c731 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -1252,6 +1252,25 @@ ths: thermal-sensor@5070400 {
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
+
+ sunxi-info {
+ compatible = "allwinner,sun50i-h6-sys-info";
+ status = "okay";
+ };
+
+ addr_mgt: addr-mgt {
+ compatible = "allwinner,sunxi-addr_mgt";
+ type_addr_wifi = <0x2>;
+ type_addr_bt = <0x2>;
+ type_addr_eth = <0x2>;
+ status = "okay";
+ };
+
+ dump_reg: dump_reg@20000 {
+ compatible = "allwinner,sunxi-dump-reg";
+ reg = <0x0 0x03001000 0x0 0x0f20>;
+ status = "okay";
+ };
};
thermal-zones {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 72e46c263485..5c1e2dc77268 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -1020,6 +1020,25 @@ r_rsb: rsb@7083000 {
#address-cells = <1>;
#size-cells = <0>;
};
+
+ dump_reg: dump_reg@20000 {
+ compatible = "allwinner,sunxi-dump-reg";
+ reg = <0x0 0x03001000 0x0 0x0f20>;
+ status = "okay";
+ };
+
+ sunxi-info {
+ compatible = "allwinner,sun50i-h616-sys-info";
+ status = "okay";
+ };
+
+ addr_mgt: addr-mgt {
+ compatible = "allwinner,sunxi-addr_mgt";
+ type_addr_wifi = <0x2>;
+ type_addr_bt = <0x2>;
+ type_addr_eth = <0x2>;
+ status = "okay";
+ };
};
thermal-zones {
--
2.51.0

79
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-arm64-dts-Add-leds-axp20x-charger.patch Normal file
View File

@@ -0,0 +1,79 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 16:43:53 +0300
Subject: arm:arm64:dts: Add leds axp20x charger
---
arch/arm/boot/dts/allwinner/axp209.dtsi | 5 +++++
arch/arm/boot/dts/allwinner/axp22x.dtsi | 5 +++++
arch/arm/boot/dts/allwinner/axp81x.dtsi | 5 +++++
arch/arm64/boot/dts/allwinner/axp803.dtsi | 5 +++++
4 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/axp209.dtsi b/arch/arm/boot/dts/allwinner/axp209.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/axp209.dtsi
+++ b/arch/arm/boot/dts/allwinner/axp209.dtsi
@@ -76,6 +76,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp209-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/allwinner/axp22x.dtsi b/arch/arm/boot/dts/allwinner/axp22x.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/axp22x.dtsi
+++ b/arch/arm/boot/dts/allwinner/axp22x.dtsi
@@ -62,6 +62,11 @@ axp_adc: adc {
#io-channel-cells = <1>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp221-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/allwinner/axp81x.dtsi b/arch/arm/boot/dts/allwinner/axp81x.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/axp81x.dtsi
+++ b/arch/arm/boot/dts/allwinner/axp81x.dtsi
@@ -64,6 +64,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp813-battery-power-supply";
status = "disabled";
diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -28,6 +28,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp803-battery-power-supply",
"x-powers,axp813-battery-power-supply";
--
Armbian

196
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-Add-sun8i-h2-plus-nanopi-duo-device.patch Normal file
View File

@@ -0,0 +1,196 @@
From 379b3c9bf09db69afb31eb1f9f7f65e5a83b4308 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:00:36 +0300
Subject: arm:dts: Add sun8i-h2-plus-nanopi-duo device
---
arch/arm/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun8i-h2-plus-nanopi-duo.dts | 164 ++++++++++++++++++
2 files changed, 165 insertions(+)
create mode 100644 arch/arm/boot/dts/allwinner/sun8i-h2-plus-nanopi-duo.dts
diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile
index 326ff9c7de72..129d9e3d75a4 100644
--- a/arch/arm/boot/dts/allwinner/Makefile
+++ b/arch/arm/boot/dts/allwinner/Makefile
@@ -223,6 +223,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a83t-tbs-a711.dtb \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-nanopi-duo.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-nanopi-duo.dts
new file mode 100644
index 000000000000..2b31b8fddbf3
--- /dev/null
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-nanopi-duo.dts
@@ -0,0 +1,164 @@
+/*
+ * adapted by karabek, 2018 , based on
+ * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
+ * Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
+ *
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3-nanopi.dtsi"
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi DUO";
+ compatible = "friendlyarm,nanopi-duo", "allwinner,sun8i-h3";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ };
+
+ reg_sy8113b: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; // 50=4ms check
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; // PL6 check
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; // PL7 WIFI_POWER_EN
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; // PG13 WL_RESTN
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_sy8113b>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vqmmc-supply = <&reg_vcc_wifi>;
+ vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc1_pins {
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ wifi_wake: wifi_wake@0 {
+ pins = "PG10";
+ function = "irq";
+ pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /*
+ * USB Type-A port VBUS is always on. However, MicroUSB VBUS can only
+ * power up the board; when it's used as OTG port, this VBUS is
+ * always off even if the board is powered via GPIO pins.
+ */
+ status = "okay";
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+};
--
2.35.3

257
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-Add-sun8i-h2-plus-sunvell-r69-device.patch Normal file
View File

@@ -0,0 +1,257 @@
From 484b8abd16c1dd8ddaa0c9027b53de524d24809c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:23:33 +0300
Subject: arm:dts: Add sun8i-h2-plus-sunvell-r69 device
---
arch/arm/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun8i-h2-plus-sunvell-r69.dts | 225 ++++++++++++++++++
2 files changed, 226 insertions(+)
create mode 100644 arch/arm/boot/dts/allwinner/sun8i-h2-plus-sunvell-r69.dts
diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile
index 129d9e3d75a4..91fdb57d2c19 100644
--- a/arch/arm/boot/dts/allwinner/Makefile
+++ b/arch/arm/boot/dts/allwinner/Makefile
@@ -226,6 +226,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
+ sun8i-h2-plus-sunvell-r69.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-sunvell-r69.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-sunvell-r69.dts
new file mode 100644
index 000000000000..bb0c2f72b723
--- /dev/null
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-sunvell-r69.dts
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Based original Sunvell R69 FEX file (2019 karabek)
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Sunvell R69";
+ compatible = "sunvell,sunvell-r69", "allwinner,sun8i-h2-plus";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
+
+ pwr_led {
+ label = "sunvell-r69:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ status_led {
+ label = "sunvell-r69:blue:status";
+ gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_vdd_cpux: vdd-cpux-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 0 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>; /* <&r_ir_rx_pin> */
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc_wifi>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <0 11 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase current from 30mA to 40mA for DDR eMMC */
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pio {
+ leds_opc: led_pins {
+ pins = "PA15";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_opc: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+};
+
+&reg_usb0_vbus {
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

38
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-a10-cubiebord-a20-cubietruck-green-LED-mmc0-default-tri.patch Normal file
View File

@@ -0,0 +1,38 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:46:11 +0300
Subject: arm:dts: a10-cubiebord a20-cubietruck green LED mmc0 default-trigger
---
arch/arm/boot/dts/allwinner/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-cubieboard.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/allwinner/sun4i-a10-cubieboard.dts
@@ -83,7 +83,7 @@ led-0 {
led-1 {
label = "cubieboard:green:usr";
gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */
- linux,default-trigger = "heartbeat";
+ linux,default-trigger = "mmc0";
};
};
};
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
@@ -93,6 +93,7 @@ led-2 {
led-3 {
label = "cubietruck:green:usr";
gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
};
};
--
Armbian

86
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-a20-orangepi-and-mini-fix-phy-mode-hdmi.patch Normal file
View File

@@ -0,0 +1,86 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 13:18:28 +0300
Subject: arm:dts: a20-orangepi and mini fix phy-mode, hdmi
---
arch/arm/boot/dts/allwinner/sun7i-a20-orangepi-mini.dts | 2 +-
arch/arm/boot/dts/allwinner/sun7i-a20-orangepi.dts | 31 +++++++++-
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi-mini.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi-mini.dts
@@ -121,7 +121,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-orangepi.dts
@@ -61,6 +61,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -85,6 +96,14 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -97,11 +116,21 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
--
Armbian

80
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-h3-nanopi-neo-Add-regulator-leds-mmc2.patch Normal file
View File

@@ -0,0 +1,80 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:34:01 +0300
Subject: arm:dts: h3-nanopi-neo Add regulator, leds, mmc2
---
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo.dts | 57 ++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo.dts
@@ -49,6 +49,63 @@ / {
aliases {
ethernet0 = &emac;
};
+
+ /* Warning: sunxi-5.18:
+ * The leds node is present in the sun8i-h3-nanopi.dtsi file
+ * You will have to fix this situation yourself
+ */
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
};
&ehci0 {
--
Armbian

196
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-h3-nanopi-neo-air-Add-regulator-camera-wifi-bluetooth-o.patch Normal file
View File

@@ -0,0 +1,196 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:45:43 +0300
Subject: arm:dts: h3-nanopi-neo-air Add regulator camera wifi bluetooth otg
---
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts | 153 ++++++++++
1 file changed, 153 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
@@ -70,12 +70,92 @@ led-0 {
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
};
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ cam_xclk: cam-xclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "cam-xclk";
+ };
+
+ reg_cam_avdd: cam-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-avdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dovdd: cam-dovdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dovdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dvdd: cam-dvdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dvdd";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&pio {
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
};
};
@@ -110,6 +190,74 @@ &mmc2 {
vqmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&csi {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Parallel bus endpoint */
+ csi_from_ov5640: endpoint {
+ remote-endpoint = <&ov5640_to_csi>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&cam_xclk>;
+ clock-names = "xclk";
+
+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <&reg_cam_avdd>;
+ DOVDD-supply = <&reg_cam_dovdd>;
+ DVDD-supply = <&reg_cam_dvdd>;
+
+ port {
+ ov5640_to_csi: endpoint {
+ remote-endpoint = <&csi_from_ov5640>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+ };
+};
+
+&i2c2_pins {
+ bias-pull-up;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
status = "okay";
};
@@ -137,6 +285,11 @@ bluetooth {
};
};
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
/* USB VBUS is always on */
status = "okay";
--
Armbian

59
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-h3-orangepi-2-Add-regulator-vdd-cpu.patch Normal file
View File

@@ -0,0 +1,59 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:23:18 +0300
Subject: arm:dts: h3-orangepi-2 Add regulator vdd cpu
---
arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts | 29 ++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-2.dts
@@ -124,6 +124,10 @@ &de {
status = "okay";
};
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
&ehci1 {
status = "okay";
};
@@ -178,6 +182,31 @@ rtl8189: wifi@1 {
};
};
+&r_i2c {
+ status = "okay";
+
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
&reg_usb1_vbus {
gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
status = "okay";
--
Armbian

4964
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-overlay-Add-Overlays-for-sunxi.patch Normal file
View File

File diff suppressed because it is too large Load Diff

209
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-overlay-sun8i-h3-cpu-clock-add-overclock.patch Normal file
View File

@@ -0,0 +1,209 @@
From ec30b77c7935d7f1ec1ea430424dddfe552e55c8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:29:16 +0300
Subject: arm:dts:overlay: sun8i-h3-cpu-clock add overclock
---
arch/arm/boot/dts/allwinner/overlay/Makefile | 3 +
.../sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso | 31 +++++++++
.../sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso | 67 +++++++++++++++++++
.../sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso | 61 +++++++++++++++++
4 files changed, 162 insertions(+)
create mode 100644 arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso
create mode 100644 arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso
create mode 100644 arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso
diff --git a/arch/arm/boot/dts/allwinner/overlay/Makefile b/arch/arm/boot/dts/allwinner/overlay/Makefile
index 0c47e8fda8fc..560f926b7018 100644
--- a/arch/arm/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm/boot/dts/allwinner/overlay/Makefile
@@ -60,6 +60,9 @@ dtb-$(CONFIG_MACH_SUN7I) += \
dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-analog-codec.dtbo \
sun8i-h3-cir.dtbo \
+ sun8i-h3-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.368GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.3GHz-1.3v.dtbo \
sun8i-h3-i2c0.dtbo \
sun8i-h3-i2c1.dtbo \
sun8i-h3-i2c2.dtbo \
diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso
new file mode 100644
index 000000000000..b07e694c781a
--- /dev/null
+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the existing DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso
new file mode 100644
index 000000000000..e3fd7e5c85a6
--- /dev/null
+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso
@@ -0,0 +1,67 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1368000000 {
+ opp-hz = /bits/ 64 <1368000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso
new file mode 100644
index 000000000000..413222831eab
--- /dev/null
+++ b/arch/arm/boot/dts/allwinner/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
--
2.35.3

133
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun5i-a13-olinuxino-Add-panel-lcd-olinuxino-4.3-needed-.patch Normal file
View File

@@ -0,0 +1,133 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Thu, 19 Mar 2020 10:40:44 +0200
Subject: arm:dts:sun5i-a13-olinuxino Add panel lcd-olinuxino-4.3 needed to fix
overlay tests
---
arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino.dts | 79 ++++++----
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino.dts
@@ -48,6 +48,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "Olimex A13-Olinuxino";
@@ -72,40 +73,28 @@ led {
};
};
- bridge {
- compatible = "dumb-vga-dac";
+ lcd_backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&lcd_backlight>;
+ enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- vga_bridge_in: endpoint {
- remote-endpoint = <&tcon0_out_vga>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- vga_bridge_out: endpoint {
- remote-endpoint = <&vga_con_in>;
- };
- };
- };
- };
-
- vga {
- compatible = "vga-connector";
-
- port {
- vga_con_in: endpoint {
- remote-endpoint = <&vga_bridge_out>;
- };
- };
- };
};
&be0 {
@@ -130,6 +119,11 @@ axp209: pmic@34 {
interrupt-controller;
#interrupt-cells = <1>;
+ axp_gpio:gpio{
+ compatible = "x-powers,axp209-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
};
@@ -221,12 +215,18 @@ &tcon0 {
};
&tcon0_out {
- tcon0_out_vga: endpoint@0 {
+ tcon0_out_lcd: endpoint@0 {
reg = <0>;
- remote-endpoint = <&vga_bridge_in>;
+ remote-endpoint = <&panel_input>;
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -245,3 +245,12 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ #thermal-sensor-cells = <0>;
+ /* sensitive/noisy touch panel */
+ touchscreen-inverted-x;
+ allwinner,tp-sensitive-adjust = <0>;
+ allwinner,filter-type = <3>;
+};
--
Armbian

106
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch Normal file
View File

@@ -0,0 +1,106 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:00:25 +0200
Subject: arm:dts:sun5i-a13-olinuxino-micro add panel lcd-olinuxino-4.3
---
arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino-micro.dts | 62 +++++++++-
1 file changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino-micro.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/allwinner/sun5i-a13-olinuxino-micro.dts
@@ -44,7 +44,7 @@
/dts-v1/;
#include "sun5i-a13.dtsi"
#include "sunxi-common-regulators.dtsi"
-
+#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -70,6 +70,40 @@ led {
default-state = "on";
};
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&backlight>;
+ enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
+
+ };
+
+
+
+&be0 {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
};
&ehci0 {
@@ -117,10 +151,28 @@ &reg_usb0_vbus {
};
&reg_usb1_vbus {
- gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -139,3 +191,9 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ touchscreen-inverted-x;
+};
+
--
Armbian

99
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-Disable-OOB-IRQ-for-brcm-wifi-on-Cubietruck-a.patch Normal file
View File

@@ -0,0 +1,99 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 22:32:07 +0300
Subject: arm:dts:sun7i-a20 Disable OOB IRQ for brcm-wifi on Cubietruck and
Banana-Pro
While doing some brcmfmac driver work I needed to test this also on some
devicetree based boards. So I fired up the good old Cubietruck and when
that would not work a Banana Pro.
With an unmodified 4.17 kernel both boards intermittently would come up
with non working wifi with the following errors:
brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
brcmfmac: brcmf_bus_started: failed: -110
brcmfmac: brcmf_attach: dongle is not responding: err=-110
brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
They would come up this way more often then with actual working wifi,
once this problem happens it seems to require a power-cycle to fix.
Once things work one can safely reboot without hitting the issue.
I've found that disabling OOB interrupts fixes this. This really is more
of a workaround then a proper fix, but it makes the wifi reliable again
and it does not have much of a downside.
Using an OOB IRQ instead of the sdio-IRQ mechanism is mostly important to
allow the MMC controller to go into runtime-suspend which is not really an
issue on these boards since they are (usually) not battery powered.
I've looked at recent brcmfmac and mmc-core changes which may explain this
and I've not found anything. So the most likely culprit is the A20 external
interrupt handling e.g. perhaps it is set to edge instead of level? Either
way I do not have time to further investigate this.
BugLink: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908438
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts | 16 ++++++++--
arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts | 16 ++++++++--
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
@@ -162,9 +162,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
@@ -213,9 +213,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
--
Armbian

72
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-bananapro-add-AXP209-regulators.patch Normal file
View File

@@ -0,0 +1,72 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 12 Apr 2022 21:14:36 +0300
Subject: arm: dts: sun7i-a20-bananapro: add AXP209 regulators
Author: Heiko Jehmlich <hje@jecons.de>
Signed-off-by: Heiko Jehmlich <hje@jecons.de>
---
arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts | 50 ++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
@@ -257,3 +257,53 @@ &usbphy {
&reg_ahci_5v {
status = "okay";
};
+
+#include "axp209.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+ regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi0";
+ regulator-ramp-delay = <1600>;
+};
+
+&reg_ldo4 {
+ regulator-always-on; /* required for SATA */
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi1";
+};
--
Armbian

78
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-bananapro-add-hdmi-connector-de.patch Normal file
View File

@@ -0,0 +1,78 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:15:19 +0300
Subject: arm:dts: sun7i-a20-bananapro add hdmi-connector, de
---
arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts | 30 ++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapro.dts
@@ -60,6 +60,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -91,6 +102,7 @@ reg_gmac_3v3: gmac-3v3 {
};
&ahci {
+ target-supply = <&reg_ahci_5v>;
status = "okay";
};
@@ -98,6 +110,10 @@ &codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -115,6 +131,16 @@ &gmac {
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -227,3 +253,7 @@ &usbphy {
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
+
+&reg_ahci_5v {
+ status = "okay";
+};
--
Armbian

24
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-cubietruck-add-alias-uart2.patch Normal file
View File

@@ -0,0 +1,24 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 11:38:08 +0300
Subject: arm:dts: sun7i-a20-cubietruck add alias uart2
---
arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-cubietruck.dts
@@ -55,6 +55,7 @@ / {
aliases {
serial0 = &uart0;
+ serial2 = &uart2;
};
chosen {
--
Armbian

55
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-olimex-som-204-evb-olinuxino-micro-decrease-d.patch Normal file
View File

@@ -0,0 +1,55 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 24 Jun 2020 20:53:36 +0300
Subject: arm:dts:sun7i-a20: olimex-som(204)-evb,olinuxino-micro decrease dcdc2
min voltage
fixes some kernel crashes
---
arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts | 2 +-
arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som-evb.dts
@@ -247,7 +247,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olimex-som204-evb.dts
@@ -218,7 +218,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro.dts
@@ -268,7 +268,7 @@ &battery_power_supply {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
--
Armbian

27
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-audio-codec.patch Normal file
View File

@@ -0,0 +1,27 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 3 Jun 2020 13:49:44 +0300
Subject: arm:dts:sun7i-a20-olinuxino-lime2 enable audio codec
---
arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
@@ -96,6 +96,10 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
&de {
status = "okay";
};
--
Armbian

28
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-ldo3-always-on.patch Normal file
View File

@@ -0,0 +1,28 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 16 Jun 2020 15:40:59 +0300
Subject: arm:dts:sun7i-a20-olinuxino-lime2 enable ldo3 always-on
---
arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-lime2.dts
@@ -237,10 +237,10 @@ &reg_ldo2 {
};
&reg_ldo3 {
+ regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vddio-csi0";
- regulator-soft-start;
regulator-ramp-delay = <1600>;
};
--
Armbian

24
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun7i-a20-olinuxino-micro-emmc-Add-vqmmc-node.patch Normal file
View File

@@ -0,0 +1,24 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 14 Apr 2020 10:28:16 +0300
Subject: arm:dts:sun7i-a20-olinuxino-micro-emmc Add vqmmc node
---
arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro-emmc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro-emmc.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro-emmc.dts
+++ b/arch/arm/boot/dts/allwinner/sun7i-a20-olinuxino-micro-emmc.dts
@@ -55,6 +55,7 @@ mmc2_pwrseq: pwrseq {
&mmc2 {
vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&mmc2_pwrseq>;
--
Armbian

25
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-usb_otg-dr_mode.patch Normal file
View File

@@ -0,0 +1,25 @@
From 2f8b8f221f69c044f5d8821025c60ae76cce2bfc Mon Sep 17 00:00:00 2001
From: Your Name <you@example.com>
Date: Fri, 10 Jan 2025 20:56:39 +0300
Subject: arm: dts: sun8i-h2-plus-orangepi-zero: fix usb_otg dr_mode
---
arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
index 1bb54edb00ce..f5c0e103b748 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
@@ -203,7 +203,7 @@ &uart2 {
};
&usb_otg {
- dr_mode = "peripheral";
+ dr_mode = "otg";
status = "okay";
};
--
2.35.3

35
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-xradio-interrupt.patch Normal file
View File

@@ -0,0 +1,35 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:15:17 +0300
Subject: arm:dts: sun8i-h2-plus-orangepi-zero fix xradio interrupt
---
arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
@@ -49,6 +49,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Zero";
@@ -151,6 +152,10 @@ &mmc1 {
*/
xr819: wifi@1 {
reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
};
};
--
Armbian

104
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h3-add-thermal-zones.patch Normal file
View File

@@ -0,0 +1,104 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:34:48 +0300
Subject: arm:dts:sun8i-h3 add thermal zones
---
arch/arm/boot/dts/allwinner/sun8i-h3.dtsi | 68 ++++++++--
1 file changed, 55 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi b/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
index a5bf9e0b5ec0..1b02a4c3f05d 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
@@ -297,32 +297,74 @@ ths: thermal-sensor@1c25000 {
};
thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ cpu_thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
thermal-sensors = <&ths>;
trips {
- cpu_hot_trip: cpu-hot {
+ cpu_warm: cpu_warm {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot_pre: cpu_hot_pre {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_very_hot_trip: cpu-very-hot {
- temperature = <100000>;
- hysteresis = <0>;
+ cpu_hot: cpu_hot {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_pre: cpu_very_hot_pre {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot: cpu_very_hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <105000>;
+ hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
- map0 {
- trip = <&cpu_hot_trip>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
+ };
+
+ cpu_hot_pre_limit_cpu {
+ trip = <&cpu_hot_pre>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_hot_limit_cpu {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_pre_limit_cpu {
+ trip = <&cpu_very_hot_pre>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu {
+ trip = <&cpu_very_hot>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
--
Armbian

25
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h3-bananapi-m2-plus-add-wifi_pwrseq.patch Normal file
View File

@@ -0,0 +1,25 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:06:34 +0300
Subject: arm:dts:sun8i-h3-bananapi-m2-plus add wifi_pwrseq
---
arch/arm/boot/dts/allwinner/sun8i-h3-bananapi-m2-plus.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-bananapi-m2-plus.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-bananapi-m2-plus.dts
@@ -48,3 +48,8 @@ / {
model = "Banana Pi BPI-M2-Plus H3";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
};
+
+&wifi_pwrseq {
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+};
--
Armbian

60
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h3-nanopi-add-leds-pio-pins.patch Normal file
View File

@@ -0,0 +1,60 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:14:41 +0300
Subject: arm:dts: sun8i-h3-nanopi add leds pio pins
---
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi.dtsi | 23 ++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi.dtsi
@@ -59,6 +59,8 @@ chosen {
leds {
compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
led-0 {
label = "nanopi:blue:status";
@@ -75,6 +77,8 @@ led-1 {
gpio-keys {
compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_r_npi>;
key-0 {
label = "k1";
@@ -100,6 +104,25 @@ &ohci3 {
status = "okay";
};
+&pio {
+ leds_npi: led_pins {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ sw_r_npi: key_pins {
+ pins = "PL3";
+ function = "gpio_in";
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
--
Armbian

33
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h3-orangepi-pc-plus-add-wifi_pwrseq.patch Normal file
View File

@@ -0,0 +1,33 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:01:59 +0300
Subject: arm:dts: sun8i-h3-orangepi-pc-plus add wifi_pwrseq
---
arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-pc-plus.dts
@@ -51,10 +51,16 @@ aliases {
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
ethernet1 = &rtl8189ftv;
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
+ };
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
--
Armbian

48
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-h3-reduce-opp-microvolt-to-prevent-not-supported-.patch Normal file
View File

@@ -0,0 +1,48 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Mon, 10 Jul 2023 19:24:21 +0000
Subject: arm: dts: sun8i: h3: reduce opp-microvolt to prevent not supported by
regulator error
---
arch/arm/boot/dts/allwinner/sun8i-h3.dtsi | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi b/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi
@@ -86,19 +86,19 @@ opp-1008000000 {
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
- opp-microvolt = <1320000 1320000 1320000>;
+ opp-microvolt = <1300000 1300000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1320000 1320000 1320000>;
+ opp-microvolt = <1300000 1300000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1296000000 {
opp-hz = /bits/ 64 <1296000000>;
- opp-microvolt = <1340000 1340000 1340000>;
+ opp-microvolt = <1300000 1300000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
@@ -106,6 +106,7 @@ opp-1368000000 {
opp-hz = /bits/ 64 <1368000000>;
opp-microvolt = <1400000 1400000 1400000>;
clock-latency-ns = <244144>; /* 8 32k periods */
+ status = "disabled";
};
};
--
Armbian

40
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-r40-add-clk_out_a-fix-bananam2ultra.patch Normal file
View File

@@ -0,0 +1,40 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:01:30 +0300
Subject: arm:dts: sun8i-r40 add clk_out_a fix bananam2ultra
---
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi | 17 ++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
@@ -75,6 +75,23 @@ osc32k: osc32k {
clock-accuracy = <20000>;
clock-output-names = "ext-osc32k";
};
+
+ osc24M_32k: clk@1 {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <732>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "osc24M_32k";
+ };
+
+ clk_out_a: clk@01c201f0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun7i-a20-out-clk";
+ reg = <0x01c201f0 0x4>;
+ clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
+ clock-output-names = "clk_out_a";
+ };
};
cpus {
--
Armbian

63
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-r40-bananapi-m2-ultra-add-codec-analog.patch Normal file
View File

@@ -0,0 +1,63 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 21:18:21 +0300
Subject: arm:dts: sun8i-r40 bananapi-m2-ultra add codec analog
---
arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts | 10 ++++++
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi | 18 ++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-r40-bananapi-m2-ultra.dts
@@ -118,6 +118,16 @@ &cpu0 {
cpu-supply = <&reg_dcdc2>;
};
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Headphone", "HPCOM",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "okay";
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
@@ -839,6 +839,24 @@ i2s2: i2s@1c22800 {
dma-names = "rx", "tx";
};
+ codec: codec@1c22c00 {
+ #sound-dai-cells = <1>;
+ compatible = "allwinner,sun8i-h3-codec";
+ reg = <0x01c22c00 0x300>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_CODEC>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 19>, <&dma 19>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ codec_analog: codec-analog@1c22f00 {
+ compatible = "allwinner,sun8i-a23-codec-analog";
+ reg = <0x01c22f00 0x4>;
+ };
+
ths: thermal-sensor@1c24c00 {
compatible = "allwinner,sun8i-r40-ths";
reg = <0x01c24c00 0x100>;
--
Armbian

63
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun8i-v3s-s3-pinecube-enable-sound-codec.patch Normal file
View File

@@ -0,0 +1,63 @@
From 404a4f5b185c2fa8946f4cdc45d5236f635ccf33 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 12:58:57 +0300
Subject: arm:dts: sun8i-v3s/s3-pinecube enable sound codec
---
arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts | 14 ++++++++++++++
arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 14 ++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts
index e0d4404b5957..46d6030e8ff6 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-s3-pinecube.dts
@@ -58,6 +58,20 @@ wifi_pwrseq: pwrseq {
};
};
+
+&i2s0 {
+ status = "okay";
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Speaker", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,pa-gpios = <&pio 6 6 GPIO_ACTIVE_HIGH>; /* PG6 */
+ status = "okay";
+};
+
&csi1 {
pinctrl-names = "default";
pinctrl-0 = <&csi1_8bit_pins>;
diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
index f909b1d4dbca..c08eb315dcf7 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
@@ -512,6 +512,20 @@ codec_analog: codec-analog@1c23000 {
reg = <0x01c23000 0x4>;
};
+
+ i2s0: i2s@1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ resets = <&ccu RST_BUS_I2S0>; /* TODO: Areset/sun8i-v3s-ccu says this isn't available on V3s */
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.35.3

41
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun9i-a80-add-thermal-sensor.patch Normal file
View File

@@ -0,0 +1,41 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:30:16 +0100
Subject: arm:dts: sun9i-a80 add thermal sensor
As we have gained the support for the thermal sensor in A80,
we can now add its device nodes to the device tree.
The clocks and the resets are shared between the GPADC and the THS
sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/allwinner/sun9i-a80.dtsi | 11 ++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
@@ -941,6 +941,17 @@ ccu: clock@6000000 {
#reset-cells = <1>;
};
+ ths: thermal-sensor@6004C00 {
+ compatible = "allwinner,sun9i-a80-ths";
+ reg = <0x06004C00 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_GPADC>, <&ccu CLK_GPADC>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
timer@6000c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x06000c00 0xa0>;
--
Armbian

54
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sun9i-a80-add-thermal-zone.patch Normal file
View File

@@ -0,0 +1,54 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:39:09 +0100
Subject: arm:dts: sun9i-a80 add thermal zone
This patch adds the thermal zones to the A80.
Sensor 0 is located besides the big CPU, sensor 1 is located besides the
DRAM, sensor 2 is located besides the GPU and sensor 3 is located besides
the small CPU.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/allwinner/sun9i-a80.dtsi | 26 ++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun9i-a80.dtsi
@@ -1261,4 +1261,30 @@ r_rsb: rsb@8003400 {
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ dram_thermal: dram-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+
+ cpu2_thermal: cpu2-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 3>;
+ };
+ };
};
--
Armbian

33
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch Normal file
View File

@@ -0,0 +1,33 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 1 Feb 2022 19:43:08 +0300
Subject: arm:dts:sunxi-h3-h5.dtsi add i2s0 i2s1 pins
---
arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
@@ -463,6 +463,16 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2s0_pins: i2s0-pins {
+ pins = "PA18", "PA19", "PA20", "PA21";
+ function = "i2s0";
+ };
+
+ i2s1_pins: i2s1-pins {
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s1";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
--
Armbian

24
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 16:12:37 +0300
Subject: arm:dts: sunxi-h3-h5.dtsi force mmc0 bus-width
---
arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/allwinner/sunxi-h3-h5.dtsi
@@ -221,6 +221,7 @@ mmc0: mmc@1c0f000 {
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ bus-width = <0x4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
Armbian

63
patch/kernel/archive/sunxi-6.16/patches.armbian/arm-patch-call-flush_icache-ASAP-after-writing-new-instruction.patch Normal file
View File

@@ -0,0 +1,63 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Mikhail Iakhiaev <mikhailai@gmail.com>
Date: Mon, 29 Jul 2024 09:50:36 -0700
Subject: arm/patch: call flush_icache ASAP after writing new instruction.
The patch moves flush_icache before the patch_unmap call.
The change avoids the possibility of the CPU seeing
partially-patched instructions if a function from patch_unmap
call tree has just been patched. That HAS been observed
in practice, leading to kernel panic or freezing in early boot:
https://bugzilla.kernel.org/show_bug.cgi?id=219089
Specifically, the patch_unmap invokes _raw_spin_unlock_irqrestore
(could be non-inlined) and that function is being patched
during the ftrace_init, so the original code would run the
patched code BEFORE flushing the icache.
Note, some arches are more careful about flushing icache early. E.g.
arch/riscv/kernel/patch.c:
__patch_insn_set and __patch_insn_write call the
local_flush_icache_range before the patch_unmap and have an
explicit comment about this.
arch/x86/kernel/alternative.c:
text_poke_early calls sync_core (flushes icache) before
local_irq_restore.
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219089
Signed-off-by: Mikhail Iakhiaev <mikhailai@gmail.com>
Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>
---
arch/arm/kernel/patch.c | 12 +++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/kernel/patch.c b/arch/arm/kernel/patch.c
index 111111111111..222222222222 100644
--- a/arch/arm/kernel/patch.c
+++ b/arch/arm/kernel/patch.c
@@ -99,13 +99,19 @@ void __kprobes __patch_text_real(void *addr, unsigned int insn, bool remap)
size = sizeof(u32);
}
- if (waddr != addr) {
+ if (waddr != addr)
flush_kernel_vmap_range(waddr, twopage ? size / 2 : size);
- patch_unmap(FIX_TEXT_POKE0, &flags);
- }
flush_icache_range((uintptr_t)(addr),
(uintptr_t)(addr) + size);
+
+ /* Can only call 'patch_unmap' after flushing dcache and icache,
+ * because it calls 'raw_spin_unlock_irqrestore', but that may
+ * happen to be the very function we're currently patching
+ * (as it happens during the ftrace init).
+ */
+ if (waddr != addr)
+ patch_unmap(FIX_TEXT_POKE0, &flags);
}
static int __kprobes patch_text_stop_machine(void *data)
--
Armbian

353
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch Normal file
View File

@@ -0,0 +1,353 @@
From 3d72091622a7cccc4896cbfe71e25503dd174b8e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 10 Feb 2025 13:34:14 +0300
Subject: arm64: allwinner: Add sun50i-h618-bananapi-m4-berry support
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 4 +-
.../sun50i-h618-bananapi-m4-berry.dts | 305 ++++++++++++++++++
3 files changed, 308 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 3f84f24dc82a..8fb1c9c187f2 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-emmc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-berry.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 2e418ffdfcdb..2082099f13fc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -391,8 +391,8 @@ pio: pinctrl@300b000 {
ext_rgmii_pins: rgmii-pins {
pins = "PI0", "PI1", "PI2", "PI3", "PI4",
"PI5", "PI7", "PI8", "PI9", "PI10",
- "PI11", "PI12", "PI13", "PI14", "PI15",
- "PI16";
+ "PI11", "PI12", "PI13", "PI14", "PI15";
+ /* "PI16" Managed by mdio */
function = "emac0";
drive-strength = <40>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
new file mode 100644
index 000000000000..29869f39de97
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
+#include "axp313a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "BananaPi M4 Berry";
+ compatible = "BiPai,bananapi-m4berry", "allwinner,sun50i-h616";
+
+ aliases {
+ ethernet0 = &emac0;
+ ethernet1 = &emac1;
+ serial0 = &uart0;
+ serial5 = &uart5;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "red_led";
+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-sw3 {
+ label = "sw3";
+ linux,code = <BTN_0>;
+ gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usb_vbus: regulator-usb-vbus {
+ /* separate discrete regulator for the USB ports */
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&reg_vcc5v>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ /* SY8089 DC/DC converter */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&reg_dldo1>;
+ regulator-always-on;
+ };
+
+ reg_vcc1v8: vcc1v8 {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_aldo1>;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc5v>;
+ };
+
+ wifi_usb {
+ compatible = "usb-wifi";
+ status = "okay";
+ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */
+ };
+
+};
+
+&cpu0 {
+ cpu-supply = <&reg_dcdc2>;
+ status = "okay";
+};
+
+&sid {
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
+};
+
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_aldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&gpu {
+ mali-supply = <&reg_dcdc1>;
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_dldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dldo1>;
+ bus-width = <8>;
+ max-frequency = <150000000>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <&reg_aldo1>;
+ vcc-pf-supply = <&reg_dldo1>;
+ vcc-pg-supply = <&reg_dldo1>;
+ vcc-ph-supply = <&reg_dldo1>;
+ vcc-pi-supply = <&reg_dldo1>;
+};
+
+&emac0 {
+ compatible = "allwinner,sun50i-h616-emac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-io-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+ /* rtl8211F compatible string for mdio and phy */
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <1>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */
+ };
+};
+
+&emac1 {
+ compatible = "allwinner,sunxi-gmac";
+ status = "disabled";
+};
+
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ /*
+ * PHY0 pins are connected to a USB-C socket, but a role switch
+ * is not implemented: both CC pins are pulled to GND.
+ * The VBUS pins power the device, so a fixed peripheral mode
+ * is the best choice.
+ * The board can be powered via GPIOs, in this case port0 *can*
+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
+ * then provided by the GPIOs. Any user of this setup would
+ * need to adjust the DT accordingly: dr_mode set to "host",
+ * enabling OHCI0 and EHCI0.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <&reg_usb_vbus>;
+ status = "okay";
+};
+
+&ehci0 {
+ status = "disabled";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "disabled";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_rx_pin>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+ status = "disabled";
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT";
+ status = "okay";
+};
+
+&ahub_dam_plat {
+ status = "okay";
+};
+
+&ahub1_plat {
+ status = "okay";
+};
+
+&ahub1_mach {
+ status = "okay";
+};
+
+/*
+&ahub_i2s2 {
+ status = "okay";
+};
+*/
--
2.51.0

429
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-k1-plus-device.patch Normal file
View File

@@ -0,0 +1,429 @@
From 76fd556315ddc27df6cc7cdc159e6a47d66f4659 Mon Sep 17 00:00:00 2001
From: wuweidong <625769020@qq.com>
Date: Mon, 27 Nov 2017 10:23:51 +0800
Subject: arm64:dts: Add sun50i-h5-nanopi-k1-plus device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-k1-plus.dts | 396 ++++++++++++++++++
2 files changed, 397 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index a733b69fbb6b..05fdfe3a30db 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
new file mode 100644
index 000000000000..b7045a9efab5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
@@ -0,0 +1,396 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyElec NanoPi K1 Plus";
+ compatible = "friendlyelec,nanopi-k1-plus", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ sw4 {
+ label = "sw4";
+ linux,code = <BTN_0>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ pcm5102a: pcm5102a-codec {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ status = "disabled";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ spi0_cs_pins: spi0_cs_pins {
+ pins = "PC3", "PA6";
+ function = "gpio_out";
+ };
+};
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+
+&r_i2c {
+ status = "okay";
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
+ status = "okay";
+};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
+
+&i2s0 {
+ sound-dai = <&pcm5102a>;
+ status = "disabled";
+};
\ No newline at end of file
--
2.51.0

272
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-m1-plus2-device.patch Normal file
View File

@@ -0,0 +1,272 @@
From 545864cca39f36c642f8c86759d4fc55dbb85cf0 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:54:36 +0300
Subject: arm64:dts: Add sun50i-h5-nanopi-m1-plus2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-m1-plus2.dts | 240 ++++++++++++++++++
2 files changed, 241 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 0dcb00f6f32c..9d37a0f1ac28 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-m1-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
new file mode 100644
index 000000000000..d051382cc800
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
@@ -0,0 +1,240 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ * Copyright (C) 2017 Armbian
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM Nanopi M1 Plus 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:blue:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <50>;
+ };
+
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: brcmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&mixer0 {
+ status = "okay";
+};
+
+&r_pio {
+ wifi_wake: wifi_wake@0 {
+ pins = "PL7";
+ function = "irq";
+ bias-pull-up;
+ };
+};
+
+&tcon0 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.51.0

242
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo-core2-device.patch Normal file
View File

@@ -0,0 +1,242 @@
From 67cacba5ece1f10e6c611b0ad62911e128f4406e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:43:42 +0300
Subject: arm64:dts: Add sun50i-h5-nanopi-neo-core2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo-core2.dts | 210 ++++++++++++++++++
2 files changed, 211 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 05fdfe3a30db..935a62021dd2 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
new file mode 100644
index 000000000000..57283cc16ad9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Core2";
+ compatible = "friendlyarm,nanopi-neo-core2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ silergy,fixed-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.51.0

212
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo2-v1.1-device.patch Normal file
View File

@@ -0,0 +1,212 @@
From 24eef32e5d453be8b2780c8dbc32311064fbb735 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:49:55 +0300
Subject: arm64:dts: Add sun50i-h5-nanopi-neo2-v1.1 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo2-v1.1.dts | 180 ++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 935a62021dd2..0dcb00f6f32c 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2-v1.1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
new file mode 100644
index 000000000000..06ffbbd29a93
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.51.0

99
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-FIXME-a64-olinuxino-add-regulator-audio-mmc.patch Normal file
View File

@@ -0,0 +1,99 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:24:40 +0300
Subject: arm64:dts: FIXME: a64-olinuxino add regulator audio mmc
Duplicate nodes appeared as a result of patching and this needs
to be fixed and tested on the board
---
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 46 ++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -52,6 +52,13 @@ reg_usb1_vbus: usb1-vbus {
status = "okay";
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
@@ -99,6 +106,10 @@ &ehci1 {
status = "okay";
};
+&mixer0 {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@@ -159,6 +170,16 @@ rtl8723bs: wifi@1 {
};
};
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -184,6 +205,7 @@ &r_pio {
*/
};
+/* FIXME: Duplicate node */
&pio {
vcc-pa-supply = <&reg_dcdc1>;
vcc-pb-supply = <&reg_dcdc1>;
@@ -365,6 +387,30 @@ &sound_hdmi {
status = "okay";
};
+/* FIXME: Duplicate node
+ * &sound {
+ * status = "okay";
+ * simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+ * "Microphone", "Internal Microphone Right",
+ * "Headphone", "Headphone Jack";
+ * simple-audio-card,aux-devs = <&codec_analog>;
+ * simple-audio-card,routing =
+ * "Left DAC", "AIF1 Slot 0 Left",
+ * "Right DAC", "AIF1 Slot 0 Right",
+ * "INL", "LINEOUT",
+ * "INR", "LINEOUT",
+ * "Headphone Jack", "HP",
+ * "AIF1 Slot 0 Left ADC", "Left ADC",
+ * "AIF1 Slot 0 Right ADC", "Right ADC",
+ * "Left ADC", "ADC",
+ * "Right ADC", "ADC",
+ * "Internal Microphone Left", "MBIAS",
+ * "MIC1", "Internal Microphone Left",
+ * "Internal Microphone Right", "HBIAS",
+ * "MIC2", "Internal Microphone Right";
+ * };
+ */
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
Armbian

260
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-add-sun50i-h618-cpu-dvfs.dtsi.patch Normal file
View File

@@ -0,0 +1,260 @@
From ead3bcfa953eb0248206557e61608a4d686da2ae Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Tue, 23 May 2023 16:43:00 +0000
Subject: arm64: dts: add sun50i-h618-cpu-dvfs.dtsi
Add sun50i-h616-cpu-opp-test.dtsi for tests only.
Its unused production for kernel v6.10.
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>
---
.../allwinner/sun50i-h616-cpu-opp-test.dtsi | 75 +++++++++++++++++++
.../allwinner/sun50i-h616-orangepi-zero.dtsi | 1 +
.../dts/allwinner/sun50i-h618-cpu-dvfs.dtsi | 64 ++++++++++++++++
.../allwinner/sun50i-h618-orangepi-zero3.dts | 57 +-------------
4 files changed, 141 insertions(+), 56 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp-test.dtsi
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp-test.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp-test.dtsi
new file mode 100644
index 000000000000..36f2950367c6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp-test.dtsi
@@ -0,0 +1,75 @@
+//SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//Testing Version 1 from: AGM1968 <AGM1968@users.noreply.github.com>
+//Noted: PLL_CPUX = 24 MHz*N/P (WIP)
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "allwinner,sun50i-h616-operating-points";
+ nvmem-cells = <&cpu_speed_grade>;
+ opp-shared;
+
+ opp-480000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt-speed0 = <820000 820000 1100000>;
+ opp-microvolt-speed1 = <880000 880000 1100000>;
+ opp-microvolt-speed2 = <880000 880000 1100000>;
+ };
+
+ opp-600000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt-speed0 = <820000 820000 1100000>;
+ opp-microvolt-speed1 = <880000 880000 1100000>;
+ opp-microvolt-speed2 = <880000 880000 1100000>;
+ };
+
+ opp-792000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <792000000>;
+ opp-microvolt-speed0 = <860000 860000 1100000>;
+ opp-microvolt-speed1 = <940000 940000 1100000>;
+ opp-microvolt-speed2 = <940000 940000 1100000>;
+ };
+
+ opp-1008000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt-speed0 = <900000 900000 1100000>;
+ opp-microvolt-speed1 = <1020000 1020000 1100000>;
+ opp-microvolt-speed2 = <1020000 1020000 1100000>;
+ };
+
+ opp-1200000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt-speed0 = <960000 960000 1100000>;
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
+ };
+
+ opp-1512000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt-speed0 = <1100000 1100000 1100000>;
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
index 0a74672b9825..b0640f8fa2f5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -7,6 +7,7 @@
*/
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
new file mode 100644
index 000000000000..0509e3fb22e2
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
@@ -0,0 +1,64 @@
+
+
+&r_i2c {
+ status = "okay";
+
+ axp313: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&pio>;
+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
+
+ vin1-supply = <&reg_vcc5v>;
+ vin2-supply = <&reg_vcc5v>;
+ vin3-supply = <&reg_vcc5v>;
+
+ regulators {
+ /* Supplies VCC-PLL and DRAM */
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ /* Supplies VCC-IO, so needs to be always on. */
+ reg_dldo1: dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3";
+ };
+
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-ramp-delay = <200>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-name = "vdd-dram";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
index c51d4d9120de..69493440211f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
@@ -7,6 +7,7 @@
#include "sun50i-h616-orangepi-zero.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
+#include "sun50i-h618-cpu-dvfs.dtsi"
/ {
model = "OrangePi Zero3";
@@ -40,62 +41,6 @@ &mmc0 {
vmmc-supply = <&reg_dldo1>;
};
-&r_i2c {
- status = "okay";
-
- axp313: pmic@36 {
- compatible = "x-powers,axp313a";
- reg = <0x36>;
- #interrupt-cells = <1>;
- interrupt-controller;
- interrupt-parent = <&pio>;
- interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
-
- vin1-supply = <&reg_vcc5v>;
- vin2-supply = <&reg_vcc5v>;
- vin3-supply = <&reg_vcc5v>;
-
- regulators {
- /* Supplies VCC-PLL, so needs to be always on. */
- reg_aldo1: aldo1 {
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc1v8";
- };
-
- /* Supplies VCC-IO, so needs to be always on. */
- reg_dldo1: dldo1 {
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3";
- };
-
- reg_dcdc1: dcdc1 {
- regulator-always-on;
- regulator-min-microvolt = <810000>;
- regulator-max-microvolt = <990000>;
- regulator-name = "vdd-gpu-sys";
- };
-
- reg_dcdc2: dcdc2 {
- regulator-always-on;
- regulator-min-microvolt = <810000>;
- regulator-max-microvolt = <1100000>;
- regulator-name = "vdd-cpu";
- };
-
- reg_dcdc3: dcdc3 {
- regulator-always-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-name = "vdd-dram";
- };
- };
- };
-};
-
&pio {
vcc-pc-supply = <&reg_dldo1>;
vcc-pf-supply = <&reg_dldo1>;
--
2.51.0

83
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-Add-axp313a.dtsi.patch Normal file
View File

@@ -0,0 +1,83 @@
From 1989d73c62ac37fa9130595b0543c0459f77aed5 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 9 Feb 2025 17:52:52 +0300
Subject: [PATCH] arm64: dts: allwinner: Add axp313a.dtsi
---
arch/arm64/boot/dts/allwinner/axp313a.dtsi | 64 ++++++++++++++++++++++
1 file changed, 64 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/axp313a.dtsi
diff --git a/arch/arm64/boot/dts/allwinner/axp313a.dtsi b/arch/arm64/boot/dts/allwinner/axp313a.dtsi
new file mode 100644
index 000000000000..99057e975574
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/axp313a.dtsi
@@ -0,0 +1,64 @@
+
+&r_i2c {
+ status = "okay";
+
+ axp313a: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&pio>;
+
+ vin1-supply = <&reg_vcc5v>;
+ vin2-supply = <&reg_vcc5v>;
+ vin3-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_dcdc1: dcdc1 {
+ regulator-name = "vdd-gpu";
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-always-on;
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-name = "vdd-cpu";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-ramp-delay = <200>;
+ regulator-always-on;
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-name = "vcc-dram";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-always-on;
+ };
+
+ reg_aldo1: aldo1 {
+ regulator-name = "vcc-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-always-on;
+ };
+
+ reg_dldo1: dldo1 {
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-step-delay-us = <25>;
+ regulator-final-delay-us = <50>;
+ regulator-always-on;
+ };
+ };
+ };
+};
--
2.35.3

144
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-h6-Add-AC200-EPHY-nodes.patch Normal file
View File

@@ -0,0 +1,144 @@
From 8022c01f46c79dcc8457e580b784904a24dec9f3 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Fri, 16 Aug 2019 16:40:20 +0200
Subject: arm64: dts: allwinner: h6: Add AC200 EPHY nodes
All Allwinner H6 SoCs feature a co-packaged AC200 die, which replaces
the integrated PHY and audio circuitry of its H3/H5 predecessors. It is
using an internal I2C connection, but otherwise pretty much behaves as
it would be externally connected.
Since every H6 SoC contains this chip, add the required DT nodes to the
SoC .dtsi, but keep them disabled. This is for now just covering the
AC200 MFD parent and its EPHY child.
Any board making use of one of the integrated PHY needs to enable it and
connect the MAC and PHY accordingly.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 73 ++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index e40772637959..ce39927b27e3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -24,6 +24,16 @@ aliases {
mmc2 = &mmc2;
};
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ pwms = <&pwm 1 42 0>;
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -346,6 +356,14 @@ ths_calibration: thermal-sensor-calibration@14 {
cpu_speed_grade: cpu-speed-grade@1c {
reg = <0x1c 0x4>;
};
+
+ ephy_calib: ephy_calib@2c {
+ reg = <0x2c 0x2>;
+ };
+
+ ac200_bg: ac200_bg@30 {
+ reg = <0x30 0x2>;
+ };
};
timer@3009000 {
@@ -401,6 +419,13 @@ ext_rgmii_pins: rgmii-pins {
drive-strength = <40>;
};
+ ext_rmii_pins: rmii_pins {
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
+ "PA5", "PA6", "PA7", "PA8", "PA9";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
function = "hdmi";
@@ -421,6 +446,12 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2c3_pins: i2c3-pins {
+ pins = "PB17", "PB18";
+ function = "i2c3";
+ bias-pull-up;
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -448,6 +479,11 @@ mmc2_pins: mmc2-pins {
bias-pull-up;
};
+ pwm1_pin: pwm1-pin {
+ pins = "PB19";
+ function = "pwm1";
+ };
+
/omit-if-no-ref/
spi0_pins: spi0-pins {
pins = "PC0", "PC2", "PC3";
@@ -660,6 +696,43 @@ i2c2: i2c@5002800 {
#size-cells = <0>;
};
+ i2c3: i2c@5002c00 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002c00 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ac200: mfd@10 {
+ compatible = "x-powers,ac200";
+ reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
+ interrupt-parent = <&pio>;
+ interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ nvmem-cells = <&ac200_bg>;
+ nvmem-cell-names = "bandgap";
+
+ ac200_ephy_ctl: syscon {
+ compatible = "x-powers,ac200-ephy-ctl";
+ nvmem-cells = <&ephy_calib>;
+ nvmem-cell-names = "calibration";
+ #clock-cells = <0>;
+ #reset-cells = <0>;
+ phy-mode = "rmii";
+ status = "disabled";
+ };
+ };
+ };
+
spi0: spi@5010000 {
compatible = "allwinner,sun50i-h6-spi",
"allwinner,sun8i-h3-spi";
--
2.51.0

87
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-h6-add-AC200-codec-nodes.patch Normal file
View File

@@ -0,0 +1,87 @@
From 4cc61081f4976fe099e43da801811e3756f870be Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Thu, 1 Sep 2022 17:45:03 +0200
Subject: arm64: dts: allwinner: h6: add AC200 codec nodes
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 42 ++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index ce39927b27e3..ccc771600042 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -24,6 +24,22 @@ aliases {
mmc2 = &mmc2;
};
+ analog: analog-codec {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "ac200-audio";
+ simple-audio-card,mclk-fs = <512>;
+ status = "disabled";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s3>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&ac200_codec>;
+ };
+ };
+
ac200_pwm_clk: ac200_clk {
compatible = "pwm-clock";
#clock-cells = <0>;
@@ -452,6 +468,11 @@ i2c3_pins: i2c3-pins {
bias-pull-up;
};
+ i2s3_pins: i2s3-pins {
+ pins = "PB12", "PB13", "PB14", "PB15", "PB16";
+ function = "i2s3";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -730,6 +751,12 @@ ac200_ephy_ctl: syscon {
phy-mode = "rmii";
status = "disabled";
};
+
+ ac200_codec: codec {
+ #sound-dai-cells = <0>;
+ compatible = "x-powers,ac200-codec";
+ status = "disabled";
+ };
};
};
@@ -787,6 +814,21 @@ mdio: mdio {
};
};
+ i2s3: i2s@508f000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h6-i2s";
+ reg = <0x0508f000 0x1000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S3>, <&ccu CLK_I2S3>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 6>, <&dma 6>;
+ resets = <&ccu RST_BUS_I2S3>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s3_pins>;
+ status = "disabled";
+ };
+
i2s1: i2s@5091000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h6-i2s";
--
2.51.0

142
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-h6-enable-AC200-codec.patch Normal file
View File

@@ -0,0 +1,142 @@
From bf158ec720514f6b714ae71cb95d5792fdbc411d Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Thu, 1 Sep 2022 17:49:28 +0200
Subject: arm64: dts: allwinner: h6: enable AC200 codec
Enable AC200 analog codec on H6 based boards where present.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 25 +++++++++++++++++++
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 25 +++++++++++++++++++
.../allwinner/sun50i-h6-tanix-tx6-mini.dts | 14 +++++++++++
3 files changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 452e72d9583f..c0162e2c4249 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -104,6 +104,19 @@ wifi_pwrseq: wifi-pwrseq {
};
};
+&ac200_codec {
+ avcc-supply = <&reg_aldo2>;
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
+&analog {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
@@ -133,6 +146,14 @@ &i2s1 {
status = "okay";
};
+&i2c3 {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
&hdmi {
status = "okay";
};
@@ -337,6 +358,10 @@ sw {
};
};
+&pwm {
+ status = "okay";
+};
+
&r_ir {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index cb7231b386cd..e4796586dc79 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -93,6 +93,19 @@ &dwc3 {
status = "okay";
};
+&ac200_codec {
+ avcc-supply = <&reg_aldo2>;
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
+&analog {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
@@ -139,6 +152,14 @@ &i2s1 {
status = "okay";
};
+&i2c3 {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -196,6 +217,10 @@ &pio {
vcc-pg-supply = <&reg_aldo1>;
};
+&pwm {
+ status = "okay";
+};
+
&r_i2c {
status = "okay";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6-mini.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6-mini.dts
index 08d84160d88f..931e8b99fd93 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6-mini.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6-mini.dts
@@ -10,6 +10,20 @@ / {
compatible = "oranth,tanix-tx6-mini", "allwinner,sun50i-h6";
};
+
+&ac200_codec {
+ avcc-supply = <&reg_vcc3v3>;
+ status = "okay";
+};
+
+&analog {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
&r_ir {
linux,rc-map-name = "rc-tanix-tx3mini";
};
--
2.35.3

97
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-h6-tanix-enable-Ethernet.patch Normal file
View File

@@ -0,0 +1,97 @@
From 7c87d7c71b5d5982bdcf592fe12fb851c30d54de Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sat, 24 Aug 2019 01:03:05 +0200
Subject: arm64: dts: allwinner: h6: tanix: enable Ethernet
Tanix-TX6 and TX6 mini boards provide an 100MBit/s Ethernet port, which
uses the EPHY integrated into the Allwinner H6 SoC.
Enable the MAC node, plus the required AC200 nodes to allow configuring
and enabling the integrated PHY.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../boot/dts/allwinner/sun50i-h6-tanix.dtsi | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
index bb7de37c0d58..a660ef85100e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
@@ -10,6 +10,7 @@
/ {
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -84,6 +85,16 @@ wifi_pwrseq: wifi-pwrseq {
};
};
+&ac200_ephy_ctl {
+ x-powers,led-polarity = <GPIO_ACTIVE_HIGH>;
+ phy-address = <1>;
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&reg_vdd_cpu_gpu>;
};
@@ -104,6 +115,14 @@ &ehci3 {
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy>;
+ status = "okay";
+};
+
&gpu {
mali-supply = <&reg_vdd_cpu_gpu>;
status = "okay";
@@ -119,6 +138,21 @@ hdmi_out_con: endpoint {
};
};
+&i2c3 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0044.1400",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ resets = <&ac200_ephy_ctl>;
+ reset-names = "phy";
+ clocks = <&ac200_ephy_ctl>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -162,6 +196,10 @@ &pio {
vcc-pg-supply = <&reg_vcc1v8>;
};
+&pwm {
+ status = "okay";
+};
+
&r_ir {
status = "okay";
};
--
2.35.3

48
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-h616-orangepi-zero2-Enable-expansion-board-.patch Normal file
View File

@@ -0,0 +1,48 @@
From 7e7c505713145cd6e7543b86f27e9c1c7b4a74e5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Dzieko=C5=84ski?=
<michal.dziekonski+github@gmail.com>
Date: Sun, 28 May 2023 00:26:43 +0000
Subject: arm64: dts: allwinner: h616 orangepi zero2: Enable expansion board
USB ports
Signed-off-by: Michal Dziekonski <michal.dziekonski+github@gmail.com>
---
.../dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
index b6d5bb05ad5a..4ba536887d7a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -72,6 +72,13 @@ &ehci1 {
};
/* USB 2 & 3 are on headers only. */
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
&emac0 {
pinctrl-names = "default";
@@ -102,6 +109,14 @@ &ohci1 {
status = "okay";
};
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
&spi0 {
status = "okay";
pinctrl-names = "default";
--
2.51.0

2471
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-overlay-Add-Overlays-for-sunxi64.patch Normal file
View File

File diff suppressed because it is too large Load Diff

26
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-sun50i-h6-Fix-H6-emmc.patch Normal file
View File

@@ -0,0 +1,26 @@
From 60aea9df8e7b65137adb0d8f081576fda5127f5e Mon Sep 17 00:00:00 2001
From: Ukhellfire <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 07:10:57 +0000
Subject: arm64: dts/allwinner/sun50i-h6: Fix H6 emmc
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 58f47a426f7e..e40772637959 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -559,8 +559,7 @@ mmc1: mmc@4021000 {
};
mmc2: mmc@4022000 {
- compatible = "allwinner,sun50i-h6-emmc",
- "allwinner,sun50i-a64-emmc";
+ compatible = "allwinner,sun50i-h6-emmc";
reg = <0x04022000 0x1000>;
clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
--
2.51.0

55
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch Normal file
View File

@@ -0,0 +1,55 @@
From 3561685a36bdb6cba7af84f303e068b8448bf652 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Fri, 15 Oct 2021 21:14:55 +0200
Subject: arm64:dts:allwinner: sun50i-h616 Add VPU node
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 8a3ee8ecf671..6d1ed00375bc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -175,6 +175,17 @@ crypto: crypto@1904000 {
resets = <&ccu RST_BUS_CE>;
};
+ video-codec@1c0e000 {
+ compatible = "allwinner,sun50i-h616-video-engine";
+ reg = <0x01c0e000 0x2000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_MBUS_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
reg = <0x03000000 0x1000>;
@@ -189,6 +200,19 @@ sram_c: sram@28000 {
#size-cells = <1>;
ranges = <0 0x00028000 0x30000>;
};
+
+ sram_c1: sram@1a00000 {
+ compatible = "mmio-sram";
+ reg = <0x01a00000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01a00000 0x200000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h616-sram-c1";
+ reg = <0x000000 0x200000>;
+ };
+ };
};
ccu: clock@3001000 {
--
2.35.3

653
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-h616-8-Add-overlays-i2c-pwm-uart.patch Normal file
View File

@@ -0,0 +1,653 @@
From a59cb6bd62351166ac38d070c12cfb7dfeff411e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 10 Apr 2025 21:46:22 +0300
Subject: arm64: dts: h616(8): Add overlays i2c, pwm, uart
Signed-off-by: The-going <48602507+The-going@users.noreply.github.com>
Signed-off-by: Exodus <zjemcikolege@protonmail.com>
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 24 +++++++++++++++++++
.../overlay/sun50i-h616-i2c2-ph.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-i2c3-pg.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-i2c3-ph.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-i2c4-pg.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-i2c4-ph.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-pwm1-ph3.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm1-pi11.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm2-ph2.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm2-pi12.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm3-ph0.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm3-pi13.dtso | 22 +++++++++++++++++
.../overlay/sun50i-h616-pwm4-ph1.dtso | 20 ++++++++++++++++
.../overlay/sun50i-h616-pwm4-pi14.dtso | 20 ++++++++++++++++
.../overlay/sun50i-h616-uart2-pg-rts-cts.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart2-pg.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart2-ph-rts-cts.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart2-ph.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart2-pi-rts-cts.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart2-pi.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart3-pi-rts-cts.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart3-pi.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart4-pi-rts-cts.dtso | 15 ++++++++++++
.../overlay/sun50i-h616-uart4-pi.dtso | 15 ++++++++++++
.../allwinner/overlay/sun50i-h616-uart5.dtso | 15 ++++++++++++
25 files changed, 436 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-ph.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-pg.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-ph.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-pg.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-ph.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-ph3.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-pi11.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-ph2.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-pi12.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-ph0.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-pi13.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-ph1.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-pi14.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg-rts-cts.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph-rts-cts.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi-rts-cts.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi-rts-cts.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi-rts-cts.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart5.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 84711585fc86..ce40c7ec5a8c 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -49,6 +49,30 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-uart2.dtbo \
sun50i-h6-uart3.dtbo \
sun50i-h6-w1-gpio.dtbo \
+ sun50i-h616-i2c2-ph.dtbo \
+ sun50i-h616-i2c3-pg.dtbo \
+ sun50i-h616-i2c3-ph.dtbo \
+ sun50i-h616-i2c4-pg.dtbo \
+ sun50i-h616-i2c4-ph.dtbo \
+ sun50i-h616-pwm1-ph3.dtbo \
+ sun50i-h616-pwm1-pi11.dtbo \
+ sun50i-h616-pwm2-ph2.dtbo \
+ sun50i-h616-pwm2-pi12.dtbo \
+ sun50i-h616-pwm3-ph0.dtbo \
+ sun50i-h616-pwm3-pi13.dtbo \
+ sun50i-h616-pwm4-ph1.dtbo \
+ sun50i-h616-pwm4-pi14.dtbo \
+ sun50i-h616-uart2-pg.dtbo \
+ sun50i-h616-uart2-pg-rts-cts.dtbo \
+ sun50i-h616-uart2-ph.dtbo \
+ sun50i-h616-uart2-ph-rts-cts.dtbo \
+ sun50i-h616-uart2-pi.dtbo \
+ sun50i-h616-uart2-pi-rts-cts.dtbo \
+ sun50i-h616-uart3-pi.dtbo \
+ sun50i-h616-uart3-pi-rts-cts.dtbo \
+ sun50i-h616-uart4-pi.dtbo \
+ sun50i-h616-uart4-pi-rts-cts.dtbo \
+ sun50i-h616-uart5.dtbo \
sun50i-h616-spi-spidev.dtbo \
sun50i-h616-spidev0_0.dtbo \
sun50i-h616-spidev1_0.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-ph.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-ph.dtso
new file mode 100644
index 000000000000..c545c4dfa053
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c2-ph.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_ph_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-pg.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-pg.dtso
new file mode 100644
index 000000000000..08577d91fed9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-pg.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pg_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-ph.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-ph.dtso
new file mode 100644
index 000000000000..b09fa6d179f1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3-ph.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_ph_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-pg.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-pg.dtso
new file mode 100644
index 000000000000..2f6f3124357c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-pg.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c4>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pg_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-ph.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-ph.dtso
new file mode 100644
index 000000000000..951a1a79530c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4-ph.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&i2c4>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_ph_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-ph3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-ph3.dtso
new file mode 100644
index 000000000000..95c360feb3ea
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-ph3.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm1>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_ph_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-pi11.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-pi11.dtso
new file mode 100644
index 000000000000..39c9b31f61eb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm1-pi11.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm1>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pi_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-ph2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-ph2.dtso
new file mode 100644
index 000000000000..4ba8dc968741
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-ph2.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm2>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_ph_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-pi12.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-pi12.dtso
new file mode 100644
index 000000000000..a23c45c9bda7
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm2-pi12.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm2>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pi_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-ph0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-ph0.dtso
new file mode 100644
index 000000000000..029dff6202bb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-ph0.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm3>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_ph_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-pi13.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-pi13.dtso
new file mode 100644
index 000000000000..e6645573aae5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm3-pi13.dtso
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm3>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_pi_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-ph1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-ph1.dtso
new file mode 100644
index 000000000000..381a3db48cba
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-ph1.dtso
@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm4>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_ph_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-pi14.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-pi14.dtso
new file mode 100644
index 000000000000..47302a13a7bf
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-pwm4-pi14.dtso
@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm4>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_pi_pin>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg-rts-cts.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg-rts-cts.dtso
new file mode 100644
index 000000000000..7cee4ebec233
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg-rts-cts.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pg_pins>, <&uart2_pg_rts_cts_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg.dtso
new file mode 100644
index 000000000000..298cb56023a1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pg.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pg_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph-rts-cts.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph-rts-cts.dtso
new file mode 100644
index 000000000000..66193cde7526
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph-rts-cts.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_ph_pins>, <&uart2_ph_rts_cts_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph.dtso
new file mode 100644
index 000000000000..438af7517b5a
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-ph.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_ph_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi-rts-cts.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi-rts-cts.dtso
new file mode 100644
index 000000000000..f7426899b938
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi-rts-cts.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>, <&uart2_pi_rts_cts_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi.dtso
new file mode 100644
index 000000000000..8e816a05fb42
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2-pi.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart2>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi-rts-cts.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi-rts-cts.dtso
new file mode 100644
index 000000000000..55db4644693d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi-rts-cts.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pi_pins>, <&uart3_pi_rts_cts_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi.dtso
new file mode 100644
index 000000000000..e75292e67b7c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart3-pi.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pi_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi-rts-cts.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi-rts-cts.dtso
new file mode 100644
index 000000000000..b4f4d0bda5f6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi-rts-cts.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pi_pins>, <&uart4_pi_rts_cts_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi.dtso
new file mode 100644
index 000000000000..21898add0f84
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart4-pi.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart3>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pi_pins>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart5.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart5.dtso
new file mode 100644
index 000000000000..27b4ab085d98
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart5.dtso
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616", "allwinner,sun50i-h618";
+
+ fragment@0 {
+ target = <&uart5>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+ status = "okay";
+ };
+ };
+};
--
2.35.3

339
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-h616-add-hdmi-support-for-zero2-and-zero3.patch Normal file
View File

@@ -0,0 +1,339 @@
From 270e1512a91f294089822d2c3a3fcb8560d86561 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Fri, 29 Dec 2023 11:18:33 +0000
Subject: arm64: dts: h616: add hdmi support for zero2 and zero3
---
.../allwinner/sun50i-h616-orangepi-zero.dtsi | 25 ++
.../allwinner/sun50i-h616-orangepi-zero2.dts | 4 +
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 213 ++++++++++++++++++
3 files changed, 242 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
index 01cf16ee81f9..d10c590de63c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -23,6 +23,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -95,6 +106,10 @@ &codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
@@ -119,6 +134,16 @@ &gpu {
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mdio0 {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index 42c099483fdd..60dd0860f49f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -29,6 +29,10 @@ &gpu {
status = "okay";
};
+&hdmi {
+ hvcc-supply = <&reg_bldo1>;
+};
+
&mmc0 {
vmmc-supply = <&reg_dcdce>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 5c1e2dc77268..564c5853af97 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -7,8 +7,11 @@
#include <dt-bindings/clock/sun50i-h616-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/clock/sun6i-rtc.h>
+#include <dt-bindings/clock/sun8i-de2.h>
+#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -94,6 +97,12 @@ l2_cache: l2-cache {
};
};
+ de: display-engine {
+ compatible = "allwinner,sun50i-h6-display-engine";
+ allwinner,pipelines = <&mixer0>;
+ status = "disabled";
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -150,6 +159,50 @@ soc {
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
+ bus@1000000 {
+ compatible = "allwinner,sun50i-h616-de33",
+ "allwinner,sun50i-a64-de2";
+ reg = <0x1000000 0x400000>;
+ allwinner,sram = <&de3_sram 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1000000 0x400000>;
+
+ display_clocks: clock@8000 {
+ compatible = "allwinner,sun50i-h616-de33-clk";
+ reg = <0x8000 0x100>;
+ clocks = <&ccu CLK_DE>, <&ccu CLK_BUS_DE>;
+ clock-names = "mod", "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer@100000 {
+ compatible = "allwinner,sun50i-h616-de33-mixer-0";
+ reg = <0x100000 0x100000>,
+ <0x8100 0x40>,
+ <0x280000 0x20000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus", "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port@1 {
+ reg = <1>;
+
+ mixer0_out_tcon_top_mixer0: endpoint {
+ remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
+ };
+ };
+ };
+ };
+ };
+
gpu: gpu@1800000 {
compatible = "allwinner,sun50i-h616-mali",
"arm,mali-bifrost";
@@ -193,12 +246,31 @@ syscon: syscon@3000000 {
#size-cells = <1>;
ranges;
+ sram_a2: sram@100000 {
+ compatible = "mmio-sram";
+ reg = <0x00100000 0x18000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00100000 0x18000>;
+
+ scpi_sram: scpi-sram@17c00 {
+ compatible = "arm,scp-shmem";
+ reg = <0x17c00 0x200>;
+ };
+ };
+
sram_c: sram@28000 {
compatible = "mmio-sram";
reg = <0x00028000 0x30000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00028000 0x30000>;
+
+ de3_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h616-sram-c",
+ "allwinner,sun50i-a64-sram-c";
+ reg = <0x0000 0x1e000>;
+ };
};
sram_c1: sram@1a00000 {
@@ -918,6 +990,147 @@ ohci3: usb@5311400 {
status = "disabled";
};
+ hdmi: hdmi@6000000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h616-dw-hdmi",
+ "allwinner,sun50i-h6-dw-hdmi";
+ reg = <0x06000000 0x10000>;
+ reg-io-width = <1>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
+ <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
+ <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
+ clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
+ "hdcp-bus";
+ resets = <&ccu RST_BUS_HDMI>, <&ccu RST_BUS_HDCP>;
+ reset-names = "ctrl", "hdcp";
+ phys = <&hdmi_phy>;
+ phy-names = "phy";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
+ hdmi_in_tcon_top: endpoint {
+ remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ hdmi_phy: hdmi-phy@6010000 {
+ compatible = "allwinner,sun50i-h616-hdmi-phy";
+ reg = <0x06010000 0x10000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_HDMI_SUB>;
+ reset-names = "phy";
+ #phy-cells = <0>;
+ };
+
+ tcon_top: tcon-top@6510000 {
+ compatible = "allwinner,sun50i-h6-tcon-top";
+ reg = <0x06510000 0x1000>;
+ clocks = <&ccu CLK_BUS_TCON_TOP>,
+ <&ccu CLK_TCON_TV0>;
+ clock-names = "bus",
+ "tcon-tv0";
+ clock-output-names = "tcon-top-tv0";
+ resets = <&ccu RST_BUS_TCON_TOP>;
+ #clock-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon_top_mixer0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon_top_mixer0_in_mixer0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
+ };
+ };
+
+ tcon_top_mixer0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon_top_mixer0_out_tcon_tv: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
+ };
+ };
+
+ tcon_top_hdmi_in: port@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+
+ tcon_top_hdmi_in_tcon_tv: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon_tv_out_tcon_top>;
+ };
+ };
+
+ tcon_top_hdmi_out: port@5 {
+ reg = <5>;
+
+ tcon_top_hdmi_out_hdmi: endpoint {
+ remote-endpoint = <&hdmi_in_tcon_top>;
+ };
+ };
+ };
+ };
+
+ tcon_tv: lcd-controller@6515000 {
+ compatible = "allwinner,sun50i-h6-tcon-tv",
+ "allwinner,sun8i-r40-tcon-tv";
+ reg = <0x06515000 0x1000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON_TV0>,
+ <&tcon_top CLK_TCON_TOP_TV0>;
+ clock-names = "ahb",
+ "tcon-ch1";
+ resets = <&ccu RST_BUS_TCON_TV0>;
+ reset-names = "lcd";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon_tv_in: port@0 {
+ reg = <0>;
+
+ tcon_tv_in_tcon_top_mixer0: endpoint {
+ remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
+ };
+ };
+
+ tcon_tv_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon_tv_out_tcon_top: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
+ };
+ };
+ };
+ };
+
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h616-rtc";
reg = <0x07000000 0x400>;
--
2.51.0

68
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2-and-zero3.patch Normal file
View File

@@ -0,0 +1,68 @@
From 558ee0b5606d131de95198b99853c568b5ca3a84 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Wed, 13 Dec 2023 19:15:45 +0000
Subject: arm64: dts: h616: add wifi support for orange pi zero 2 and zero3
---
.../allwinner/sun50i-h616-orangepi-zero.dtsi | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
index 4ba536887d7a..01cf16ee81f9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
@@ -60,6 +60,34 @@ reg_usb1_vbus: regulator-usb1-vbus {
gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
status = "okay";
};
+
+ reg_vcc33_wifi: vcc33-wifi {
+ /* Always on 3.3V regulator for WiFi and BT */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc5v>;
+ };
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc33_wifi>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "osc32k-out";
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+ post-power-on-delay-ms = <200>;
+ };
};
&codec {
@@ -105,6 +133,16 @@ &mmc0 {
status = "okay";
};
+&mmc1 {
+ vmmc-supply = <&reg_vcc33_wifi>;
+ vqmmc-supply = <&reg_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
&ohci1 {
status = "okay";
};
--
2.51.0

29
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-nanopi-a64-set-right-phy-mode-to-rgmii-id.patch Normal file
View File

@@ -0,0 +1,29 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: root <guido.lehwalder@gmail.com>
Date: Tue, 26 Jan 2021 18:17:33 +0300
Subject: arm64:dts: nanopi-a64 set right phy-mode to rgmii-id
set right phy-mode for NPI A64 to rgmii-id for working
onboard-ethernet
Signed-off-by: root <guido.lehwalder@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -80,7 +80,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
status = "okay";
--
Armbian

144
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-overlay-sun50i-a64-pine64-7inch-lcd.patch Normal file
View File

@@ -0,0 +1,144 @@
From 4a77c8ac8b0e2b479e81fb817bd05fd59b2788e3 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:27:02 +0300
Subject: arm64:dts:overlay: sun50i-a64-pine64-7inch-lcd
Added to orange-pi-5.9 2020-11-30
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 1 +
.../overlay/README.sun50i-a64-overlays | 5 ++
.../overlay/sun50i-a64-pine64-7inch-lcd.dtso | 87 +++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index ae404a5258a9..8d5ae3e3beb8 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -2,6 +2,7 @@
dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-i2c0.dtbo \
sun50i-a64-i2c1.dtbo \
+ sun50i-a64-pine64-7inch-lcd.dtbo \
sun50i-a64-pps-gpio.dtbo \
sun50i-a64-spi-add-cs1.dtbo \
sun50i-a64-spi-jedec-nor.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
index cd9dbc686412..b684c2e3abb1 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
+++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
@@ -20,6 +20,7 @@ on supported boards, so this controller is not supported in provided overlays
- i2c0
- i2c1
+- pine64-7inch-lcd
- pps-gpio
- spi-add-cs1
- spi-jedec-nor
@@ -44,6 +45,10 @@ Activates TWI/I2C bus 1
I2C1 pins (SCL, SDA): PH2, PH3
+### pine64-7inch-lcd
+
+Activates the Pine64 7" LCD on pine64/pine64so boards
+
### pps-gpio
Activates pulse-per-second GPIO client
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dtso
new file mode 100644
index 000000000000..34708103fe15
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dtso
@@ -0,0 +1,87 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ compatible = "allwinner,sun50i-a64";
+
+ fragment@0 {
+ target = <&reg_ldo_io0>;
+
+ __overlay__ {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ctp";
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c0>;
+
+ __overlay__ {
+ status = "okay";
+
+ gt911: touchscreen@5d {
+ compatible = "goodix,gt911";
+ reg = <0x5d>;
+
+ interrupt-parent = <&pio>;
+ interrupts = <7 4 IRQ_TYPE_EDGE_RISING>; /* PH4 */
+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+ AVDD28-supply = <&reg_ldo_io0>;
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&r_pwm>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target-path = "/";
+
+ __overlay__ {
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <1 2 4 8 16 32 64 128 512>;
+ default-brightness-level = <8>;
+ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+ };
+ };
+ };
+
+ fragment@4 {
+ target = <&dsi>;
+
+ __overlay__ {
+ vcc-dsi-supply = <&reg_dldo1>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "feiyang,fy07024di26a30d";
+ reg = <0>;
+ avdd-supply = <&reg_dc1sw>;
+ dvdd-supply = <&reg_dldo2>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ backlight = <&backlight>;
+ };
+ };
+ };
+
+ fragment@5 {
+ target = <&dphy>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
--
2.35.3

220
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch Normal file
View File

@@ -0,0 +1,220 @@
From c5b7968c7a8250669ecf04a0b0804f8d79984925 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:01:10 +0300
Subject: arm64:dts:overlay sun50i-h5 add gpio regulator overclock
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 4 ++
.../sun50i-h5-cpu-clock-1.0GHz-1.1v.dtso | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.2GHz-1.3v.dtso | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.3GHz-1.3v.dtso | 61 +++++++++++++++++++
.../sun50i-h5-gpio-regulator-1.3v.dtso | 38 ++++++++++++
5 files changed, 165 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dtso
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dtso
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 8d5ae3e3beb8..9e3def41669e 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -14,6 +14,10 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-w1-gpio.dtbo \
sun50i-h5-analog-codec.dtbo \
sun50i-h5-cir.dtbo \
+ sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
+ sun50i-h5-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
+ sun50i-h5-gpio-regulator-1.3v.dtbo \
sun50i-h5-i2c0.dtbo \
sun50i-h5-i2c1.dtbo \
sun50i-h5-i2c2.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dtso
new file mode 100644
index 000000000000..674ec1dcbfe4
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dtso
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.0GHz at a maximum CPU voltage of 1.1v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dtso
new file mode 100644
index 000000000000..4fb5c81d31d5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dtso
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dtso
new file mode 100644
index 000000000000..9c633973df8b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dtso
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dtso
new file mode 100644
index 000000000000..8d2755c3d76f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dtso
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+
+ fragment@0 {
+ target-path = "/";
+
+ __overlay__ {
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&cpu0>;
+
+ __overlay__ {
+ cpu-supply = <&reg_vdd_cpux>;
+ };
+ };
+};
+
--
2.35.3

24
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From 85906a7fbd369ed9a0f6637d1f25eb5ce71d7a4b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:52:48 +0300
Subject: arm64:dts: sun50i-a64 force mmc0 bus-width
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index c4272550580c..b216cd417b15 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -568,6 +568,7 @@ mmc0: mmc@1c0f000 {
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
status = "disabled";
+ bus-width = <0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
--
2.35.3

28
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-Disable-clock-phase-and-.patch Normal file
View File

@@ -0,0 +1,28 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Wed, 20 May 2020 09:25:56 +0300
Subject: arm64:dts:sun50i-a64-olinuxino-1Ge16GW Disable clock phase and hs
just for test
---
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -15,8 +15,8 @@ / {
&mmc2 {
vqmmc-supply = <&reg_eldo1>;
- mmc-hs200-1_8v;
- allwinner,drive-data-phase = <180>;
+/* mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;*/
};
&pio {
--
Armbian

41
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,41 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 17:31:49 +0200
Subject: arm64:dts: sun50i-a64-olinuxino-1Ge16GW: enable bluetooth
---
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts | 21 ++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -18,3 +18,24 @@ &mmc2 {
mmc-hs200-1_8v;
allwinner,drive-data-phase = <180>;
};
+
+&pio {
+ vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
--
Armbian

603
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-olinuxino-add-boards.patch Normal file
View File

@@ -0,0 +1,603 @@
From b94c32c09b848a2b678554a39e81e31cb0ee5ea0 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:03:08 +0200
Subject: arm64:dts:sun50i-a64-olinuxino add boards
---
arch/arm64/boot/dts/allwinner/Makefile | 5 +
.../dts/allwinner/sun50i-a64-olinuxino-1G.dts | 362 ++++++++++++++++++
.../sun50i-a64-olinuxino-1Ge16GW.dts | 20 +
.../allwinner/sun50i-a64-olinuxino-1Ge4GW.dts | 97 +++++
.../allwinner/sun50i-a64-olinuxino-1Gs16M.dts | 31 ++
.../allwinner/sun50i-a64-olinuxino-2Ge8G.dts | 25 ++
6 files changed, 540 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 80098fa014ac..3280927df6e0 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -5,6 +5,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1G.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge4GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge16GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Gs16M.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-2Ge8G.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
new file mode 100644
index 000000000000..54af704d2c68
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino-1G";
+ compatible = "olimex,a64-olinuxino-1g", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
+ reg_vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+ status = "okay";
+ };
+};
+
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ hpvcc-supply = <&reg_eldo1>;
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_dcdc1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+/* Exposed to UEXT connector */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&axp_led {
+ label = "axp20x:yellow:chgled";
+ status = "okay";
+ x-powers,charger-mode = <0>;
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-pe";
+};
+
+&reg_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vcc-ddr3";
+};
+
+&reg_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+&reg_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-avdd-csi";
+};
+
+&reg_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+&reg_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+&reg_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-emmc";
+};
+
+&reg_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dvdd-csi";
+};
+
+&reg_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "Headphone Jack", "HP",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Left", "HBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
+&spdif {
+ status = "disabled";
+};
+
+/* Exposed on UEXT */
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* Exposed on UEXT */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus_det-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ usb0_vbus-supply = <&reg_drivevbus>;
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
new file mode 100644
index 000000000000..a508d77d2c09
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1Ge4GW.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge16GW";
+ compatible = "olimex,a64-olinuxino-1ge16gw", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
new file mode 100644
index 000000000000..c87ecc6e1d8f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge4GW";
+ compatible = "olimex,a64-olinuxino-1ge4gw", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet1 = &rtl8723bs;
+ mmc1 = &mmc2;
+ };
+
+ bt-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-inversion = <1>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "RTL8723BS";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco>;
+ };
+ };
+
+ bt_sco: bt-sco {
+ compatible = "linux,bt-sco";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_aldo2>;
+ vqmmc-supply = <&reg_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
new file mode 100644
index 000000000000..5b85f4d2b05f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Gs16M";
+ compatible = "olimex,a64-olinuxino-1gs16m", "allwinner,sun50i-a64";
+
+ aliases {
+ spi0 = &spi0;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-nor@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
new file mode 100644
index 000000000000..3583c37d3930
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-2Ge8G-IND";
+ compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
--
2.35.3

38
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-olinuxino-emmc-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,38 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 13:53:44 +0200
Subject: arm64:dts: sun50i-a64-olinuxino-emmc: enable bluetooth
---
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 17 ++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
@@ -22,4 +22,21 @@ &mmc2 {
&pio {
vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
};
--
Armbian

24
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-orangepi-win-add-aliase-ethernet1.patch Normal file
View File

@@ -0,0 +1,24 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:48:25 +0300
Subject: arm64:dts: sun50i-a64-orangepi-win add aliase ethernet1
---
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -15,6 +15,7 @@ / {
aliases {
ethernet0 = &emac;
+ ethernet1 = &brcmf;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
--
Armbian

49
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-pine64-add-spi0.patch Normal file
View File

@@ -0,0 +1,49 @@
From ea92626f9272ba51dba6dba2dbc70dc58e5d055e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 19:10:06 +0300
Subject: arm64:dts: sun50i-a64-pine64 add spi0
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index ab2bf8fc2d91..4b064e4acd2a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -344,3 +344,32 @@ &usb_otg {
&usbphy {
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "disabled";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ partition@200000 {
+ label = "data";
+ reg = <0x200000 0x200000>;
+ };
+ };
+ };
+};
--
2.51.0

47
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-pine64-enable-wifi-mmc1.patch Normal file
View File

@@ -0,0 +1,47 @@
From 315aba156b72f9e93430c8ffda6f02d09bda47d1 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 9 Feb 2017 00:18:56 +0800
Subject: arm64:dts: sun50i-a64-pine64 enable wifi mmc1
The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Fix and add device node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 1e6c0e2f5dad..ab2bf8fc2d91 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -35,6 +35,11 @@ hdmi_con_in: endpoint {
};
};
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&codec {
@@ -134,9 +139,10 @@ &mmc1 {
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo4>;
vqmmc-supply = <&reg_eldo1>;
- bus-width = <4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
non-removable;
- status = "disabled";
+ bus-width = <4>;
+ status = "okay";
};
&ohci0 {
--
2.51.0

40
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-enable-Bluetooth.patch Normal file
View File

@@ -0,0 +1,40 @@
From 51557cb59db2cf6317ebb3a9ebbf2f808ed71bc7 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:50:09 -0700
Subject: arm64:dts: sun50i-a64-sopine-baseboard enable Bluetooth
SoPine has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 8b6d6ae2a6b2..4b4ea1158734 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -199,7 +199,15 @@ &uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
- status = "disabled";
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
};
/* On Pi-2 connector */
--
2.51.0

25
patch/kernel/archive/sunxi-6.16/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-mmc1-status-okay.patch Normal file
View File

@@ -0,0 +1,25 @@
From efde7c83c1b9f8ea84c13e1eb6511593326aa14b Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:43:08 -0800
Subject: arm64:dts: sun50i-a64-sopine-baseboard: mmc1: status = "okay"
---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 6a009b06c5bb..8b6d6ae2a6b2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -115,7 +115,7 @@ &mmc1 {
vqmmc-supply = <&reg_eldo1>;
bus-width = <4>;
non-removable;
- status = "disabled";
+ status = "okay";
};
&mmc2 {
--
2.51.0

Some files were not shown because too many files have changed in this diff Show More