mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
nanopi-m6: add YX35 lcd support to edge kernel
This commit is contained in:
committed by
Rolf Leggewie
parent
b8977cee85
commit
1523d9e9f8
@@ -2012,6 +2012,7 @@ CONFIG_ROCKCHIP_CDN_DP=y
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CONFIG_ROCKCHIP_DW_HDMI=y
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CONFIG_ROCKCHIP_DW_HDMI_QP=y
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CONFIG_ROCKCHIP_DW_MIPI_DSI=y
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CONFIG_ROCKCHIP_DW_MIPI_DSI2=y
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CONFIG_ROCKCHIP_INNO_HDMI=y
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CONFIG_ROCKCHIP_LVDS=y
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CONFIG_ROCKCHIP_RGB=y
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@@ -2077,6 +2078,7 @@ CONFIG_DRM_PANEL_TPO_TPG110=m
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CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
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CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m
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CONFIG_DRM_PANEL_XINPENG_XPP055C272=m
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CONFIG_DRM_PANEL_YIXIAN_YX0345=m
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CONFIG_DRM_CHIPONE_ICN6211=m
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CONFIG_DRM_DISPLAY_CONNECTOR=m
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CONFIG_DRM_LONTIUM_LT8912B=m
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@@ -3120,6 +3122,7 @@ CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
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CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y
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CONFIG_PHY_ROCKCHIP_PCIE=y
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CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=m
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CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY=m
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CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=m
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PHY_ROCKCHIP_USB=y
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@@ -5,16 +5,14 @@ Subject: rock-5c: add gpio names
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Signed-off-by: Werner <werner@armbian.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 57 ++++++++++
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1 file changed, 57 insertions(+)
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arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 72 ++++++++++
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1 file changed, 72 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
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index dd7317bab613..a12e45b7f4cb 100644
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index 111111111111..222222222222 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
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@@ -255,10 +255,82 @@ &gmac1_rgmii_bus
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&gpu {
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mali-supply = <&vdd_gpu_s0>;
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@@ -257,6 +257,78 @@ &gpu {
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status = "okay";
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};
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@@ -93,7 +91,6 @@ index dd7317bab613..a12e45b7f4cb 100644
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&hdmi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&hdmim0_tx0_cec
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&hdmim1_tx0_hpd
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&hdmim0_tx0_scl
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--
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Created with Armbian build tools https://github.com/armbian/build
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Armbian
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@@ -1,11 +1,11 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Brent Roman <brent@mbari.org>
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Date: Sat, 05 Jul 2025 11:48:31 -0800
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Date: Sat, 5 Jul 2025 11:48:31 -0800
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Subject: rk3308: fixes for rock pi s dts (sans pcm5102)
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---
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arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 73 ++++++++++
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1 file changed, 73 insertions(+)
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arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 41 ++++++++++
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1 file changed, 41 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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index 111111111111..222222222222 100644
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@@ -42,7 +42,7 @@ index 111111111111..222222222222 100644
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-0 = <&wifi_enable_h>;
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@@ -128,6 +176,11 @@ vdd_log: regulator-vdd-log {
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@@ -128,6 +152,11 @@ vdd_log: regulator-vdd-log {
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};
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};
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@@ -54,7 +54,7 @@ index 111111111111..222222222222 100644
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&cpu0 {
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cpu-supply = <&vdd_core>;
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};
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@@ -242,6 +295,11 @@ &io_domains {
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@@ -242,6 +271,11 @@ &io_domains {
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status = "okay";
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};
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@@ -66,7 +66,7 @@ index 111111111111..222222222222 100644
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_32k>;
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@@ -333,10 +399,17 @@ &sdmmc {
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@@ -333,10 +367,17 @@ &sdmmc {
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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@@ -0,0 +1,378 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Muhammed Efe Cetin <efectn@protonmail.com>
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Date: Sun, 17 Aug 2025 14:24:30 +0300
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Subject: drm/panel: Add Yixian YX0345 panel
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---
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drivers/gpu/drm/panel/Kconfig | 9 +
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drivers/gpu/drm/panel/Makefile | 1 +
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drivers/gpu/drm/panel/panel-yixian-yx0345wv00v2.c | 329 ++++++++++
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3 files changed, 339 insertions(+)
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diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
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index 111111111111..222222222222 100644
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--- a/drivers/gpu/drm/panel/Kconfig
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+++ b/drivers/gpu/drm/panel/Kconfig
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@@ -1087,6 +1087,15 @@ config DRM_PANEL_WIDECHIPS_WS2401
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480x800 display controller used in panels such as Samsung LMS380KF01.
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This display is used in the Samsung Galaxy Ace 2 GT-I8160 (Codina).
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+config DRM_PANEL_YIXIAN_YX0345
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+ tristate "Yixian YX0345 DPI panel driver"
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+ depends on OF
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+ depends on DRM_MIPI_DSI
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+ help
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+ Say Y here if you want to enable support for the Yixian YX0345WV00V2
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+ 480x800 display controller used in SBCc such as NanoPi M6s.
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+
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+
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config DRM_PANEL_XINPENG_XPP055C272
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tristate "Xinpeng XPP055C272 panel driver"
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depends on OF
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diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
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index 111111111111..222222222222 100644
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--- a/drivers/gpu/drm/panel/Makefile
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+++ b/drivers/gpu/drm/panel/Makefile
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@@ -112,3 +112,4 @@ obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o
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obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o
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obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o
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obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
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+obj-$(CONFIG_DRM_PANEL_YIXIAN_YX0345) += panel-yixian-yx0345wv00v2.o
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diff --git a/drivers/gpu/drm/panel/panel-yixian-yx0345wv00v2.c b/drivers/gpu/drm/panel/panel-yixian-yx0345wv00v2.c
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new file mode 100644
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index 000000000000..111111111111
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--- /dev/null
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+++ b/drivers/gpu/drm/panel/panel-yixian-yx0345wv00v2.c
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@@ -0,0 +1,329 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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+// Copyright (c) 2025 Muhammed Efe Cetin <efectn@protonmail.com>
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+
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+#include <linux/delay.h>
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+#include <linux/gpio/consumer.h>
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+#include <linux/module.h>
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+#include <linux/mod_devicetable.h>
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+#include <linux/property.h>
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+#include <linux/regulator/consumer.h>
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+
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+#include <drm/drm_mipi_dsi.h>
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+#include <drm/drm_probe_helper.h>
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+#include <drm/drm_modes.h>
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+#include <drm/drm_panel.h>
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+
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+struct yixian_yx0345_panel_info {
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+ struct drm_display_mode mode;
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+ const struct regulator_bulk_data *regulators;
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+ int num_regulators;
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+ struct yixian_yx0345_panel_data *panel_data;
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+};
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+
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+struct yixian_yx0345 {
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+ struct drm_panel panel;
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+ const struct yixian_yx0345_panel_info *panel_info;
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+ struct mipi_dsi_device *dsi;
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+ struct gpio_desc *reset_gpio;
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+ struct regulator_bulk_data *supplies;
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+ int num_supplies;
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+};
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+
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+struct yixian_yx0345_cmd {
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+ u8 delay;
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+ u8 data[32];
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+ u8 len;
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+};
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+
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+static const struct yixian_yx0345_cmd yixian_yx0345_init_code[] = {
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+ { 0x0A, { 0x01, 0x00 }, 0x02 },
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+ { 0x7D, { 0x11, 0x00 }, 0x02 },
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+ { 0x00, { 0xFF, 0x77, 0x01, 0x00, 0x00, 0x13 }, 0x06 },
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+ { 0x00, { 0xEF, 0x08 }, 0x02 },
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+ { 0x00, { 0xFF, 0x77, 0x01, 0x00, 0x00, 0x10 }, 0x06 },
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+ { 0x00, { 0xC0, 0x63, 0x00 }, 0x03 },
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+ { 0x00, { 0xC1, 0x14, 0x14 }, 0x03 },
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+ { 0x00, { 0xC2, 0x37, 0x02 }, 0x03 },
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+ { 0x00, { 0xCC, 0x10 }, 0x02 },
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+ { 0x00,
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+ { 0xB0, 0xC5, 0x11, 0x1B, 0x0D, 0x11, 0x07, 0x0A, 0x09, 0x08, 0x24,
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+ 0x05, 0x12, 0x10, 0xA9, 0x32, 0xDF },
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+ 0x11 },
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+ { 0x00,
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+ { 0xB1, 0xC5, 0x19, 0x21, 0x0B, 0x0E, 0x03, 0x0C, 0x07, 0x07, 0x26,
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+ 0x04, 0x12, 0x11, 0xAA, 0x32, 0xDF },
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+ 0x11 },
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+ { 0x00, { 0xFF, 0x77, 0x01, 0x00, 0x00, 0x11 }, 0x06 },
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+ { 0x00, { 0xB0, 0x4D }, 0x02 },
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+ { 0x00, { 0xB1, 0x59 }, 0x02 },
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+ { 0x00, { 0xB2, 0x81 }, 0x02 },
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+ { 0x00, { 0xB3, 0x80 }, 0x02 },
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+ { 0x00, { 0xB5, 0x4E }, 0x02 },
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+ { 0x00, { 0xB7, 0x85 }, 0x02 },
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+ { 0x00, { 0xB8, 0x32 }, 0x02 },
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+ { 0x00, { 0xBB, 0x03 }, 0x02 },
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+ { 0x00, { 0xC1, 0x08 }, 0x02 },
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+ { 0x00, { 0xC2, 0x08 }, 0x02 },
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+ { 0x00, { 0xD0, 0x88 }, 0x02 },
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+ { 0x00, { 0xE0, 0x00, 0x00, 0x02 }, 0x04 },
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+ { 0x00,
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+ { 0xE1, 0x06, 0x28, 0x08, 0x28, 0x05, 0x28, 0x07, 0x28, 0x0E, 0x33,
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+ 0x33 },
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+ 0x0C },
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+ { 0x00,
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+ { 0xE2, 0x30, 0x30, 0x33, 0x33, 0x34, 0x00, 0x00, 0x00, 0x34, 0x00,
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+ 0x00, 0x00 },
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+ 0x0D },
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+ { 0x00, { 0xE3, 0x00, 0x00, 0x33, 0x33 }, 0x05 },
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+ { 0x00, { 0xE4, 0x44, 0x44 }, 0x03 },
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+ { 0x00,
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+ { 0xE5, 0x09, 0x2F, 0x2C, 0x8C, 0x0B, 0x31, 0x2C, 0x8C, 0x0D, 0x33,
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+ 0x2C, 0x8C, 0x0F, 0x35, 0x2C, 0x8C },
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+ 0x11 },
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+ { 0x00, { 0xE6, 0x00, 0x00, 0x33, 0x33 }, 0x05 },
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+ { 0x00, { 0xE7, 0x44, 0x44 }, 0x03 },
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+ { 0x00,
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+ { 0xE8, 0x08, 0x2E, 0x2C, 0x8C, 0x0A, 0x30, 0x2C, 0x8C, 0x0C, 0x32,
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+ 0x2C, 0x8C, 0x0E, 0x34, 0x2C, 0x8C },
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+ 0x11 },
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+ { 0x00, { 0xE9, 0x36, 0x00 }, 0x03 },
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+ { 0x00, { 0xEB, 0x00, 0x01, 0xE4, 0xE4, 0x44, 0x88, 0x40 }, 0x08 },
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+ { 0x00,
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+ { 0xED, 0xFF, 0xFC, 0xB2, 0x45, 0x67, 0xFA, 0x01, 0xFF, 0xFF, 0x10,
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+ 0xAF, 0x76, 0x54, 0x2B, 0xCF, 0xFF },
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+ 0x11 },
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+ { 0x00, { 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54 }, 0x07 },
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+ { 0x00, { 0xFF, 0x77, 0x01, 0x00, 0x00, 0x13 }, 0x06 },
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+ { 0x00, { 0xE8, 0x00, 0x0E }, 0x03 },
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+ { 0x78, { 0x11, 0x00 }, 0x02 },
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+ { 0x0A, { 0xE8, 0x00, 0x0C }, 0x03 },
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+ { 0x00, { 0xE8, 0x00, 0x00 }, 0x03 },
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+ { 0x00, { 0xFF, 0x77, 0x01, 0x00, 0x00, 0x00 }, 0x06 },
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+ { 0x00, { 0x36, 0x00 }, 0x02 },
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+ { 0x00, { 0x29, 0x00 }, 0x02 },
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+};
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+
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+struct yixian_yx0345_panel_data {
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+ struct yixian_yx0345_cmd *init_code;
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+ int len;
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+};
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+
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+static struct yixian_yx0345_panel_data yx0345_panel_data = {
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+ .init_code = (struct yixian_yx0345_cmd *)yixian_yx0345_init_code,
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+ .len = ARRAY_SIZE(yixian_yx0345_init_code)
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+};
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+
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+static inline struct yixian_yx0345 *to_yixian_yx0345(struct drm_panel *panel)
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+{
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+ return container_of(panel, struct yixian_yx0345, panel);
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+}
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+
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+static void yixian_yx0345_reset(struct yixian_yx0345 *ctx)
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+{
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+ if (ctx->reset_gpio) {
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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+ msleep(60);
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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+ msleep(60);
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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+ msleep(60);
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+ }
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+}
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+
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+static int yixian_yx0345_prepare(struct drm_panel *panel)
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+{
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+ struct yixian_yx0345 *ctx = to_yixian_yx0345(panel);
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+ struct mipi_dsi_multi_context mctx = { .dsi = ctx->dsi };
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+ int ret;
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+
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+ ret = regulator_bulk_enable(ctx->num_supplies, ctx->supplies);
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+ if (ret < 0)
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+ return ret;
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+
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+ yixian_yx0345_reset(ctx);
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+
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+ msleep(60);
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+
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+ struct yixian_yx0345_panel_data *panel_data =
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+ ctx->panel_info->panel_data;
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+
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+ for (int i = 0; i < panel_data->len; i++) {
|
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+ struct yixian_yx0345_cmd code = panel_data->init_code[i];
|
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+
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+ mipi_dsi_dcs_write_buffer_multi(&mctx, &code.data, code.len);
|
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+
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+ if (code.delay > 0) {
|
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+ mipi_dsi_msleep(&mctx, code.delay);
|
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+ }
|
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+ }
|
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+
|
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+ mipi_dsi_msleep(&mctx, 10);
|
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+
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+ return 0;
|
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+}
|
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+
|
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+static int yixian_yx0345_unprepare(struct drm_panel *panel)
|
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+{
|
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+ struct yixian_yx0345 *ctx = to_yixian_yx0345(panel);
|
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+
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
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+ regulator_bulk_disable(ctx->num_supplies, ctx->supplies);
|
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+
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+ msleep(60);
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+
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+ return 0;
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+}
|
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+
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+static int yixian_yx0345_disable(struct drm_panel *panel)
|
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+{
|
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+ struct yixian_yx0345 *yx0345 = to_yixian_yx0345(panel);
|
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+ struct mipi_dsi_multi_context ctx = { .dsi = yx0345->dsi };
|
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+ int ret;
|
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+
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+ u8 data = 0x00;
|
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+ ret = mipi_dsi_dcs_write(ctx.dsi, 0x28, &data, 1);
|
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+ if (ret < 0)
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+ return ret;
|
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+
|
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+ ret = mipi_dsi_dcs_write(ctx.dsi, 0x10, &data, 1);
|
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+ if (ret < 0)
|
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+ return ret;
|
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+
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+ mipi_dsi_msleep(&ctx, 70);
|
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+
|
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+ return ctx.accum_err;
|
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+}
|
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+
|
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+static int yixian_yx0345_get_modes(struct drm_panel *panel,
|
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+ struct drm_connector *connector)
|
||||
+{
|
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+ struct yixian_yx0345 *ctx = to_yixian_yx0345(panel);
|
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+
|
||||
+ return drm_connector_helper_get_modes_fixed(connector,
|
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+ &ctx->panel_info->mode);
|
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+}
|
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+
|
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+static const struct drm_panel_funcs yixian_yx0345_funcs = {
|
||||
+ .prepare = yixian_yx0345_prepare,
|
||||
+ .unprepare = yixian_yx0345_unprepare,
|
||||
+ .get_modes = yixian_yx0345_get_modes,
|
||||
+ .disable = yixian_yx0345_disable,
|
||||
+};
|
||||
+
|
||||
+static int yixian_yx0345_probe(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct device *dev = &dsi->dev;
|
||||
+ struct yixian_yx0345 *ctx;
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ ctx = devm_drm_panel_alloc(dev, struct yixian_yx0345, panel,
|
||||
+ &yixian_yx0345_funcs,
|
||||
+ DRM_MODE_CONNECTOR_DSI);
|
||||
+ if (IS_ERR(ctx))
|
||||
+ return PTR_ERR(ctx);
|
||||
+
|
||||
+ ctx->panel_info = device_get_match_data(dev);
|
||||
+ if (!ctx->panel_info)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ ctx->num_supplies = ctx->panel_info->num_regulators;
|
||||
+ ret = devm_regulator_bulk_get_const(&dsi->dev,
|
||||
+ ctx->panel_info->num_regulators,
|
||||
+ ctx->panel_info->regulators,
|
||||
+ &ctx->supplies);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
|
||||
+ if (IS_ERR(ctx->reset_gpio))
|
||||
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
|
||||
+ "Failed to get reset-gpios\n");
|
||||
+
|
||||
+ ctx->dsi = dsi;
|
||||
+ mipi_dsi_set_drvdata(dsi, ctx);
|
||||
+
|
||||
+ dsi->lanes = 2;
|
||||
+ dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
||||
+ MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS;
|
||||
+ ctx->panel.prepare_prev_first = true;
|
||||
+
|
||||
+ ret = drm_panel_of_backlight(&ctx->panel);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ drm_panel_add(&ctx->panel);
|
||||
+
|
||||
+ ret = mipi_dsi_attach(dsi);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void yixian_yx0345_remove(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct yixian_yx0345 *ctx = mipi_dsi_get_drvdata(dsi);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = mipi_dsi_detach(dsi);
|
||||
+ if (ret < 0)
|
||||
+ dev_err(&dsi->dev, "Failed to detach DSI host: %d\n", ret);
|
||||
+
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+}
|
||||
+
|
||||
+static const struct regulator_bulk_data yx0345_regulators[] = {
|
||||
+ {
|
||||
+ .supply = "vcc2v8",
|
||||
+ }, /* 2.8V */
|
||||
+ {
|
||||
+ .supply = "vcc1v8",
|
||||
+ }, /* 1.8V */
|
||||
+ {
|
||||
+ .supply = "vcc3v3",
|
||||
+ }, /* 3.3v */
|
||||
+};
|
||||
+
|
||||
+static const struct yixian_yx0345_panel_info yx0345_info = {
|
||||
+ .mode = {
|
||||
+ .clock = 29700,
|
||||
+ .hdisplay = 480,
|
||||
+ .hsync_start = 480 + 40,
|
||||
+ .hsync_end = 480 + 40 + 30,
|
||||
+ .htotal = 480 + 40 + 30 + 32,
|
||||
+ .vdisplay = 800,
|
||||
+ .vsync_start = 800 + 20,
|
||||
+ .vsync_end = 800 + 20 + 20,
|
||||
+ .vtotal = 800 + 20 + 20 + 10,
|
||||
+ .width_mm = 45,
|
||||
+ .height_mm = 75,
|
||||
+ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
|
||||
+ .type = DRM_MODE_TYPE_DRIVER,
|
||||
+ },
|
||||
+ .regulators = yx0345_regulators,
|
||||
+ .num_regulators = ARRAY_SIZE(yx0345_regulators),
|
||||
+ .panel_data = &yx0345_panel_data,
|
||||
+};
|
||||
+
|
||||
+static const struct of_device_id yixian_yx0345_of_match[] = {
|
||||
+ { .compatible = "yixian,yx0345wv00v2", .data = &yx0345_info },
|
||||
+ { /*sentinel*/ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, yixian_yx0345_of_match);
|
||||
+
|
||||
+static struct mipi_dsi_driver yixian_yx0345_driver = {
|
||||
+ .probe = yixian_yx0345_probe,
|
||||
+ .remove = yixian_yx0345_remove,
|
||||
+ .driver = {
|
||||
+ .name = "panel-yixian-yx0345wv00v2",
|
||||
+ .of_match_table = yixian_yx0345_of_match,
|
||||
+ },
|
||||
+};
|
||||
+module_mipi_dsi_driver(yixian_yx0345_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Muhammed Efe Cetin <efectn@protonmail.com>");
|
||||
+MODULE_DESCRIPTION("DRM driver for Yixian YX0345WV00V2 DSI panels");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
Armbian
|
||||
|
||||
@@ -9,12 +9,10 @@ Subject: Workaround to make several broadcom bluetooth serdev devices work
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c
|
||||
index 3a3a56ddbb06..de66fe473595 100644
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/bluetooth/btbcm.c
|
||||
+++ b/drivers/bluetooth/btbcm.c
|
||||
@@ -133,11 +133,11 @@ int btbcm_check_bdaddr(struct hci_dev *hdev)
|
||||
!bacmp(&bda->bdaddr, BDADDR_BCM43341B)) {
|
||||
/* Try falling back to BDADDR EFI variable */
|
||||
@@ -135,7 +135,7 @@ int btbcm_check_bdaddr(struct hci_dev *hdev)
|
||||
if (btbcm_set_bdaddr_from_efi(hdev) != 0) {
|
||||
bt_dev_info(hdev, "BCM: Using default device address (%pMR)",
|
||||
&bda->bdaddr);
|
||||
@@ -23,8 +21,6 @@ index 3a3a56ddbb06..de66fe473595 100644
|
||||
}
|
||||
}
|
||||
|
||||
kfree_skb(skb);
|
||||
|
||||
--
|
||||
--
|
||||
Armbian
|
||||
|
||||
|
||||
@@ -94,7 +94,8 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rockchip-rk3588-uart7-m2.dtbo \
|
||||
rockchip-rk3588-uart8-m1.dtbo \
|
||||
rockchip-rk3588-rkvenc-overlay.dtbo \
|
||||
rockchip-rk3588-nanopi-m6-spi-nor-flash.dtbo
|
||||
rockchip-rk3588-nanopi-m6-spi-nor-flash.dtbo \
|
||||
rockchip-rk3588-nanopi-m6-display-dsi1-yx35.dtbo \
|
||||
|
||||
scr-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rockchip-fixup.scr
|
||||
|
||||
@@ -0,0 +1,111 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/soc/rockchip,vop2.h>
|
||||
|
||||
/ {
|
||||
fragment@0 {
|
||||
target-path = "/";
|
||||
|
||||
__overlay__ {
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
power-supply = <&vcc5v0_sys>;
|
||||
pwms = <&pwm11 0 25000 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&pwm11>;
|
||||
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm11m3_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@2 {
|
||||
target = <&mipidcphy1>;
|
||||
|
||||
__overlay__ {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@3 {
|
||||
target = <&dsi1>;
|
||||
|
||||
__overlay__ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
panel@0 {
|
||||
compatible = "yixian,yx0345wv00v2";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_rst1_gpio>;
|
||||
reset-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
mipi_panel_in: endpoint {
|
||||
remote-endpoint = <&dsi1_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@4 {
|
||||
target = <&dsi1_in>;
|
||||
|
||||
__overlay__ {
|
||||
dsi1_in_vp2: endpoint {
|
||||
remote-endpoint = <&vp2_out_dsi1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@5 {
|
||||
target = <&dsi1_out>;
|
||||
|
||||
__overlay__ {
|
||||
dsi1_out_panel: endpoint {
|
||||
remote-endpoint = <&mipi_panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@6 {
|
||||
target = <&vp2>;
|
||||
|
||||
__overlay__ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vp2_out_dsi1: endpoint@ROCKCHIP_VOP2_EP_MIPI1 {
|
||||
reg = <ROCKCHIP_VOP2_EP_MIPI1>;
|
||||
remote-endpoint = <&dsi1_in_vp2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@7 {
|
||||
target = <&pinctrl>;
|
||||
|
||||
__overlay__ {
|
||||
lcd {
|
||||
/omit-if-no-ref/
|
||||
lcd_rst1_gpio: lcd-rst1-gpio {
|
||||
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,14 +1,14 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Brent Roman <brent@mbari.org>
|
||||
Date: Sat, 05 Jul 2025 11:48:31 -0800
|
||||
Date: Sat, 5 Jul 2025 11:48:31 -0800
|
||||
Subject: revert rk3308 analog codec to vendor code for kernel 6.16
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 7 +-
|
||||
sound/soc/codecs/rk3308_codec.c | 5681 ++++++++--
|
||||
sound/soc/codecs/rk3308_codec.c | 5677 ++++++++--
|
||||
sound/soc/codecs/rk3308_codec.h | 892 +-
|
||||
sound/soc/codecs/rk3308_codec_provider.h | 28 +
|
||||
4 files changed, 5665 insertions(+), 943 deletions(-)
|
||||
4 files changed, 5663 insertions(+), 941 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
|
||||
index 111111111111..222222222222 100644
|
||||
@@ -1752,8 +1752,6 @@ index 111111111111..222222222222 100644
|
||||
}
|
||||
|
||||
- /* set HPMIX default gains (reset value is 0, which is illegal) */
|
||||
- regmap_update_bits(rk3308->regmap, RK3308_DAC_ANA_CON12,
|
||||
- RK3308_DAC_L_HPMIX_GAIN_MSK |
|
||||
+ regmap_update_bits(rk3308->regmap, RK3308_ADC_ANA_CON07(0),
|
||||
+ RK3308_ADC_LEVEL_RANGE_MICBIAS_MSK,
|
||||
+ volt);
|
||||
@@ -4520,8 +4518,8 @@ index 111111111111..222222222222 100644
|
||||
+
|
||||
+ /* Prepare DAC gains */
|
||||
+ /* Step 15, set HPMIX default gains */
|
||||
+ regmap_update_bits(rk3308->regmap, RK3308_DAC_ANA_CON12,
|
||||
+ RK3308_DAC_L_HPMIX_GAIN_MSK |
|
||||
regmap_update_bits(rk3308->regmap, RK3308_DAC_ANA_CON12,
|
||||
RK3308_DAC_L_HPMIX_GAIN_MSK |
|
||||
RK3308_DAC_R_HPMIX_GAIN_MSK,
|
||||
RK3308_DAC_L_HPMIX_GAIN_NDB_6 |
|
||||
RK3308_DAC_R_HPMIX_GAIN_NDB_6);
|
||||
|
||||
@@ -10,12 +10,10 @@ Signed-off-by: Brent Roman <genosenosor@gmail.com>
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/sound/soc/rockchip/rockchip_i2s_tdm.c b/sound/soc/rockchip/rockchip_i2s_tdm.c
|
||||
index d9a1fab7f..3b46c59ed 100644
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/sound/soc/rockchip/rockchip_i2s_tdm.c
|
||||
+++ b/sound/soc/rockchip/rockchip_i2s_tdm.c
|
||||
@@ -20,10 +20,11 @@
|
||||
|
||||
#include "rockchip_i2s_tdm.h"
|
||||
@@ -22,6 +22,7 @@
|
||||
|
||||
#define DRV_NAME "rockchip-i2s-tdm"
|
||||
|
||||
@@ -23,11 +21,7 @@ index d9a1fab7f..3b46c59ed 100644
|
||||
#define CH_GRP_MAX 4 /* The max channel 8 / 2 */
|
||||
#define MULTIPLEX_CH_MAX 10
|
||||
|
||||
#define TRCM_TXRX 0
|
||||
#define TRCM_TX 1
|
||||
@@ -663,10 +664,13 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
|
||||
} else {
|
||||
mclk = i2s_tdm->mclk_rx;
|
||||
@@ -665,6 +666,9 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
|
||||
mclk_rate = i2s_tdm->mclk_rx_freq;
|
||||
}
|
||||
|
||||
@@ -37,8 +31,6 @@ index d9a1fab7f..3b46c59ed 100644
|
||||
err = clk_set_rate(mclk, mclk_rate);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
mclk_rate = clk_get_rate(mclk);
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
Armbian
|
||||
|
||||
|
||||
@@ -54,7 +54,7 @@ index 111111111111..222222222222 100644
|
||||
i2s_8ch_0: i2s@ff300000 {
|
||||
compatible = "rockchip,rk3308-i2s-tdm";
|
||||
reg = <0x0 0xff300000 0x0 0x1000>;
|
||||
@@ -2118,5 +2144,89 @@ uart4_rts_pin: uart4-rts-pin {
|
||||
@@ -2121,5 +2147,89 @@ uart4_rts_pin: uart4-rts-pin {
|
||||
<4 RK_PA7 0 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -12,7 +12,7 @@ diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/ph
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
|
||||
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
|
||||
@@ -904,7 +904,7 @@ static int rockchip_usb3_phy_power_on(struct phy *phy)
|
||||
@@ -903,7 +903,7 @@ static int rockchip_usb3_phy_power_on(struct phy *phy)
|
||||
tcphy_cfg_usb3_to_usb2_only(tcphy, false);
|
||||
goto unlock_ret;
|
||||
}
|
||||
|
||||
@@ -20,7 +20,7 @@ diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/adm
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/Documentation/admin-guide/kernel-parameters.txt
|
||||
+++ b/Documentation/admin-guide/kernel-parameters.txt
|
||||
@@ -4959,6 +4959,14 @@
|
||||
@@ -4967,6 +4967,14 @@
|
||||
nomsi Do not use MSI for native PCIe PME signaling (this makes
|
||||
all PCIe root ports use INTx for all services).
|
||||
|
||||
|
||||
@@ -95,15 +95,15 @@ index 111111111111..222222222222 100644
|
||||
|
||||
dwc->lpm_nyet_threshold = lpm_nyet_threshold;
|
||||
dwc->tx_de_emphasis = tx_de_emphasis;
|
||||
@@ -2438,6 +2473,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
|
||||
@@ -2439,6 +2474,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
|
||||
|
||||
switch (dwc->current_dr_role) {
|
||||
case DWC3_GCTL_PRTCAP_DEVICE:
|
||||
+ case DWC3_GCTL_PRTCAP_DEVICE_DISCONNECTED:
|
||||
if (pm_runtime_suspended(dwc->dev))
|
||||
break;
|
||||
dwc3_gadget_suspend(dwc);
|
||||
@@ -2498,11 +2534,12 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg)
|
||||
ret = dwc3_gadget_suspend(dwc);
|
||||
@@ -2503,11 +2539,12 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg)
|
||||
|
||||
switch (dwc->current_dr_role) {
|
||||
case DWC3_GCTL_PRTCAP_DEVICE:
|
||||
@@ -117,7 +117,7 @@ index 111111111111..222222222222 100644
|
||||
dwc3_gadget_resume(dwc);
|
||||
break;
|
||||
case DWC3_GCTL_PRTCAP_HOST:
|
||||
@@ -2566,6 +2603,7 @@ static int dwc3_runtime_checks(struct dwc3 *dwc)
|
||||
@@ -2571,6 +2608,7 @@ static int dwc3_runtime_checks(struct dwc3 *dwc)
|
||||
{
|
||||
switch (dwc->current_dr_role) {
|
||||
case DWC3_GCTL_PRTCAP_DEVICE:
|
||||
@@ -125,7 +125,7 @@ index 111111111111..222222222222 100644
|
||||
if (dwc->connected)
|
||||
return -EBUSY;
|
||||
break;
|
||||
@@ -2604,6 +2642,7 @@ int dwc3_runtime_resume(struct dwc3 *dwc)
|
||||
@@ -2609,6 +2647,7 @@ int dwc3_runtime_resume(struct dwc3 *dwc)
|
||||
|
||||
switch (dwc->current_dr_role) {
|
||||
case DWC3_GCTL_PRTCAP_DEVICE:
|
||||
@@ -133,7 +133,7 @@ index 111111111111..222222222222 100644
|
||||
if (dwc->pending_events) {
|
||||
pm_runtime_put(dev);
|
||||
dwc->pending_events = false;
|
||||
@@ -2628,6 +2667,7 @@ int dwc3_runtime_idle(struct dwc3 *dwc)
|
||||
@@ -2633,6 +2672,7 @@ int dwc3_runtime_idle(struct dwc3 *dwc)
|
||||
|
||||
switch (dwc->current_dr_role) {
|
||||
case DWC3_GCTL_PRTCAP_DEVICE:
|
||||
|
||||
@@ -51,7 +51,7 @@ index 111111111111..222222222222 100644
|
||||
/* Determining the initial pin assignment. */
|
||||
if (!DP_CONF_GET_PIN_ASSIGN(dp->data.conf)) {
|
||||
/* Is USB together with DP preferred */
|
||||
@@ -787,15 +805,37 @@ int dp_altmode_probe(struct typec_altmode *alt)
|
||||
@@ -786,15 +804,37 @@ int dp_altmode_probe(struct typec_altmode *alt)
|
||||
struct typec_altmode *plug = typec_altmode_get_plug(alt, TYPEC_PLUG_SOP_P);
|
||||
struct fwnode_handle *fwnode;
|
||||
struct dp_altmode *dp;
|
||||
|
||||
Reference in New Issue
Block a user