rk322x: improving stability for some boards, add missing wireguard module

* add device tree overlays to handle boards with power regulation issues,
* fix misconfiguration issues in overlays
* add missing wireguard module for rk322x-current and -edge
This commit is contained in:
Paolo Sabatino
2021-03-30 17:58:40 +00:00
parent 872ff9a35e
commit 087cb0e86a
8 changed files with 381 additions and 92 deletions

View File

@@ -1,11 +1,11 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.10.11 Kernel Configuration
# Linux/arm 5.10.26 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-none-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025"
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=90201
CONFIG_LD_VERSION=233010000
CONFIG_GCC_VERSION=80300
CONFIG_LD_VERSION=232000000
CONFIG_CLANG_VERSION=0
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
@@ -209,6 +209,7 @@ CONFIG_KALLSYMS_BASE_RELATIVE=y
# CONFIG_BPF_SYSCALL is not set
# CONFIG_USERFAULTFD is not set
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_KCMP=y
CONFIG_RSEQ=y
# CONFIG_DEBUG_RSEQ is not set
CONFIG_EMBEDDED=y
@@ -1996,7 +1997,8 @@ CONFIG_MII=y
CONFIG_NET_CORE=y
CONFIG_BONDING=m
CONFIG_DUMMY=y
# CONFIG_WIREGUARD is not set
CONFIG_WIREGUARD=m
# CONFIG_WIREGUARD_DEBUG is not set
# CONFIG_EQUALIZER is not set
CONFIG_IFB=m
# CONFIG_NET_TEAM is not set
@@ -2382,6 +2384,7 @@ CONFIG_WLAN_VENDOR_TI=y
CONFIG_RTL8723DU=m
CONFIG_RTL8723DS=m
CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m
CONFIG_88XXAU=m
CONFIG_RTL8192EU=m
@@ -6159,7 +6162,6 @@ CONFIG_RESET_CONTROLLER=y
# PHY Subsystem
#
CONFIG_GENERIC_PHY=y
# CONFIG_USB_LGM_PHY is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_PHY_CADENCE_DPHY is not set
@@ -6444,24 +6446,6 @@ CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y

View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.11.3 Kernel Configuration
# Linux/arm 5.11.10 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@@ -2120,7 +2120,8 @@ CONFIG_MII=y
CONFIG_NET_CORE=y
CONFIG_BONDING=m
CONFIG_DUMMY=y
# CONFIG_WIREGUARD is not set
CONFIG_WIREGUARD=m
# CONFIG_WIREGUARD_DEBUG is not set
# CONFIG_EQUALIZER is not set
CONFIG_IFB=m
# CONFIG_NET_TEAM is not set

View File

@@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..54bbe900b
index 00000000..42436dbf
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,241 @@
@@ -0,0 +1,268 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
@@ -245,3 +245,30 @@ index 000000000..54bbe900b
+&usb_otg {
+ dr_mode = "host";
+};
+
+&cpu0_opp_table {
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <1050000 1050000 1400000>;
+ opp-microvolt-L0 = <1050000 1050000 1400000>;
+ opp-microvolt-L1 = <1050000 1050000 1400000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1050000 1050000 1400000>;
+ opp-microvolt-L0 = <1050000 1050000 1400000>;
+ opp-microvolt-L1 = <1050000 1050000 1400000>;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1050000 1050000 1400000>;
+ opp-microvolt-L0 = <1050000 1050000 1400000>;
+ opp-microvolt-L1 = <1050000 1050000 1400000>;
+ };
+
+};

View File

@@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 00000000..7746f6f5
index 00000000..48eb5249
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,26 @@
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-emmc.dtbo \
@@ -13,6 +13,7 @@ index 00000000..7746f6f5
+ rk322x-led-conf2.dtbo \
+ rk322x-led-conf3.dtbo \
+ rk322x-cpu-hs.dtbo \
+ rk322x-cpu-stability.dtbo \
+ rk322x-bluetooth.dtbo \
+ rk322x-wlan-ssv6051.dtbo \
+ rk322x-cpu-hs-lv.dtbo \
@@ -313,6 +314,64 @@ index 00000000..1c2fc79e
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 00000000..f434af92
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ /*
+ Device tree overlay that tries to overcome issues on power regulators (expecially ARM
+ power regulator) increasing lowest voltage and adding settling time to allow voltage
+ stabilization
+ */
+
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+ __overlay__ {
+
+ /*
+ Increase 600 and 800 Mhz operating points voltage to decrease the range
+ between minimum and maximum voltages
+ */
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target = <&vdd_arm>;
+ __overlay__ {
+
+ regulator-ramp-delay = <300>; // 30 uV/us, so 0.3v transition settling time is 1ms
+
+ };
+ };
+
+ fragment@2 {
+ target = <&vdd_log>;
+ __overlay__ {
+
+ regulator-ramp-delay = <600>; // 600 uV/us, so 0,3v transition settling time is 0.5ms
+
+ };
+
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
new file mode 100755
index 00000000..b451da65

View File

@@ -1,15 +1,16 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..085fdeb4c
index 000000000..6f2c52cf5
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,440 @@
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk322x-box.dtsi"
+
+/ {
@@ -51,6 +52,9 @@ index 000000000..085fdeb4c
+
+ };
+
+ // Remove the gpio-keys node from included dtsi
+ /delete-node/gpio_keys;
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
@@ -144,30 +148,60 @@ index 000000000..085fdeb4c
+
+ vdd_arm: vdd-arm-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 2000 0>;
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <90 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 0>;
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <100 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ /*
+ * The 408 Mhz node causes system instabilities on some systems.
+ * Remove it also because it is too slow.
+ */
+ /delete-node/opp-408000000;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+};
+
+&emmc {
@@ -236,12 +270,10 @@ index 000000000..085fdeb4c
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_down>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-0 = <&pwm2_pin_pull_up>;
+ status = "okay";
+};
+
@@ -269,10 +301,6 @@ index 000000000..085fdeb4c
+ status = "okay";
+};
+
+&power_key {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
@@ -431,12 +459,6 @@ index 000000000..085fdeb4c
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 000000000..df09b95a7
index 000000000..dfbda5299
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,22 @@
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-emmc.dtbo \
@@ -13,7 +13,8 @@ index 000000000..df09b95a7
+ rk322x-led-conf2.dtbo \
+ rk322x-led-conf3.dtbo \
+ rk322x-cpu-hs.dtbo \
+ rk322x-wlan-alt-wiring.dtbo
+ rk322x-wlan-alt-wiring.dtbo \
+ rk322x-cpu-stability.dtbo
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-fixup.scr
@@ -28,10 +29,10 @@ index 000000000..df09b95a7
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100755
index 000000000..01a768161
index 000000000..1abc378c9
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,60 @@
@@ -0,0 +1,67 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
@@ -43,6 +44,7 @@ index 000000000..01a768161
+### Provided overlays:
+
+- rk322x-cpu-hs
+- rk322x-cpu-stability
+- rk322x-emmc
+- rk322x-nand
+- rk322x-emmc-nand
@@ -58,6 +60,12 @@ index 000000000..01a768161
+
+Activates higher CPU speed (up to 1.4ghz) for rk3228b/rk3229 boxes
+
+### rk322x-cpu-stability
+
+Increases the voltage of the lowest operating point to increase stability
+on some boards which have power regulation issues. Also adds a settling
+time to allow power regulator stabilize voltage.
+
+### emmc
+
+Activates onboard emmc device node and deactivates the nand controller.
@@ -126,6 +134,64 @@ index 000000000..1c2fc79e1
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 000000000..f434af926
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ /*
+ Device tree overlay that tries to overcome issues on power regulators (expecially ARM
+ power regulator) increasing lowest voltage and adding settling time to allow voltage
+ stabilization
+ */
+
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+ __overlay__ {
+
+ /*
+ Increase 600 and 800 Mhz operating points voltage to decrease the range
+ between minimum and maximum voltages
+ */
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target = <&vdd_arm>;
+ __overlay__ {
+
+ regulator-ramp-delay = <300>; // 30 uV/us, so 0.3v transition settling time is 1ms
+
+ };
+ };
+
+ fragment@2 {
+ target = <&vdd_log>;
+ __overlay__ {
+
+ regulator-ramp-delay = <600>; // 600 uV/us, so 0,3v transition settling time is 0.5ms
+
+ };
+
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
new file mode 100755
index 000000000..9b273bf75
@@ -196,10 +262,10 @@ index 000000000..d4c39e20a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100755
index 000000000..508e477f7
index 000000000..6846109d3
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -238,6 +304,10 @@ index 000000000..508e477f7
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -245,6 +315,9 @@ index 000000000..508e477f7
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
@@ -259,10 +332,10 @@ index 000000000..508e477f7
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100755
index 000000000..153f71565
index 000000000..40bdd5421
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -301,6 +374,10 @@ index 000000000..153f71565
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -308,6 +385,9 @@ index 000000000..153f71565
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
@@ -322,10 +402,10 @@ index 000000000..153f71565
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
new file mode 100755
index 000000000..39f4547ed
index 000000000..03c99ef8b
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -364,6 +444,10 @@ index 000000000..39f4547ed
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -371,6 +455,9 @@ index 000000000..39f4547ed
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";

View File

@@ -1,15 +1,16 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..085fdeb4c
index 000000000..6f2c52cf5
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,440 @@
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk322x-box.dtsi"
+
+/ {
@@ -51,6 +52,9 @@ index 000000000..085fdeb4c
+
+ };
+
+ // Remove the gpio-keys node from included dtsi
+ /delete-node/gpio_keys;
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
@@ -144,30 +148,60 @@ index 000000000..085fdeb4c
+
+ vdd_arm: vdd-arm-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 2000 0>;
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <90 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 0>;
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <4000>;
+ pwm-dutycycle-range = <100 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ /*
+ * The 408 Mhz node causes system instabilities on some systems.
+ * Remove it also because it is too slow.
+ */
+ /delete-node/opp-408000000;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+
+ };
+
+};
+
+&emmc {
@@ -236,12 +270,10 @@ index 000000000..085fdeb4c
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_down>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-0 = <&pwm2_pin_pull_up>;
+ status = "okay";
+};
+
@@ -269,10 +301,6 @@ index 000000000..085fdeb4c
+ status = "okay";
+};
+
+&power_key {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
@@ -431,12 +459,6 @@ index 000000000..085fdeb4c
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 000000000..df09b95a7
index 000000000..dfbda5299
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,22 @@
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-emmc.dtbo \
@@ -13,7 +13,8 @@ index 000000000..df09b95a7
+ rk322x-led-conf2.dtbo \
+ rk322x-led-conf3.dtbo \
+ rk322x-cpu-hs.dtbo \
+ rk322x-wlan-alt-wiring.dtbo
+ rk322x-wlan-alt-wiring.dtbo \
+ rk322x-cpu-stability.dtbo
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-fixup.scr
@@ -28,10 +29,10 @@ index 000000000..df09b95a7
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100755
index 000000000..01a768161
index 000000000..1abc378c9
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,60 @@
@@ -0,0 +1,67 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
@@ -43,6 +44,7 @@ index 000000000..01a768161
+### Provided overlays:
+
+- rk322x-cpu-hs
+- rk322x-cpu-stability
+- rk322x-emmc
+- rk322x-nand
+- rk322x-emmc-nand
@@ -58,6 +60,12 @@ index 000000000..01a768161
+
+Activates higher CPU speed (up to 1.4ghz) for rk3228b/rk3229 boxes
+
+### rk322x-cpu-stability
+
+Increases the voltage of the lowest operating point to increase stability
+on some boards which have power regulation issues. Also adds a settling
+time to allow power regulator stabilize voltage.
+
+### emmc
+
+Activates onboard emmc device node and deactivates the nand controller.
@@ -126,6 +134,64 @@ index 000000000..1c2fc79e1
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 000000000..f434af926
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ /*
+ Device tree overlay that tries to overcome issues on power regulators (expecially ARM
+ power regulator) increasing lowest voltage and adding settling time to allow voltage
+ stabilization
+ */
+
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+ __overlay__ {
+
+ /*
+ Increase 600 and 800 Mhz operating points voltage to decrease the range
+ between minimum and maximum voltages
+ */
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1100000>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target = <&vdd_arm>;
+ __overlay__ {
+
+ regulator-ramp-delay = <300>; // 30 uV/us, so 0.3v transition settling time is 1ms
+
+ };
+ };
+
+ fragment@2 {
+ target = <&vdd_log>;
+ __overlay__ {
+
+ regulator-ramp-delay = <600>; // 600 uV/us, so 0,3v transition settling time is 0.5ms
+
+ };
+
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
new file mode 100755
index 000000000..9b273bf75
@@ -196,10 +262,10 @@ index 000000000..d4c39e20a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100755
index 000000000..508e477f7
index 000000000..6846109d3
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -238,6 +304,10 @@ index 000000000..508e477f7
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -245,6 +315,9 @@ index 000000000..508e477f7
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
@@ -259,10 +332,10 @@ index 000000000..508e477f7
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100755
index 000000000..153f71565
index 000000000..40bdd5421
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -301,6 +374,10 @@ index 000000000..153f71565
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -308,6 +385,9 @@ index 000000000..153f71565
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
@@ -322,10 +402,10 @@ index 000000000..153f71565
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
new file mode 100755
index 000000000..39f4547ed
index 000000000..03c99ef8b
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
@@ -0,0 +1,57 @@
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
@@ -364,6 +444,10 @@ index 000000000..39f4547ed
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ reset_key: reset-key {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+ };
+
@@ -371,6 +455,9 @@ index 000000000..39f4547ed
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&reset_key>;
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";