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41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From bf4de699e3ee6a75443c4d31979107a6a677ec42 Mon Sep 17 00:00:00 2001
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From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
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Date: Mon, 25 Aug 2025 17:34:44 +0200
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Subject: [PATCH 037/113] FROMLIST(v7): arm64: dts: rockchip: Add verisilicon
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IOMMU node on RK3588
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Add the device tree node for the Verisilicon IOMMU present
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in the RK3588 SoC.
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This IOMMU handles address translation for the VPU hardware blocks.
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Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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index 56bf903eb04f..3bd1b5e3b101 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
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@@ -1418,6 +1418,17 @@ av1d: video-codec@fdc70000 {
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clock-names = "aclk", "hclk";
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power-domains = <&power RK3588_PD_AV1>;
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resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
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+ iommus = <&av1d_mmu>;
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+ };
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+
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+ av1d_mmu: iommu@fdca0000 {
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+ compatible = "rockchip,rk3588-av1-iommu", "verisilicon,iommu-1.2";
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+ reg = <0x0 0xfdca0000 0x0 0x600>;
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+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
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+ clock-names = "core", "iface";
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+ #iommu-cells = <0>;
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+ power-domains = <&power RK3588_PD_AV1>;
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};
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vop: vop@fdd90000 {
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--
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2.34.1
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