mirror of
https://github.com/LibreELEC/LibreELEC.tv
synced 2025-09-24 19:46:01 +07:00
105 lines
2.4 KiB
Diff
105 lines
2.4 KiB
Diff
From 4c41bac5057293ba1e191069e16299bca6734b64 Mon Sep 17 00:00:00 2001
|
|
From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
|
|
Date: Mon, 21 Jul 2025 09:17:00 +0000
|
|
Subject: [PATCH 020/113] FROMGIT(6.18): arm64: dts: rockchip: enable NPU on
|
|
ROCK 5B/5B+/5T
|
|
|
|
The NPU on the ROCK5B uses the same regulator for both the sram-supply
|
|
and the npu's supply. Add this regulator, and enable all the NPU bits.
|
|
Also add the regulator as a domain-supply to the pd_npu power domain.
|
|
|
|
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
|
|
Tested-by: Heiko Stuebner <heiko@sntech.de>
|
|
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
|
|
[ relocate patch to rk3588-rock-5b-5bp-5t.dtsi ]
|
|
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
|
---
|
|
.../dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi | 57 +++++++++++++++++++
|
|
1 file changed, 57 insertions(+)
|
|
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
|
|
index 973d39a7e0e0..612808d2b4c5 100644
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
|
|
@@ -268,6 +268,29 @@ regulator-state-mem {
|
|
};
|
|
};
|
|
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1m2_xfer>;
|
|
+ status = "okay";
|
|
+
|
|
+ vdd_npu_s0: regulator@42 {
|
|
+ compatible = "rockchip,rk8602";
|
|
+ reg = <0x42>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ regulator-name = "vdd_npu_s0";
|
|
+ regulator-boot-on;
|
|
+ regulator-enable-ramp-delay = <500>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
&i2c6 {
|
|
status = "okay";
|
|
|
|
@@ -392,6 +415,10 @@ &pd_gpu {
|
|
domain-supply = <&vdd_gpu_s0>;
|
|
};
|
|
|
|
+&pd_npu {
|
|
+ domain-supply = <&vdd_npu_s0>;
|
|
+};
|
|
+
|
|
&pinctrl {
|
|
hym8563 {
|
|
hym8563_int: hym8563-int {
|
|
@@ -424,6 +451,36 @@ &pwm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
+&rknn_core_0 {
|
|
+ npu-supply = <&vdd_npu_s0>;
|
|
+ sram-supply = <&vdd_npu_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rknn_core_1 {
|
|
+ npu-supply = <&vdd_npu_s0>;
|
|
+ sram-supply = <&vdd_npu_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rknn_core_2 {
|
|
+ npu-supply = <&vdd_npu_s0>;
|
|
+ sram-supply = <&vdd_npu_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rknn_mmu_0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rknn_mmu_1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rknn_mmu_2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&saradc {
|
|
vref-supply = <&avcc_1v8_s0>;
|
|
status = "okay";
|
|
--
|
|
2.34.1
|
|
|