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https://github.com/LibreELEC/LibreELEC.tv
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94 lines
3.4 KiB
Diff
94 lines
3.4 KiB
Diff
From a2b9f241bbd383ee4157f7b4e3ec993f7b66f325 Mon Sep 17 00:00:00 2001
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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Date: Wed, 4 Dec 2024 14:09:35 +0200
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Subject: [PATCH 099/110] [WIP-YUV420] drm/rockchip: dw_hdmi_qp: Add YUV420
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output format support
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Program the necessary bridge registers to allow using the YUV420 color
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format.
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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---
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.../gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 28 ++++++++++++++++++-
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1 file changed, 27 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
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index 81f106ac7b56..75a0ea019ede 100644
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--- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
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+++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
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@@ -10,6 +10,8 @@
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/gpio/consumer.h>
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+#include <linux/hdmi.h>
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+#include <linux/hw_bitfield.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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@@ -140,6 +142,14 @@ dw_hdmi_qp_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
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union phy_configure_opts phy_cfg = {};
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int ret;
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+ switch (conn_state->hdmi.output_format) {
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+ case HDMI_COLORSPACE_YUV420:
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+ s->output_mode = ROCKCHIP_OUT_MODE_YUV420;
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+ break;
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+ default:
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+ s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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+ }
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+
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if (hdmi->tmds_char_rate == conn_state->hdmi.tmds_char_rate &&
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s->output_bpc == conn_state->hdmi.output_bpc)
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return 0;
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@@ -150,9 +160,13 @@ dw_hdmi_qp_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
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ret = phy_configure(hdmi->phy, &phy_cfg);
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if (!ret) {
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hdmi->tmds_char_rate = conn_state->hdmi.tmds_char_rate;
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- s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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s->output_type = DRM_MODE_CONNECTOR_HDMIA;
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s->output_bpc = conn_state->hdmi.output_bpc;
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+ /*
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+ * TODO: Adapt for vop2_convert_csc_mode() which uses v4l2_colorspace
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+ * instead of drm_colorspace.
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+ */
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+ s->color_space = rockchip_drm_colorimetry_to_v4l_colorspace(conn_state->colorspace);
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} else {
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dev_err(hdmi->dev, "Failed to configure phy: %d\n", ret);
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}
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@@ -403,6 +417,11 @@ static void dw_hdmi_qp_rk3576_enc_init(struct rockchip_hdmi_qp *hdmi,
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val = HIWORD_UPDATE(FIELD_PREP(RK3576_COLOR_DEPTH_MASK, RK3576_8BPC),
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RK3576_COLOR_DEPTH_MASK);
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+ if (state->output_mode == ROCKCHIP_OUT_MODE_YUV420)
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+ val |= FIELD_PREP_WM16(RK3576_COLOR_FORMAT_MASK, RK3576_YUV420);
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+ else
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+ val |= FIELD_PREP_WM16(RK3576_COLOR_FORMAT_MASK, RK3576_RGB);
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+
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regmap_write(hdmi->vo_regmap, RK3576_VO0_GRF_SOC_CON8, val);
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}
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@@ -418,6 +437,11 @@ static void dw_hdmi_qp_rk3588_enc_init(struct rockchip_hdmi_qp *hdmi,
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val = HIWORD_UPDATE(FIELD_PREP(RK3588_COLOR_DEPTH_MASK, RK3588_8BPC),
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RK3588_COLOR_DEPTH_MASK);
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+ if (state->output_mode == ROCKCHIP_OUT_MODE_YUV420)
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+ val |= FIELD_PREP_WM16(RK3588_COLOR_FORMAT_MASK, RK3588_YUV420);
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+ else
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+ val |= FIELD_PREP_WM16(RK3588_COLOR_FORMAT_MASK, RK3588_RGB);
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+
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regmap_write(hdmi->vo_regmap,
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hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
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val);
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@@ -526,6 +550,8 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
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plat_data.phy_ops = cfg->phy_ops;
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plat_data.phy_data = hdmi;
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+ plat_data.supported_formats = BIT(HDMI_COLORSPACE_RGB) |
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+ BIT(HDMI_COLORSPACE_YUV420);
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plat_data.max_bpc = 10;
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encoder = &hdmi->encoder.encoder;
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--
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2.34.1
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