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build/patch/kernel/archive/rk3568-odroid-6.3/overlays-00-add-odroid-buses.patch

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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Joao Assuncao <joao@joaoassuncao.com>
Date: Sun, 12 Feb 2023 21:20:35 +0100
Subject: [ARCHEOLOGY] Adds SPI, I2C, and PWM DTS overlays for odroid-m1
(#4825)
> X-Git-Archeology: > recovered message: > Adds i2c3, pwm1, pwdm2, spi0 and uart1 nodes to rk3568-odroid-m1.dts.
> X-Git-Archeology: > recovered message: > Adds patch to remove spi-dev warning
> X-Git-Archeology: > recovered message: > Adds patch with support for overlay compilation
> X-Git-Archeology: > recovered message: > Adds DTS overlays for spi, uart0, uart1, pwm1, pwm2, pwm9, i2c0 and i2c1
> X-Git-Archeology: > recovered message: > Co-authored-by: jassuncao <joao.assuncao@exploitsys.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +
arch/arm64/boot/dts/rockchip/overlay/Makefile | 23 ++++
arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays | 69 ++++++++++
arch/arm64/boot/dts/rockchip/overlay/rockchip-fixup.scr-cmd | 7 +
arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c0.dts | 14 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c1.dts | 12 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm1.dts | 13 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm2.dts | 13 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm9.dts | 13 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-spi-spidev.dts | 22 +++
arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0-rts_cts.dts | 14 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0.dts | 13 ++
arch/arm64/boot/dts/rockchip/overlay/rockchip-uart1.dts | 15 ++
scripts/Makefile.lib | 3 +
14 files changed, 233 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 99a44c400d6a..984290dbdf0f 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -91,3 +91,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
+
+subdir-y := $(dts-dirs) overlay
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
new file mode 100644
index 000000000000..9c5a73e002f2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rockchip-spi-spidev.dtbo \
+ rockchip-uart0.dtbo \
+ rockchip-uart0-rts_cts.dtbo \
+ rockchip-uart1.dtbo \
+ rockchip-pwm1.dtbo \
+ rockchip-pwm2.dtbo \
+ rockchip-pwm9.dtbo \
+ rockchip-i2c0.dtbo \
+ rockchip-i2c1.dtbo
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+ rockchip-fixup.scr
+
+dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
+ README.rockchip-overlays
+
+targets += $(dtbo-y) $(scr-y) $(dtbotxt-y)
+
+always := $(dtbo-y) $(scr-y) $(dtbotxt-y)
+clean-files := *.dtbo *.scr
+
diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
new file mode 100644
index 000000000000..6f0b30acb674
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
@@ -0,0 +1,69 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
+
+### Platform:
+
+rockchip (Rockchip)
+
+### Provided overlays:
+
+- i2c0, i2c1, spi-spidev, uart0, uart1, pwm1, pwm2, pwm9
+
+### Overlay details:
+
+### i2c0
+
+Activates TWI/I2C bus I2C3 but it will be named as I2C0 on the userspace
+
+I2C3/I2C0 pins (SCL, SDA): GPIO3B.5, GPIO3B.6
+
+### i2c1
+
+Activates TWI/I2C bus I2C1
+
+I2C1 pins (SCL, SDA): GPIO0B.3, GPIO0B.4
+
+### spi-spidev
+
+Activates SPIdev device node (/dev/spidev0.0) for userspace SPI access,
+
+SPI 0 pins (MOSI, MISO, SCK, CS): GPIO2D.1, GPIO2D.0, GPIO2D.3, GPIO2D.2
+
+Parameters:
+
+param_spidev_max_freq (int)
+ Maximum SPIdev frequency
+ Optional
+ Default: 1000000
+ Range: 3000 - 100000000
+
+### uart0
+
+Activates UART0 (alias to serial1)
+
+UART0 pins (RX, TX): GPIO3D.7, GPIO3D.6
+
+### uart1
+
+Activates UART1 (alias to serial0)
+
+UART1 pins (RX, TX): GPIO0C.0, GPIO0C.1
+
+### pwm1
+
+Activates PWM1 (pwm1_m1)
+
+PWM1 pins: GPIO0B.5
+
+### pwm2
+
+Activates PWM2 (pwm2_m1)
+
+PWM2 pins: GPIO0B.6
+
+### pwm9
+
+Activates PWM9 (pwm9_m0)
+
+PWM9 pins: GPIO3B.2
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-fixup.scr-cmd b/arch/arm64/boot/dts/rockchip/overlay/rockchip-fixup.scr-cmd
new file mode 100644
index 000000000000..3bde2523b698
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-fixup.scr-cmd
@@ -0,0 +1,7 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
+if test -n "${param_spidev_max_freq}"; then
+ fdt set /spi@fe610000/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+fi
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c0.dts
new file mode 100644
index 000000000000..a6942df06650
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // i2c3 aliased with i2c0.
+ // This activates i2c3 but it will be named as i2c0 on the userspace.
+ target = <&i2c3>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c1.dts
new file mode 100644
index 000000000000..344161c2d6db
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-i2c1.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm1.dts
new file mode 100644
index 000000000000..0b78ad96ba8b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // pwmchip0, pwm@fdd70010
+ target = <&pwm1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm2.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm2.dts
new file mode 100644
index 000000000000..c7f1898e5903
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm2.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // pwmchip1, pwm@fdd70020
+ target = <&pwm2>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm9.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm9.dts
new file mode 100644
index 000000000000..7f52929e787c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-pwm9.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // pwmchip3, pwm@fe6f0010
+ target = <&pwm9>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-spi-spidev.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-spi-spidev.dts
new file mode 100644
index 000000000000..f25e855704ec
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-spi-spidev.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&spi0>;
+
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spidev: spidev@0 {
+ status = "okay";
+ compatible = "armbian,spi-dev";
+ reg = <0>;
+ /* spi default max clock 100Mhz */
+ spi-max-frequency = <100000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0-rts_cts.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0-rts_cts.dts
new file mode 100644
index 000000000000..fb855965f9ae
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0-rts_cts.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // uart1 aliased with serial0.
+ target = <&uart1>;
+
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "not_use_it", "default";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0.dts
new file mode 100644
index 000000000000..e57ba5499820
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart0.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // uart1 aliased with serial0.
+ target = <&uart1>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart1.dts
new file mode 100644
index 000000000000..cdc75c4f2873
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-uart1.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ // uart0 aliased with serial1.
+ target = <&uart0>;
+
+ __overlay__ {
+ status = "okay";
+
+ dma-names = "tx", "rx";
+ };
+ };
+};
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 1680499136ee..4f4a55341f45 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -88,6 +88,9 @@ base-dtb-y := $(foreach m, $(multi-dtb-y), $(firstword $(call suffix-search, $m,
always-y += $(dtb-y)
+# Overlay targets
+extra-y += $(dtbo-y) $(scr-y) $(dtbotxt-y)
+
# Add subdir path
ifneq ($(obj),.)
--
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