Files
build/patch/kernel/archive/sunxi-6.16/patches.megous/arm64-dts-rockchip-rk356x-Fix-PCIe-register-map-and-ranges.patch
2025-09-21 20:09:24 +02:00

48 lines
1.8 KiB
Diff

From fb9e2ab89fa45ece10369840291cb8ac2813c5d9 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Sat, 24 Sep 2022 21:59:07 +0200
Subject: arm64: dts: rockchip: rk356x: Fix PCIe register map and ranges
I have two Realtek PCIe wifi cards connected over the 4 port PCIe bridge
to Quartz64-A. The cards fail to work, when nvme SSD is connected at the
same time to the bridge. Without nvme connected, cards work fine. The
issue seems to be related to mixed use of devices which make use of I/O
ranges and memory ranges.
This patch changes I/O, MEM and config mappings so that config and I/O
mappings use the 0xf4000000 outbound address space, and MEM range uses
the whole 0x300000000 outbound space.
These values were suggested by pgwipeout:
https://lore.kernel.org/lkml/875ygbsrf3.fsf@bloch.sibelius.xs4all.nl/T/#m84b5f6992cc26dffe0d3783c0d8c9c86e5e10c10
This is identical to how BSP does the mappings.
This change to the regs/ranges makes the issue go away and both nvme and
wifi cards work when connected at the same time to the bridge. I tested
the nvme with large amount of reads/writes, both behind the PCIe bridge
and when directly connected to Quartz64-A board.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index fd2214b6fad4..53d7bd65f9e6 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -966,7 +966,7 @@ pcie2x1: pcie@fe260000 {
<0 0 0 4 &pcie_intc 3>;
linux,pci-domain = <0>;
num-ib-windows = <6>;
- num-ob-windows = <2>;
+ num-ob-windows = <8>;
max-link-speed = <2>;
msi-map = <0x0 &its 0x0 0x1000>;
num-lanes = <1>;
--
2.51.0