JDM170/build
1
0
Fork 0
mirror of https://github.com/armbian/build synced 2025-09-24 19:47:06 +07:00
Code Issues Packages Projects Releases Wiki Activity
Files
96e1ca9e5061927475d4e77f9139b4122b79fab6
build/patch/kernel/archive/sunxi-6.12/patches.armbian/arm64-allwinner-Add-sun50i-h618-bananapi-m4-berry-support.patch

552 lines
12 KiB
Diff
Raw Blame History

From 9d796d662d26f23446739ce19e838a17b218b2fc Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 10 Feb 2025 13:34:14 +0300
Subject: [PATCH] arm64: allwinner: Add sun50i-h618-bananapi-m4-berry support
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 54 ++-
.../sun50i-h618-bananapi-m4-berry.dts | 432 ++++++++++++++++++
3 files changed, 482 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index a676c57aad1d..a34f2dbcc9b4 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -59,6 +59,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-emmc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-berry.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-zero.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index e3659fb52dea..edb01fbbd2a1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -388,6 +388,12 @@ i2c2_pi_pins: i2c2-pi-pins {
function = "i2c2";
};
+ i2c3_pa_pins: i2c3-pa-pins {
+ pins = "PA10", "PA11";
+ function = "i2c3";
+ bias-pull-up;
+ };
+
/omit-if-no-ref/
i2c3_pg_pins: i2c3-pg-pins {
pins = "PG17", "PG18";
@@ -443,6 +449,48 @@ mmc2_pins: mmc2-pins {
bias-pull-up;
};
+ /omit-if-no-ref/
+ pwm1_pg_pin: pwm1-pg-pin {
+ pins = "PG19";
+ function = "pwm1";
+ };
+
+ /omit-if-no-ref/
+ pwm1_ph_pin: pwm1-ph-pin {
+ pins = "PH3";
+ function = "pwm1";
+ };
+
+ /omit-if-no-ref/
+ pwm1_pi_pin: pwm1-pi-pin {
+ pins = "PI11";
+ function = "pwm1";
+ };
+
+ /omit-if-no-ref/
+ pwm2_ph_pin: pwm2-ph-pin {
+ pins = "PH2";
+ function = "pwm2";
+ };
+
+ /omit-if-no-ref/
+ pwm3_ph_pin: pwm3-ph-pin {
+ pins = "PH0";
+ function = "pwm3";
+ };
+
+ /omit-if-no-ref/
+ pwm4_ph_pin: pwm4-ph-pin {
+ pins = "PH1";
+ function = "pwm4";
+ };
+
+ pwm5_pin: pwm5-pin {
+ pins = "PA12";
+ function = "pwm5";
+ bias-pull-up;
+ };
+
/omit-if-no-ref/
spi0_pins: spi0-pins {
pins = "PC0", "PC2", "PC4";
@@ -860,10 +908,6 @@ emac1: ethernet@5030000 {
pinctrl-names = "default";
tx-delay = <7>;
rx-delay = <31>;
- phy-rst;
- gmac-power0;
- gmac-power1;
- gmac-power2;
status = "disabled";
mdio1: mdio {
@@ -922,7 +966,7 @@ lradc: lradc@5070800 {
status = "disabled";
};
- codec: codec@05096000 {
+ codec: codec@5096000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h616-codec";
reg = <0x05096000 0x31c>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
new file mode 100644
index 000000000000..6dcb0b4b9eef
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts
@@ -0,0 +1,432 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
+#include "axp313a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "BananaPi M4 Berry";
+ compatible = "BiPai,bananapi-m4berry", "allwinner,sun50i-h616";
+
+ aliases {
+ ethernet0 = &emac0;
+ ethernet1 = &emac1;
+ serial0 = &uart0;
+ serial5 = &uart5;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "red_led";
+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-sw3 {
+ label = "sw3";
+ linux,code = <BTN_0>;
+ gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
+ };
+ };
+
+ wifi_usb {
+ compatible = "usb-wifi";
+ status = "okay";
+ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_usb_vbus: regulator-usb-vbus {
+ /* separate discrete regulator for the USB ports */
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&reg_vcc5v>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ /* SY8089 DC/DC converter */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&reg_dldo1>;
+ regulator-always-on;
+ };
+
+ reg_vcc1v8: vcc1v8 {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_aldo1>;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc5v>;
+ };
+
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ // pwm5 period_ns = 500 > 334 for select 24M clock.
+ pwms = <&pwm 5 500 0>;
+ clock-frequency = <2000000>;
+ status = "okay";
+ };
+
+ soc {
+ pwm: pwm@300a000 {
+ compatible = "allwinner,sun50i-h616-pwm";
+ reg = <0x0300a000 0x400>;
+ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
+ clock-names = "mod", "bus";
+ resets = <&ccu RST_BUS_PWM>;
+ pwm-number = <6>;
+ pwm-base = <0x0>;
+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>,
+ <&pwm3>, <&pwm4>, <&pwm5>;
+ #pwm-cells = <3>;
+ status = "okay";
+ };
+
+ pwm0: pwm0@0300a000 {
+ compatible = "allwinner,sunxi-pwm0";
+ pinctrl-names = "default";
+ };
+
+ pwm1: pwm1@0300a000 {
+ compatible = "allwinner,sunxi-pwm1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_ph_pin>;
+ };
+
+ pwm2: pwm2@0300a000 {
+ compatible = "allwinner,sunxi-pwm2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_ph_pin>;
+ };
+
+ pwm3: pwm3@0300a000 {
+ compatible = "allwinner,sunxi-pwm3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_ph_pin>;
+ };
+
+ pwm4: pwm4@0300a000 {
+ compatible = "allwinner,sunxi-pwm4";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_ph_pin>;
+ };
+
+ pwm5: pwm5@0300a000 {
+ compatible = "allwinner,sunxi-pwm5";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm5_pin>;
+ clk_bypass_output = <0x1>;
+ status = "okay";
+ };
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_dcdc2>;
+ status = "okay";
+};
+
+&sid {
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
+};
+
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_aldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&gpu {
+ mali-supply = <&reg_dcdc1>;
+ status = "disabled";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_dldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dldo1>;
+ bus-width = <8>;
+ max-frequency = <150000000>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <&reg_aldo1>;
+ vcc-pf-supply = <&reg_dldo1>;
+ vcc-pg-supply = <&reg_dldo1>;
+ vcc-ph-supply = <&reg_dldo1>;
+ vcc-pi-supply = <&reg_dldo1>;
+};
+
+&emac0 {
+ compatible = "allwinner,sun50i-h616-emac0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-io-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&emac1 {
+ compatible = "allwinner,sunxi-gmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ phy-rst;
+ gmac-power0;
+ gmac-power1;
+ gmac-power2;
+ status = "disabled";
+};
+
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ /*
+ * PHY0 pins are connected to a USB-C socket, but a role switch
+ * is not implemented: both CC pins are pulled to GND.
+ * The VBUS pins power the device, so a fixed peripheral mode
+ * is the best choice.
+ * The board can be powered via GPIOs, in this case port0 *can*
+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
+ * then provided by the GPIOs. Any user of this setup would
+ * need to adjust the DT accordingly: dr_mode set to "host",
+ * enabling OHCI0 and EHCI0.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <&reg_usb_vbus>;
+ status = "okay";
+};
+
+&ehci0 {
+ status = "disabled";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "disabled";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_rx_pin>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "disabled";
+};
+
+&i2c2 {
+ status = "disabled";
+};
+
+&i2c3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pa_pins>;
+
+ ac200_x: mfd@10 {
+ compatible = "x-powers,ac200-sunxi";
+ reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
+ // ephy id
+ nvmem-cells = <&ephy_calibration>;
+ nvmem-cell-names = "calibration";
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy-sunxi";
+ status = "okay";
+ };
+ };
+};
+
+&i2c4 {
+ status = "disabled";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_ph_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+ status = "disabled";
+};
+
+&spi1 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>;
+
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT";
+ status = "okay";
+};
+
+&ahub_dam_plat {
+ status = "okay";
+};
+
+&ahub1_plat {
+ status = "okay";
+};
+
+&ahub1_mach {
+ status = "okay";
+};
+
+/*
+&ahub_i2s2 {
+ status = "okay";
+};
+*/
--
2.35.3
Reference in New Issue View Git Blame Copy Permalink