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https://github.com/armbian/build
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115 lines
3.0 KiB
Diff
115 lines
3.0 KiB
Diff
From c80bdda0d87a7119152d95f7943212fc8265e104 Mon Sep 17 00:00:00 2001
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From: John Doe <john.doe@somewhere.on.planet>
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Date: Sat, 30 Aug 2025 14:20:24 +0800
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Subject: [PATCH 1/3] Patching NanoPi-R3S LEDs
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Signed-off-by: retro98boy <retro98boy@qq.com>
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---
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.../boot/dts/rockchip/rk3566-nanopi-r3s.dts | 41 ++++++++++++++-----
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1 file changed, 31 insertions(+), 10 deletions(-)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
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index fb1f65c86..553a9e599 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
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@@ -52,19 +52,21 @@ power_led: led-0 {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_POWER;
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gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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- default-state = "on";
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+ linux,default-trigger = "heartbeat";
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};
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lan_led: led-1 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "r8169-0-100:00:link";
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};
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wan_led: led-2 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "stmmac-0:01:link";
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};
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};
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@@ -137,18 +139,27 @@ &cpu3 {
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};
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&gmac1 {
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+ phy-mode = "rgmii";
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+ clock_in_out = "output";
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+
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+ snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 15ms, 50ms for rtl8211f */
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+ snps,reset-delays-us = <0 15000 50000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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- clock_in_out = "output";
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- phy-mode = "rgmii-id";
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- phy-handle = <&rgmii_phy1>;
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+
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m0_miim
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&gmac1m0_tx_bus2_level3
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&gmac1m0_rx_bus2
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&gmac1m0_rgmii_clk_level2
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&gmac1m0_rgmii_bus_level3>;
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+ tx_delay = <0x3c>;
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+ rx_delay = <0x2f>;
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+
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+ phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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@@ -409,10 +420,8 @@ rgmii_phy1: ethernet-phy@1 {
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interrupt-parent = <&gpio4>;
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interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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- pinctrl-0 = <ð_phy_reset_pin>;
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- reset-assert-us = <20000>;
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- reset-deassert-us = <100000>;
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- reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
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+ pinctrl-0 = <&gmac_int>;
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+ realtek,led-data = <0xae00>;
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};
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};
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@@ -421,6 +430,18 @@ &pcie2x1 {
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pinctrl-0 = <&pcie_reset_h>;
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reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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+
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+ pcie@0,0 {
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+ reg = <0x00000000 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+
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+ r8169: pcie@1,0 {
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+ reg = <0x000000 0 0 0 0>;
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+ local-mac-address = [ 00 00 00 00 00 00 ];
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+ realtek,led-data = <0x870>;
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+ };
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+ };
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};
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&pinctrl {
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@@ -439,8 +460,8 @@ wan_led_pin: wan-led-pin {
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};
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gmac {
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- eth_phy_reset_pin: eth-phy-reset-pin {
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- rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
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+ gmac_int: gmac-int {
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+ rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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--
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2.51.0
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