mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
Legacy: use TAG instead of BRANCH (gives us more control) Current: update DTS files Current: add needed patches up to v1.0.8 Fixup bluetooth node and disable by default (half broke anyway) Misc fixups to bananapif3.wip and spacemit.conf file Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
1118 lines
25 KiB
Plaintext
1118 lines
25 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2023 Spacemit, Inc */
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/dts-v1/;
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#include "k1-x.dtsi"
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#include "k1-x-efuse.dtsi"
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#include "k1-x_pinctrl.dtsi"
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#include "lcd_gx09inx101_mipi.dtsi"
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#include "k1-x-hdmi.dtsi"
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#include "k1-x-lcd.dtsi"
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#include "k1-x-camera-sdk.dtsi"
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#include "k1-x_opp_table.dtsi"
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/ {
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model = "spacemit k1-x deb1 board";
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modules_usrload = "8852bs";
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cpus: cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <24000000>;
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cpu_0: cpu@0 {
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cpu-ai = "true";
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};
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cpu_1: cpu@1 {
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cpu-ai = "true";
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};
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cpu_2: cpu@2 {
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reg = <2>;
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cpu-ai = "true";
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};
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cpu_3: cpu@3 {
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reg = <3>;
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cpu-ai = "true";
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu_0>;
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};
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core1 {
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cpu = <&cpu_1>;
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};
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core2 {
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cpu = <&cpu_2>;
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};
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core3 {
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cpu = <&cpu_3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu_4>;
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};
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core1 {
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cpu = <&cpu_5>;
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};
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core2 {
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cpu = <&cpu_6>;
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};
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core3 {
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cpu = <&cpu_7>;
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};
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};
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x0 0x80000000>;
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};
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memory@100000000 {
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device_type = "memory";
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reg = <0x1 0x00000000 0x0 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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/* alloc memory from 0x40000000~0x80000000 */
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alloc-ranges = <0 0x40000000 0 0x40000000>;
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/* size of cma buffer is 384MByte */
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size = <0 0x18000000>;
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/* start address is 1Mbyte aligned */
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alignment = <0x0 0x100000>;
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linux,cma-default;
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/* besides hardware, dma for ex. buffer can be used by memory management */
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reusable;
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};
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/* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */
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dpu_resv: dpu_reserved@2ff40000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x2ff40000 0x0 0x000C0000>;
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no-map;
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};
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};
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chosen {
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bootargs = "earlycon=sbi console=ttyS0,115200n8 debug loglevel=8 swiotlb=65536 rdinit=/init";
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stdout-path = "serial0:115200n8";
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc4v0_baseboard: vcc4v0-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc4v0_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <4000000>;
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regulator-max-microvolt = <4000000>;
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vin-supply = <&dc_12v>;
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};
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rf_pwrseq: rf-pwrseq {
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compatible = "spacemit,rf-pwrseq";
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//vdd-supply = <&ldo_7>;
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//vdd_voltage = <3300000>;
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io-supply = <&dcdc_3>;
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io_voltage = <1800000>;
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pwr-gpios = <&gpio 67 0>;
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status = "okay";
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wlan_pwrseq: wlan-pwrseq {
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compatible = "spacemit,wlan-pwrseq";
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regon-gpios = <&gpio 116 0>;
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interrupt-parent = <&pinctrl>;
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interrupts = <268>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wlan_wakeup>;
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};
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bt_pwrseq: bt-pwrseq {
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compatible = "spacemit,bt-pwrseq";
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reset-gpios = <&gpio 63 0>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "sys-led";
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gpios = <&gpio 96 0>;
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linux,default-trigger = "heartbeat";
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default-state = "on";
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status = "okay";
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};
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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pwms = <&rpwm2 10000>;
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#cooling-cells = <2>;
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cooling-levels = <0 64 128 192 255>;
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status = "okay";
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0_2>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&pwm14 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm14_1>;
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status = "okay";
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};
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&dpu_online2_dsi {
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memory-region = <&dpu_resv>;
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spacemit-dpu-bitclk = <1000000000>;
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spacemit-dpu-escclk = <76800000>;
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dsi_1v2-supply = <&ldo_5>;
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vin-supply-names = "dsi_1v2";
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status = "disabled";
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};
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&dsi2 {
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status = "disabled";
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panel2: panel2@0 {
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status = "ok";
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compatible = "spacemit,mipi-panel2";
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reg = <0>;
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gpios-reset = <81>;
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gpios-dc = <82 83>;
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id = <2>;
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delay-after-reset = <10>;
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force-attached = "lcd_gx09inx101_mipi";
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};
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};
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&lcds {
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status = "disabled";
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};
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&dpu_online2_hdmi {
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memory-region = <&dpu_resv>;
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status = "okay";
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};
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&hdmi{
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi_0>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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eeprom@50{
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compatible = "atmel,24c02";
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reg = <0x50>;
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#address-cells = <1>;
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#size-cells = <1>;
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power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>;
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status = "disabled";
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mac_address0: mac_address0@0 {
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reg = <0x0 6>;
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};
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mac_address1: mac_address1@6 {
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reg = <0x6 6>;
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};
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};
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es8326: es8326@19{
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compatible = "everest,es8326";
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reg = <0x19>;
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#sound-dai-cells = <0>;
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interrupt-parent = <&gpio>;
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interrupts = <126 1>;
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spk-ctl-gpio = <&gpio 127 0>;
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everest,mic1-src = [44];
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everest,mic2-src = [66];
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status = "okay";
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3_2>;
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status = "disabled";
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4_2>;
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status = "disabled";
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};
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&i2c6 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c6_2>;
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status = "disabled";
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gt9xx@5d {
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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reset-gpios = <&gpio 114 GPIO_ACTIVE_HIGH>;
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irq-gpios = <&gpio 58 GPIO_ACTIVE_HIGH>;
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irq-flags = <2>;
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touchscreen-max-id = <11>;
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touchscreen-size-x = <1200>;
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touchscreen-size-y = <1920>;
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touchscreen-max-w = <512>;
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touchscreen-max-p = <512>;
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goodix,int-sync = <1>;
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status = "disabled";
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};
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};
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&i2c7 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c7>;
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status = "disabled";
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};
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&i2c8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c8>;
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status = "okay";
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spm8821@41 {
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compatible = "spacemit,spm8821";
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reg = <0x41>;
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interrupt-parent = <&intc>;
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interrupts = <64>;
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status = "okay";
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vcc_sys-supply = <&vcc4v0_baseboard>;
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dcdc5-supply = <&dcdc_5>;
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regulators {
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compatible = "pmic,regulator,spm8821";
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/* buck */
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dcdc_1: DCDC_REG1 {
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regulator-name = "dcdc1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <650000>;
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};
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};
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dcdc_2: DCDC_REG2 {
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regulator-name = "dcdc2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_3: DCDC_REG3 {
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regulator-name = "dcdc3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1800000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_4: DCDC_REG4 {
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regulator-name = "dcdc4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3300000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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dcdc_5: DCDC_REG5 {
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regulator-name = "dcdc5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_6: DCDC_REG6 {
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regulator-name = "dcdc6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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/* aldo */
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ldo_1: LDO_REG1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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/* set the min voltage means will disable this vol in suspend for ldo */
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_2: LDO_REG2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_3: LDO_REG3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_4: LDO_REG4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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/* dldo */
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ldo_5: LDO_REG5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_6: LDO_REG6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_7: LDO_REG7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_8: LDO_REG8 {
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regulator-name = "ldo8";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_9: LDO_REG9 {
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regulator-name = "ldo9";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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ldo_10: LDO_REG10 {
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regulator-name = "ldo10";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_11: LDO_REG11 {
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regulator-name = "ldo11";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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sw_1: SWITCH_REG1 {
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regulator-name = "switch1";
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};
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};
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pmic_pinctrl: pinctrl {
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compatible = "pmic,pinctrl,spm8821";
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gpio-controller;
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#gpio-cells = <2>;
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spacemit,npins = <6>;
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/**
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* led_pins: led-pins {
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* pins = "PIN3";
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* function = "sleep";
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* bias-disable = <0>;
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* drive-open-drain = <0x1>;
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* };
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*/
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};
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pwr_key: key {
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compatible = "pmic,pwrkey,spm8821";
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};
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ext_rtc: rtc {
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compatible = "pmic,rtc,spm8821";
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};
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};
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};
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&pinctrl {
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pinctrl-single,gpio-range = <
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&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
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&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
|
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
|
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
|
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
&range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
|
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
|
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
|
>;
|
|
|
|
pinctrl_rcpu: pinctrl_rcpu_grp {
|
|
pinctrl-single,pins = <
|
|
K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_tx */
|
|
K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_rx */
|
|
>;
|
|
};
|
|
|
|
pinctrl_gmac0: gmac0_grp {
|
|
pinctrl-single,pins =<
|
|
K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */
|
|
K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */
|
|
K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */
|
|
K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */
|
|
K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */
|
|
K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */
|
|
K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */
|
|
K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */
|
|
K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */
|
|
K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */
|
|
K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */
|
|
K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */
|
|
K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */
|
|
K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */
|
|
K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */
|
|
K1X_PADCONF(GPIO_45, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_clk_ref */
|
|
>;
|
|
};
|
|
|
|
pinctrl_gmac1: gmac1_grp {
|
|
pinctrl-single,pins =<
|
|
K1X_PADCONF(GPIO_29, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rxdv */
|
|
K1X_PADCONF(GPIO_30, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d0 */
|
|
K1X_PADCONF(GPIO_31, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d1 */
|
|
K1X_PADCONF(GPIO_32, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_clk */
|
|
K1X_PADCONF(GPIO_33, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d2 */
|
|
K1X_PADCONF(GPIO_34, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d3 */
|
|
K1X_PADCONF(GPIO_35, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d0 */
|
|
K1X_PADCONF(GPIO_36, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d1 */
|
|
K1X_PADCONF(GPIO_37, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_tx */
|
|
K1X_PADCONF(GPIO_38, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d2 */
|
|
K1X_PADCONF(GPIO_39, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d3 */
|
|
K1X_PADCONF(GPIO_40, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_en */
|
|
K1X_PADCONF(GPIO_41, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdc */
|
|
K1X_PADCONF(GPIO_42, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdio */
|
|
K1X_PADCONF(GPIO_43, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_int_n */
|
|
K1X_PADCONF(GPIO_46, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_clk_ref */
|
|
>;
|
|
};
|
|
|
|
pinctrl_wlan_wakeup: wlan_wakeup_grp {
|
|
pinctrl-single,pins =<
|
|
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_FALL | PULL_DOWN | PAD_3V_DS2)) /* wifi edge detect */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&gpio{
|
|
gpio-ranges = <
|
|
&pinctrl 49 GPIO_49 2
|
|
&pinctrl 58 GPIO_58 1
|
|
&pinctrl 63 GPIO_63 3
|
|
&pinctrl 67 GPIO_67 1
|
|
&pinctrl 70 PRI_TDI 4
|
|
&pinctrl 74 GPIO_74 1
|
|
&pinctrl 80 GPIO_80 4
|
|
&pinctrl 90 GPIO_90 3
|
|
&pinctrl 96 DVL0 2
|
|
&pinctrl 110 GPIO_110 1
|
|
&pinctrl 111 GPIO_111 1
|
|
&pinctrl 113 GPIO_113 1
|
|
&pinctrl 114 GPIO_114 3
|
|
&pinctrl 118 GPIO_118 1
|
|
&pinctrl 123 GPIO_123 5
|
|
>;
|
|
};
|
|
|
|
/* SD */
|
|
&sdhci0 {
|
|
pinctrl-names = "default","fast";
|
|
pinctrl-0 = <&pinctrl_mmc1>;
|
|
pinctrl-1 = <&pinctrl_mmc1_fast>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio 80 0>;
|
|
cd-inverted;
|
|
vmmc-supply = <&dcdc_4>;
|
|
vqmmc-supply = <&ldo_1>;
|
|
no-mmc;
|
|
no-sdio;
|
|
spacemit,sdh-host-caps-disable = <(
|
|
MMC_CAP_UHS_SDR12 |
|
|
MMC_CAP_UHS_SDR25
|
|
)>;
|
|
spacemit,sdh-quirks = <(
|
|
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
|
SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
|
|
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
|
)>;
|
|
spacemit,sdh-quirks2 = <(
|
|
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
|
SDHCI_QUIRK2_BROKEN_PHY_MODULE |
|
|
SDHCI_QUIRK2_SET_AIB_MMC
|
|
)>;
|
|
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
|
|
spacemit,apbc_asfar_reg = <0xD4015050>;
|
|
spacemit,apbc_assar_reg = <0xD4015054>;
|
|
spacemit,rx_dline_reg = <0x0>;
|
|
spacemit,tx_dline_reg = <0x0>;
|
|
spacemit,tx_delaycode = <0x7f>;
|
|
spacemit,rx_tuning_limit = <50>;
|
|
spacemit,sdh-freq = <204800000>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* SDIO */
|
|
&sdhci1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_mmc2>;
|
|
bus-width = <4>;
|
|
non-removable;
|
|
vqmmc-supply = <&dcdc_3>;
|
|
no-mmc;
|
|
no-sd;
|
|
keep-power-in-suspend;
|
|
/* bcmdhd use private oob solution rather than dat1/standard wakeup */
|
|
/delete-property/ enable-sdio-wakeup;
|
|
spacemit,sdh-host-caps-disable = <(
|
|
MMC_CAP_UHS_DDR50 |
|
|
MMC_CAP_NEEDS_POLL
|
|
)>;
|
|
spacemit,sdh-quirks = <(
|
|
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
|
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
|
)>;
|
|
spacemit,sdh-quirks2 = <(
|
|
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
|
|
SDHCI_QUIRK2_BROKEN_PHY_MODULE
|
|
)>;
|
|
spacemit,rx_dline_reg = <0x0>;
|
|
spacemit,rx_tuning_limit = <50>;
|
|
spacemit,sdh-freq = <375000000>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* eMMC */
|
|
&sdhci2 {
|
|
bus-width = <8>;
|
|
non-removable;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
no-sd;
|
|
no-sdio;
|
|
spacemit,sdh-quirks = <(
|
|
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
|
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
|
)>;
|
|
spacemit,sdh-quirks2 = <(
|
|
SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
|
)>;
|
|
spacemit,sdh-freq = <375000000>;
|
|
status = "okay";
|
|
};
|
|
|
|
ð0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gmac0>;
|
|
|
|
emac,reset-gpio = <&gpio 110 0>;
|
|
emac,reset-active-low;
|
|
emac,reset-delays-us = <0 10000 100000>;
|
|
|
|
/* store forward mode */
|
|
tx-threshold = <1518>;
|
|
rx-threshold = <12>;
|
|
tx-ring-num = <1024>;
|
|
rx-ring-num = <1024>;
|
|
dma-burst-len = <5>;
|
|
|
|
ref-clock-from-phy;
|
|
|
|
clk-tuning-enable;
|
|
clk-tuning-by-delayline;
|
|
tx-phase = <60>;
|
|
rx-phase = <73>;
|
|
|
|
nvmem-cells = <&mac_address0>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
phy-handle = <&rgmii0>;
|
|
|
|
status = "okay";
|
|
|
|
mdio-bus {
|
|
#address-cells = <0x1>;
|
|
#size-cells = <0x0>;
|
|
rgmii0: phy@0 {
|
|
compatible = "ethernet-phy-id001c.c916";
|
|
device_type = "ethernet-phy";
|
|
reg = <0x1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
ð1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gmac1>;
|
|
|
|
emac,reset-gpio = <&gpio 115 0>;
|
|
emac,reset-active-low;
|
|
emac,reset-delays-us = <0 10000 100000>;
|
|
|
|
/* store forward mode */
|
|
tx-threshold = <1518>;
|
|
rx-threshold = <12>;
|
|
tx-ring-num = <1024>;
|
|
rx-ring-num = <1024>;
|
|
dma-burst-len = <5>;
|
|
|
|
ref-clock-from-phy;
|
|
|
|
clk-tuning-enable;
|
|
clk-tuning-by-delayline;
|
|
tx-phase = <90>;
|
|
rx-phase = <73>;
|
|
nvmem-cells = <&mac_address1>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
phy-handle = <&rgmii1>;
|
|
|
|
status = "okay";
|
|
|
|
mdio-bus {
|
|
#address-cells = <0x1>;
|
|
#size-cells = <0x0>;
|
|
rgmii1: phy@1 {
|
|
compatible = "ethernet-phy-id001c.c916";
|
|
device_type = "ethernet-phy";
|
|
reg = <0x1>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&usbphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&udc {
|
|
/*spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
|
spacemit,extern-attr = <MV_USB_HAS_VBUS_IDPIN_DETECTION>;*/
|
|
spacemit,udc-mode = <MV_USB_MODE_UDC>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ehci1 {
|
|
spacemit,reset-on-resume;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&combphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3hub {
|
|
hub-gpios = <
|
|
&gpio 123 0 /* usb3 hub en */
|
|
&gpio 124 0>; /* usb3 hub rst*/
|
|
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3 {
|
|
status = "okay";
|
|
reset-on-resume;
|
|
dwc3@c0a00000 {
|
|
dr_mode = "host";
|
|
phy_type = "utmi";
|
|
snps,hsphy_interface = "utmi";
|
|
snps,dis_enblslpm_quirk;
|
|
snps,dis_u2_susphy_quirk;
|
|
snps,dis_u3_susphy_quirk;
|
|
snps,dis-del-phy-power-chg-quirk;
|
|
snps,dis-tx-ipgap-linecheck-quirk;
|
|
snps,parkmode-disable-ss-quirk;
|
|
};
|
|
};
|
|
|
|
&pcie1_rc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie1_3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie2_rc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie2_4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&imggpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&qspi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_qspi>;
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <26500000>;
|
|
m25p,fast-read;
|
|
broken-flash-reset;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&pwm_bl {
|
|
pwms = <&pwm14 2000>;
|
|
brightness-levels = <
|
|
0 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
|
|
40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
|
|
40 40 40 40 40 40 40 40 40 41 42 43 44 45 46 47
|
|
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
|
|
64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
|
|
80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
|
|
96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
|
|
112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127
|
|
128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
|
|
144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
|
|
160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175
|
|
176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191
|
|
192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207
|
|
208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
|
|
224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239
|
|
240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255
|
|
>;
|
|
default-brightness-level = <100>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
/* ov16a10 */
|
|
&backsensor {
|
|
af_2v8-supply = <&ldo_3>;
|
|
avdd_2v8-supply = <&ldo_2>;
|
|
dovdd_1v8-supply = <&ldo_7>;
|
|
dvdd_1v2-supply = <&ldo_6>;
|
|
|
|
pwdn-gpios = <&gpio 113 0>;
|
|
reset-gpios = <&gpio 111 0>;
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&backsensor_aux {
|
|
avdd_2v8-supply = <&ldo_2>;
|
|
dovdd_1v8-supply = <&ldo_7>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
&frontsensor {
|
|
af_2v8-supply = <&ldo_3>;
|
|
avdd_2v8-supply = <&ldo_2>;
|
|
dovdd_1v8-supply = <&ldo_7>;
|
|
dvdd_1v2-supply = <&ldo_6>;
|
|
|
|
clocks = <&ccu CLK_CAMM1>;
|
|
clock-names = "cam_mclk1";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_camera1>;
|
|
|
|
pwdn-gpios = <&gpio 114 0>;
|
|
reset-gpios = <&gpio 112 0>;
|
|
|
|
status = "disabled";
|
|
};
|
|
&csiphy0 {
|
|
|
|
status = "okay";
|
|
};
|
|
&csiphy1 {
|
|
|
|
status = "disabled";
|
|
};
|
|
&csiphy2 {
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&ccic0 {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
|
|
status = "okay";
|
|
};
|
|
&ccic1 {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
|
|
status = "okay";
|
|
};
|
|
&ccic2 {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
|
|
status = "okay";
|
|
};
|
|
&isp {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
};
|
|
|
|
&cpp {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
};
|
|
|
|
&vi {
|
|
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
|
|
};
|
|
|
|
&rcpu {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_rcpu>;
|
|
mboxes = <&mailbox 0>, <&mailbox 1>;
|
|
mbox-names = "vq0", "vq1";
|
|
memory-region = <&rcpu_mem_0>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&rsc_table>, <&rcpu_mem_snapshots>;
|
|
status = "okay";
|
|
};
|
|
|
|
&thermal {
|
|
sensor_range = <0x1 0x4>;
|
|
};
|
|
|
|
&thermal_zones {
|
|
top_thermal {
|
|
polling-delay = <0>;
|
|
polling-delay-passive = <0>;
|
|
thermal-sensors = <&thermal 1>;
|
|
|
|
trips {
|
|
top_trip0: top-trip0 {
|
|
temperature = <40000>;
|
|
hysteresis = <5000>;
|
|
type = "passive";
|
|
};
|
|
|
|
top_trip1: top-trip1 {
|
|
temperature = <55000>;
|
|
hysteresis = <5000>;
|
|
type = "passive";
|
|
};
|
|
|
|
top_trip2: top-trip2 {
|
|
temperature = <70000>;
|
|
hysteresis = <5000>;
|
|
type = "passive";
|
|
};
|
|
|
|
top_trip3: top-trip3 {
|
|
temperature = <85000>;
|
|
hysteresis = <5000>;
|
|
type = "passive";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&top_trip0>;
|
|
cooling-device = <&fan 0 1>;
|
|
};
|
|
|
|
map1 {
|
|
trip = <&top_trip1>;
|
|
cooling-device = <&fan 1 2>;
|
|
};
|
|
|
|
map2 {
|
|
trip = <&top_trip2>;
|
|
cooling-device = <&fan 2 3>;
|
|
};
|
|
|
|
map3 {
|
|
trip = <&top_trip3>;
|
|
cooling-device = <&fan 3 4>;
|
|
};
|
|
};
|
|
};
|
|
|
|
gpu_thermal {
|
|
polling-delay = <0>;
|
|
polling-delay-passive = <0>;
|
|
thermal-sensors = <&thermal 2>;
|
|
|
|
/* Just a placeholder */
|
|
trips {
|
|
gpu_trip0: gpu-trip0 {
|
|
temperature = <40000>;
|
|
hysteresis = <5000>;
|
|
type = "passive";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&cls0_trip2 {
|
|
temperature = <115000>;
|
|
};
|
|
|
|
&cls1_trip2 {
|
|
temperature = <115000>;
|
|
};
|
|
|
|
&i2s0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sspa0_0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sound_hdmi {
|
|
status = "okay";
|
|
};
|
|
|
|
&sound_codec {
|
|
status = "okay";
|
|
simple-audio-card,name = "snd-es8326";
|
|
spacemit,mclk-fs = <64>;
|
|
simple-audio-card,codec {
|
|
sound-dai = <&es8326>;
|
|
};
|
|
};
|
|
|
|
&rpwm2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_rpwm2_0>;
|
|
status = "okay";
|
|
};
|