mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
84 lines
2.9 KiB
Diff
84 lines
2.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
|
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
|
Date: Sun, 14 Mar 2021 04:52:34 +0300
|
|
Subject: drm/msm/dpu1: improve support for active CTLs
|
|
|
|
- Support setting master interface if several INTFs are to be handled by
|
|
a single CTL
|
|
|
|
- Support setting handling several MERGE_3D instances using a single
|
|
CTL.
|
|
|
|
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
|
---
|
|
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 15 ++++++++++
|
|
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 ++
|
|
2 files changed, 17 insertions(+)
|
|
|
|
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
|
|
index 86182c734..4ecffbcdb 100644
|
|
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
|
|
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
|
|
@@ -510,6 +510,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,
|
|
u32 intf_active = 0;
|
|
u32 wb_active = 0;
|
|
u32 mode_sel = 0;
|
|
+ u32 merge_3d_active = 0;
|
|
|
|
/* CTL_TOP[31:28] carries group_id to collate CTL paths
|
|
* per VM. Explicitly disable it until VM support is
|
|
@@ -530,16 +531,30 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,
|
|
if (cfg->wb)
|
|
wb_active |= BIT(cfg->wb - WB_0);
|
|
|
|
+ merge_3d_active = DPU_REG_READ(c, CTL_MERGE_3D_ACTIVE);
|
|
+ if (cfg->merge_3d)
|
|
+ merge_3d_active |= BIT(cfg->merge_3d - MERGE_3D_0);
|
|
+
|
|
DPU_REG_WRITE(c, CTL_TOP, mode_sel);
|
|
DPU_REG_WRITE(c, CTL_INTF_ACTIVE, intf_active);
|
|
DPU_REG_WRITE(c, CTL_WB_ACTIVE, wb_active);
|
|
|
|
+ if (cfg->intf_master)
|
|
+ DPU_REG_WRITE(c, CTL_INTF_MASTER, BIT(cfg->intf_master - INTF_0));
|
|
+
|
|
if (cfg->merge_3d)
|
|
DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE,
|
|
BIT(cfg->merge_3d - MERGE_3D_0));
|
|
|
|
if (cfg->dsc)
|
|
DPU_REG_WRITE(c, CTL_DSC_ACTIVE, cfg->dsc);
|
|
+ if (cfg->merge_3d)
|
|
+ DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active);
|
|
+
|
|
+ if (cfg->intf_master)
|
|
+ DPU_DEBUG_DRIVER("ACTIVE: %x %x %lx\n", intf_active, merge_3d_active, BIT(cfg->intf_master - INTF_0));
|
|
+ else
|
|
+ DPU_DEBUG_DRIVER("ACTIVE: %x %x\n", intf_active, merge_3d_active);
|
|
}
|
|
|
|
static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx,
|
|
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
|
|
index 1c242298f..36dd4e91a 100644
|
|
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
|
|
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
|
|
@@ -36,6 +36,7 @@ struct dpu_hw_stage_cfg {
|
|
/**
|
|
* struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface
|
|
* @intf : Interface id
|
|
+ * @intf_master: Master interface id in the dual pipe topology
|
|
* @mode_3d: 3d mux configuration
|
|
* @merge_3d: 3d merge block used
|
|
* @intf_mode_sel: Interface mode, cmd / vid
|
|
@@ -44,6 +45,7 @@ struct dpu_hw_stage_cfg {
|
|
*/
|
|
struct dpu_hw_intf_cfg {
|
|
enum dpu_intf intf;
|
|
+ enum dpu_intf intf_master;
|
|
enum dpu_wb wb;
|
|
enum dpu_3d_blend_mode mode_3d;
|
|
enum dpu_merge_3d merge_3d;
|
|
--
|
|
Armbian
|
|
|