mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
I have changed the way the patches are generated a bit. Instead of using orange-pi branch from megous tree for 6.6 kernel, I have used the following kernel branches a83t-suspend, af8133j, anx, audio, axp, cam, drm, err, fixes, mbus, modem, opi3, pb, pinetab, pp, ppkb, samuel, speed, tbs-a711, ths These branches were carefully chosen to include only allwinner related patches and remove importing of the rockchip related patches into the allwinner kernel. Following patches are modified to fix patch application failure - patches.armbian/arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch - patches.armbian/arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch - patches.armbian/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch - patches.armbian/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch - patches.armbian/arm64-dts-allwinner-overlay-Add-Overlays-for-sunxi64.patch - patches.armbian/arm64-dts-sun50i-h616-bigtreetech-cb1.patch Following patches are modified because of kernel api change to fix compilation failure - patches.armbian/drv-gpu-drm-sun4i-Add-HDMI-audio-sun4i-hdmi-encoder.patch - patches.armbian/drv-of-Device-Tree-Overlay-ConfigFS-interface.patch
306 lines
9.2 KiB
Diff
306 lines
9.2 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: AGM1968 <AGM1968@users.noreply.github.com>
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Date: Tue, 23 May 2023 16:43:00 +0000
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Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2
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arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
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arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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drivers/cpufreq/cpufreq-dt-platdev.c drivers/cpufreq/sun50i-cpufreq-nvmem.c
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Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
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---
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arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 75 ++++++++
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arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 6 +
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drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
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drivers/cpufreq/sun50i-cpufreq-nvmem.c | 91 +++++++---
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4 files changed, 149 insertions(+), 24 deletions(-)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
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new file mode 100644
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index 000000000000..36f2950367c6
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
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@@ -0,0 +1,75 @@
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+//SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+//Testing Version 1 from: AGM1968 <AGM1968@users.noreply.github.com>
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+//Noted: PLL_CPUX = 24 MHz*N/P (WIP)
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+
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+/ {
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+ cpu_opp_table: opp-table-cpu {
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+ compatible = "allwinner,sun50i-h616-operating-points";
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+ nvmem-cells = <&cpu_speed_grade>;
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+ opp-shared;
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+
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+ opp-480000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <480000000>;
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+ opp-microvolt-speed0 = <820000 820000 1100000>;
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+ opp-microvolt-speed1 = <880000 880000 1100000>;
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+ opp-microvolt-speed2 = <880000 880000 1100000>;
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+ };
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+
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+ opp-600000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt-speed0 = <820000 820000 1100000>;
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+ opp-microvolt-speed1 = <880000 880000 1100000>;
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+ opp-microvolt-speed2 = <880000 880000 1100000>;
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+ };
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+
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+ opp-792000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <792000000>;
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+ opp-microvolt-speed0 = <860000 860000 1100000>;
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+ opp-microvolt-speed1 = <940000 940000 1100000>;
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+ opp-microvolt-speed2 = <940000 940000 1100000>;
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+ };
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+
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+ opp-1008000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1008000000>;
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+ opp-microvolt-speed0 = <900000 900000 1100000>;
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+ opp-microvolt-speed1 = <1020000 1020000 1100000>;
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+ opp-microvolt-speed2 = <1020000 1020000 1100000>;
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+ };
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+
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+ opp-1200000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt-speed0 = <960000 960000 1100000>;
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+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
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+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
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+ };
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+
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+ opp-1512000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1512000000>;
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+ opp-microvolt-speed0 = <1100000 1100000 1100000>;
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+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
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+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu1 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu2 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu3 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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index 8d8009c7f9a3..28b5b1be932f 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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@@ -6,12 +6,18 @@
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/dts-v1/;
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#include "sun50i-h616-orangepi-zero.dtsi"
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+#include "sun50i-h616-cpu-opp.dtsi"
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/ {
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model = "OrangePi Zero2";
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compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
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};
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+&cpu0 {
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+ cpu-supply = <®_dcdca>;
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+ status = "okay";
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+};
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+
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&emac0 {
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phy-supply = <®_dcdce>;
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};
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diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
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index fb2875ce1fdd..e63d36839769 100644
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--- a/drivers/cpufreq/cpufreq-dt-platdev.c
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+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
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@@ -104,6 +104,7 @@ static const struct of_device_id allowlist[] __initconst = {
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*/
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static const struct of_device_id blocklist[] __initconst = {
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{ .compatible = "allwinner,sun50i-h6", },
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+ { .compatible = "allwinner,sun50i-h616", },
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{ .compatible = "apple,arm-platform", },
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diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
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index 6845ab5034ec..5d85bfe475de 100644
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--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
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+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
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@@ -6,6 +6,9 @@
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* provide the OPP framework with required information.
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*
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* Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
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+ *
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+ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist.
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+ * Version 1 AGM1968 <AGM1968@users.noreply.github.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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@@ -20,25 +23,62 @@
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#define MAX_NAME_LEN 7
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-#define NVMEM_MASK 0x7
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-#define NVMEM_SHIFT 5
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+#define SUN50I_H616_NVMEM_MASK 0x22
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+#define SUN50I_H616_NVMEM_SHIFT 5
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+#define SUN50I_H6_NVMEM_MASK 0x7
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+#define SUN50I_H6_NVMEM_SHIFT 5
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+
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+struct sunxi_cpufreq_soc_data {
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+ u32 (*efuse_xlate) (void *efuse);
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+};
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static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
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+static u32 sun50i_h616_efuse_xlate(void *efuse)
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+{
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+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) &
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+ SUN50I_H616_NVMEM_MASK;
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+
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+ /* Tested as V1 h616 soc. Expected efuse values are 1 - 3,
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+ slowest to fastest */
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+ if (efuse_value >=1 && efuse_value <= 3)
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+ return efuse_value - 1;
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+ else
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+ return 0;
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+};
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+
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+static u32 sun50i_h6_efuse_xlate(void *efuse)
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+{
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+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) &
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+ SUN50I_H6_NVMEM_MASK;
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+
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+ /*
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+ * We treat unexpected efuse values as if the SoC was from
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+ * the slowest bin. Expected efuse values are 1 - 3, slowest
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+ * to fastest.
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+ */
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+ if (efuse_value >= 1 && efuse_value <= 3)
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+ return efuse_value - 1;
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+ else
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+ return 0;
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+};
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+
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+
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/**
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* sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
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+ * @soc_data: pointer to sunxi_cpufreq_soc_data context
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* @versions: Set to the value parsed from efuse
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*
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* Returns 0 if success.
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*/
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-static int sun50i_cpufreq_get_efuse(u32 *versions)
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+static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data,
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+ u32 *versions)
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{
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struct nvmem_cell *speedbin_nvmem;
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struct device_node *np;
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struct device *cpu_dev;
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- u32 *speedbin, efuse_value;
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+ u32 *speedbin;
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size_t len;
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- int ret;
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev)
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@@ -47,10 +87,9 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
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np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
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if (!np)
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return -ENOENT;
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-
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- ret = of_device_is_compatible(np,
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- "allwinner,sun50i-h6-operating-points");
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- if (!ret) {
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+ if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {}
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+ else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {}
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+ else {
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of_node_put(np);
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return -ENOENT;
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}
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@@ -66,17 +105,7 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
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if (IS_ERR(speedbin))
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return PTR_ERR(speedbin);
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- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
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-
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- /*
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- * We treat unexpected efuse values as if the SoC was from
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- * the slowest bin. Expected efuse values are 1-3, slowest
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- * to fastest.
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- */
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- if (efuse_value >= 1 && efuse_value <= 3)
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- *versions = efuse_value - 1;
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- else
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- *versions = 0;
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+ *versions = soc_data->efuse_xlate(speedbin);
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kfree(speedbin);
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return 0;
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@@ -84,18 +113,23 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
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static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
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{
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+ const struct of_device_id *match;
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int *opp_tokens;
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char name[MAX_NAME_LEN];
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unsigned int cpu;
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u32 speed = 0;
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int ret;
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+ match = dev_get_platdata(&pdev->dev);
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+ if (!match)
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+ return -EINVAL;
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+
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opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
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GFP_KERNEL);
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if (!opp_tokens)
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return -ENOMEM;
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- ret = sun50i_cpufreq_get_efuse(&speed);
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+ ret = sun50i_cpufreq_get_efuse(match-> data, &speed);
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if (ret) {
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kfree(opp_tokens);
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return ret;
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@@ -159,8 +193,17 @@ static struct platform_driver sun50i_cpufreq_driver = {
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},
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};
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+static const struct sunxi_cpufreq_soc_data sun50i_h616_data = {
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+ .efuse_xlate = sun50i_h616_efuse_xlate,
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+};
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+
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+static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
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+ .efuse_xlate = sun50i_h6_efuse_xlate,
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+};
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+
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static const struct of_device_id sun50i_cpufreq_match_list[] = {
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- { .compatible = "allwinner,sun50i-h6" },
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+ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data },
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+ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data },
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{}
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};
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MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
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@@ -196,8 +239,8 @@ static int __init sun50i_cpufreq_init(void)
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return ret;
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sun50i_cpufreq_pdev =
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- platform_device_register_simple("sun50i-cpufreq-nvmem",
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- -1, NULL, 0);
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+ platform_device_register_data(NULL,
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+ "sun50i-cpufreq-nvmem", -1, match, sizeof(*match));
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ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
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if (ret == 0)
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return 0;
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--
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Armbian
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