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e31992ae7c
When patches outside the series are in the target folder
KERNELPATCHDIR = "archive/sunxi- $ {KERNEL _ MAJOR _ MINOR}"
they create problems for all other patches in the series
and are difficult to move to the new kernel version because
they are not properly designed.
Move the patches to a separate development folder until
the design is fixed so that we can add them to the series.
43 lines
1.5 KiB
Diff
43 lines
1.5 KiB
Diff
From: Mikhail Kalashnikov <iuncuim@gmail.com>
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The Allwinner A523 SoC features the Mali-G57 MC1 GPU, which belongs
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to the Mali Valhall (v9) family. There is a power domain specifically
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for this GPU that needs to be enabled to utilize it.
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To enable in a specific device, we need to enable the gpu node and specify
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the “mali-supply” regulator additionally in the device tree.
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Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
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---
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arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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index dd6fa22f9..d3528d498 100644
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--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
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@@ -108,6 +108,21 @@ soc {
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#size-cells = <1>;
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ranges = <0x0 0x0 0x0 0x40000000>;
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+ gpu: gpu@1800000 {
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+ compatible = "allwinner,sun55i-a523-mali",
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+ "arm,mali-valhall-jm";
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+ reg = <0x1800000 0x10000>;
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+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "job", "mmu", "gpu";
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+ clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
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+ clock-names = "core", "bus";
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+ power-domains = <&pck600 PD_GPU>;
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+ resets = <&ccu RST_BUS_GPU>;
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+ status = "disabled";
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+ };
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+
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pio: pinctrl@2000000 {
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compatible = "allwinner,sun55i-a523-pinctrl";
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reg = <0x2000000 0x800>;
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--
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2.50.0
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