mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
15e454b2c5
* Add initial support for Orangepi 5 Pro Tested and Working: Wireless & Bluetooth USB 2.0 + USB 3.1 HDMI 2.1 Gigabit Ethernet (PCIe to RJ45 - Need drivers YT6801) NVMe PCIe 2.0 MicroSD Audio Controller es8388 - Audio Out FAN PWM LEDs PWM Not Working: Onboard Microphone HDMI 2.0 (DP-HDMI - rockchip,rk3588-dp No Driver) Not Tested: Camera 1,2 eMMC * OPi 5 Pro: Ethernet Driver Installation on First Boot Implemented a simple script to install the driver during first boot using the installation headers included in the image. Takes just a few seconds on first boot. Disclaimer: Attempted installation in a chroot env but failed. * fix: Make first-boot Ethernet driver install more robust The `eth-driver-firstboot.service` would sometimes fail on first boot with a "Resource temporarily unavailable" error. This happened when another process had a lock on `dpkg`. To fix this, the installation script now waits for any `dpkg` locks to be released before attempting to install the driver package. It also includes a retry mechanism (3 attempts) in case of a transient failure. This ensures the network driver is successfully installed, providing a better out-of-box experience.
823 lines
19 KiB
Diff
823 lines
19 KiB
Diff
From d23622e93923850cae54c407f7a96aeb732e3520 Mon Sep 17 00:00:00 2001
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From: c127dev <contact@c127.dev>
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Date: Fri, 27 Jun 2025 13:29:50 -0500
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Subject: [PATCH] board: rockchip: Initial support for Orange Pi 5 Pro for
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v2024.04
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/rk3588s-orangepi-5-pro.dts | 667 +++++++++++++++++++++++
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configs/orangepi-5-pro-rk3588s_defconfig | 101 ++++
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doc/board/rockchip/rockchip.rst | 1 +
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4 files changed, 770 insertions(+)
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create mode 100644 arch/arm/dts/rk3588s-orangepi-5-pro.dts
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create mode 100644 configs/orangepi-5-pro-rk3588s_defconfig
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index b102ffb5f68..9e6d6cc2e88 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -196,6 +196,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
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rk3588-evb1-v10.dtb \
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rk3588-nanopc-t6.dtb \
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rk3588s-orangepi-5.dtb \
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+ rk3588s-orangepi-5-pro.dtb \
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rk3588-orangepi-5-plus.dtb \
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rk3588-quartzpro64.dtb \
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rk3588-turing-rk1.dtb \
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diff --git a/arch/arm/dts/rk3588s-orangepi-5-pro.dts b/arch/arm/dts/rk3588s-orangepi-5-pro.dts
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new file mode 100644
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index 00000000000..544272dfb61
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--- /dev/null
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+++ b/arch/arm/dts/rk3588s-orangepi-5-pro.dts
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@@ -0,0 +1,667 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include "rk3588s.dtsi"
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+
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+/ {
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+ model = "Xunlong Orange Pi 5 Pro";
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+ compatible = "xunlong,orangepi-5-pro", "rockchip,rk3588s";
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+
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+ aliases {
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+ ethernet0 = &gmac1;
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+ mmc0 = &sdmmc;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ adc-keys {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 1>;
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+ io-channel-names = "buttons";
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+ keyup-threshold-microvolt = <1800000>;
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+ poll-interval = <100>;
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+
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+ button-recovery {
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+ label = "Recovery";
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+ linux,code = <KEY_VENDOR>;
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+ press-threshold-microvolt = <1800>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&leds_gpio>;
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+
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+ led-1 {
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+ gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ label = "status_led";
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ vbus_typec: vbus-typec-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&typec5v_pwren>;
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+ regulator-name = "vbus_typec";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-low;
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+ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
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+ regulator-name = "vcc_3v3_sd_s0";
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ vcc3v3_pcie20: vcc3v3-pcie20-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ regulator-name = "vcc3v3_pcie20";
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ startup-delay-us = <50000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+};
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+
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+&combphy0_ps {
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+ status = "okay";
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+};
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+
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+&combphy2_psu {
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+ status = "okay";
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_big0_s0>;
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+};
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+
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+&cpu_b2 {
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+&cpu_b3 {
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+ cpu-supply = <&vdd_cpu_big1_s0>;
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
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+};
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+
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+&gmac1 {
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+ clock_in_out = "output";
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+ phy-handle = <&rgmii_phy1>;
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+ phy-mode = "rgmii-rxid";
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+ pinctrl-0 = <&gmac1_miim
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+ &gmac1_tx_bus2
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+ &gmac1_rx_bus2
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+ &gmac1_rgmii_clk
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+ &gmac1_rgmii_bus>;
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+ pinctrl-names = "default";
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+ tx_delay = <0x42>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c0m2_xfer>;
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+ status = "okay";
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+
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+ vdd_cpu_big0_s0: regulator@42 {
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+ compatible = "rockchip,rk8602";
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+ reg = <0x42>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu_big0_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <550000>;
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+ regulator-max-microvolt = <1050000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_cpu_big1_s0: regulator@43 {
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+ compatible = "rockchip,rk8603", "rockchip,rk8602";
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+ reg = <0x43>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu_big1_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <550000>;
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+ regulator-max-microvolt = <1050000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+};
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+
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+&i2c2 {
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+ status = "okay";
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+
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+ vdd_npu_s0: regulator@42 {
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+ compatible = "rockchip,rk8602";
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+ reg = <0x42>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_npu_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <550000>;
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+ regulator-max-microvolt = <950000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+};
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+
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+&i2c6 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c6m3_xfer>;
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+ status = "okay";
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+
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+ hym8563: rtc@51 {
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+ compatible = "haoyu,hym8563";
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+ reg = <0x51>;
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+ #clock-cells = <0>;
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+ clock-output-names = "hym8563";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hym8563_int>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
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+ wakeup-source;
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+ };
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+};
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+
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+&mdio1 {
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+ rgmii_phy1: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x1>;
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+ reset-assert-us = <20000>;
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+ reset-deassert-us = <100000>;
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+ reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
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+ };
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+};
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+
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+&pcie2x1l2 {
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+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie20>;
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ gpio-func {
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+ leds_gpio: leds-gpio {
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+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ hym8563 {
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+ hym8563_int: hym8563-int {
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+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ usb-typec {
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+ usbc0_int: usbc0-int {
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+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+
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+ typec5v_pwren: typec5v-pwren {
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+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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+
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+&saradc {
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+ vref-supply = <&avcc_1v8_s0>;
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+ status = "okay";
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+};
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+
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+&sdmmc {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ max-frequency = <150000000>;
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+ no-mmc;
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+ no-sdio;
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+ sd-uhs-sdr104;
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+ vmmc-supply = <&vcc_3v3_sd_s0>;
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+ vqmmc-supply = <&vccio_sd_s0>;
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+ status = "okay";
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+};
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+
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+&sfc {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&fspim0_pins>;
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0x0>;
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+ spi-max-frequency = <100000000>;
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+ spi-rx-bus-width = <4>;
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+ spi-tx-bus-width = <1>;
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+ };
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+};
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+
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+&spi2 {
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+ status = "okay";
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+ assigned-clocks = <&cru CLK_SPI2>;
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+ assigned-clock-rates = <200000000>;
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+ num-cs = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
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+
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+ pmic@0 {
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+ compatible = "rockchip,rk806";
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+ reg = <0x0>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
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+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
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+ spi-max-frequency = <1000000>;
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+ system-power-controller;
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+
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+ vcc1-supply = <&vcc5v0_sys>;
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+ vcc2-supply = <&vcc5v0_sys>;
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+ vcc3-supply = <&vcc5v0_sys>;
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+ vcc4-supply = <&vcc5v0_sys>;
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+ vcc5-supply = <&vcc5v0_sys>;
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+ vcc6-supply = <&vcc5v0_sys>;
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+ vcc7-supply = <&vcc5v0_sys>;
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+ vcc8-supply = <&vcc5v0_sys>;
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+ vcc9-supply = <&vcc5v0_sys>;
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+ vcc10-supply = <&vcc5v0_sys>;
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+ vcc11-supply = <&vcc_2v0_pldo_s3>;
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+ vcc12-supply = <&vcc5v0_sys>;
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+ vcc13-supply = <&vcc_1v1_nldo_s3>;
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+ vcc14-supply = <&vcc_1v1_nldo_s3>;
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+ vcca-supply = <&vcc5v0_sys>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ rk806_dvs1_null: dvs1-null-pins {
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+ pins = "gpio_pwrctrl2";
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+ function = "pin_fun0";
|
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+ };
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+
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+ rk806_dvs2_null: dvs2-null-pins {
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+ pins = "gpio_pwrctrl2";
|
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+ function = "pin_fun0";
|
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+ };
|
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+
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+ rk806_dvs3_null: dvs3-null-pins {
|
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+ pins = "gpio_pwrctrl3";
|
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+ function = "pin_fun0";
|
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+ };
|
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+
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+ regulators {
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+ vdd_gpu_s0: dcdc-reg1 {
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+ regulator-name = "vdd_gpu_s0";
|
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+ regulator-boot-on;
|
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+ regulator-min-microvolt = <550000>;
|
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+ regulator-max-microvolt = <950000>;
|
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+ regulator-ramp-delay = <12500>;
|
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+ regulator-enable-ramp-delay = <400>;
|
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+
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+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
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+ vdd_cpu_lit_s0: dcdc-reg2 {
|
|
+ regulator-name = "vdd_cpu_lit_s0";
|
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+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-ramp-delay = <12500>;
|
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+
|
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+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_log_s0: dcdc-reg3 {
|
|
+ regulator-name = "vdd_log_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <675000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
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+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_vdenc_s0: dcdc-reg4 {
|
|
+ regulator-name = "vdd_vdenc_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
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+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_ddr_s0: dcdc-reg5 {
|
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+ regulator-name = "vdd_ddr_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <675000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {
|
|
+ regulator-name = "vdd2_ddr_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-max-microvolt = <1100000>;
|
|
+ regulator-min-microvolt = <1100000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_2v0_pldo_s3: dcdc-reg7 {
|
|
+ regulator-name = "vdd_2v0_pldo_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <2000000>;
|
|
+ regulator-max-microvolt = <2000000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <2000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3_s3: dcdc-reg8 {
|
|
+ regulator-name = "vcc_3v3_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vddq_ddr_s0: dcdc-reg9 {
|
|
+ regulator-name = "vddq_ddr_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s3: dcdc-reg10 {
|
|
+ regulator-name = "vcc_1v8_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ avcc_1v8_s0: pldo-reg1 {
|
|
+ regulator-name = "avcc_1v8_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s0: pldo-reg2 {
|
|
+ regulator-name = "vcc_1v8_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ avdd_1v2_s0: pldo-reg3 {
|
|
+ regulator-name = "avdd_1v2_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3_s0: pldo-reg4 {
|
|
+ regulator-name = "vcc_3v3_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd_s0: pldo-reg5 {
|
|
+ regulator-name = "vccio_sd_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pldo6_s3: pldo-reg6 {
|
|
+ regulator-name = "pldo6_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_0v75_s3: nldo-reg1 {
|
|
+ regulator-name = "vdd_0v75_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_ddr_pll_s0: nldo-reg2 {
|
|
+ regulator-name = "vdd_ddr_pll_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ avdd_0v75_s0: nldo-reg3 {
|
|
+ regulator-name = "avdd_0v75_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_0v85_s0: nldo-reg4 {
|
|
+ regulator-name = "vdd_0v85_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_0v75_s0: nldo-reg5 {
|
|
+ regulator-name = "vdd_0v75_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy2_host {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy3 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy3_host {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ pinctrl-0 = <&uart2m0_xfer>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host2_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
diff --git a/configs/orangepi-5-pro-rk3588s_defconfig b/configs/orangepi-5-pro-rk3588s_defconfig
|
|
new file mode 100644
|
|
index 00000000000..010660707fe
|
|
--- /dev/null
|
|
+++ b/configs/orangepi-5-pro-rk3588s_defconfig
|
|
@@ -0,0 +1,101 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
+CONFIG_COUNTER_FREQUENCY=24000000
|
|
+CONFIG_ARCH_ROCKCHIP=y
|
|
+CONFIG_TEXT_BASE=0x00a00000
|
|
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
+CONFIG_NR_DRAM_BANKS=2
|
|
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
|
|
+CONFIG_SF_DEFAULT_SPEED=24000000
|
|
+CONFIG_SF_DEFAULT_MODE=0x2000
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5-pro"
|
|
+CONFIG_ROCKCHIP_RK3588=y
|
|
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
|
|
+CONFIG_ROCKCHIP_SPI_IMAGE=y
|
|
+CONFIG_SPL_SERIAL=y
|
|
+CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
+CONFIG_TARGET_EVB_RK3588=y
|
|
+CONFIG_SPL_STACK=0x400000
|
|
+CONFIG_DEBUG_UART_BASE=0xFEB50000
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
|
+CONFIG_SPL_SPI=y
|
|
+CONFIG_SYS_LOAD_ADDR=0xc00800
|
|
+CONFIG_PCI=y
|
|
+CONFIG_DEBUG_UART=y
|
|
+CONFIG_AHCI=y
|
|
+CONFIG_FIT=y
|
|
+CONFIG_FIT_VERBOSE=y
|
|
+CONFIG_SPL_FIT_SIGNATURE=y
|
|
+CONFIG_SPL_LOAD_FIT=y
|
|
+CONFIG_LEGACY_IMAGE_FORMAT=y
|
|
+CONFIG_OF_BOARD_SETUP=y
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5-pro.dtb"
|
|
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
+CONFIG_SPL_MAX_SIZE=0x40000
|
|
+CONFIG_SPL_PAD_TO=0x7f8000
|
|
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
+CONFIG_SPL_BSS_START_ADDR=0x4000000
|
|
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
+CONFIG_SPL_STACK_R=y
|
|
+CONFIG_SPL_SPI_LOAD=y
|
|
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
|
|
+CONFIG_SPL_ATF=y
|
|
+CONFIG_CMD_GPIO=y
|
|
+CONFIG_CMD_GPT=y
|
|
+CONFIG_CMD_I2C=y
|
|
+CONFIG_CMD_MMC=y
|
|
+CONFIG_CMD_PCI=y
|
|
+CONFIG_CMD_USB=y
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
+CONFIG_CMD_REGULATOR=y
|
|
+# CONFIG_SPL_DOS_PARTITION is not set
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
+CONFIG_OF_LIVE=y
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
+CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
+CONFIG_SPL_REGMAP=y
|
|
+CONFIG_SPL_SYSCON=y
|
|
+CONFIG_AHCI_PCI=y
|
|
+CONFIG_DWC_AHCI=y
|
|
+CONFIG_SPL_CLK=y
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
+CONFIG_MISC=y
|
|
+CONFIG_SUPPORT_EMMC_RPMB=y
|
|
+CONFIG_MMC_DW=y
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
+CONFIG_SF_DEFAULT_BUS=5
|
|
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
|
+CONFIG_SPI_FLASH_XMC=y
|
|
+CONFIG_PHY_MOTORCOMM=y
|
|
+CONFIG_DWC_ETH_QOS=y
|
|
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
|
|
+CONFIG_NVME_PCI=y
|
|
+CONFIG_PCIE_DW_ROCKCHIP=y
|
|
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
|
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
|
+CONFIG_PHY_ROCKCHIP_USBDP=y
|
|
+CONFIG_SPL_PINCTRL=y
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
+CONFIG_SPL_RAM=y
|
|
+CONFIG_SCSI=y
|
|
+CONFIG_BAUDRATE=1500000
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
|
+CONFIG_SYS_NS16550_MEM32=y
|
|
+CONFIG_ROCKCHIP_SFC=y
|
|
+CONFIG_SYSRESET=y
|
|
+CONFIG_USB=y
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
+CONFIG_USB_OHCI_HCD=y
|
|
+CONFIG_USB_OHCI_GENERIC=y
|
|
+CONFIG_USB_DWC3=y
|
|
+CONFIG_USB_DWC3_GENERIC=y
|
|
+CONFIG_ERRNO_STR=y
|
|
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
|
|
index e23ca4231cc..df237da2dfa 100644
|
|
--- a/doc/board/rockchip/rockchip.rst
|
|
+++ b/doc/board/rockchip/rockchip.rst
|
|
@@ -121,6 +121,7 @@ List of mainline supported Rockchip boards:
|
|
- Radxa ROCK 5A (rock5a-rk3588s)
|
|
- Radxa ROCK 5B (rock5b-rk3588)
|
|
- Xunlong Orange Pi 5 (orangepi-5-rk3588s)
|
|
+ - Xunlong Orange Pi 5 Pro (orangepi-5-pro-rk3588s)
|
|
- Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
|
|
|
|
* rv1108
|
|
--
|
|
2.50.0
|
|
|