4 Commits

Author SHA1 Message Date
brentr
a1fa6649e0 Reduce the size of the CMA to 16MB (#7522)
also include the tiny fixMACaddress script in the S0 image to assign end0 MAC address from CPU serial #in case running U-Boot earlier than 2024.10
2024-11-28 11:39:33 -08:00
brentr
7651c02626 Moved fixEtherAddr script where it belongs under /lib/udev (#5981) 2023-11-27 11:26:24 +01:00
Brent Roman
d2b49456de switched from using ifconfig to ip command to set mac address of wlan 2023-05-24 19:29:42 +02:00
brentr
d3a3afe385 Rockpis wifi fixes (#4008)
* RockPI-S board has no video I/O

* udev rule to fix MAC address of iface based on UUID

Deals with WiFi chip lacking any EEPROM to store its unique Ethernet MAC address
Generic mechanism -- could be utilized for other boards having similar issues

* Handy Device Tree overlays for the RockPI S

Use armbian-add-overlay to install these

Reduce CPU voltage for the RK3308 B-S
  Option to overclock RK3308 B-S to 1.3Ghz

Increase SDIO clock rate from 1Mhz to 10Mhz
  This increases WiFi throughput from 300K bytes/s to 2.4M bytes/s

* corrected comment

* No longer repeat standard opp's in this dts

Require that the standard bs dts already be installed

* User README for adding RockPI-S board variant specific dts overlays

* "enabled" --> "okay"

* added mention of sdnand.dts, fixed typo

* added p2p0 to interfaces whose MAC address should be "fixed"

* RK3308 CPU serial number in nvmem replaces UUID for derivation of fixed MAC addr
Restored use of install utility

* Use RK3308 specific CPU serial number

rather than rootfs UUID

* remove generic fixMACaddress

* Install fixMACaddr file-by-file via install utility

* Drive SDIO bus signals faster

setting RK3308_SOC_CON0_VCCIO3 reduces signal rise/fall times to WiFi SDIO chip
from 30ns to 5ns.
This odd fix forward ported from legacy kernel.
Allows Rock Pi-S WiFi to operate at full speed.

* Set RK3308 I/O voltage domains before SDIO initializes

This patch moves responibility form the io-domain to the pinctrl driver because
the io-domain driver is probed after the SDIO devices are discovered.
This was causing multiple SDIO I/O failures during boot.

A new pinctrl property is added:
io-1v8-domains
is a u32 interpreted as a bit mask where each set bit corresponds to
a 1.8V I/O domain (as opposed to the default of 3.3V for I/O)
The mask is writted to the RK3308_SOC_CON0 GRF register
(once) when the pinctrl driver starts

The default mask is 0x10 where only I/O domain 4 runs at 1.8V

This is necessary for the RockPI-S to run the SDIO clock at high (50Mhz) speed

* align whitespace

* factored rk3308bs overlays out up sdio speedup patch

* factored dts for RK3308 iodomains and pinctrl patches out of speedup patch

* remains of sdio speedup patch merely add iodomains support for rk3308

* factored rockpis dts modification out from rk3308 io voltage domains

replaced rk3308 support from iodomains with
new io-voltage-domains property added to pinctrl
io-voltage-domains specific to rk3308 for now, others SOCs may be added later.

* add sequence numbering to names of rk3308 patches

* corrected tab alignment
2022-10-13 18:34:43 +02:00