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Bump Meson64 u-boot to 2022.01 (#3418)
* Bump Meson64 u-boot to 2022.01 Tested VIM boards * Move Jethub related patches under common meson64 patch collection * Move jethub patch to per board and remove unneded settings
This commit is contained in:
Igor Pečovnik
@@ -5,7 +5,7 @@ LINUXFAMILY=meson64
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ARCH=arm64
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ARCH=arm64
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SERIALCON=ttyAML0
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SERIALCON=ttyAML0
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SRC_LOADADDR='LOADADDR=0x1080000'
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SRC_LOADADDR='LOADADDR=0x1080000'
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BOOTBRANCH="tag:v2021.07"
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BOOTBRANCH="tag:v2022.01"
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OVERLAY_PREFIX='meson'
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OVERLAY_PREFIX='meson'
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# this family does not need it
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# this family does not need it
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@@ -3,8 +3,6 @@ source "${BASH_SOURCE%/*}/include/meson64_common.inc"
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UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot.bin:u-boot.nosd.bin u-boot-dtb.img"
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UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot.bin:u-boot.nosd.bin u-boot-dtb.img"
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CPUMIN=100000
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CPUMIN=100000
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GOVERNOR="ondemand"
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GOVERNOR="ondemand"
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BOOTBRANCH="tag:v2022.01-rc3"
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BOOTPATCHDIR=${BOOTPATCHDIR:-"u-boot-jethub"}
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BOOTSCRIPT="boot-jethub.cmd:boot.cmd"
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BOOTSCRIPT="boot-jethub.cmd:boot.cmd"
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if [[ "$BOARD" == "jethubj80" ]]; then
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if [[ "$BOARD" == "jethubj80" ]]; then
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@@ -1,51 +0,0 @@
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From 7ab43bacd08d660867166f79a8b55f6cd3444bf8 Mon Sep 17 00:00:00 2001
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From: Artem Lapkin <email2tema@gmail.com>
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Date: Thu, 25 Nov 2021 11:08:59 +0800
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Subject: [PATCH 1/2] image-board: fix wrong implementation ram disk address
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setup from cmdline
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Problem
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Wrong implementation logic: ramdisk cmdline image address always ignored!
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Next block { rd_addr = hextoul(select, NULL) } unusable for raw initrd.
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We have unbootable raw initrd images because, select_ramdisk for raw
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initrd images ignore submited select addr and setup rd_datap value to 0
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Signed-off-by: Artem Lapkin <art@khadas.com>
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---
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boot/image-board.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/boot/image-board.c b/boot/image-board.c
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index bf8817165c..87a8f07432 100644
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--- a/boot/image-board.c
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+++ b/boot/image-board.c
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@@ -334,7 +334,7 @@ static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch,
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if (select) {
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ulong default_addr;
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- bool done = true;
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+ bool done = false;
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if (CONFIG_IS_ENABLED(FIT)) {
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/*
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@@ -352,13 +352,13 @@ static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch,
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&fit_uname_config)) {
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debug("* ramdisk: config '%s' from image at 0x%08lx\n",
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fit_uname_config, rd_addr);
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+ done = true;
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} else if (fit_parse_subimage(select, default_addr,
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&rd_addr,
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&fit_uname_ramdisk)) {
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debug("* ramdisk: subimage '%s' from image at 0x%08lx\n",
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fit_uname_ramdisk, rd_addr);
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- } else {
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- done = false;
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+ done = true;
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}
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}
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if (!done) {
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--
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2.30.2
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@@ -1,42 +0,0 @@
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From 1fe3bd4d961fc5c8df9638db4fdb010de5ec4989 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Tue, 3 Aug 2021 18:36:32 +0000
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Subject: [CHEWITT] FROMGIT: board: amlogic: odroid-n2: fix fdtfile suffix for
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n2-plus
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The N2+ dtb is meson-g12b-odroid-n2-plus.dtb, not n2_plus, so
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correct the suffix provided in the board file. Also align the
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board info string shown during boot to match.
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Fixes: 8bc780106c13 ("board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants")
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Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
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diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
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index 88a60f34fe..acfd107fc5 100644
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--- a/board/amlogic/odroid-n2/odroid-n2.c
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+++ b/board/amlogic/odroid-n2/odroid-n2.c
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@@ -48,7 +48,7 @@ static struct meson_odroid_boards {
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/* OdroidN2 rev 2019,2,7 */
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{ MESON_SOC_ID_G12B, 330 * 4, 350 * 4, "n2" },
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/* OdroidN2plus rev 2019,11,20 */
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- { MESON_SOC_ID_G12B, 410 * 4, 430 * 4, "n2_plus" },
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+ { MESON_SOC_ID_G12B, 410 * 4, 430 * 4, "n2-plus" },
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/* OdroidC4 rev 2020,01,29 */
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{ MESON_SOC_ID_SM1, 80 * 4, 100 * 4, "c4" },
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/* OdroidHC4 rev 2019,12,10 */
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diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig
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index 065ecbcfb0..d3f841179e 100644
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--- a/configs/odroid-n2_defconfig
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+++ b/configs/odroid-n2_defconfig
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@@ -9,7 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2"
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CONFIG_MESON_G12A=y
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CONFIG_DEBUG_UART_BASE=0xff803000
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CONFIG_DEBUG_UART_CLOCK=24000000
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-CONFIG_IDENT_STRING=" odroid-n2/n2_plus"
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+CONFIG_IDENT_STRING=" odroid-n2/n2-plus"
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CONFIG_DEBUG_UART=y
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|
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CONFIG_OF_BOARD_SETUP=y
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# CONFIG_DISPLAY_CPUINFO is not set
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--
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2.33.0
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@@ -1,40 +0,0 @@
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From 9f03e521729f314d04bd500e16b6367b04d70a50 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Wed, 8 Sep 2021 14:32:12 +0200
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Subject: [CHEWITT] FROMLIST(v1): pci: pcie_dw_meson: fix usb fail when pci
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link fails to go up
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On Amlogic A311D, when the PCIe link fails disabling the related clocks
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makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC.
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Mimic the Linux behavior by not considering a link failure a probe failure,
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and continue even if the PCIe link is down.
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Reported-by: Art Nikpal <email2tema@gmail.com>
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
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index 0525ecbea6..07da9fa533 100644
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--- a/drivers/pci/pcie_dw_meson.c
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+++ b/drivers/pci/pcie_dw_meson.c
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@@ -319,15 +319,9 @@ static int meson_pcie_init_port(struct udevice *dev)
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pcie_dw_setup_host(&priv->dw);
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- ret = meson_pcie_link_up(priv, LINK_SPEED_GEN_2);
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- if (ret < 0)
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- goto err_link_up;
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+ meson_pcie_link_up(priv, LINK_SPEED_GEN_2);
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return 0;
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-err_link_up:
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- clk_disable(&priv->clk_port);
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- clk_disable(&priv->clk_general);
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- clk_disable(&priv->clk_pclk);
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err_deassert_bulk:
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reset_assert_bulk(&priv->rsts);
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err_power_off_phy:
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--
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2.33.0
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File diff suppressed because it is too large
Load Diff
@@ -1,537 +0,0 @@
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|||||||
From b84b18403b347970773018a30eb720108ed499d9 Mon Sep 17 00:00:00 2001
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From: Ricardo Pardini <ricardo@pardini.net>
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Date: Sun, 19 Sep 2021 13:18:54 +0200
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Subject: [CHEWITT] SQUASHED: Add Radxa Zero support for 2021.07 (from chewitt
|
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tree)
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- FROMLIST(v1): boards: amlogic: add Radxa Zero defconfig
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- FROMLIST(v1): ARM: dts: add support for Radxa Zero
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- FROMGIT: ARM: meson: Add S905Y2 SOC ID
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 9fb38682e6..88c73be03f 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -168,6 +168,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
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meson-gxm-khadas-vim2.dtb \
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meson-gxm-s912-libretech-pc.dtb \
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meson-gxm-wetek-core2.dtb \
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+ meson-g12a-radxa-zero.dtb \
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meson-axg-s400.dtb \
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meson-g12a-u200.dtb \
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meson-g12a-sei510.dtb \
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diff --git a/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
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new file mode 100644
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index 0000000000..236f2468dc
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|
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--- /dev/null
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+++ b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
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@@ -0,0 +1,7 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 BayLibre, SAS.
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||||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
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+ */
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|
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+
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+#include "meson-g12-common-u-boot.dtsi"
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||||||
diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000000..e3bb6df42f
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/meson-g12a-radxa-zero.dts
|
|
||||||
@@ -0,0 +1,405 @@
|
|
||||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
||||||
+/*
|
|
||||||
+ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+/dts-v1/;
|
|
||||||
+
|
|
||||||
+#include "meson-g12a.dtsi"
|
|
||||||
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
|
||||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
|
||||||
+
|
|
||||||
+/ {
|
|
||||||
+ compatible = "radxa,zero", "amlogic,g12a";
|
|
||||||
+ model = "Radxa Zero";
|
|
||||||
+
|
|
||||||
+ aliases {
|
|
||||||
+ serial0 = &uart_AO;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ chosen {
|
|
||||||
+ stdout-path = "serial0:115200n8";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ memory@0 {
|
|
||||||
+ device_type = "memory";
|
|
||||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ cvbs-connector {
|
|
||||||
+ status = "disabled";
|
|
||||||
+ compatible = "composite-video-connector";
|
|
||||||
+
|
|
||||||
+ port {
|
|
||||||
+ cvbs_connector_in: endpoint {
|
|
||||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ hdmi-connector {
|
|
||||||
+ compatible = "hdmi-connector";
|
|
||||||
+ type = "a";
|
|
||||||
+
|
|
||||||
+ port {
|
|
||||||
+ hdmi_connector_in: endpoint {
|
|
||||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ emmc_pwrseq: emmc-pwrseq {
|
|
||||||
+ compatible = "mmc-pwrseq-emmc";
|
|
||||||
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ sdio_pwrseq: sdio-pwrseq {
|
|
||||||
+ compatible = "mmc-pwrseq-simple";
|
|
||||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
|
||||||
+ clocks = <&wifi32k>;
|
|
||||||
+ clock-names = "ext_clock";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ ao_5v: regulator-ao_5v {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "AO_5V";
|
|
||||||
+ regulator-min-microvolt = <5000000>;
|
|
||||||
+ regulator-max-microvolt = <5000000>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_1v8: regulator-vcc_1v8 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "VCC_1V8";
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ vin-supply = <&vcc_3v3>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_3v3: regulator-vcc_3v3 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "VCC_3V3";
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ vin-supply = <&vddao_3v3>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ hdmi_pw: regulator-hdmi_pw {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "HDMI_PW";
|
|
||||||
+ regulator-min-microvolt = <5000000>;
|
|
||||||
+ regulator-max-microvolt = <5000000>;
|
|
||||||
+ vin-supply = <&ao_5v>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vddao_1v8: regulator-vddao_1v8 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "VDDAO_1V8";
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ vin-supply = <&vddao_3v3>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vddao_3v3: regulator-vddao_3v3 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "VDDAO_3V3";
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ vin-supply = <&ao_5v>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vddcpu: regulator-vddcpu {
|
|
||||||
+ compatible = "pwm-regulator";
|
|
||||||
+
|
|
||||||
+ regulator-name = "VDDCPU";
|
|
||||||
+ regulator-min-microvolt = <721000>;
|
|
||||||
+ regulator-max-microvolt = <1022000>;
|
|
||||||
+
|
|
||||||
+ vin-supply = <&ao_5v>;
|
|
||||||
+
|
|
||||||
+ pwms = <&pwm_AO_cd 1 1250 0>;
|
|
||||||
+ pwm-dutycycle-range = <100 0>;
|
|
||||||
+
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ sound {
|
|
||||||
+ compatible = "amlogic,axg-sound-card";
|
|
||||||
+ model = "RADXA-ZERO";
|
|
||||||
+ audio-aux-devs = <&tdmout_b>;
|
|
||||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
|
||||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
|
||||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
|
||||||
+ "TDM_B Playback", "TDMOUT_B OUT";
|
|
||||||
+
|
|
||||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
|
||||||
+ <&clkc CLKID_MPLL0>,
|
|
||||||
+ <&clkc CLKID_MPLL1>;
|
|
||||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
|
||||||
+ assigned-clock-rates = <294912000>,
|
|
||||||
+ <270950400>,
|
|
||||||
+ <393216000>;
|
|
||||||
+ status = "okay";
|
|
||||||
+
|
|
||||||
+ dai-link-0 {
|
|
||||||
+ sound-dai = <&frddr_a>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ dai-link-1 {
|
|
||||||
+ sound-dai = <&frddr_b>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ dai-link-2 {
|
|
||||||
+ sound-dai = <&frddr_c>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ /* 8ch hdmi interface */
|
|
||||||
+ dai-link-3 {
|
|
||||||
+ sound-dai = <&tdmif_b>;
|
|
||||||
+ dai-format = "i2s";
|
|
||||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
|
||||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
|
||||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
|
||||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
|
||||||
+ mclk-fs = <256>;
|
|
||||||
+
|
|
||||||
+ codec {
|
|
||||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ dai-link-4 {
|
|
||||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
|
||||||
+
|
|
||||||
+ codec {
|
|
||||||
+ sound-dai = <&hdmi_tx>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ wifi32k: wifi32k {
|
|
||||||
+ compatible = "pwm-clock";
|
|
||||||
+ #clock-cells = <0>;
|
|
||||||
+ clock-frequency = <32768>;
|
|
||||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&arb {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cec_AO {
|
|
||||||
+ pinctrl-0 = <&cec_ao_a_h_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ status = "disabled";
|
|
||||||
+ hdmi-phandle = <&hdmi_tx>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cecb_AO {
|
|
||||||
+ pinctrl-0 = <&cec_ao_b_h_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ status = "okay";
|
|
||||||
+ hdmi-phandle = <&hdmi_tx>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&clkc_audio {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cpu0 {
|
|
||||||
+ cpu-supply = <&vddcpu>;
|
|
||||||
+ operating-points-v2 = <&cpu_opp_table>;
|
|
||||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
|
||||||
+ clock-latency = <50000>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cpu1 {
|
|
||||||
+ cpu-supply = <&vddcpu>;
|
|
||||||
+ operating-points-v2 = <&cpu_opp_table>;
|
|
||||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
|
||||||
+ clock-latency = <50000>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cpu2 {
|
|
||||||
+ cpu-supply = <&vddcpu>;
|
|
||||||
+ operating-points-v2 = <&cpu_opp_table>;
|
|
||||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
|
||||||
+ clock-latency = <50000>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cpu3 {
|
|
||||||
+ cpu-supply = <&vddcpu>;
|
|
||||||
+ operating-points-v2 = <&cpu_opp_table>;
|
|
||||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
|
||||||
+ clock-latency = <50000>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cvbs_vdac_port {
|
|
||||||
+ cvbs_vdac_out: endpoint {
|
|
||||||
+ remote-endpoint = <&cvbs_connector_in>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&frddr_a {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&frddr_b {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&frddr_c {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&hdmi_tx {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ hdmi-supply = <&hdmi_pw>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&hdmi_tx_tmds_port {
|
|
||||||
+ hdmi_tx_tmds_out: endpoint {
|
|
||||||
+ remote-endpoint = <&hdmi_connector_in>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ir {
|
|
||||||
+ status = "disabled";
|
|
||||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pwm_AO_cd {
|
|
||||||
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ clocks = <&xtal>;
|
|
||||||
+ clock-names = "clkin1";
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pwm_ef {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&pwm_e_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ clocks = <&xtal>;
|
|
||||||
+ clock-names = "clkin0";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&saradc {
|
|
||||||
+ status = "okay";
|
|
||||||
+ vref-supply = <&vddao_1v8>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* SDIO */
|
|
||||||
+&sd_emmc_a {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&sdio_pins>;
|
|
||||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
|
||||||
+ pinctrl-names = "default", "clk-gate";
|
|
||||||
+ #address-cells = <1>;
|
|
||||||
+ #size-cells = <0>;
|
|
||||||
+
|
|
||||||
+ bus-width = <4>;
|
|
||||||
+ cap-sd-highspeed;
|
|
||||||
+ sd-uhs-sdr50;
|
|
||||||
+ max-frequency = <100000000>;
|
|
||||||
+
|
|
||||||
+ non-removable;
|
|
||||||
+ disable-wp;
|
|
||||||
+
|
|
||||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
|
||||||
+ keep-power-in-suspend;
|
|
||||||
+
|
|
||||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
||||||
+
|
|
||||||
+ vmmc-supply = <&vddao_3v3>;
|
|
||||||
+ vqmmc-supply = <&vddao_1v8>;
|
|
||||||
+
|
|
||||||
+ brcmf: wifi@1 {
|
|
||||||
+ reg = <1>;
|
|
||||||
+ compatible = "brcm,bcm4329-fmac";
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* SD card */
|
|
||||||
+&sd_emmc_b {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&sdcard_c_pins>;
|
|
||||||
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
|
||||||
+ pinctrl-names = "default", "clk-gate";
|
|
||||||
+
|
|
||||||
+ bus-width = <4>;
|
|
||||||
+ cap-sd-highspeed;
|
|
||||||
+ max-frequency = <100000000>;
|
|
||||||
+ disable-wp;
|
|
||||||
+
|
|
||||||
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
|
||||||
+ vmmc-supply = <&vddao_3v3>;
|
|
||||||
+ vqmmc-supply = <&vddao_3v3>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* eMMC */
|
|
||||||
+&sd_emmc_c {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
|
|
||||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
|
||||||
+ pinctrl-names = "default", "clk-gate";
|
|
||||||
+
|
|
||||||
+ bus-width = <8>;
|
|
||||||
+ cap-mmc-highspeed;
|
|
||||||
+ mmc-ddr-1_8v;
|
|
||||||
+ mmc-hs200-1_8v;
|
|
||||||
+ max-frequency = <200000000>;
|
|
||||||
+ disable-wp;
|
|
||||||
+
|
|
||||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
|
||||||
+ vmmc-supply = <&vcc_3v3>;
|
|
||||||
+ vqmmc-supply = <&vcc_1v8>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&tdmif_b {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&tdmout_b {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&tohdmitx {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&uart_A {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ uart-has-rtscts;
|
|
||||||
+
|
|
||||||
+ bluetooth {
|
|
||||||
+ compatible = "brcm,bcm43438-bt";
|
|
||||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ max-speed = <2000000>;
|
|
||||||
+ clocks = <&wifi32k>;
|
|
||||||
+ clock-names = "lpo";
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&uart_AO {
|
|
||||||
+ status = "okay";
|
|
||||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&usb {
|
|
||||||
+ status = "okay";
|
|
||||||
+ dr_mode = "host";
|
|
||||||
+};
|
|
||||||
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
|
|
||||||
index d16d3f194d..2421acd817 100644
|
|
||||||
--- a/arch/arm/mach-meson/board-info.c
|
|
||||||
+++ b/arch/arm/mach-meson/board-info.c
|
|
||||||
@@ -64,6 +64,7 @@ static const struct meson_gx_package_id {
|
|
||||||
{ "A113X", 0x25, 0x37, 0xff },
|
|
||||||
{ "A113D", 0x25, 0x22, 0xff },
|
|
||||||
{ "S905D2", 0x28, 0x10, 0xf0 },
|
|
||||||
+ { "S905Y2", 0x28, 0x30, 0xf0 },
|
|
||||||
{ "S905X2", 0x28, 0x40, 0xf0 },
|
|
||||||
{ "A311D", 0x29, 0x10, 0xf0 },
|
|
||||||
{ "S922X", 0x29, 0x40, 0xf0 },
|
|
||||||
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000000..acd13f1c6b
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/configs/radxa-zero_defconfig
|
|
||||||
@@ -0,0 +1,70 @@
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_ARCH_MESON=y
|
|
||||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
|
||||||
+CONFIG_NR_DRAM_BANKS=1
|
|
||||||
+CONFIG_ENV_SIZE=0x2000
|
|
||||||
+CONFIG_DM_GPIO=y
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero"
|
|
||||||
+CONFIG_MESON_G12A=y
|
|
||||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
|
||||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
||||||
+CONFIG_IDENT_STRING=" radxa-zero"
|
|
||||||
+CONFIG_DEBUG_UART=y
|
|
||||||
+CONFIG_OF_BOARD_SETUP=y
|
|
||||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
||||||
+CONFIG_MISC_INIT_R=y
|
|
||||||
+# CONFIG_CMD_BDI is not set
|
|
||||||
+# CONFIG_CMD_IMI is not set
|
|
||||||
+CONFIG_CMD_GPIO=y
|
|
||||||
+# CONFIG_CMD_LOADS is not set
|
|
||||||
+CONFIG_CMD_MMC=y
|
|
||||||
+CONFIG_CMD_USB=y
|
|
||||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
|
||||||
+# CONFIG_CMD_SETEXPR is not set
|
|
||||||
+CONFIG_CMD_REGULATOR=y
|
|
||||||
+CONFIG_OF_CONTROL=y
|
|
||||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
+# CONFIG_NET_RANDOM_ETHADDR is not set
|
|
||||||
+CONFIG_MMC_MESON_GX=y
|
|
||||||
+CONFIG_MTD=y
|
|
||||||
+CONFIG_DM_MTD=y
|
|
||||||
+# CONFIG_PHY_REALTEK is not set
|
|
||||||
+# CONFIG_DM_ETH is not set
|
|
||||||
+CONFIG_DM_MDIO=y
|
|
||||||
+CONFIG_DM_MDIO_MUX=y
|
|
||||||
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
|
|
||||||
+CONFIG_MDIO_MUX_MESON_G12A=y
|
|
||||||
+CONFIG_MESON_G12A_USB_PHY=y
|
|
||||||
+CONFIG_PINCTRL=y
|
|
||||||
+CONFIG_PINCTRL_MESON_G12A=y
|
|
||||||
+CONFIG_POWER_DOMAIN=y
|
|
||||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
|
||||||
+CONFIG_DM_REGULATOR=y
|
|
||||||
+CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
+CONFIG_DM_RESET=y
|
|
||||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
|
||||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
|
||||||
+CONFIG_MESON_SERIAL=y
|
|
||||||
+CONFIG_USB=y
|
|
||||||
+CONFIG_DM_USB=y
|
|
||||||
+CONFIG_USB_XHCI_HCD=y
|
|
||||||
+CONFIG_USB_XHCI_DWC3=y
|
|
||||||
+CONFIG_USB_DWC3=y
|
|
||||||
+# CONFIG_USB_DWC3_GADGET is not set
|
|
||||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
|
||||||
+CONFIG_USB_KEYBOARD=y
|
|
||||||
+CONFIG_USB_GADGET=y
|
|
||||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
|
||||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
|
||||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
|
||||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
|
||||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
|
||||||
+CONFIG_DM_VIDEO=y
|
|
||||||
+# CONFIG_VIDEO_BPP8 is not set
|
|
||||||
+# CONFIG_VIDEO_BPP16 is not set
|
|
||||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
|
||||||
+CONFIG_VIDEO_MESON=y
|
|
||||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
|
||||||
+CONFIG_SPLASH_SCREEN=y
|
|
||||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
|
||||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
|
||||||
--
|
|
||||||
2.33.0
|
|
||||||
|
|
||||||
@@ -1,226 +0,0 @@
|
|||||||
From 249acc18e674f8750c2ff2473e23f9c11a6abdaf Mon Sep 17 00:00:00 2001
|
|
||||||
From: Ricardo Pardini <ricardo@pardini.net>
|
|
||||||
Date: Sun, 19 Sep 2021 13:26:27 +0200
|
|
||||||
Subject: [CHEWITT] SQUASHED: Support for ODROID HC4, with SPI-NOR chip and
|
|
||||||
SATA booting
|
|
||||||
|
|
||||||
- WIP: boards: amlogic: add SPI/SPIFC support to Odroid-HC4
|
|
||||||
- FROMLIST(v1): ARM: amlogic: add support for Odroid-HC4 device
|
|
||||||
- FROMLIST(v1): distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot
|
|
||||||
- FROMLIST(v1): configs: meson64: add SCSI boot target
|
|
||||||
- FROMGIT: mtd: spi-nor-ids: Add XTX XT25F128B
|
|
||||||
|
|
||||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
|
||||||
index 88c73be03f..e23e169bb8 100644
|
|
||||||
--- a/arch/arm/dts/Makefile
|
|
||||||
+++ b/arch/arm/dts/Makefile
|
|
||||||
@@ -179,6 +179,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
|
|
||||||
meson-g12b-a311d-khadas-vim3.dtb \
|
|
||||||
meson-sm1-khadas-vim3l.dtb \
|
|
||||||
meson-sm1-odroid-c4.dtb \
|
|
||||||
+ meson-sm1-odroid-hc4.dtb \
|
|
||||||
meson-sm1-sei610.dtb
|
|
||||||
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
|
|
||||||
tegra20-medcom-wide.dtb \
|
|
||||||
diff --git a/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000000..963bf96b25
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi
|
|
||||||
@@ -0,0 +1,23 @@
|
|
||||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
||||||
+/*
|
|
||||||
+ * Copyright (c) 2020 BayLibre, SAS
|
|
||||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#include "meson-sm1-u-boot.dtsi"
|
|
||||||
+
|
|
||||||
+ðmac {
|
|
||||||
+ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
|
|
||||||
+ snps,reset-delays-us = <0 10000 1000000>;
|
|
||||||
+ snps,reset-active-low;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+/* SARADC is needed for proper board variant detection */
|
|
||||||
+&saradc {
|
|
||||||
+ status = "okay";
|
|
||||||
+ vref-supply = <&vddao_1v8>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&tflash_vdd {
|
|
||||||
+ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
|
|
||||||
+};
|
|
||||||
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000000..c900624a06
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/configs/odroid-hc4_defconfig
|
|
||||||
@@ -0,0 +1,95 @@
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_SYS_BOARD="odroid-n2"
|
|
||||||
+CONFIG_ARCH_MESON=y
|
|
||||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
|
||||||
+CONFIG_NR_DRAM_BANKS=1
|
|
||||||
+CONFIG_ENV_SIZE=0x2000
|
|
||||||
+CONFIG_DM_GPIO=y
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4"
|
|
||||||
+CONFIG_MESON_G12A=y
|
|
||||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
|
||||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
||||||
+CONFIG_IDENT_STRING=" odroid-hc4"
|
|
||||||
+CONFIG_DEBUG_UART=y
|
|
||||||
+CONFIG_AHCI=y
|
|
||||||
+CONFIG_OF_BOARD_SETUP=y
|
|
||||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
||||||
+CONFIG_MISC_INIT_R=y
|
|
||||||
+# CONFIG_CMD_BDI is not set
|
|
||||||
+# CONFIG_CMD_IMI is not set
|
|
||||||
+CONFIG_CMD_GPIO=y
|
|
||||||
+# CONFIG_CMD_LOADS is not set
|
|
||||||
+CONFIG_CMD_MMC=y
|
|
||||||
+CONFIG_CMD_PCI=y
|
|
||||||
+CONFIG_CMD_SPI=y
|
|
||||||
+CONFIG_CMD_USB=y
|
|
||||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
|
||||||
+# CONFIG_CMD_SETEXPR is not set
|
|
||||||
+CONFIG_CMD_REGULATOR=y
|
|
||||||
+CONFIG_OF_CONTROL=y
|
|
||||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
|
||||||
+CONFIG_ADC=y
|
|
||||||
+CONFIG_SARADC_MESON=y
|
|
||||||
+CONFIG_SATA=y
|
|
||||||
+CONFIG_SCSI_AHCI=y
|
|
||||||
+CONFIG_AHCI_PCI=y
|
|
||||||
+CONFIG_DM_MMC=y
|
|
||||||
+CONFIG_MMC_MESON_GX=y
|
|
||||||
+CONFIG_MTD=y
|
|
||||||
+CONFIG_DM_MTD=y
|
|
||||||
+CONFIG_DM_SPI_FLASH=y
|
|
||||||
+CONFIG_SPI_FLASH_XTX=y
|
|
||||||
+CONFIG_PHY_REALTEK=y
|
|
||||||
+CONFIG_DM_ETH=y
|
|
||||||
+CONFIG_DM_MDIO=y
|
|
||||||
+CONFIG_DM_MDIO_MUX=y
|
|
||||||
+CONFIG_ETH_DESIGNWARE_MESON8B=y
|
|
||||||
+CONFIG_MDIO_MUX_MESON_G12A=y
|
|
||||||
+CONFIG_PCI=y
|
|
||||||
+CONFIG_PCIE_DW_MESON=y
|
|
||||||
+CONFIG_MESON_G12A_USB_PHY=y
|
|
||||||
+CONFIG_PINCTRL=y
|
|
||||||
+CONFIG_PINCTRL_MESON_G12A=y
|
|
||||||
+CONFIG_POWER_DOMAIN=y
|
|
||||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
|
||||||
+CONFIG_DM_REGULATOR=y
|
|
||||||
+CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
+CONFIG_DM_REGULATOR_GPIO=y
|
|
||||||
+CONFIG_DM_RESET=y
|
|
||||||
+CONFIG_SCSI=y
|
|
||||||
+CONFIG_DM_SCSI=y
|
|
||||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
|
||||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
|
||||||
+CONFIG_MESON_SERIAL=y
|
|
||||||
+CONFIG_SPI=y
|
|
||||||
+CONFIG_DM_SPI=y
|
|
||||||
+CONFIG_MESON_SPIFC=y
|
|
||||||
+CONFIG_DM_USB=y
|
|
||||||
+CONFIG_USB=y
|
|
||||||
+CONFIG_USB_XHCI_HCD=y
|
|
||||||
+CONFIG_USB_XHCI_DWC3=y
|
|
||||||
+CONFIG_USB_DWC3=y
|
|
||||||
+# CONFIG_USB_DWC3_GADGET is not set
|
|
||||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
|
||||||
+CONFIG_USB_KEYBOARD=y
|
|
||||||
+CONFIG_USB_GADGET=y
|
|
||||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
|
||||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
|
||||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
|
||||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
|
||||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
|
||||||
+CONFIG_DM_VIDEO=y
|
|
||||||
+# CONFIG_VIDEO_BPP8 is not set
|
|
||||||
+# CONFIG_VIDEO_BPP16 is not set
|
|
||||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
|
||||||
+CONFIG_VIDEO_MESON=y
|
|
||||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
|
||||||
+CONFIG_SPLASH_SCREEN=y
|
|
||||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
|
||||||
+CONFIG_VIDEO_BMP_RLE8=y
|
|
||||||
+CONFIG_BMP_16BPP=y
|
|
||||||
+CONFIG_BMP_24BPP=y
|
|
||||||
+CONFIG_BMP_32BPP=y
|
|
||||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
|
||||||
+CONFIG_DM_PCI=y
|
|
||||||
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
|
|
||||||
index f8db8e5213..8c797d1e03 100644
|
|
||||||
--- a/drivers/mtd/spi/Kconfig
|
|
||||||
+++ b/drivers/mtd/spi/Kconfig
|
|
||||||
@@ -162,6 +162,12 @@ config SPI_FLASH_XMC
|
|
||||||
Add support for various XMC (Wuhan Xinxin Semiconductor
|
|
||||||
Manufacturing Corp.) SPI flash chips (XM25xxx)
|
|
||||||
|
|
||||||
+config SPI_FLASH_XTX
|
|
||||||
+ bool "XTX SPI flash support"
|
|
||||||
+ help
|
|
||||||
+ Add support for various XTX (XTX Technology Limited)
|
|
||||||
+ SPI flash chips (XT25xxx).
|
|
||||||
+
|
|
||||||
endif
|
|
||||||
|
|
||||||
config SPI_FLASH_USE_4K_SECTORS
|
|
||||||
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
|
|
||||||
index 2b57797954..d772b73a53 100644
|
|
||||||
--- a/drivers/mtd/spi/spi-nor-ids.c
|
|
||||||
+++ b/drivers/mtd/spi/spi-nor-ids.c
|
|
||||||
@@ -336,6 +336,10 @@ const struct flash_info spi_nor_ids[] = {
|
|
||||||
/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
|
|
||||||
{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
||||||
{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
||||||
+#endif
|
|
||||||
+#ifdef CONFIG_SPI_FLASH_XTX
|
|
||||||
+ /* XTX Technology (Shenzhen) Limited */
|
|
||||||
+ { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
|
|
||||||
#endif
|
|
||||||
{ },
|
|
||||||
};
|
|
||||||
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
|
|
||||||
index 2627c2a6a5..f4f6fa8f8a 100644
|
|
||||||
--- a/include/config_distro_bootcmd.h
|
|
||||||
+++ b/include/config_distro_bootcmd.h
|
|
||||||
@@ -226,6 +226,7 @@
|
|
||||||
"fi\0" \
|
|
||||||
\
|
|
||||||
"scsi_boot=" \
|
|
||||||
+ BOOTENV_RUN_PCI_ENUM \
|
|
||||||
BOOTENV_RUN_SCSI_INIT \
|
|
||||||
BOOTENV_SHARED_BLKDEV_BODY(scsi)
|
|
||||||
#define BOOTENV_DEV_SCSI BOOTENV_DEV_BLKDEV
|
|
||||||
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
|
|
||||||
index 6224722941..0f8b7ecb18 100644
|
|
||||||
--- a/include/configs/meson64.h
|
|
||||||
+++ b/include/configs/meson64.h
|
|
||||||
@@ -64,6 +64,12 @@
|
|
||||||
#define BOOT_TARGET_NVME(func)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
+#ifdef CONFIG_CMD_SCSI
|
|
||||||
+ #define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0)
|
|
||||||
+#else
|
|
||||||
+ #define BOOT_TARGET_SCSI(func)
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
#ifndef BOOT_TARGET_DEVICES
|
|
||||||
#define BOOT_TARGET_DEVICES(func) \
|
|
||||||
func(ROMUSB, romusb, na) \
|
|
||||||
@@ -72,6 +78,7 @@
|
|
||||||
func(MMC, mmc, 2) \
|
|
||||||
BOOT_TARGET_DEVICES_USB(func) \
|
|
||||||
BOOT_TARGET_NVME(func) \
|
|
||||||
+ BOOT_TARGET_SCSI(func) \
|
|
||||||
func(PXE, pxe, na) \
|
|
||||||
func(DHCP, dhcp, na)
|
|
||||||
#endif
|
|
||||||
--
|
|
||||||
2.33.0
|
|
||||||
|
|
||||||
@@ -0,0 +1,27 @@
|
|||||||
|
From ff82d04354784cd982ab1a912c08d3eb22f82d13 Mon Sep 17 00:00:00 2001
|
||||||
|
Message-Id: <ff82d04354784cd982ab1a912c08d3eb22f82d13.1632758701.git.stefan@agner.ch>
|
||||||
|
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||||
|
Date: Mon, 2 Sep 2019 15:42:04 +0200
|
||||||
|
Subject: [PATCH] HACK: mmc: meson-gx: limit to 24MHz
|
||||||
|
|
||||||
|
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||||
|
---
|
||||||
|
drivers/mmc/meson_gx_mmc.c | 2 +-
|
||||||
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
|
||||||
|
index fcf4f03d1e..6ded4b619b 100644
|
||||||
|
--- a/drivers/mmc/meson_gx_mmc.c
|
||||||
|
+++ b/drivers/mmc/meson_gx_mmc.c
|
||||||
|
@@ -279,7 +279,7 @@ static int meson_mmc_probe(struct udevice *dev)
|
||||||
|
cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
|
||||||
|
MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||||
|
cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
|
||||||
|
- cfg->f_max = 100000000; /* 100 MHz */
|
||||||
|
+ cfg->f_max = SD_EMMC_CLKSRC_24M;
|
||||||
|
cfg->b_max = 511; /* max 512 - 1 blocks */
|
||||||
|
cfg->name = dev->name;
|
||||||
|
|
||||||
|
--
|
||||||
|
2.33.0
|
||||||
|
|
||||||
@@ -2,12 +2,14 @@ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
|
|||||||
index 1f3fa15..3f23cc8 100644
|
index 1f3fa15..3f23cc8 100644
|
||||||
--- a/arch/arm/Kconfig
|
--- a/arch/arm/Kconfig
|
||||||
+++ b/arch/arm/Kconfig
|
+++ b/arch/arm/Kconfig
|
||||||
@@ -652,6 +652,8 @@ config ARCH_OMAP2PLUS
|
@@ -652,8 +652,10 @@ config ARCH_OMAP2PLUS
|
||||||
|
|
||||||
config ARCH_MESON
|
config ARCH_MESON
|
||||||
bool "Amlogic Meson"
|
bool "Amlogic Meson"
|
||||||
|
select GPIO_EXTRA_HEADER
|
||||||
+ select OF_LIBFDT
|
+ select OF_LIBFDT
|
||||||
+ select OF_LIBFDT_OVERLAY
|
+ select OF_LIBFDT_OVERLAY
|
||||||
imply DISTRO_DEFAULTS
|
imply DISTRO_DEFAULTS
|
||||||
|
imply DM_RNG
|
||||||
help
|
help
|
||||||
Support for the Meson SoC family developed by Amlogic Inc.,
|
Support for the Meson SoC family developed by Amlogic Inc.,
|
||||||
|
|||||||
Reference in New Issue
Block a user