Move all legacy u-boot patches under one general legacy folder (#4386)

* Move all legacy u-boot patches under one general legacy folder

* Move 32b Rockchip under 2022.04 and legacy for Miqi

Tested

* Move Rock 3A patch dir under legacy

* Move / merge meson64 patch folder into v2022.07

Merge 2022.04 (mainly Rockchip 32) into 2022.07, tested

* Remove not needed patch

* Add last kernel version to config
This commit is contained in:
Igor Pečovnik
2022-11-06 20:32:46 +01:00
committed by GitHub
parent 89e705136c
commit de26797423
160 changed files with 32 additions and 2984 deletions

View File

@@ -4,6 +4,7 @@ GOVERNOR=interactive
SERIALCON=ttymxc0 SERIALCON=ttymxc0
ARCH=armhf ARCH=armhf
UBOOT_TARGET_MAP=';;SPL:SPL.sdhc u-boot.img:u-boot.img.sdhc' UBOOT_TARGET_MAP=';;SPL:SPL.sdhc u-boot.img:u-boot.img.sdhc'
BOOTPATCHDIR='legacy/u-boot-imx6'
case $BRANCH in case $BRANCH in

View File

@@ -14,14 +14,14 @@ case $BRANCH in
KERNELBRANCH='branch:imx_4.14.98_2.0.0_ga' KERNELBRANCH='branch:imx_4.14.98_2.0.0_ga'
KERNELDIR='linux-imx7' KERNELDIR='linux-imx7'
BOOTBRANCH='branch:imx_v2018.03_4.14.98_2.0.0_ga' BOOTBRANCH='branch:imx_v2018.03_4.14.98_2.0.0_ga'
BOOTPATCHDIR="u-boot-imx7d-legacy" BOOTPATCHDIR="legacy"
;; ;;
current | default) current | default)
KERNELSOURCE='https://source.codeaurora.org/external/imx/linux-imx' KERNELSOURCE='https://source.codeaurora.org/external/imx/linux-imx'
KERNELBRANCH='branch:imx_5.4.70_2.3.0' KERNELBRANCH='branch:imx_5.4.70_2.3.0'
KERNELDIR='linux-imx7-current' KERNELDIR='linux-imx7-current'
BOOTBRANCH='branch:imx_v2020.04_5.4.70_2.3.0' BOOTBRANCH='branch:imx_v2020.04_5.4.70_2.3.0'
BOOTPATCHDIR="u-boot-imx7d-current" BOOTPATCHDIR="v2020.04"
;; ;;
esac esac

View File

@@ -6,6 +6,7 @@ ARCH=arm64
SERIALCON=ttyAML0 SERIALCON=ttyAML0
SRC_LOADADDR='LOADADDR=0x1080000' SRC_LOADADDR='LOADADDR=0x1080000'
BOOTBRANCH="${BOOTBRANCH_BOARD:-"tag:v2022.07"}" BOOTBRANCH="${BOOTBRANCH_BOARD:-"tag:v2022.07"}"
BOOTPATCHDIR="${BOOTPATCHDIR:-"v2022.07"}"
OVERLAY_PREFIX='meson' OVERLAY_PREFIX='meson'
# this family does not need it # this family does not need it

View File

@@ -17,7 +17,7 @@ case $BOARD in
BOOTDIR='u-boot-odroidc1' BOOTDIR='u-boot-odroidc1'
BOOTSOURCE='https://github.com/hardkernel/u-boot.git' BOOTSOURCE='https://github.com/hardkernel/u-boot.git'
BOOTBRANCH='branch:odroidc-v2011.03' BOOTBRANCH='branch:odroidc-v2011.03'
BOOTPATCHDIR="legacy"
UBOOT_COMPILER="arm-linux-gnueabihf-" UBOOT_COMPILER="arm-linux-gnueabihf-"
UBOOT_USE_GCC='< 4.9' UBOOT_USE_GCC='< 4.9'

View File

@@ -7,7 +7,7 @@ case $BRANCH in
BOOTSOURCE='https://github.com/SolidRun/u-boot' BOOTSOURCE='https://github.com/SolidRun/u-boot'
BOOTBRANCH='branch:v2018.01-solidrun-a38x' BOOTBRANCH='branch:v2018.01-solidrun-a38x'
BOOTDIR='u-boot-armada' BOOTDIR='u-boot-armada'
BOOTPATCHDIR='u-boot-clearfog' BOOTPATCHDIR='legacy/u-boot-clearfog'
BOOTSCRIPT='boot-mvebu.cmd:boot.cmd' BOOTSCRIPT='boot-mvebu.cmd:boot.cmd'
UBOOT_TARGET_MAP=";sdhc;u-boot-spl-sdhc.kwb:u-boot.mmc UBOOT_TARGET_MAP=";sdhc;u-boot-spl-sdhc.kwb:u-boot.mmc
;mmc;u-boot-spl-mmc.kwb:u-boot.emmc ;mmc;u-boot-spl-mmc.kwb:u-boot.emmc
@@ -22,7 +22,7 @@ case $BRANCH in
BOOTSOURCE='https://github.com/SolidRun/u-boot' BOOTSOURCE='https://github.com/SolidRun/u-boot'
BOOTBRANCH='branch:v2018.01-solidrun-a38x' BOOTBRANCH='branch:v2018.01-solidrun-a38x'
BOOTDIR='u-boot-armada' BOOTDIR='u-boot-armada'
BOOTPATCHDIR='u-boot-clearfog' BOOTPATCHDIR='legacy/u-boot-clearfog'
BOOTSCRIPT='boot-mvebu.cmd:boot.cmd' BOOTSCRIPT='boot-mvebu.cmd:boot.cmd'
UBOOT_TARGET_MAP=";sdhc;u-boot-spl-sdhc.kwb:u-boot.mmc UBOOT_TARGET_MAP=";sdhc;u-boot-spl-sdhc.kwb:u-boot.mmc
;mmc;u-boot-spl-mmc.kwb:u-boot.emmc ;mmc;u-boot-spl-mmc.kwb:u-boot.emmc

View File

@@ -5,7 +5,7 @@ case $BRANCH in
BOOTSOURCE=$MAINLINE_UBOOT_SOURCE BOOTSOURCE=$MAINLINE_UBOOT_SOURCE
BOOTBRANCH='tag:v2019.04' BOOTBRANCH='tag:v2019.04'
BOOTDIR=$MAINLINE_UBOOT_DIR BOOTDIR=$MAINLINE_UBOOT_DIR
BOOTPATCHDIR='u-boot-helios4' BOOTPATCHDIR='legacy/u-boot-helios4'
BOOTSCRIPT='boot-mvebu.cmd:boot.cmd' BOOTSCRIPT='boot-mvebu.cmd:boot.cmd'
UBOOT_TARGET_MAP=";sdhc;u-boot-spl.kwb:u-boot.mmc UBOOT_TARGET_MAP=";sdhc;u-boot-spl.kwb:u-boot.mmc

View File

@@ -29,7 +29,7 @@ esac
case "$KERNEL_VERSION_LEVEL" in case "$KERNEL_VERSION_LEVEL" in
5.10 | 5.15 | 5.16 | 5.17 | 5.18 | 5.19) 5.10 | 5.15 | 5.16 | 5.17 | 5.18 | 5.19 | 6.0)
KERNELSOURCE=$MAINLINE_KERNEL_SOURCE KERNELSOURCE=$MAINLINE_KERNEL_SOURCE
KERNELSOURCENAME='name=origin' KERNELSOURCENAME='name=origin'
KERNELBRANCH="branch:linux-${KERNEL_VERSION_LEVEL}.y" KERNELBRANCH="branch:linux-${KERNEL_VERSION_LEVEL}.y"

View File

@@ -1,7 +1,7 @@
BOOTSCRIPT='boot-mt7623.cmd:boot.cmd' BOOTSCRIPT='boot-mt7623.cmd:boot.cmd'
BOOTENV_FILE='mt7623.txt' BOOTENV_FILE='mt7623.txt'
UBOOT_TARGET_MAP=";;$SRC/packages/blobs/mt7623n/BPI-R2-HEAD440-0k.img $SRC/packages/blobs/mt7623n/BPI-R2-HEAD1-512b.img $SRC/packages/blobs/mt7623n/BPI-R2-preloader-2k.img $SRC/packages/blobs/mt7623n/BPI-R2-EMMC-boot0-0K-0905.img u-boot.bin" UBOOT_TARGET_MAP=";;$SRC/packages/blobs/mt7623n/BPI-R2-HEAD440-0k.img $SRC/packages/blobs/mt7623n/BPI-R2-HEAD1-512b.img $SRC/packages/blobs/mt7623n/BPI-R2-preloader-2k.img $SRC/packages/blobs/mt7623n/BPI-R2-EMMC-boot0-0K-0905.img u-boot.bin"
BOOTPATCHDIR='u-boot-mt7623' BOOTPATCHDIR='legacy'
ARCH=armhf ARCH=armhf
ATF_COMPILE="no" ATF_COMPILE="no"

View File

@@ -1,6 +1,7 @@
enable_extension "marvell-tools" enable_extension "marvell-tools"
ARCH=arm64 ARCH=arm64
BOOTBRANCH='branch:v2022.04' BOOTBRANCH='branch:v2022.04'
BOOTPATCHDIR="v2022.07"
BOOTENV_FILE='mvebu64.txt' BOOTENV_FILE='mvebu64.txt'
BOOTSCRIPT_OUTPUT='boot.scr' BOOTSCRIPT_OUTPUT='boot.scr'
ATFSOURCE='https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git' ATFSOURCE='https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git'

View File

@@ -3,6 +3,7 @@ BOOTSOURCE='https://github.com/hardkernel/u-boot.git'
BOOTSCRIPT='boot-odroid-xu4.ini:boot.ini' BOOTSCRIPT='boot-odroid-xu4.ini:boot.ini'
BOOTDIR='u-boot-odroidxu' BOOTDIR='u-boot-odroidxu'
BOOTBRANCH='branch:odroidxu4-v2017.05' BOOTBRANCH='branch:odroidxu4-v2017.05'
BOOTPATCHDIR="legacy"
UBOOT_TARGET_MAP=';;sd_fuse/bl1.bin.hardkernel sd_fuse/bl2.bin.hardkernel.720k_uboot u-boot-dtb.bin sd_fuse/tzsw.bin.hardkernel' UBOOT_TARGET_MAP=';;sd_fuse/bl1.bin.hardkernel sd_fuse/bl2.bin.hardkernel.720k_uboot u-boot-dtb.bin sd_fuse/tzsw.bin.hardkernel'
case $BRANCH in case $BRANCH in

View File

@@ -2,7 +2,7 @@ source "${BASH_SOURCE%/*}/include/rockchip64_common.inc"
BOOTSOURCE='https://github.com/radxa/u-boot.git' BOOTSOURCE='https://github.com/radxa/u-boot.git'
BOOTBRANCH='branch:stable-4.19-rock3' BOOTBRANCH='branch:stable-4.19-rock3'
BOOTPATCHDIR="u-boot-rk35xx" BOOTPATCHDIR="legacy"
OVERLAY_PREFIX='rk35xx' OVERLAY_PREFIX='rk35xx'
case $BRANCH in case $BRANCH in

View File

@@ -2,7 +2,7 @@ source "${BASH_SOURCE%/*}/include/rockchip64_common.inc"
BOOTSOURCE='https://github.com/radxa/u-boot.git' BOOTSOURCE='https://github.com/radxa/u-boot.git'
BOOTBRANCH='branch:stable-5.10-rock5' BOOTBRANCH='branch:stable-5.10-rock5'
BOOTPATCHDIR="u-boot-rockchip-rk3588" BOOTPATCHDIR="legacy"
OVERLAY_PREFIX='rockchip-rk3588' OVERLAY_PREFIX='rockchip-rk3588'

View File

@@ -7,8 +7,10 @@ UBOOT_TARGET_MAP=";;$SRC/packages/blobs/rockchip/rk3288_boot.bin u-boot-rockchip
BOOTDELAY=1 BOOTDELAY=1
if [[ $BOARD == miqi ]]; then if [[ $BOARD == miqi ]]; then
BOOTBRANCH='tag:v2017.11' BOOTBRANCH='tag:v2017.11'
BOOTPATCHDIR='legacy'
else else
BOOTBRANCH='tag:v2022.04' BOOTBRANCH='tag:v2022.04'
BOOTPATCHDIR='v2022.07'
fi fi
SERIALCON=ttyS2 SERIALCON=ttyS2

View File

@@ -28,7 +28,7 @@ case $BRANCH in
BOOTCONFIG="rockpi-s-rk3308_defconfig" BOOTCONFIG="rockpi-s-rk3308_defconfig"
BOOTSOURCE='https://github.com/piter75/rockchip-u-boot.git' BOOTSOURCE='https://github.com/piter75/rockchip-u-boot.git'
BOOTBRANCH='branch:rockpis-next-dev' BOOTBRANCH='branch:rockpis-next-dev'
BOOTPATCHDIR="u-boot-rockpis" BOOTPATCHDIR="legacy"
UBOOT_COMPILER="aarch64-linux-gnu-" UBOOT_COMPILER="aarch64-linux-gnu-"
BOOTSCRIPT='boot-rockpis.cmd:boot.cmd' BOOTSCRIPT='boot-rockpis.cmd:boot.cmd'
UBOOT_USE_GCC='< 8.0' UBOOT_USE_GCC='< 8.0'

View File

@@ -2,6 +2,7 @@ ARCH=arm64
BOOTSOURCE='https://github.com/rafaello7/u-boot-nanopi-m3' BOOTSOURCE='https://github.com/rafaello7/u-boot-nanopi-m3'
BOOTBRANCH='branch:master' BOOTBRANCH='branch:master'
BOOTDIR='u-boot-s5p6818' BOOTDIR='u-boot-s5p6818'
BOOTPATCHDIR='legacy/u-boot-s5p6818'
BOOTSCRIPT='boot-s5p6818.cmd:boot.cmd' BOOTSCRIPT='boot-s5p6818.cmd:boot.cmd'
BOOTENV_FILE='s5p6818.txt' BOOTENV_FILE='s5p6818.txt'
UBOOT_TARGET_MAP=";;boot.img bootemmc.img" UBOOT_TARGET_MAP=";;boot.img bootemmc.img"

View File

@@ -16,7 +16,7 @@ case $BRANCH in
KERNELDIR='linux-orangepi' KERNELDIR='linux-orangepi'
BOOTSOURCE='https://github.com/orangepi-xunlong/u-boot-orangepi.git' BOOTSOURCE='https://github.com/orangepi-xunlong/u-boot-orangepi.git'
BOOTBRANCH='branch:v2018.05-sun50iw9' BOOTBRANCH='branch:v2018.05-sun50iw9'
BOOTPATCHDIR=u-boot-${LINUXFAMILY} BOOTPATCHDIR="legacy"
UBOOT_TARGET_MAP=";;dts/${BOARD}-u-boot.dts boot0_sdcard.fex boot_package.fex u-boot.bin:u-boot.fex" UBOOT_TARGET_MAP=";;dts/${BOARD}-u-boot.dts boot0_sdcard.fex boot_package.fex u-boot.bin:u-boot.fex"
UBOOT_COMPILER="arm-linux-gnueabi-" UBOOT_COMPILER="arm-linux-gnueabi-"
UBOOT_USE_GCC='> 6.0' UBOOT_USE_GCC='> 6.0'

View File

@@ -1,60 +0,0 @@
From befbb65412d22f698703207d8d29b7707fcb62b3 Mon Sep 17 00:00:00 2001
Message-Id: <befbb65412d22f698703207d8d29b7707fcb62b3.1561459213.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Tue, 19 Mar 2019 19:28:44 +0800
Subject: [PATCH] ARMADA A388 SOM U-Boot ODT Update
Old versions of U-Boot did not configure correctly the ODT on data
signals of DDR RAM on ARMADA A388 SOMs.[1]
The changes on [2] adapted into current source.
[1]
https://developer.solid-run.com/knowledge-base/armada-38x-som-u-boot-odt-update/
[2]https://github.com/SolidRun/u-boot/commit/ab15b2d5b6ee50c106628dc0aa5943747a5dd772
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
drivers/ddr/marvell/a38x/ddr3_training.c | 4 ++--
drivers/ddr/marvell/a38x/mv_ddr_plat.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c
index 799c5ba089..33d4255bba 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training.c
@@ -1606,7 +1606,7 @@ int ddr3_tip_freq_set(u32 dev_num, enum hws_access_type access_type,
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type,
if_id, DDR_ODT_TIMING_LOW_REG,
val, 0xffff0));
- val = 0x91 | ((cwl_value - 1) << 8) | ((cwl_value + 5) << 12);
+ val = 0x71 | ((cwl_value - 1) << 8) | ((cwl_value + 5) << 12);
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type,
if_id, DDR_ODT_TIMING_HIGH_REG,
val, 0xffff));
@@ -1661,7 +1661,7 @@ static int ddr3_tip_write_odt(u32 dev_num, enum hws_access_type access_type,
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
DDR_ODT_TIMING_LOW_REG, val, 0xffff0));
- val = 0x91 | ((cwl_value - 1) << 8) | ((cwl_value + 5) << 12);
+ val = 0x71 | ((cwl_value - 1) << 8) | ((cwl_value + 5) << 12);
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
DDR_ODT_TIMING_HIGH_REG, val, 0xffff));
if (odt_additional == 1) {
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.h b/drivers/ddr/marvell/a38x/mv_ddr_plat.h
index 9c5fdecd93..e01e89ca05 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.h
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.h
@@ -33,7 +33,7 @@
#define TUNE_TRAINING_PARAMS_N_ODT_CTRL 45
#define TUNE_TRAINING_PARAMS_DIC 0x2
#define TUNE_TRAINING_PARAMS_ODT_CONFIG_2CS 0x120012
-#define TUNE_TRAINING_PARAMS_ODT_CONFIG_1CS 0x10000
+#define TUNE_TRAINING_PARAMS_ODT_CONFIG_1CS 0x30000
#define TUNE_TRAINING_PARAMS_RTT_NOM 0x44
#define TUNE_TRAINING_PARAMS_RTT_WR_1CS 0x0 /*off*/
--
2.17.1

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@@ -1,210 +0,0 @@
From 187573405d9fd1d070f035806769cfee52224ac9 Mon Sep 17 00:00:00 2001
Message-Id: <187573405d9fd1d070f035806769cfee52224ac9.1540752056.git.aditya@kobol.io>
In-Reply-To: <3eb15c0c6a0f26e418074cf3be9490a36f9161fd.1540752056.git.aditya@kobol.io>
References: <3eb15c0c6a0f26e418074cf3be9490a36f9161fd.1540752056.git.aditya@kobol.io>
From: Jon Nettleton <jon@solid-run.com>
Date: Thu, 24 Aug 2017 22:28:06 +0200
Subject: [PATCH 03/11] mvebu: rtc: Add DM driver for mvebu rtc
This is heavily based on the linux kernel driver. Please note the
long timeout I have added. I have found that adding this additional
time fixes a lot of the other timing problems that were worked around
with various delays and repeated commands.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
---
drivers/rtc/Kconfig | 7 +++
drivers/rtc/Makefile | 1 +
drivers/rtc/mvebu_rtc.c | 151 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 159 insertions(+)
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index bcc01b1..59b3d2c 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -31,6 +31,13 @@ config TPL_DM_RTC
drivers to perform the actual functions. See rtc.h for a
description of the API.
+config RTC_MVEBU
+ bool "Armada 38x Marvell SoC RTC"
+ depends on DM_RTC
+ help
+ If you say yes here you will get support for the in-chip RTC
+ that can be found in the Armada 38x Marvell's SoC device
+
config RTC_PCF2127
bool "Enable PCF2127 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 1724602..0e23190 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_RTC_MCP79411) += ds1307.o
obj-$(CONFIG_MCFRTC) += mcfrtc.o
obj-$(CONFIG_RTC_MK48T59) += mk48t59.o
obj-$(CONFIG_RTC_MV) += mvrtc.o
+obj-$(CONFIG_RTC_MVEBU) += mvebu_rtc.o
obj-$(CONFIG_RTC_MX27) += mx27rtc.o
obj-$(CONFIG_RTC_MXS) += mxsrtc.o
obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
diff --git a/drivers/rtc/mvebu_rtc.c b/drivers/rtc/mvebu_rtc.c
new file mode 100644
index 0000000..b04d8e6
--- /dev/null
+++ b/drivers/rtc/mvebu_rtc.c
@@ -0,0 +1,151 @@
+/*
+ * (C) Copyright 2015 Solid Run Ltd.
+ * Author: Jon Nettleton <jon@solid-run.com>
+ *
+ * Based on Linux Kernel driver rtc-armada38x.c
+ * Copyright (C) 2015 Marvell
+ * Gregory Clement <gregory.clement@free-electrons.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <rtc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RTC_NOMINAL_TIMING 0x2000
+
+#define RTC_STATUS 0x0
+#define RTC_STATUS_ALARM1 BIT(0)
+#define RTC_STATUS_ALARM2 BIT(1)
+#define RTC_TIME 0xC
+#define RTC_ALARM1 0x10
+#define RTC_CLOCK_CORR 0x18
+#define RTC_TEST_CONF 0x1C
+
+/* armada38x SoC registers */
+#define RTC_38X_BRIDGE_TIMING_CTRL_REG_OFFS 0x0
+#define RTC_38X_WRCLK_PERIOD_OFFS 0
+#define RTC_38X_WRCLK_PERIOD_MASK (0x3FF << RTC_38X_WRCLK_PERIOD_OFFS)
+#define RTC_38X_READ_OUTPUT_DELAY_OFFS 26
+#define RTC_38X_READ_OUTPUT_DELAY_MASK (0x1F << RTC_38X_READ_OUTPUT_DELAY_OFFS)
+
+struct mvebu_rtc_platdata {
+ fdt_addr_t base;
+ fdt_addr_t soc_base;
+};
+
+/*
+ * According to the datasheet, the OS should wait 5us after every
+ * register write to the RTC hard macro so that the required update
+ * can occur without holding off the system bus
+ * According to errata FE-3124064, Write to any RTC register
+ * may fail. As a workaround, before writing to RTC
+ * register, issue a dummy write of 0x0 twice to RTC Status
+ * register.
+ */
+
+static void rtc_delayed_write(u32 val, struct mvebu_rtc_platdata *rtc, int offset)
+{
+ writel(0, rtc->base + RTC_STATUS);
+ writel(0, rtc->base + RTC_STATUS);
+ writel(val, rtc->base + offset);
+ mdelay(10);
+}
+
+static unsigned long read_rtc_reg(struct mvebu_rtc_platdata *rtc, uint8_t rtc_reg)
+{
+ unsigned long value = readl(rtc->base + rtc_reg);
+
+ return value;
+}
+
+static void rtc_update_38x_mbus_timing_params(struct mvebu_rtc_platdata *rtc)
+{
+ uint32_t reg;
+
+ reg = readl(rtc->soc_base + RTC_38X_BRIDGE_TIMING_CTRL_REG_OFFS);
+ reg &= ~RTC_38X_WRCLK_PERIOD_MASK;
+ reg |= 0x3FF << RTC_38X_WRCLK_PERIOD_OFFS; /*Maximum value*/
+ reg &= ~RTC_38X_READ_OUTPUT_DELAY_MASK;
+ reg |= 0x1F << RTC_38X_READ_OUTPUT_DELAY_OFFS; /*Maximum value*/
+ writel(reg, rtc->soc_base + RTC_38X_BRIDGE_TIMING_CTRL_REG_OFFS);
+}
+
+static int mvebu_rtc_get(struct udevice *dev, struct rtc_time *tm)
+{
+ struct mvebu_rtc_platdata *rtc = dev_get_platdata(dev);
+
+ rtc_to_tm(read_rtc_reg(rtc, RTC_TIME), tm);
+
+ return 0;
+}
+
+static int mvebu_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+ struct mvebu_rtc_platdata *rtc = dev_get_platdata(dev);
+ unsigned long time;
+
+ time = rtc_mktime(tm);
+ rtc_delayed_write(time, rtc, RTC_TIME);
+
+ return 0;
+}
+
+static int mvebu_rtc_reset(struct udevice *dev)
+{
+ struct mvebu_rtc_platdata *rtc = dev_get_platdata(dev);
+
+ rtc_delayed_write(0, rtc, RTC_TEST_CONF);
+ rtc_delayed_write(0, rtc, RTC_TIME);
+ rtc_delayed_write((RTC_STATUS_ALARM1 | RTC_STATUS_ALARM2), rtc, RTC_STATUS);
+ rtc_delayed_write(RTC_NOMINAL_TIMING, rtc, RTC_CLOCK_CORR);
+
+ return 0;
+}
+
+static int mvebu_rtc_read8(struct udevice *dev, unsigned int reg)
+{
+ return -ENOSYS;
+}
+
+static int mvebu_rtc_write8(struct udevice *dev, unsigned int reg, int val)
+{
+ return -ENOSYS;
+}
+
+static int mvebu_rtc_probe(struct udevice *dev)
+{
+ struct mvebu_rtc_platdata *rtc = dev_get_platdata(dev);
+
+ rtc->base = devfdt_get_addr(dev);
+ rtc->soc_base = devfdt_get_addr_name(dev, "rtc-soc");
+
+ rtc_update_38x_mbus_timing_params(rtc);
+
+ return 0;
+}
+
+static const struct rtc_ops mvebu_rtc_ops = {
+ .get = mvebu_rtc_get,
+ .set = mvebu_rtc_set,
+ .reset = mvebu_rtc_reset,
+ .read8 = mvebu_rtc_read8,
+ .write8 = mvebu_rtc_write8,
+};
+
+static const struct udevice_id mvebu_rtc_ids[] = {
+ { .compatible = "marvell,armada-380-rtc" },
+ { }
+};
+
+U_BOOT_DRIVER(rtc_mvebu) = {
+ .name = "rtc-mvebu",
+ .id = UCLASS_RTC,
+ .of_match = mvebu_rtc_ids,
+ .probe = mvebu_rtc_probe,
+ .ops = &mvebu_rtc_ops,
+};
--
2.7.4

View File

@@ -1,60 +0,0 @@
From 68876ccdd2fdb5bf450d9d546e18286b4508cf33 Mon Sep 17 00:00:00 2001
Message-Id: <68876ccdd2fdb5bf450d9d546e18286b4508cf33.1561531622.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Wed, 26 Jun 2019 14:42:30 +0800
Subject: [PATCH] mvebu: configs: add boot-marvell.cmd backward compatibility
On system that still use boot.scr derived from boot-marvell.cmd, new
u-boot 2018 will failed to load dtb and script due to missing some
variables. This will render the system unbootable.
These changes added the missing variables.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
include/config_distro_bootcmd.h | 1 +
include/configs/clearfog.h | 2 ++
include/configs/helios4.h | 2 ++
3 files changed, 5 insertions(+)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 4993303f..97af842e 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -411,6 +411,7 @@
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
+ "setenv boot_interface ${devtype};" \
"source ${scriptaddr}\0" \
\
"scan_dev_for_scripts=" \
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index c51cf284..bbbfff71 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -148,6 +148,8 @@
LOAD_ADDRESS_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"console=ttyS0,115200\0" \
+ "loadaddr=0x02000000\0" \
+ "fdt_addr=" FDT_ADDR_R "\0" \
BOOTENV
#endif /* CONFIG_SPL_BUILD */
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index df4d8bcb..ef6c4ed6 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -174,6 +174,8 @@
LOAD_ADDRESS_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"console=ttyS0,115200\0" \
+ "loadaddr=0x02000000\0" \
+ "fdt_addr=" FDT_ADDR_R "\0" \
BOOTENV
#endif /* CONFIG_SPL_BUILD */
--
2.17.1

View File

@@ -1,117 +0,0 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0e2ffdb87..e3ce81137 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-uDPU.dtb \
armada-375-db.dtb \
armada-388-clearfog.dtb \
+ armada-388-clearfog-base.dtb \
armada-388-gp.dtb \
armada-388-helios4.dtb \
armada-385-amc.dtb \
diff --git a/arch/arm/dts/armada-388-clearfog-base-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-base-u-boot.dtsi
new file mode 100644
index 000000000..f31691ee9
--- /dev/null
+++ b/arch/arm/dts/armada-388-clearfog-base-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&spi1 {
+ u-boot,dm-spl;
+
+ spi-flash@0 {
+ u-boot,dm-spl;
+ };
+};
diff --git a/arch/arm/dts/armada-388-clearfog-base.dts b/arch/arm/dts/armada-388-clearfog-base.dts
new file mode 100644
index 000000000..d20ec739c
--- /dev/null
+++ b/arch/arm/dts/armada-388-clearfog-base.dts
@@ -0,0 +1,9 @@
+#include "armada-388-clearfog.dts"
+
+/ {
+ model = "SolidRun Clearfog Base";
+ compatible = "solidrun,clearfog-base", "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
+
+ /delete-node/ dsa@0;
+};
diff --git a/configs/clearfogbase_defconfig b/configs/clearfogbase_defconfig
new file mode 100644
index 000000000..65bc784a4
--- /dev/null
+++ b/configs/clearfogbase_defconfig
@@ -0,0 +1,66 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_CLEARFOG=y
+CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog-base"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_SCSI_AHCI=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_MV=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
+CONFIG_MII=y
+CONFIG_PCI=y
+CONFIG_PCI_MVEBU=y
+CONFIG_SCSI=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
--
2.17.1

View File

@@ -1,85 +0,0 @@
From 5e830c7c547daf781a93b69140bdded5609b6f08 Mon Sep 17 00:00:00 2001
Message-Id: <5e830c7c547daf781a93b69140bdded5609b6f08.1561706494.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Fri, 28 Jun 2019 15:21:18 +0800
Subject: [PATCH] arm: dts: armada-38x: Fix broken SPI support after dts sync
SPI support on mainline u-boot is broken since
commit 30c4383 (ARM: mvebu: sync Armada-38x dts with Linux 4.20)
revert the changes on SPI node only.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
arch/arm/dts/armada-38x.dtsi | 48 ++++++++++++++++++------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/dts/armada-38x.dtsi b/arch/arm/dts/armada-38x.dtsi
index 72c49beb71..f21a817444 100644
--- a/arch/arm/dts/armada-38x.dtsi
+++ b/arch/arm/dts/armada-38x.dtsi
@@ -133,6 +133,30 @@
clocks = <&coreclk 2>;
};
+ spi0: spi@10600 {
+ compatible = "marvell,armada-380-spi",
+ "marvell,orion-spi";
+ reg = <0x10600 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ spi1: spi@10680 {
+ compatible = "marvell,armada-380-spi",
+ "marvell,orion-spi";
+ reg = <0x10680 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@d000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
@@ -620,30 +644,6 @@
no-memory-wc;
status = "disabled";
};
-
- spi0: spi@10600 {
- compatible = "marvell,armada-380-spi",
- "marvell,orion-spi";
- reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&coreclk 0>;
- status = "disabled";
- };
-
- spi1: spi@10680 {
- compatible = "marvell,armada-380-spi",
- "marvell,orion-spi";
- reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <1>;
- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&coreclk 0>;
- status = "disabled";
- };
};
clocks {
--
2.17.1

View File

@@ -1,34 +0,0 @@
From 351f4566aeaff51d999554a2be40ab6a40fb617d Mon Sep 17 00:00:00 2001
Message-Id: <351f4566aeaff51d999554a2be40ab6a40fb617d.1561517341.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Wed, 26 Jun 2019 10:07:05 +0800
Subject: [PATCH 1/2] configs: Enable U-Boot RTC support on Clearfog
---
configs/clearfog_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/clearfogbase_defconfig b/configs/clearfogbase_defconfig
index 0429071..8cc34f3 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_DATE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
@@ -58,6 +59,8 @@ CONFIG_MII=y
CONFIG_PCI=y
CONFIG_PCI_MVEBU=y
CONFIG_SCSI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_MVEBU=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
--
2.17.1

View File

@@ -1,37 +0,0 @@
From 1e9b721fe025578f00b7150665909e74f4f9fe9d Mon Sep 17 00:00:00 2001
Message-Id: <1e9b721fe025578f00b7150665909e74f4f9fe9d.1561531622.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Wed, 26 Jun 2019 14:46:02 +0800
Subject: [PATCH 1/2] arm: mvebu: clearfog: Update Load address
Use the values from U-Boot 2013.01 Marvell version: 2015_T1.0p16
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
include/configs/clearfog.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index bbbfff71..5707ea24 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -128,11 +128,11 @@
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
-#define KERNEL_ADDR_R __stringify(0x800000)
-#define FDT_ADDR_R __stringify(0x100000)
-#define RAMDISK_ADDR_R __stringify(0x1800000)
-#define SCRIPT_ADDR_R __stringify(0x200000)
-#define PXEFILE_ADDR_R __stringify(0x300000)
+#define KERNEL_ADDR_R __stringify(0x2080000)
+#define FDT_ADDR_R __stringify(0x2040000)
+#define RAMDISK_ADDR_R __stringify(0x2880000)
+#define SCRIPT_ADDR_R __stringify(0x3000000)
+#define PXEFILE_ADDR_R __stringify(0x3100000)
#define LOAD_ADDRESS_ENV_SETTINGS \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
--
2.17.1

View File

@@ -1,29 +0,0 @@
diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts
index 4ddeaa02f1..2792209b64 100644
--- a/arch/arm/dts/armada-388-clearfog.dts
+++ b/arch/arm/dts/armada-388-clearfog.dts
@@ -53,7 +53,7 @@
#include "armada-38x-solidrun-microsom.dtsi"
/ {
- model = "SolidRun Clearfog A1";
+ model = "SolidRun Clearfog";
compatible = "solidrun,clearfog-a1", "marvell,armada388",
"marvell,armada385", "marvell,armada380";
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 03724fee10..4650d754c2 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -125,7 +125,7 @@ int board_init(void)
int checkboard(void)
{
- puts("Board: SolidRun ClearFog\n");
+ puts("Board: SolidRun ClearFog Base\n");
return 0;
}
--
2.17.1

View File

@@ -1,49 +0,0 @@
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index f644547..f6e8ad5 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm-generic/gpio.h>
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
#include <../serdes/a38x/high_speed_env_spec.h>
@@ -120,6 +121,36 @@ int board_init(void)
setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
mdelay(10);
+#ifdef CONFIG_DM_GPIO
+ struct gpio_desc pcie0_reset,
+ pcie1_reset;
+ int res;
+
+ /* Toogle PERST# on miniPCIe1 (CON2) and miniPCIe0 (CON3) */
+ res = dm_gpio_lookup_name("gpio@20_1", &pcie0_reset);
+ if (!res) {
+ res = dm_gpio_request(&pcie0_reset, "pcie0-reset");
+ if (!res)
+ dm_gpio_set_dir_flags(&pcie0_reset,GPIOD_IS_OUT |
+ GPIOD_ACTIVE_LOW);
+ }
+
+ res = dm_gpio_lookup_name("gpio@20_2", &pcie1_reset);
+ if (!res) {
+ res = dm_gpio_request(&pcie1_reset, "pcie1-reset");
+ if (!res)
+ dm_gpio_set_dir_flags(&pcie1_reset,GPIOD_IS_OUT |
+ GPIOD_ACTIVE_LOW);
+ }
+
+ dm_gpio_set_value(&pcie0_reset, 1);
+ dm_gpio_set_value(&pcie1_reset, 1);
+ mdelay(100);
+ dm_gpio_set_value(&pcie0_reset, 0);
+ dm_gpio_set_value(&pcie1_reset, 0);
+ mdelay(100);
+#endif
+
return 0;
}

View File

@@ -1,16 +0,0 @@
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 4650d754c2..53922793ad 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -33,7 +33,7 @@ static struct serdes_map board_serdes_map[] = {
{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
{USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
+ {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
};
--
2.17.1

View File

@@ -1,34 +0,0 @@
From 351f4566aeaff51d999554a2be40ab6a40fb617d Mon Sep 17 00:00:00 2001
Message-Id: <351f4566aeaff51d999554a2be40ab6a40fb617d.1561517341.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Wed, 26 Jun 2019 10:07:05 +0800
Subject: [PATCH 1/2] configs: Enable U-Boot RTC support on Clearfog
---
configs/clearfog_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 0429071..8cc34f3 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_DATE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
@@ -58,6 +59,8 @@ CONFIG_MII=y
CONFIG_PCI=y
CONFIG_PCI_MVEBU=y
CONFIG_SCSI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_MVEBU=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
--
2.17.1

View File

@@ -1,37 +0,0 @@
From 1e9b721fe025578f00b7150665909e74f4f9fe9d Mon Sep 17 00:00:00 2001
Message-Id: <1e9b721fe025578f00b7150665909e74f4f9fe9d.1561531622.git.aditya@kobol.io>
From: Aditya Prayoga <aditya@kobol.io>
Date: Wed, 26 Jun 2019 14:46:02 +0800
Subject: [PATCH 1/2] arm: mvebu: clearfog: Update Load address
Use the values from U-Boot 2013.01 Marvell version: 2015_T1.0p16
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
include/configs/clearfog.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index bbbfff71..5707ea24 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -128,11 +128,11 @@
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
-#define KERNEL_ADDR_R __stringify(0x800000)
-#define FDT_ADDR_R __stringify(0x100000)
-#define RAMDISK_ADDR_R __stringify(0x1800000)
-#define SCRIPT_ADDR_R __stringify(0x200000)
-#define PXEFILE_ADDR_R __stringify(0x300000)
+#define KERNEL_ADDR_R __stringify(0x2080000)
+#define FDT_ADDR_R __stringify(0x2040000)
+#define RAMDISK_ADDR_R __stringify(0x2880000)
+#define SCRIPT_ADDR_R __stringify(0x3000000)
+#define PXEFILE_ADDR_R __stringify(0x3100000)
#define LOAD_ADDRESS_ENV_SETTINGS \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
--
2.17.1

View File

@@ -1,29 +0,0 @@
diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts
index 4ddeaa02f1..2792209b64 100644
--- a/arch/arm/dts/armada-388-clearfog.dts
+++ b/arch/arm/dts/armada-388-clearfog.dts
@@ -53,7 +53,7 @@
#include "armada-38x-solidrun-microsom.dtsi"
/ {
- model = "SolidRun Clearfog A1";
+ model = "SolidRun Clearfog";
compatible = "solidrun,clearfog-a1", "marvell,armada388",
"marvell,armada385", "marvell,armada380";
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 03724fee10..f644547c12 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -125,7 +125,7 @@ int board_init(void)
int checkboard(void)
{
- puts("Board: SolidRun ClearFog\n");
+ puts("Board: SolidRun ClearFog Pro\n");
return 0;
}
--
2.17.1

Some files were not shown because too many files have changed in this diff Show More