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Bump imx6, xu4, rockchip64 and jetson-nano to 5.15 (#3238)

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* Bump to 5.15.y imx6, xu4, rocchip64, jetson-nano

* Sunxi patches cleanup

Thanks @jernejsk

* Bump Meson64 to 5.15.y

* Bump mvebu* to 5.15.y

@heisath

Disable 13-net-mvneta.patch - double check.

* Add uppstram patch for opi zero2 legacy kernel

* Update mvebu mvneta patch

* Orangepi Zero2 reboot fix

Co-authored-by: Heisath <jannis@imserv.org>
This commit is contained in:
Igor Pečovnik
2021-11-09 18:06:34 +01:00
committed by GitHub
parent 36c06fec28
commit dd51f9f2af
365 changed files with 109128 additions and 2240 deletions
Download Patch File Download Diff File Expand all files Collapse all files

258
config/kernel/linux-imx6-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm 5.14.8 Kernel Configuration # Linux/arm 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -24,6 +24,7 @@ CONFIG_BUILDTIME_TABLE_SORT=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="" CONFIG_BUILD_SALT=""
@@ -154,6 +155,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_BUF_SHIFT=18
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -217,12 +219,12 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y CONFIG_FUTEX_PI=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_SIGNALFD=y CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y CONFIG_TIMERFD=y
@@ -274,7 +276,6 @@ CONFIG_HAVE_PROC_CPU=y
CONFIG_NO_IOPORT_MAP=y CONFIG_NO_IOPORT_MAP=y
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_ARCH_HAS_BANDGAP=y CONFIG_ARCH_HAS_BANDGAP=y
CONFIG_FIX_EARLYCON_MEM=y CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
@@ -470,8 +471,6 @@ CONFIG_SOC_TI81XX=y
# #
# OMAP Legacy Platform Data Board Type # OMAP Legacy Platform Data Board Type
# #
# CONFIG_MACH_OMAP3517EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_OMAP3_SDRC_AC_TIMING is not set # CONFIG_OMAP3_SDRC_AC_TIMING is not set
# end of TI OMAP2/3/4 Specific Features # end of TI OMAP2/3/4 Specific Features
@@ -798,55 +797,6 @@ CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y
# end of Power management options # end of Power management options
#
# Firmware Drivers
#
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCMI_POWER_DOMAIN=m
CONFIG_ARM_SCPI_PROTOCOL=m
CONFIG_ARM_SCPI_POWER_DOMAIN=m
CONFIG_DMIID=y
CONFIG_DMI_SYSFS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_QCOM_SCM=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_TURRIS_MOX_RWTM=m
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
# CONFIG_EFI_CAPSULE_LOADER is not set
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
CONFIG_EFI_DISABLE_PCI_DMA=y
# end of EFI (Extensible Firmware Interface) Support
CONFIG_IMX_DSP=m
# CONFIG_IMX_SCU is not set
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
CONFIG_TEGRA_IVC=y
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARM_CRYPTO=y CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM=m CONFIG_CRYPTO_SHA1_ARM=m
CONFIG_CRYPTO_SHA1_ARM_NEON=m CONFIG_CRYPTO_SHA1_ARM_NEON=m
@@ -873,7 +823,6 @@ CONFIG_AS_VFP_VMRS_FPINST=y
# #
CONFIG_CRASH_CORE=y CONFIG_CRASH_CORE=y
CONFIG_KEXEC_CORE=y CONFIG_KEXEC_CORE=y
CONFIG_SET_FS=y
CONFIG_KPROBES=y CONFIG_KPROBES=y
CONFIG_JUMP_LABEL=y CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set # CONFIG_STATIC_KEYS_SELFTEST is not set
@@ -886,6 +835,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -975,16 +925,14 @@ CONFIG_MODULE_COMPRESS_XZ=y
CONFIG_MODPROBE_PATH="/sbin/modprobe" CONFIG_MODPROBE_PATH="/sbin/modprobe"
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
CONFIG_BLK_WBT=y CONFIG_BLK_WBT=y
CONFIG_BLK_WBT_MQ=y CONFIG_BLK_WBT_MQ=y
CONFIG_BLK_CGROUP_IOLATENCY=y CONFIG_BLK_CGROUP_IOLATENCY=y
@@ -1026,6 +974,7 @@ CONFIG_EFI_PARTITION=y
CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -1117,6 +1066,12 @@ CONFIG_ZONE_DMA=y
# CONFIG_PERCPU_STATS is not set # CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set # CONFIG_GUP_TEST is not set
CONFIG_KMAP_LOCAL=y CONFIG_KMAP_LOCAL=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -1132,6 +1087,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
CONFIG_TLS=m CONFIG_TLS=m
# CONFIG_TLS_DEVICE is not set # CONFIG_TLS_DEVICE is not set
@@ -1242,6 +1198,7 @@ CONFIG_IPV6_SEG6_LWTUNNEL=y
CONFIG_IPV6_SEG6_HMAC=y CONFIG_IPV6_SEG6_HMAC=y
CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_SEG6_BPF=y
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
CONFIG_NETLABEL=y CONFIG_NETLABEL=y
# CONFIG_MPTCP is not set # CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
@@ -1667,6 +1624,8 @@ CONFIG_NET_DSA_TAG_EDSA=m
CONFIG_NET_DSA_TAG_MTK=m CONFIG_NET_DSA_TAG_MTK=m
CONFIG_NET_DSA_TAG_KSZ=m CONFIG_NET_DSA_TAG_KSZ=m
CONFIG_NET_DSA_TAG_RTL4_A=m CONFIG_NET_DSA_TAG_RTL4_A=m
CONFIG_NET_DSA_TAG_OCELOT=m
CONFIG_NET_DSA_TAG_OCELOT_8021Q=m
CONFIG_NET_DSA_TAG_QCA=m CONFIG_NET_DSA_TAG_QCA=m
CONFIG_NET_DSA_TAG_LAN9303=m CONFIG_NET_DSA_TAG_LAN9303=m
CONFIG_NET_DSA_TAG_SJA1105=m CONFIG_NET_DSA_TAG_SJA1105=m
@@ -2011,6 +1970,7 @@ CONFIG_AF_RXRPC_DEBUG=y
CONFIG_RXKAD=y CONFIG_RXKAD=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
CONFIG_STREAM_PARSER=y CONFIG_STREAM_PARSER=y
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -2175,6 +2135,7 @@ CONFIG_PCI_IMX6=y
# CONFIG_PCI_LAYERSCAPE is not set # CONFIG_PCI_LAYERSCAPE is not set
CONFIG_PCIE_QCOM=y CONFIG_PCIE_QCOM=y
# CONFIG_PCIE_ARMADA_8K is not set # CONFIG_PCIE_ARMADA_8K is not set
# CONFIG_PCIE_ROCKCHIP_DW_HOST is not set
CONFIG_PCI_MESON=y CONFIG_PCI_MESON=y
# end of DesignWare PCI Core Support # end of DesignWare PCI Core Support
@@ -2303,7 +2264,6 @@ CONFIG_MVEBU_MBUS=y
CONFIG_OMAP_INTERCONNECT=y CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=m CONFIG_OMAP_OCP2SCP=m
# CONFIG_QCOM_EBI2 is not set # CONFIG_QCOM_EBI2 is not set
CONFIG_SIMPLE_PM_BUS=y
# CONFIG_SUN50I_DE2_BUS is not set # CONFIG_SUN50I_DE2_BUS is not set
CONFIG_SUNXI_RSB=m CONFIG_SUNXI_RSB=m
CONFIG_TEGRA_GMI=m CONFIG_TEGRA_GMI=m
@@ -2318,6 +2278,69 @@ CONFIG_MHI_BUS_PCI_GENERIC=m
CONFIG_CONNECTOR=y CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y CONFIG_PROC_EVENTS=y
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=m
# end of ARM System Control and Management Interface Protocol
CONFIG_ARM_SCPI_PROTOCOL=m
CONFIG_ARM_SCPI_POWER_DOMAIN=m
CONFIG_DMIID=y
CONFIG_DMI_SYSFS=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_QCOM_SCM=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
CONFIG_SYSFB=y
# CONFIG_SYSFB_SIMPLEFB is not set
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_TURRIS_MOX_RWTM=m
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
# CONFIG_EFI_CAPSULE_LOADER is not set
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
CONFIG_EFI_DISABLE_PCI_DMA=y
# end of EFI (Extensible Firmware Interface) Support
CONFIG_IMX_DSP=m
# CONFIG_IMX_SCU is not set
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
CONFIG_TEGRA_IVC=y
# end of Tegra firmware driver
# end of Firmware Drivers
# CONFIG_GNSS is not set # CONFIG_GNSS is not set
CONFIG_MTD=m CONFIG_MTD=m
# CONFIG_MTD_TESTS is not set # CONFIG_MTD_TESTS is not set
@@ -2339,6 +2362,10 @@ CONFIG_MTD_OF_PARTS=m
CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLKDEVS=m
CONFIG_MTD_BLOCK=m CONFIG_MTD_BLOCK=m
# CONFIG_MTD_BLOCK_RO is not set # CONFIG_MTD_BLOCK_RO is not set
#
# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK.
#
# CONFIG_FTL is not set # CONFIG_FTL is not set
# CONFIG_NFTL is not set # CONFIG_NFTL is not set
# CONFIG_INFTL is not set # CONFIG_INFTL is not set
@@ -2553,6 +2580,8 @@ CONFIG_TIFM_CORE=m
CONFIG_TIFM_7XX1=m CONFIG_TIFM_7XX1=m
# CONFIG_ICS932S401 is not set # CONFIG_ICS932S401 is not set
CONFIG_ENCLOSURE_SERVICES=m CONFIG_ENCLOSURE_SERVICES=m
CONFIG_GEHC_ACHC=m
CONFIG_HI6421V600_IRQ=m
# CONFIG_HP_ILO is not set # CONFIG_HP_ILO is not set
CONFIG_QCOM_COINCELL=m CONFIG_QCOM_COINCELL=m
CONFIG_QCOM_FASTRPC=m CONFIG_QCOM_FASTRPC=m
@@ -2617,6 +2646,7 @@ CONFIG_UACCE=m
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
CONFIG_RAID_ATTRS=m CONFIG_RAID_ATTRS=m
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
CONFIG_SCSI_NETLINK=y CONFIG_SCSI_NETLINK=y
@@ -2629,6 +2659,7 @@ CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=m CONFIG_CHR_DEV_ST=m
CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SG=y
CONFIG_BLK_DEV_BSG=y
CONFIG_CHR_DEV_SCH=m CONFIG_CHR_DEV_SCH=m
CONFIG_SCSI_ENCLOSURE=m CONFIG_SCSI_ENCLOSURE=m
CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_CONSTANTS=y
@@ -2693,6 +2724,7 @@ CONFIG_SCSI_UFS_QCOM=m
CONFIG_SCSI_UFS_BSG=y CONFIG_SCSI_UFS_BSG=y
CONFIG_SCSI_UFS_EXYNOS=m CONFIG_SCSI_UFS_EXYNOS=m
# CONFIG_SCSI_UFS_CRYPTO is not set # CONFIG_SCSI_UFS_CRYPTO is not set
# CONFIG_SCSI_UFS_HPB is not set
CONFIG_SCSI_HPTIOP=m CONFIG_SCSI_HPTIOP=m
CONFIG_SCSI_MYRB=m CONFIG_SCSI_MYRB=m
CONFIG_SCSI_MYRS=m CONFIG_SCSI_MYRS=m
@@ -2876,7 +2908,6 @@ CONFIG_DM_THIN_PROVISIONING=m
CONFIG_DM_CACHE=m CONFIG_DM_CACHE=m
CONFIG_DM_CACHE_SMQ=m CONFIG_DM_CACHE_SMQ=m
CONFIG_DM_WRITECACHE=m CONFIG_DM_WRITECACHE=m
CONFIG_DM_EBS=m
# CONFIG_DM_ERA is not set # CONFIG_DM_ERA is not set
CONFIG_DM_CLONE=m CONFIG_DM_CLONE=m
CONFIG_DM_MIRROR=m CONFIG_DM_MIRROR=m
@@ -3124,6 +3155,8 @@ CONFIG_FM10K=m
CONFIG_IGC=m CONFIG_IGC=m
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
CONFIG_JME=m CONFIG_JME=m
CONFIG_NET_VENDOR_LITEX=y
# CONFIG_LITEX_LITEETH is not set
CONFIG_NET_VENDOR_MARVELL=y CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MV643XX_ETH=m CONFIG_MV643XX_ETH=m
CONFIG_MVMDIO=m CONFIG_MVMDIO=m
@@ -3290,6 +3323,7 @@ CONFIG_LSI_ET1011C_PHY=m
CONFIG_MARVELL_PHY=m CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m CONFIG_MARVELL_10G_PHY=m
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m CONFIG_MEDIATEK_GE_PHY=m
CONFIG_MICREL_PHY=m CONFIG_MICREL_PHY=m
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
@@ -3315,6 +3349,10 @@ CONFIG_DP83869_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
CONFIG_XILINX_GMII2RGMII=m CONFIG_XILINX_GMII2RGMII=m
CONFIG_MICREL_KS8995MA=m CONFIG_MICREL_KS8995MA=m
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
@@ -3551,7 +3589,6 @@ CONFIG_P54_PCI=m
CONFIG_P54_SPI=m CONFIG_P54_SPI=m
# CONFIG_P54_SPI_DEFAULT_EEPROM is not set # CONFIG_P54_SPI_DEFAULT_EEPROM is not set
CONFIG_P54_LEDS=y CONFIG_P54_LEDS=y
# CONFIG_PRISM54 is not set
CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MARVELL=y
CONFIG_LIBERTAS=m CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_USB=m CONFIG_LIBERTAS_USB=m
@@ -3718,6 +3755,7 @@ CONFIG_IEEE802154_MCR20A=m
CONFIG_WWAN=m CONFIG_WWAN=m
CONFIG_WWAN_HWSIM=m CONFIG_WWAN_HWSIM=m
CONFIG_MHI_WWAN_CTRL=m CONFIG_MHI_WWAN_CTRL=m
CONFIG_MHI_WWAN_MBIM=m
CONFIG_RPMSG_WWAN_CTRL=m CONFIG_RPMSG_WWAN_CTRL=m
# end of Wireless WAN # end of Wireless WAN
@@ -3726,7 +3764,6 @@ CONFIG_USB4_NET=m
# CONFIG_NETDEVSIM is not set # CONFIG_NETDEVSIM is not set
CONFIG_NET_FAILOVER=m CONFIG_NET_FAILOVER=m
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
# CONFIG_NVM is not set
# #
# Input device support # Input device support
@@ -4123,7 +4160,6 @@ CONFIG_CONSOLE_POLL=y
CONFIG_SERIAL_JSM=m CONFIG_SERIAL_JSM=m
CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_MSM_CONSOLE=y
# CONFIG_SERIAL_OMAP is not set
# CONFIG_SERIAL_SIFIVE is not set # CONFIG_SERIAL_SIFIVE is not set
# CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_SC16IS7XX is not set
@@ -4186,6 +4222,7 @@ CONFIG_HW_RANDOM_EXYNOS=m
CONFIG_HW_RANDOM_OPTEE=m CONFIG_HW_RANDOM_OPTEE=m
CONFIG_HW_RANDOM_CCTRNG=m CONFIG_HW_RANDOM_CCTRNG=m
CONFIG_HW_RANDOM_XIPHERA=m CONFIG_HW_RANDOM_XIPHERA=m
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
CONFIG_DEVMEM=y CONFIG_DEVMEM=y
CONFIG_DEVPORT=y CONFIG_DEVPORT=y
@@ -4208,9 +4245,8 @@ CONFIG_XILLYBUS=m
CONFIG_XILLYBUS_PCIE=m CONFIG_XILLYBUS_PCIE=m
CONFIG_XILLYBUS_OF=m CONFIG_XILLYBUS_OF=m
CONFIG_XILLYUSB=m CONFIG_XILLYUSB=m
# end of Character devices
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
# #
# I2C support # I2C support
@@ -4318,6 +4354,7 @@ CONFIG_I2C_VIPERBOARD=m
# #
CONFIG_I2C_CROS_EC_TUNNEL=m CONFIG_I2C_CROS_EC_TUNNEL=m
# CONFIG_I2C_FSI is not set # CONFIG_I2C_FSI is not set
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
CONFIG_I2C_STUB=m CONFIG_I2C_STUB=m
@@ -4375,6 +4412,7 @@ CONFIG_SPI_PL022=m
CONFIG_SPI_PXA2XX=m CONFIG_SPI_PXA2XX=m
CONFIG_SPI_PXA2XX_PCI=m CONFIG_SPI_PXA2XX_PCI=m
CONFIG_SPI_ROCKCHIP=m CONFIG_SPI_ROCKCHIP=m
CONFIG_SPI_ROCKCHIP_SFC=m
CONFIG_SPI_QCOM_QSPI=m CONFIG_SPI_QCOM_QSPI=m
CONFIG_SPI_QUP=m CONFIG_SPI_QUP=m
CONFIG_SPI_S3C64XX=m CONFIG_SPI_S3C64XX=m
@@ -4433,6 +4471,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PTP_1588_CLOCK_QORIQ=m CONFIG_PTP_1588_CLOCK_QORIQ=m
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
CONFIG_PTP_1588_CLOCK_INES=m CONFIG_PTP_1588_CLOCK_INES=m
@@ -4478,6 +4517,7 @@ CONFIG_PINCTRL_IMX7ULP=y
# CONFIG_PINCTRL_IMX8MN is not set # CONFIG_PINCTRL_IMX8MN is not set
# CONFIG_PINCTRL_IMX8MP is not set # CONFIG_PINCTRL_IMX8MP is not set
# CONFIG_PINCTRL_IMX8MQ is not set # CONFIG_PINCTRL_IMX8MQ is not set
CONFIG_PINCTRL_IMX8ULP=m
CONFIG_PINCTRL_MVEBU=y CONFIG_PINCTRL_MVEBU=y
CONFIG_PINCTRL_DOVE=y CONFIG_PINCTRL_DOVE=y
CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_370=y
@@ -4495,6 +4535,7 @@ CONFIG_PINCTRL_IPQ6018=m
CONFIG_PINCTRL_MSM8226=m CONFIG_PINCTRL_MSM8226=m
CONFIG_PINCTRL_MSM8660=m CONFIG_PINCTRL_MSM8660=m
CONFIG_PINCTRL_MSM8960=m CONFIG_PINCTRL_MSM8960=m
CONFIG_PINCTRL_MDM9607=m
# CONFIG_PINCTRL_MDM9615 is not set # CONFIG_PINCTRL_MDM9615 is not set
CONFIG_PINCTRL_MSM8X74=m CONFIG_PINCTRL_MSM8X74=m
CONFIG_PINCTRL_MSM8916=m CONFIG_PINCTRL_MSM8916=m
@@ -4512,6 +4553,7 @@ CONFIG_PINCTRL_SC8180X=m
# CONFIG_PINCTRL_SDM660 is not set # CONFIG_PINCTRL_SDM660 is not set
# CONFIG_PINCTRL_SDM845 is not set # CONFIG_PINCTRL_SDM845 is not set
CONFIG_PINCTRL_SDX55=m CONFIG_PINCTRL_SDX55=m
CONFIG_PINCTRL_SM6115=m
CONFIG_PINCTRL_SM6125=m CONFIG_PINCTRL_SM6125=m
# CONFIG_PINCTRL_SM8150 is not set # CONFIG_PINCTRL_SM8150 is not set
CONFIG_PINCTRL_SM8250=m CONFIG_PINCTRL_SM8250=m
@@ -4593,6 +4635,7 @@ CONFIG_GPIO_MXC=y
CONFIG_GPIO_OMAP=y CONFIG_GPIO_OMAP=y
CONFIG_GPIO_PL061=y CONFIG_GPIO_PL061=y
CONFIG_GPIO_PXA=y CONFIG_GPIO_PXA=y
CONFIG_GPIO_ROCKCHIP=m
# CONFIG_GPIO_SAMA5D2_PIOBU is not set # CONFIG_GPIO_SAMA5D2_PIOBU is not set
# CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SIFIVE is not set
CONFIG_GPIO_SYSCON=m CONFIG_GPIO_SYSCON=m
@@ -4675,6 +4718,7 @@ CONFIG_GPIO_VIPERBOARD=m
# #
CONFIG_GPIO_AGGREGATOR=m CONFIG_GPIO_AGGREGATOR=m
# CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_MOCKUP is not set
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
CONFIG_W1=m CONFIG_W1=m
@@ -4732,6 +4776,7 @@ CONFIG_POWER_RESET_QCOM_PON=m
# CONFIG_POWER_RESET_REGULATOR is not set # CONFIG_POWER_RESET_REGULATOR is not set
CONFIG_POWER_RESET_RESTART=y CONFIG_POWER_RESET_RESTART=y
CONFIG_POWER_RESET_ST=y CONFIG_POWER_RESET_ST=y
# CONFIG_POWER_RESET_TPS65086 is not set
CONFIG_POWER_RESET_VERSATILE=y CONFIG_POWER_RESET_VERSATILE=y
CONFIG_POWER_RESET_VEXPRESS=y CONFIG_POWER_RESET_VEXPRESS=y
CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON=y
@@ -4763,7 +4808,6 @@ CONFIG_BATTERY_DA9052=m
CONFIG_CHARGER_AXP20X=m CONFIG_CHARGER_AXP20X=m
CONFIG_BATTERY_AXP20X=m CONFIG_BATTERY_AXP20X=m
CONFIG_AXP20X_POWER=m CONFIG_AXP20X_POWER=m
CONFIG_AXP288_FUEL_GAUGE=m
# CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set # CONFIG_BATTERY_MAX17042 is not set
# CONFIG_BATTERY_MAX1721X is not set # CONFIG_BATTERY_MAX1721X is not set
@@ -4782,6 +4826,7 @@ CONFIG_CHARGER_LTC4162L=m
CONFIG_CHARGER_MAX77650=m CONFIG_CHARGER_MAX77650=m
CONFIG_CHARGER_MAX8997=m CONFIG_CHARGER_MAX8997=m
CONFIG_CHARGER_MP2629=m CONFIG_CHARGER_MP2629=m
CONFIG_CHARGER_MT6360=m
CONFIG_CHARGER_QCOM_SMBB=m CONFIG_CHARGER_QCOM_SMBB=m
CONFIG_CHARGER_BQ2415X=m CONFIG_CHARGER_BQ2415X=m
CONFIG_CHARGER_BQ24190=m CONFIG_CHARGER_BQ24190=m
@@ -4799,6 +4844,7 @@ CONFIG_BATTERY_GOLDFISH=m
CONFIG_BATTERY_RT5033=m CONFIG_BATTERY_RT5033=m
# CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9455 is not set
CONFIG_CHARGER_CROS_USBPD=m CONFIG_CHARGER_CROS_USBPD=m
CONFIG_CHARGER_CROS_PCHG=m
CONFIG_CHARGER_UCS1002=m CONFIG_CHARGER_UCS1002=m
CONFIG_CHARGER_BD99954=m CONFIG_CHARGER_BD99954=m
CONFIG_BATTERY_ACER_A500=m CONFIG_BATTERY_ACER_A500=m
@@ -4829,6 +4875,7 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
CONFIG_SENSORS_AS370=m CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_AXI_FAN_CONTROL=m CONFIG_SENSORS_AXI_FAN_CONTROL=m
@@ -4965,6 +5012,7 @@ CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_RASPBERRYPI_HWMON=m CONFIG_SENSORS_RASPBERRYPI_HWMON=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
@@ -5078,6 +5126,7 @@ CONFIG_STM32_THERMAL=m
# NVIDIA Tegra thermal drivers # NVIDIA Tegra thermal drivers
# #
CONFIG_TEGRA_SOCTHERM=m CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA30_TSENSOR=m
# end of NVIDIA Tegra thermal drivers # end of NVIDIA Tegra thermal drivers
# CONFIG_GENERIC_ADC_THERMAL is not set # CONFIG_GENERIC_ADC_THERMAL is not set
@@ -5088,6 +5137,7 @@ CONFIG_TEGRA_SOCTHERM=m
CONFIG_QCOM_TSENS=m CONFIG_QCOM_TSENS=m
CONFIG_QCOM_SPMI_ADC_TM5=m CONFIG_QCOM_SPMI_ADC_TM5=m
CONFIG_QCOM_SPMI_TEMP_ALARM=m CONFIG_QCOM_SPMI_TEMP_ALARM=m
CONFIG_QCOM_LMH=m
# end of Qualcomm thermal drivers # end of Qualcomm thermal drivers
CONFIG_KHADAS_MCU_FAN_THERMAL=m CONFIG_KHADAS_MCU_FAN_THERMAL=m
@@ -5215,6 +5265,7 @@ CONFIG_MFD_MC13XXX_SPI=m
# CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MC13XXX_I2C is not set
CONFIG_MFD_MP2629=m CONFIG_MFD_MP2629=m
# CONFIG_MFD_HI6421_PMIC is not set # CONFIG_MFD_HI6421_PMIC is not set
CONFIG_MFD_HI6421_SPMI=m
# CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set # CONFIG_HTC_I2CPLD is not set
# CONFIG_LPC_ICH is not set # CONFIG_LPC_ICH is not set
@@ -5329,6 +5380,8 @@ CONFIG_MFD_QCOM_PM8008=m
CONFIG_MFD_VEXPRESS_SYSREG=y CONFIG_MFD_VEXPRESS_SYSREG=y
# CONFIG_RAVE_SP_CORE is not set # CONFIG_RAVE_SP_CORE is not set
CONFIG_MFD_INTEL_M10_BMC=m CONFIG_MFD_INTEL_M10_BMC=m
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -5414,7 +5467,9 @@ CONFIG_REGULATOR_RT4801=m
CONFIG_REGULATOR_RT4831=m CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT6160=m CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
CONFIG_REGULATOR_RTMV20=m CONFIG_REGULATOR_RTMV20=m
CONFIG_REGULATOR_RTQ6752=m
CONFIG_REGULATOR_S2MPA01=m CONFIG_REGULATOR_S2MPA01=m
CONFIG_REGULATOR_S2MPS11=m CONFIG_REGULATOR_S2MPS11=m
CONFIG_REGULATOR_S5M8767=m CONFIG_REGULATOR_S5M8767=m
@@ -5470,6 +5525,7 @@ CONFIG_IR_IMON=m
CONFIG_IR_IMON_RAW=m CONFIG_IR_IMON_RAW=m
CONFIG_IR_MCEUSB=m CONFIG_IR_MCEUSB=m
CONFIG_IR_MESON=m CONFIG_IR_MESON=m
CONFIG_IR_MESON_TX=m
CONFIG_IR_REDRAT3=m CONFIG_IR_REDRAT3=m
CONFIG_IR_SPI=m CONFIG_IR_SPI=m
CONFIG_IR_STREAMZAP=m CONFIG_IR_STREAMZAP=m
@@ -5956,7 +6012,9 @@ CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m CONFIG_VIDEO_IMX290=m
CONFIG_VIDEO_IMX319=m CONFIG_VIDEO_IMX319=m
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
CONFIG_VIDEO_IMX355=m CONFIG_VIDEO_IMX355=m
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m CONFIG_VIDEO_OV2659=m
@@ -5977,6 +6035,7 @@ CONFIG_VIDEO_OV7670=m
CONFIG_VIDEO_OV7740=m CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV8856=m CONFIG_VIDEO_OV8856=m
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
CONFIG_VIDEO_OV9640=m CONFIG_VIDEO_OV9640=m
CONFIG_VIDEO_OV9650=m CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_OV13858=m CONFIG_VIDEO_OV13858=m
@@ -6246,6 +6305,7 @@ CONFIG_IMX_IPUV3_CORE=m
CONFIG_DRM=m CONFIG_DRM=m
CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=m
CONFIG_DRM_DP_AUX_CHARDEV=y CONFIG_DRM_DP_AUX_CHARDEV=y
# CONFIG_DRM_DEBUG_SELFTEST is not set # CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_HELPER=m
@@ -6378,7 +6438,6 @@ CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y
CONFIG_DRM_TILCDC=m CONFIG_DRM_TILCDC=m
CONFIG_DRM_QXL=m CONFIG_DRM_QXL=m
CONFIG_DRM_BOCHS=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m
CONFIG_DRM_MSM=m CONFIG_DRM_MSM=m
CONFIG_DRM_MSM_GPU_STATE=y CONFIG_DRM_MSM_GPU_STATE=y
@@ -6415,7 +6474,9 @@ CONFIG_DRM_PANEL_ELIDA_KD35T133=m
CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m
CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
CONFIG_DRM_PANEL_ILITEK_IL9322=m CONFIG_DRM_PANEL_ILITEK_IL9322=m
CONFIG_DRM_PANEL_ILITEK_ILI9341=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m
# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KHADAS_TS050=m
@@ -6438,6 +6499,8 @@ CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_PANEL_RAYDIUM_RM67191=m CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
CONFIG_DRM_PANEL_RAYDIUM_RM68200=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
CONFIG_DRM_PANEL_RONBO_RB070D30=m CONFIG_DRM_PANEL_RONBO_RB070D30=m
CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m
CONFIG_DRM_PANEL_SAMSUNG_DB7430=m
# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
@@ -6460,6 +6523,7 @@ CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TPO_TPG110=m
# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
CONFIG_DRM_PANEL_VISIONOX_RM69299=m CONFIG_DRM_PANEL_VISIONOX_RM69299=m
CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m
CONFIG_DRM_PANEL_XINPENG_XPP055C272=m CONFIG_DRM_PANEL_XINPENG_XPP055C272=m
# end of Display Panels # end of Display Panels
@@ -6529,6 +6593,7 @@ CONFIG_DRM_MXSFB=m
CONFIG_DRM_MESON=m CONFIG_DRM_MESON=m
CONFIG_DRM_MESON_DW_HDMI=m CONFIG_DRM_MESON_DW_HDMI=m
# CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_ARCPGU is not set
CONFIG_DRM_BOCHS=m
CONFIG_DRM_CIRRUS_QEMU=m CONFIG_DRM_CIRRUS_QEMU=m
# CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_GM12U320 is not set
CONFIG_DRM_SIMPLEDRM=m CONFIG_DRM_SIMPLEDRM=m
@@ -6614,7 +6679,7 @@ CONFIG_FB_EFI=y
CONFIG_FB_VIRTUAL=m CONFIG_FB_VIRTUAL=m
# CONFIG_FB_METRONOME is not set # CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set # CONFIG_FB_MB862XX is not set
CONFIG_FB_SIMPLE=y CONFIG_FB_SIMPLE=m
CONFIG_FB_SSD1307=m CONFIG_FB_SSD1307=m
# CONFIG_FB_SM712 is not set # CONFIG_FB_SM712 is not set
# end of Frame buffer Devices # end of Frame buffer Devices
@@ -6816,6 +6881,7 @@ CONFIG_SND_HDA_CODEC_SIGMATEL=m
CONFIG_SND_HDA_CODEC_VIA=m CONFIG_SND_HDA_CODEC_VIA=m
CONFIG_SND_HDA_CODEC_HDMI=m CONFIG_SND_HDA_CODEC_HDMI=m
CONFIG_SND_HDA_CODEC_CIRRUS=m CONFIG_SND_HDA_CODEC_CIRRUS=m
CONFIG_SND_HDA_CODEC_CS8409=m
CONFIG_SND_HDA_CODEC_CONEXANT=m CONFIG_SND_HDA_CODEC_CONEXANT=m
CONFIG_SND_HDA_CODEC_CA0110=m CONFIG_SND_HDA_CODEC_CA0110=m
CONFIG_SND_HDA_CODEC_CA0132=m CONFIG_SND_HDA_CODEC_CA0132=m
@@ -7110,6 +7176,7 @@ CONFIG_SND_SOC_ES8328=m
CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_I2C=m
CONFIG_SND_SOC_ES8328_SPI=m CONFIG_SND_SOC_ES8328_SPI=m
# CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_GTM601 is not set
CONFIG_SND_SOC_ICS43432=m
# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_INNO_RK3036 is not set
CONFIG_SND_SOC_MAX98088=m CONFIG_SND_SOC_MAX98088=m
CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98090=m
@@ -7209,6 +7276,7 @@ CONFIG_SND_SOC_TSCS42XX=m
CONFIG_SND_SOC_TWL4030=m CONFIG_SND_SOC_TWL4030=m
CONFIG_SND_SOC_TWL6040=m CONFIG_SND_SOC_TWL6040=m
CONFIG_SND_SOC_UDA1334=m CONFIG_SND_SOC_UDA1334=m
CONFIG_SND_SOC_WCD_MBHC=m
CONFIG_SND_SOC_WCD938X=m CONFIG_SND_SOC_WCD938X=m
CONFIG_SND_SOC_WCD938X_SDW=m CONFIG_SND_SOC_WCD938X_SDW=m
# CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8510 is not set
@@ -7918,10 +7986,8 @@ CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y
# #
# LED drivers # LED drivers
# #
# CONFIG_LEDS_AAT1290 is not set
CONFIG_LEDS_AN30259A=m CONFIG_LEDS_AN30259A=m
CONFIG_LEDS_ARIEL=m CONFIG_LEDS_ARIEL=m
CONFIG_LEDS_AS3645A=m
CONFIG_LEDS_AW2013=m CONFIG_LEDS_AW2013=m
# CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6328 is not set
# CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_BCM6358 is not set
@@ -7932,7 +7998,6 @@ CONFIG_LEDS_LM3530=m
CONFIG_LEDS_LM3532=m CONFIG_LEDS_LM3532=m
# CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_LM3642 is not set
CONFIG_LEDS_LM3692X=m CONFIG_LEDS_LM3692X=m
CONFIG_LEDS_LM3601X=m
CONFIG_LEDS_PCA9532=m CONFIG_LEDS_PCA9532=m
CONFIG_LEDS_PCA9532_GPIO=y CONFIG_LEDS_PCA9532_GPIO=y
CONFIG_LEDS_GPIO=m CONFIG_LEDS_GPIO=m
@@ -7961,7 +8026,6 @@ CONFIG_LEDS_TCA6507=m
CONFIG_LEDS_MAX77650=m CONFIG_LEDS_MAX77650=m
CONFIG_LEDS_MAX8997=m CONFIG_LEDS_MAX8997=m
# CONFIG_LEDS_LM355x is not set # CONFIG_LEDS_LM355x is not set
# CONFIG_LEDS_KTD2692 is not set
# CONFIG_LEDS_IS31FL319X is not set # CONFIG_LEDS_IS31FL319X is not set
CONFIG_LEDS_IS31FL32XX=m CONFIG_LEDS_IS31FL32XX=m
@@ -7976,14 +8040,18 @@ CONFIG_LEDS_USER=m
# CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_SPI_BYTE is not set
# CONFIG_LEDS_TI_LMU_COMMON is not set # CONFIG_LEDS_TI_LMU_COMMON is not set
CONFIG_LEDS_TPS6105X=m CONFIG_LEDS_TPS6105X=m
CONFIG_LEDS_SGM3140=m
CONFIG_LEDS_ACER_A500=m CONFIG_LEDS_ACER_A500=m
# #
# Flash and Torch LED drivers # Flash and Torch LED drivers
# #
# CONFIG_LEDS_AAT1290 is not set
CONFIG_LEDS_AS3645A=m
# CONFIG_LEDS_KTD2692 is not set
CONFIG_LEDS_LM3601X=m
CONFIG_LEDS_RT4505=m CONFIG_LEDS_RT4505=m
CONFIG_LEDS_RT8515=m CONFIG_LEDS_RT8515=m
CONFIG_LEDS_SGM3140=m
# #
# LED Triggers # LED Triggers
@@ -8037,6 +8105,7 @@ CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0" CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_SYSTOHC is not set # CONFIG_RTC_SYSTOHC is not set
# CONFIG_RTC_DEBUG is not set # CONFIG_RTC_DEBUG is not set
CONFIG_RTC_LIB_KUNIT_TEST=m
# CONFIG_RTC_NVMEM is not set # CONFIG_RTC_NVMEM is not set
# #
@@ -8265,6 +8334,7 @@ CONFIG_UDMABUF=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_SELFTESTS is not set
# CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options # end of DMABUF options
CONFIG_AUXDISPLAY=y CONFIG_AUXDISPLAY=y
@@ -8290,13 +8360,14 @@ CONFIG_UIO_PCI_GENERIC=m
CONFIG_UIO_PRUSS=m CONFIG_UIO_PRUSS=m
# CONFIG_UIO_MF624 is not set # CONFIG_UIO_MF624 is not set
CONFIG_UIO_DFL=m CONFIG_UIO_DFL=m
CONFIG_VFIO=m
CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_IOMMU_TYPE1=m
CONFIG_VFIO_VIRQFD=m CONFIG_VFIO_VIRQFD=m
CONFIG_VFIO=m
# CONFIG_VFIO_NOIOMMU is not set # CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=m CONFIG_VFIO_PCI_CORE=m
CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI=m
CONFIG_VFIO_PLATFORM=m CONFIG_VFIO_PLATFORM=m
CONFIG_VFIO_AMBA=m CONFIG_VFIO_AMBA=m
CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m
@@ -8319,6 +8390,7 @@ CONFIG_VDPA=m
CONFIG_VDPA_SIM=m CONFIG_VDPA_SIM=m
CONFIG_VDPA_SIM_NET=m CONFIG_VDPA_SIM_NET=m
CONFIG_VDPA_SIM_BLOCK=m CONFIG_VDPA_SIM_BLOCK=m
CONFIG_VDPA_USER=m
CONFIG_IFCVF=m CONFIG_IFCVF=m
CONFIG_VP_VDPA=m CONFIG_VP_VDPA=m
CONFIG_VHOST_IOTLB=m CONFIG_VHOST_IOTLB=m
@@ -8501,6 +8573,7 @@ CONFIG_MOST_COMPONENTS=m
# CONFIG_KS7010 is not set # CONFIG_KS7010 is not set
CONFIG_BCM_VIDEOCORE=m CONFIG_BCM_VIDEOCORE=m
CONFIG_BCM2835_VCHIQ=m CONFIG_BCM2835_VCHIQ=m
CONFIG_VCHIQ_CDEV=y
CONFIG_SND_BCM2835=m CONFIG_SND_BCM2835=m
CONFIG_VIDEO_BCM2835=m CONFIG_VIDEO_BCM2835=m
CONFIG_BCM2835_VCHIQ_MMAL=m CONFIG_BCM2835_VCHIQ_MMAL=m
@@ -8512,7 +8585,6 @@ CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m CONFIG_HMS_PROFINET=m
CONFIG_QLGE=m CONFIG_QLGE=m
CONFIG_WFX=m CONFIG_WFX=m
CONFIG_MFD_HI6421_SPMI=m
# CONFIG_GOLDFISH is not set # CONFIG_GOLDFISH is not set
CONFIG_CHROME_PLATFORMS=y CONFIG_CHROME_PLATFORMS=y
CONFIG_CROS_EC=m CONFIG_CROS_EC=m
@@ -8637,9 +8709,11 @@ CONFIG_MDM_GCC_9607=m
# CONFIG_MDM_GCC_9615 is not set # CONFIG_MDM_GCC_9615 is not set
# CONFIG_MDM_LCC_9615 is not set # CONFIG_MDM_LCC_9615 is not set
CONFIG_MSM_MMCC_8960=m CONFIG_MSM_MMCC_8960=m
CONFIG_MSM_GCC_8953=m
CONFIG_MSM_GCC_8974=y CONFIG_MSM_GCC_8974=y
CONFIG_MSM_MMCC_8974=m CONFIG_MSM_MMCC_8974=m
# CONFIG_MSM_GCC_8994 is not set CONFIG_MSM_MMCC_8994=m
CONFIG_MSM_GCC_8994=m
CONFIG_MSM_GCC_8996=y CONFIG_MSM_GCC_8996=y
CONFIG_MSM_MMCC_8996=m CONFIG_MSM_MMCC_8996=m
CONFIG_MSM_GCC_8998=m CONFIG_MSM_GCC_8998=m
@@ -8648,13 +8722,16 @@ CONFIG_MSM_MMCC_8998=m
CONFIG_QCS_GCC_404=m CONFIG_QCS_GCC_404=m
# CONFIG_SC_CAMCC_7180 is not set # CONFIG_SC_CAMCC_7180 is not set
CONFIG_SC_DISPCC_7180=m CONFIG_SC_DISPCC_7180=m
CONFIG_SC_DISPCC_7280=m
CONFIG_SC_GCC_7180=m CONFIG_SC_GCC_7180=m
CONFIG_SC_GCC_7280=m CONFIG_SC_GCC_7280=m
CONFIG_SC_GCC_8180X=m CONFIG_SC_GCC_8180X=m
CONFIG_SC_LPASS_CORECC_7180=m CONFIG_SC_LPASS_CORECC_7180=m
CONFIG_SC_GPUCC_7180=m CONFIG_SC_GPUCC_7180=m
CONFIG_SC_GPUCC_7280=m
CONFIG_SC_MSS_7180=m CONFIG_SC_MSS_7180=m
CONFIG_SC_VIDEOCC_7180=m CONFIG_SC_VIDEOCC_7180=m
CONFIG_SC_VIDEOCC_7280=m
# CONFIG_SDM_CAMCC_845 is not set # CONFIG_SDM_CAMCC_845 is not set
CONFIG_SDM_GCC_660=m CONFIG_SDM_GCC_660=m
CONFIG_SDM_MMCC_660=m CONFIG_SDM_MMCC_660=m
@@ -8669,7 +8746,9 @@ CONFIG_QCS_Q6SSTOP_404=m
CONFIG_SDX_GCC_55=m CONFIG_SDX_GCC_55=m
CONFIG_SM_CAMCC_8250=m CONFIG_SM_CAMCC_8250=m
CONFIG_SM_DISPCC_8250=m CONFIG_SM_DISPCC_8250=m
CONFIG_SM_GCC_6115=m
CONFIG_SM_GCC_6125=m CONFIG_SM_GCC_6125=m
CONFIG_SM_GCC_6350=m
CONFIG_SM_GCC_8150=m CONFIG_SM_GCC_8150=m
CONFIG_SM_GCC_8250=m CONFIG_SM_GCC_8250=m
CONFIG_SM_GCC_8350=m CONFIG_SM_GCC_8350=m
@@ -8795,6 +8874,8 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# end of Generic IOMMU Pagetable Support # end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y CONFIG_OF_IOMMU=y
# CONFIG_MSM_IOMMU is not set # CONFIG_MSM_IOMMU is not set
@@ -8809,6 +8890,7 @@ CONFIG_EXYNOS_IOMMU=y
CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU=y
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y
CONFIG_ARM_SMMU_QCOM=y
CONFIG_QCOM_IOMMU=y CONFIG_QCOM_IOMMU=y
# #
@@ -9193,6 +9275,7 @@ CONFIG_SCD30_CORE=m
CONFIG_SCD30_I2C=m CONFIG_SCD30_I2C=m
# CONFIG_SCD30_SERIAL is not set # CONFIG_SCD30_SERIAL is not set
CONFIG_SENSIRION_SGP30=m CONFIG_SENSIRION_SGP30=m
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m CONFIG_SPS30_I2C=m
CONFIG_SPS30_SERIAL=m CONFIG_SPS30_SERIAL=m
@@ -9488,6 +9571,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
CONFIG_AD5272=m CONFIG_AD5272=m
# CONFIG_DS1803 is not set # CONFIG_DS1803 is not set
CONFIG_MAX5432=m CONFIG_MAX5432=m
@@ -9930,12 +10014,12 @@ CONFIG_F2FS_FS_SECURITY=y
# CONFIG_F2FS_CHECK_FS is not set # CONFIG_F2FS_CHECK_FS is not set
# CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_F2FS_FS_COMPRESSION is not set
CONFIG_F2FS_IOSTAT=y
CONFIG_ZONEFS_FS=m CONFIG_ZONEFS_FS=m
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
# CONFIG_FS_ENCRYPTION_INLINE_CRYPT is not set # CONFIG_FS_ENCRYPTION_INLINE_CRYPT is not set
@@ -9970,15 +10054,12 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
# Caches # Caches
# #
CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_SUPPORT=m
# CONFIG_NETFS_STATS is not set CONFIG_NETFS_STATS=y
CONFIG_FSCACHE=m CONFIG_FSCACHE=m
CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_STATS=y
# CONFIG_FSCACHE_HISTOGRAM is not set
# CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_DEBUG is not set
CONFIG_FSCACHE_OBJECT_LIST=y
CONFIG_CACHEFILES=m CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_HISTOGRAM is not set
# end of Caches # end of Caches
# #
@@ -9999,11 +10080,15 @@ CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_FAT_KUNIT_TEST=m
CONFIG_EXFAT_FS=m CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -10175,7 +10260,6 @@ CONFIG_CEPH_FS_SECURITY_LABEL=y
CONFIG_CIFS=m CONFIG_CIFS=m
# CONFIG_CIFS_STATS2 is not set # CONFIG_CIFS_STATS2 is not set
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
CONFIG_CIFS_WEAK_PW_HASH=y
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
@@ -10185,6 +10269,10 @@ CONFIG_CIFS_DEBUG=y
CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_DFS_UPCALL=y
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_FSCACHE=y
CONFIG_SMB_SERVER=m
CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y
# CONFIG_SMB_SERVER_KERBEROS5 is not set
CONFIG_SMBFS_COMMON=m
CONFIG_CODA_FS=m CONFIG_CODA_FS=m
CONFIG_AFS_FS=m CONFIG_AFS_FS=m
CONFIG_AFS_DEBUG=y CONFIG_AFS_DEBUG=y
@@ -10547,6 +10635,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_DEV_ALLWINNER=y CONFIG_CRYPTO_DEV_ALLWINNER=y
CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_CRYPTO_DEV_SUN4I_SS=m
@@ -10623,6 +10712,8 @@ CONFIG_SIGNED_PE_FILE_VERIFICATION=y
# Certificates for signature checking # Certificates for signature checking
# #
CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
CONFIG_MODULE_SIG_KEY_TYPE_RSA=y
# CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set
CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_TRUSTED_KEYS=""
CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE=y
@@ -10940,7 +11031,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
CONFIG_LATENCYTOP=y CONFIG_LATENCYTOP=y
CONFIG_NOP_TRACER=y CONFIG_NOP_TRACER=y

245
config/kernel/linux-meson64-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.14.1 Kernel Configuration # Linux/arm64 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -25,6 +25,7 @@ CONFIG_THREAD_INFO_IN_TASK=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="" CONFIG_BUILD_SALT=""
@@ -146,6 +147,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_BUF_SHIFT=17
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -218,7 +220,6 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
@@ -281,7 +282,6 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
@@ -583,59 +583,6 @@ CONFIG_ARM_SCMI_CPUFREQ=m
# end of CPU Frequency scaling # end of CPU Frequency scaling
# end of CPU Power Management # end of CPU Power Management
#
# Firmware Drivers
#
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCMI_POWER_DOMAIN=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ARM_SCPI_POWER_DOMAIN=y
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_ISCSI_IBFT is not set
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=m
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=y
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_UEFI_CPER=y
CONFIG_UEFI_CPER_ARM=y
CONFIG_EFI_EARLYCON=y
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
CONFIG_MESON_SM=y
CONFIG_MESON_GX_PM=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ARCH_SUPPORTS_ACPI=y
CONFIG_ACPI=y CONFIG_ACPI=y
CONFIG_ACPI_GENERIC_GSI=y CONFIG_ACPI_GENERIC_GSI=y
@@ -695,6 +642,8 @@ CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_IRQ_BYPASS=y
CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
CONFIG_KVM_XFER_TO_GUEST_WORK=y
# CONFIG_NVHE_EL2_DEBUG is not set
CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA256_ARM64=y
# CONFIG_CRYPTO_SHA512_ARM64 is not set # CONFIG_CRYPTO_SHA512_ARM64 is not set
@@ -729,6 +678,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -846,16 +796,14 @@ CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
CONFIG_BLK_WBT=y CONFIG_BLK_WBT=y
CONFIG_BLK_WBT_MQ=y CONFIG_BLK_WBT_MQ=y
# CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set
@@ -877,6 +825,7 @@ CONFIG_BLOCK_COMPAT=y
CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -991,6 +940,12 @@ CONFIG_ZONE_DMA32=y
CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_MAPPING_DIRTY_HELPERS=y CONFIG_MAPPING_DIRTY_HELPERS=y
CONFIG_SECRETMEM=y CONFIG_SECRETMEM=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -1007,6 +962,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
CONFIG_TLS=m CONFIG_TLS=m
CONFIG_TLS_DEVICE=y CONFIG_TLS_DEVICE=y
@@ -1115,6 +1071,7 @@ CONFIG_IPV6_PIMSM_V2=y
# CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set
# CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_IPV6_SEG6_HMAC is not set
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
CONFIG_NETLABEL=y CONFIG_NETLABEL=y
CONFIG_MPTCP=y CONFIG_MPTCP=y
CONFIG_INET_MPTCP_DIAG=m CONFIG_INET_MPTCP_DIAG=m
@@ -1539,7 +1496,6 @@ CONFIG_BRIDGE_VLAN_FILTERING=y
# CONFIG_BRIDGE_MRP is not set # CONFIG_BRIDGE_MRP is not set
# CONFIG_BRIDGE_CFM is not set # CONFIG_BRIDGE_CFM is not set
CONFIG_NET_DSA=m CONFIG_NET_DSA=m
CONFIG_NET_DSA_TAG_8021Q=m
CONFIG_NET_DSA_TAG_AR9331=m CONFIG_NET_DSA_TAG_AR9331=m
CONFIG_NET_DSA_TAG_BRCM_COMMON=m CONFIG_NET_DSA_TAG_BRCM_COMMON=m
CONFIG_NET_DSA_TAG_BRCM=m CONFIG_NET_DSA_TAG_BRCM=m
@@ -1714,6 +1670,7 @@ CONFIG_VSOCKETS_DIAG=m
CONFIG_VSOCKETS_LOOPBACK=m CONFIG_VSOCKETS_LOOPBACK=m
CONFIG_VIRTIO_VSOCKETS=m CONFIG_VIRTIO_VSOCKETS=m
CONFIG_VIRTIO_VSOCKETS_COMMON=m CONFIG_VIRTIO_VSOCKETS_COMMON=m
CONFIG_HYPERV_VSOCKETS=m
CONFIG_NETLINK_DIAG=m CONFIG_NETLINK_DIAG=m
CONFIG_MPLS=y CONFIG_MPLS=y
CONFIG_NET_MPLS_GSO=m CONFIG_NET_MPLS_GSO=m
@@ -1901,6 +1858,7 @@ CONFIG_AF_RXRPC=m
# CONFIG_RXKAD is not set # CONFIG_RXKAD is not set
# CONFIG_AF_KCM is not set # CONFIG_AF_KCM is not set
CONFIG_STREAM_PARSER=y CONFIG_STREAM_PARSER=y
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -2070,6 +2028,7 @@ CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y CONFIG_PCIE_DW_HOST=y
# CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCIE_DW_PLAT_HOST is not set
CONFIG_PCI_HISI=y CONFIG_PCI_HISI=y
# CONFIG_PCIE_ROCKCHIP_DW_HOST is not set
CONFIG_PCIE_KIRIN=y CONFIG_PCIE_KIRIN=y
CONFIG_PCI_MESON=y CONFIG_PCI_MESON=y
# CONFIG_PCIE_AL is not set # CONFIG_PCIE_AL is not set
@@ -2160,7 +2119,6 @@ CONFIG_GENERIC_ARCH_NUMA=y
# #
CONFIG_BRCMSTB_GISB_ARB=y CONFIG_BRCMSTB_GISB_ARB=y
# CONFIG_MOXTET is not set # CONFIG_MOXTET is not set
CONFIG_SIMPLE_PM_BUS=y
CONFIG_VEXPRESS_CONFIG=y CONFIG_VEXPRESS_CONFIG=y
CONFIG_MHI_BUS=m CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set # CONFIG_MHI_BUS_DEBUG is not set
@@ -2168,6 +2126,73 @@ CONFIG_MHI_BUS_PCI_GENERIC=m
# end of Bus devices # end of Bus devices
CONFIG_CONNECTOR=m CONFIG_CONNECTOR=m
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=y
# end of ARM System Control and Management Interface Protocol
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ARM_SCPI_POWER_DOMAIN=y
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_ISCSI_IBFT is not set
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_SYSFB=y
# CONFIG_SYSFB_SIMPLEFB is not set
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=m
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=y
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_UEFI_CPER=y
CONFIG_UEFI_CPER_ARM=y
CONFIG_EFI_EARLYCON=y
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
CONFIG_MESON_SM=y
CONFIG_MESON_GX_PM=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_GNSS=m CONFIG_GNSS=m
CONFIG_GNSS_SERIAL=m CONFIG_GNSS_SERIAL=m
CONFIG_GNSS_MTK_SERIAL=m CONFIG_GNSS_MTK_SERIAL=m
@@ -2191,6 +2216,10 @@ CONFIG_MTD_OF_PARTS=y
# #
CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
#
# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK.
#
# CONFIG_FTL is not set # CONFIG_FTL is not set
# CONFIG_NFTL is not set # CONFIG_NFTL is not set
# CONFIG_INFTL is not set # CONFIG_INFTL is not set
@@ -2391,6 +2420,7 @@ CONFIG_TIFM_CORE=m
CONFIG_TIFM_7XX1=m CONFIG_TIFM_7XX1=m
# CONFIG_ICS932S401 is not set # CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HI6421V600_IRQ=m
# CONFIG_HP_ILO is not set # CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set # CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set # CONFIG_ISL29003 is not set
@@ -2454,6 +2484,7 @@ CONFIG_UACCE=m
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set # CONFIG_RAID_ATTRS is not set
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
# CONFIG_SCSI_PROC_FS is not set # CONFIG_SCSI_PROC_FS is not set
@@ -2465,6 +2496,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_ST is not set
CONFIG_BLK_DEV_SR=m CONFIG_BLK_DEV_SR=m
CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SG=m
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_LOGGING is not set
@@ -2519,10 +2551,12 @@ CONFIG_SCSI_UFSHCD_PLATFORM=m
# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set # CONFIG_SCSI_UFS_CDNS_PLATFORM is not set
# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set # CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set
# CONFIG_SCSI_UFS_BSG is not set # CONFIG_SCSI_UFS_BSG is not set
# CONFIG_SCSI_UFS_HPB is not set
# CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_MYRB is not set # CONFIG_SCSI_MYRB is not set
# CONFIG_SCSI_MYRS is not set # CONFIG_SCSI_MYRS is not set
# CONFIG_XEN_SCSI_FRONTEND is not set # CONFIG_XEN_SCSI_FRONTEND is not set
CONFIG_HYPERV_STORAGE=m
# CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_SNIC is not set
# CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DMX3191D is not set
CONFIG_SCSI_FDOMAIN=m CONFIG_SCSI_FDOMAIN=m
@@ -2930,6 +2964,8 @@ CONFIG_IGBVF=y
# CONFIG_IGC is not set # CONFIG_IGC is not set
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
# CONFIG_JME is not set # CONFIG_JME is not set
CONFIG_NET_VENDOR_LITEX=y
# CONFIG_LITEX_LITEETH is not set
CONFIG_NET_VENDOR_MARVELL=y CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MVMDIO=y CONFIG_MVMDIO=y
# CONFIG_SKGE is not set # CONFIG_SKGE is not set
@@ -3087,6 +3123,7 @@ CONFIG_LSI_ET1011C_PHY=m
CONFIG_MARVELL_PHY=m CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m CONFIG_MARVELL_10G_PHY=m
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m CONFIG_MEDIATEK_GE_PHY=m
CONFIG_MICREL_PHY=y CONFIG_MICREL_PHY=y
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
@@ -3112,6 +3149,10 @@ CONFIG_DP83869_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set # CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set # CONFIG_MICREL_KS8995MA is not set
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
@@ -3322,7 +3363,6 @@ CONFIG_WLAN_VENDOR_INTERSIL=y
# CONFIG_HOSTAP is not set # CONFIG_HOSTAP is not set
# CONFIG_HERMES is not set # CONFIG_HERMES is not set
# CONFIG_P54_COMMON is not set # CONFIG_P54_COMMON is not set
# CONFIG_PRISM54 is not set
CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MARVELL=y
# CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS is not set
CONFIG_LIBERTAS_THINFIRM=m CONFIG_LIBERTAS_THINFIRM=m
@@ -3479,6 +3519,7 @@ CONFIG_IEEE802154_MCR20A=m
CONFIG_WWAN=m CONFIG_WWAN=m
CONFIG_WWAN_HWSIM=m CONFIG_WWAN_HWSIM=m
CONFIG_MHI_WWAN_CTRL=m CONFIG_MHI_WWAN_CTRL=m
CONFIG_MHI_WWAN_MBIM=m
CONFIG_RPMSG_WWAN_CTRL=m CONFIG_RPMSG_WWAN_CTRL=m
# end of Wireless WAN # end of Wireless WAN
@@ -3487,10 +3528,10 @@ CONFIG_XEN_NETDEV_BACKEND=m
CONFIG_VMXNET3=m CONFIG_VMXNET3=m
CONFIG_FUJITSU_ES=m CONFIG_FUJITSU_ES=m
CONFIG_USB4_NET=m CONFIG_USB4_NET=m
CONFIG_HYPERV_NET=m
CONFIG_NETDEVSIM=m CONFIG_NETDEVSIM=m
CONFIG_NET_FAILOVER=y CONFIG_NET_FAILOVER=y
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
# CONFIG_NVM is not set
# #
# Input device support # Input device support
@@ -3795,6 +3836,7 @@ CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_PS2MULT is not set # CONFIG_SERIO_PS2MULT is not set
# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_SERIO_ARC_PS2 is not set
# CONFIG_SERIO_APBPS2 is not set # CONFIG_SERIO_APBPS2 is not set
CONFIG_HYPERV_KEYBOARD=m
# CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_SERIO_GPIO_PS2 is not set
# CONFIG_USERIO is not set # CONFIG_USERIO is not set
# CONFIG_GAMEPORT is not set # CONFIG_GAMEPORT is not set
@@ -3919,6 +3961,7 @@ CONFIG_HW_RANDOM_CAVIUM=m
CONFIG_HW_RANDOM_OPTEE=m CONFIG_HW_RANDOM_OPTEE=m
CONFIG_HW_RANDOM_CCTRNG=m CONFIG_HW_RANDOM_CCTRNG=m
CONFIG_HW_RANDOM_XIPHERA=m CONFIG_HW_RANDOM_XIPHERA=m
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m
CONFIG_APPLICOM=m CONFIG_APPLICOM=m
CONFIG_DEVMEM=y CONFIG_DEVMEM=y
CONFIG_DEVPORT=y CONFIG_DEVPORT=y
@@ -3946,10 +3989,9 @@ CONFIG_XILLYBUS=m
CONFIG_XILLYBUS_PCIE=m CONFIG_XILLYBUS_PCIE=m
CONFIG_XILLYBUS_OF=m CONFIG_XILLYBUS_OF=m
CONFIG_XILLYUSB=m CONFIG_XILLYUSB=m
# end of Character devices
# CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_CPU is not set
CONFIG_RANDOM_TRUST_BOOTLOADER=y CONFIG_RANDOM_TRUST_BOOTLOADER=y
# end of Character devices
# #
# I2C support # I2C support
@@ -4048,6 +4090,7 @@ CONFIG_I2C_VIPERBOARD=m
# Other I2C/SMBus bus drivers # Other I2C/SMBus bus drivers
# #
CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
CONFIG_I2C_STUB=m CONFIG_I2C_STUB=m
@@ -4095,6 +4138,7 @@ CONFIG_SPI_PL022=y
CONFIG_SPI_PXA2XX=m CONFIG_SPI_PXA2XX=m
CONFIG_SPI_PXA2XX_PCI=m CONFIG_SPI_PXA2XX_PCI=m
# CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_ROCKCHIP is not set
CONFIG_SPI_ROCKCHIP_SFC=m
CONFIG_SPI_SC18IS602=m CONFIG_SPI_SC18IS602=m
CONFIG_SPI_SIFIVE=m CONFIG_SPI_SIFIVE=m
CONFIG_SPI_MXIC=m CONFIG_SPI_MXIC=m
@@ -4150,6 +4194,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
CONFIG_PTP_1588_CLOCK_INES=m CONFIG_PTP_1588_CLOCK_INES=m
CONFIG_PTP_1588_CLOCK_KVM=m CONFIG_PTP_1588_CLOCK_KVM=m
@@ -4230,6 +4275,7 @@ CONFIG_GPIO_HLWD=m
CONFIG_GPIO_LOGICVC=m CONFIG_GPIO_LOGICVC=m
CONFIG_GPIO_MB86S7X=m CONFIG_GPIO_MB86S7X=m
CONFIG_GPIO_PL061=y CONFIG_GPIO_PL061=y
CONFIG_GPIO_ROCKCHIP=m
CONFIG_GPIO_SAMA5D2_PIOBU=m CONFIG_GPIO_SAMA5D2_PIOBU=m
# CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SIFIVE is not set
CONFIG_GPIO_SYSCON=y CONFIG_GPIO_SYSCON=y
@@ -4318,6 +4364,7 @@ CONFIG_GPIO_VIPERBOARD=m
# #
CONFIG_GPIO_AGGREGATOR=m CONFIG_GPIO_AGGREGATOR=m
CONFIG_GPIO_MOCKUP=m CONFIG_GPIO_MOCKUP=m
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
CONFIG_W1=m CONFIG_W1=m
@@ -4368,6 +4415,7 @@ CONFIG_POWER_RESET_BRCMSTB=y
# CONFIG_POWER_RESET_MT6323 is not set # CONFIG_POWER_RESET_MT6323 is not set
# CONFIG_POWER_RESET_REGULATOR is not set # CONFIG_POWER_RESET_REGULATOR is not set
CONFIG_POWER_RESET_RESTART=y CONFIG_POWER_RESET_RESTART=y
# CONFIG_POWER_RESET_TPS65086 is not set
CONFIG_POWER_RESET_VEXPRESS=y CONFIG_POWER_RESET_VEXPRESS=y
CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON=y
@@ -4407,7 +4455,6 @@ CONFIG_BATTERY_DA9150=m
CONFIG_CHARGER_AXP20X=m CONFIG_CHARGER_AXP20X=m
CONFIG_BATTERY_AXP20X=m CONFIG_BATTERY_AXP20X=m
CONFIG_AXP20X_POWER=m CONFIG_AXP20X_POWER=m
CONFIG_AXP288_FUEL_GAUGE=m
CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17040=m
CONFIG_BATTERY_MAX17042=m CONFIG_BATTERY_MAX17042=m
CONFIG_BATTERY_MAX1721X=m CONFIG_BATTERY_MAX1721X=m
@@ -4429,6 +4476,7 @@ CONFIG_CHARGER_DETECTOR_MAX14656=m
CONFIG_CHARGER_MAX77650=m CONFIG_CHARGER_MAX77650=m
CONFIG_CHARGER_MAX77693=m CONFIG_CHARGER_MAX77693=m
CONFIG_CHARGER_MP2629=m CONFIG_CHARGER_MP2629=m
CONFIG_CHARGER_MT6360=m
CONFIG_CHARGER_BQ2415X=m CONFIG_CHARGER_BQ2415X=m
CONFIG_CHARGER_BQ24190=m CONFIG_CHARGER_BQ24190=m
CONFIG_CHARGER_BQ24257=m CONFIG_CHARGER_BQ24257=m
@@ -4445,6 +4493,7 @@ CONFIG_BATTERY_GOLDFISH=m
CONFIG_BATTERY_RT5033=m CONFIG_BATTERY_RT5033=m
CONFIG_CHARGER_RT9455=m CONFIG_CHARGER_RT9455=m
CONFIG_CHARGER_CROS_USBPD=m CONFIG_CHARGER_CROS_USBPD=m
CONFIG_CHARGER_CROS_PCHG=y
CONFIG_CHARGER_UCS1002=m CONFIG_CHARGER_UCS1002=m
CONFIG_CHARGER_BD99954=m CONFIG_CHARGER_BD99954=m
CONFIG_RN5T618_POWER=m CONFIG_RN5T618_POWER=m
@@ -4473,6 +4522,7 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
CONFIG_SENSORS_AS370=m CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_AXI_FAN_CONTROL=m CONFIG_SENSORS_AXI_FAN_CONTROL=m
@@ -4609,6 +4659,7 @@ CONFIG_SENSORS_XDPE122=m
CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
@@ -4818,6 +4869,7 @@ CONFIG_MFD_MC13XXX_SPI=m
CONFIG_MFD_MC13XXX_I2C=m CONFIG_MFD_MC13XXX_I2C=m
CONFIG_MFD_MP2629=m CONFIG_MFD_MP2629=m
CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI6421_PMIC=y
CONFIG_MFD_HI6421_SPMI=m
CONFIG_HTC_PASIC3=m CONFIG_HTC_PASIC3=m
CONFIG_HTC_I2CPLD=y CONFIG_HTC_I2CPLD=y
CONFIG_LPC_ICH=m CONFIG_LPC_ICH=m
@@ -4921,6 +4973,8 @@ CONFIG_MFD_QCOM_PM8008=m
CONFIG_MFD_VEXPRESS_SYSREG=y CONFIG_MFD_VEXPRESS_SYSREG=y
CONFIG_RAVE_SP_CORE=m CONFIG_RAVE_SP_CORE=m
CONFIG_MFD_INTEL_M10_BMC=m CONFIG_MFD_INTEL_M10_BMC=m
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -5027,7 +5081,9 @@ CONFIG_REGULATOR_RT4831=m
# CONFIG_REGULATOR_RT5033 is not set # CONFIG_REGULATOR_RT5033 is not set
CONFIG_REGULATOR_RT6160=m CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
CONFIG_REGULATOR_RTMV20=m CONFIG_REGULATOR_RTMV20=m
CONFIG_REGULATOR_RTQ6752=m
# CONFIG_REGULATOR_S2MPA01 is not set # CONFIG_REGULATOR_S2MPA01 is not set
CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S2MPS11=y
# CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_S5M8767 is not set
@@ -5084,6 +5140,7 @@ CONFIG_IR_MCEUSB=m
CONFIG_IR_ITE_CIR=m CONFIG_IR_ITE_CIR=m
CONFIG_IR_FINTEK=m CONFIG_IR_FINTEK=m
CONFIG_IR_MESON=m CONFIG_IR_MESON=m
CONFIG_IR_MESON_TX=m
CONFIG_IR_NUVOTON=m CONFIG_IR_NUVOTON=m
CONFIG_IR_REDRAT3=m CONFIG_IR_REDRAT3=m
CONFIG_IR_SPI=m CONFIG_IR_SPI=m
@@ -5618,7 +5675,9 @@ CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m CONFIG_VIDEO_IMX290=m
CONFIG_VIDEO_IMX319=m CONFIG_VIDEO_IMX319=m
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
CONFIG_VIDEO_IMX355=m CONFIG_VIDEO_IMX355=m
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m CONFIG_VIDEO_OV2659=m
@@ -5640,6 +5699,7 @@ CONFIG_VIDEO_OV7670=m
CONFIG_VIDEO_OV7740=m CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV8856=m CONFIG_VIDEO_OV8856=m
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
CONFIG_VIDEO_OV9640=m CONFIG_VIDEO_OV9640=m
CONFIG_VIDEO_OV9650=m CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_OV9734=m CONFIG_VIDEO_OV9734=m
@@ -5923,6 +5983,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_DRM=m CONFIG_DRM=m
CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=m
# CONFIG_DRM_DP_AUX_CHARDEV is not set # CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set # CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_HELPER=m
@@ -5971,7 +6032,6 @@ CONFIG_DRM_UDL=m
# CONFIG_DRM_RCAR_DW_HDMI is not set # CONFIG_DRM_RCAR_DW_HDMI is not set
CONFIG_DRM_RCAR_LVDS=m CONFIG_DRM_RCAR_LVDS=m
# CONFIG_DRM_QXL is not set # CONFIG_DRM_QXL is not set
CONFIG_DRM_BOCHS=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m
CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL=y
@@ -5990,7 +6050,9 @@ CONFIG_DRM_PANEL_ELIDA_KD35T133=m
CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m
CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
CONFIG_DRM_PANEL_ILITEK_IL9322=m CONFIG_DRM_PANEL_ILITEK_IL9322=m
CONFIG_DRM_PANEL_ILITEK_ILI9341=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KHADAS_TS050=m
@@ -6013,6 +6075,8 @@ CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_PANEL_RAYDIUM_RM67191=m CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
CONFIG_DRM_PANEL_RAYDIUM_RM68200=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
CONFIG_DRM_PANEL_RONBO_RB070D30=m CONFIG_DRM_PANEL_RONBO_RB070D30=m
CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m
CONFIG_DRM_PANEL_SAMSUNG_DB7430=m
CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
@@ -6035,6 +6099,7 @@ CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TPO_TPG110=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m
CONFIG_DRM_PANEL_XINPENG_XPP055C272=m CONFIG_DRM_PANEL_XINPENG_XPP055C272=m
# end of Display Panels # end of Display Panels
@@ -6092,6 +6157,7 @@ CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_MESON=m CONFIG_DRM_MESON=m
CONFIG_DRM_MESON_DW_HDMI=m CONFIG_DRM_MESON_DW_HDMI=m
# CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_ARCPGU is not set
CONFIG_DRM_BOCHS=m
# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_CIRRUS_QEMU is not set
CONFIG_DRM_GM12U320=m CONFIG_DRM_GM12U320=m
CONFIG_DRM_SIMPLEDRM=m CONFIG_DRM_SIMPLEDRM=m
@@ -6110,6 +6176,7 @@ CONFIG_DRM_LIMA=m
CONFIG_DRM_PANFROST=m CONFIG_DRM_PANFROST=m
CONFIG_DRM_TIDSS=m CONFIG_DRM_TIDSS=m
CONFIG_DRM_GUD=m CONFIG_DRM_GUD=m
CONFIG_DRM_HYPERV=m
CONFIG_DRM_LEGACY=y CONFIG_DRM_LEGACY=y
# CONFIG_DRM_TDFX is not set # CONFIG_DRM_TDFX is not set
# CONFIG_DRM_R128 is not set # CONFIG_DRM_R128 is not set
@@ -6178,6 +6245,7 @@ CONFIG_FB_SM501=m
CONFIG_XEN_FBDEV_FRONTEND=y CONFIG_XEN_FBDEV_FRONTEND=y
# CONFIG_FB_METRONOME is not set # CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set # CONFIG_FB_MB862XX is not set
CONFIG_FB_HYPERV=m
# CONFIG_FB_SIMPLE is not set # CONFIG_FB_SIMPLE is not set
# CONFIG_FB_SSD1307 is not set # CONFIG_FB_SSD1307 is not set
# CONFIG_FB_SM712 is not set # CONFIG_FB_SM712 is not set
@@ -6525,6 +6593,7 @@ CONFIG_SND_SOC_ES8328=m
CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_I2C=m
CONFIG_SND_SOC_ES8328_SPI=m CONFIG_SND_SOC_ES8328_SPI=m
CONFIG_SND_SOC_GTM601=m CONFIG_SND_SOC_GTM601=m
CONFIG_SND_SOC_ICS43432=m
CONFIG_SND_SOC_INNO_RK3036=m CONFIG_SND_SOC_INNO_RK3036=m
CONFIG_SND_SOC_MAX98088=m CONFIG_SND_SOC_MAX98088=m
CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98090=m
@@ -6766,6 +6835,7 @@ CONFIG_HID_SUNPLUS=m
CONFIG_HID_RMI=m CONFIG_HID_RMI=m
CONFIG_HID_GREENASIA=m CONFIG_HID_GREENASIA=m
CONFIG_GREENASIA_FF=y CONFIG_GREENASIA_FF=y
CONFIG_HID_HYPERV_MOUSE=m
CONFIG_HID_SMARTJOYPLUS=m CONFIG_HID_SMARTJOYPLUS=m
CONFIG_SMARTJOYPLUS_FF=y CONFIG_SMARTJOYPLUS_FF=y
CONFIG_HID_TIVO=m CONFIG_HID_TIVO=m
@@ -7380,6 +7450,7 @@ CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0" CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set # CONFIG_RTC_DEBUG is not set
CONFIG_RTC_LIB_KUNIT_TEST=m
CONFIG_RTC_NVMEM=y CONFIG_RTC_NVMEM=y
# #
@@ -7573,6 +7644,7 @@ CONFIG_SYNC_FILE=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_SELFTESTS is not set
# CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options # end of DMABUF options
# CONFIG_AUXDISPLAY is not set # CONFIG_AUXDISPLAY is not set
@@ -7586,13 +7658,15 @@ CONFIG_UIO=m
# CONFIG_UIO_NETX is not set # CONFIG_UIO_NETX is not set
# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_PRUSS is not set
# CONFIG_UIO_MF624 is not set # CONFIG_UIO_MF624 is not set
CONFIG_UIO_HV_GENERIC=m
CONFIG_VFIO=y
CONFIG_VFIO_IOMMU_TYPE1=y CONFIG_VFIO_IOMMU_TYPE1=y
CONFIG_VFIO_VIRQFD=y CONFIG_VFIO_VIRQFD=y
CONFIG_VFIO=y
# CONFIG_VFIO_NOIOMMU is not set # CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=y CONFIG_VFIO_PCI_CORE=y
CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI=y
# CONFIG_VFIO_PLATFORM is not set # CONFIG_VFIO_PLATFORM is not set
# CONFIG_VFIO_MDEV is not set # CONFIG_VFIO_MDEV is not set
CONFIG_VIRT_DRIVERS=y CONFIG_VIRT_DRIVERS=y
@@ -7611,6 +7685,7 @@ CONFIG_VDPA=m
CONFIG_VDPA_SIM=m CONFIG_VDPA_SIM=m
CONFIG_VDPA_SIM_NET=m CONFIG_VDPA_SIM_NET=m
CONFIG_VDPA_SIM_BLOCK=m CONFIG_VDPA_SIM_BLOCK=m
CONFIG_VDPA_USER=m
CONFIG_IFCVF=m CONFIG_IFCVF=m
CONFIG_VP_VDPA=m CONFIG_VP_VDPA=m
CONFIG_VHOST_IOTLB=m CONFIG_VHOST_IOTLB=m
@@ -7626,6 +7701,9 @@ CONFIG_VHOST_VDPA=m
# #
# Microsoft Hyper-V guest support # Microsoft Hyper-V guest support
# #
CONFIG_HYPERV=m
CONFIG_HYPERV_UTILS=m
CONFIG_HYPERV_BALLOON=m
# end of Microsoft Hyper-V guest support # end of Microsoft Hyper-V guest support
# #
@@ -7753,6 +7831,7 @@ CONFIG_DVB_SP8870=m
# CONFIG_LTE_GDM724X is not set # CONFIG_LTE_GDM724X is not set
# CONFIG_GS_FPGABOOT is not set # CONFIG_GS_FPGABOOT is not set
# CONFIG_UNISYSSPAR is not set # CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
CONFIG_FB_TFT=m CONFIG_FB_TFT=m
CONFIG_FB_TFT_AGM1264K_FL=m CONFIG_FB_TFT_AGM1264K_FL=m
CONFIG_FB_TFT_BD663474=m CONFIG_FB_TFT_BD663474=m
@@ -7797,7 +7876,6 @@ CONFIG_XIL_AXIS_FIFO=m
# CONFIG_FIELDBUS_DEV is not set # CONFIG_FIELDBUS_DEV is not set
# CONFIG_QLGE is not set # CONFIG_QLGE is not set
# CONFIG_WFX is not set # CONFIG_WFX is not set
CONFIG_MFD_HI6421_SPMI=m
# CONFIG_GOLDFISH is not set # CONFIG_GOLDFISH is not set
CONFIG_CHROME_PLATFORMS=y CONFIG_CHROME_PLATFORMS=y
# CONFIG_CHROMEOS_TBMC is not set # CONFIG_CHROMEOS_TBMC is not set
@@ -7930,6 +8008,8 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# end of Generic IOMMU Pagetable Support # end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y CONFIG_OF_IOMMU=y
CONFIG_IOMMU_DMA=y CONFIG_IOMMU_DMA=y
@@ -8243,6 +8323,7 @@ CONFIG_SCD30_CORE=m
CONFIG_SCD30_I2C=m CONFIG_SCD30_I2C=m
CONFIG_SCD30_SERIAL=m CONFIG_SCD30_SERIAL=m
CONFIG_SENSIRION_SGP30=m CONFIG_SENSIRION_SGP30=m
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m CONFIG_SPS30_I2C=m
CONFIG_SPS30_SERIAL=m CONFIG_SPS30_SERIAL=m
@@ -8538,6 +8619,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
CONFIG_AD5272=m CONFIG_AD5272=m
# CONFIG_DS1803 is not set # CONFIG_DS1803 is not set
CONFIG_MAX5432=m CONFIG_MAX5432=m
@@ -8861,13 +8943,13 @@ CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y CONFIG_F2FS_CHECK_FS=y
# CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_F2FS_FS_COMPRESSION is not set
CONFIG_F2FS_IOSTAT=y
# CONFIG_ZONEFS_FS is not set # CONFIG_ZONEFS_FS is not set
CONFIG_FS_DAX=y CONFIG_FS_DAX=y
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_VERITY=y CONFIG_FS_VERITY=y
@@ -8902,15 +8984,12 @@ CONFIG_OVERLAY_FS_XINO_AUTO=y
# Caches # Caches
# #
CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_SUPPORT=m
# CONFIG_NETFS_STATS is not set CONFIG_NETFS_STATS=y
CONFIG_FSCACHE=m CONFIG_FSCACHE=m
CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_STATS=y
# CONFIG_FSCACHE_HISTOGRAM is not set
# CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_DEBUG is not set
# CONFIG_FSCACHE_OBJECT_LIST is not set
CONFIG_CACHEFILES=m CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_HISTOGRAM is not set
# end of Caches # end of Caches
# #
@@ -8931,11 +9010,16 @@ CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_FAT_DEFAULT_UTF8=y CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_FAT_KUNIT_TEST=m
CONFIG_EXFAT_FS=m CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_64BIT_CLUSTER is not set
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -9100,7 +9184,6 @@ CONFIG_CEPH_FS_SECURITY_LABEL=y
CONFIG_CIFS=m CONFIG_CIFS=m
CONFIG_CIFS_STATS2=y CONFIG_CIFS_STATS2=y
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
CONFIG_CIFS_WEAK_PW_HASH=y
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
@@ -9110,6 +9193,10 @@ CONFIG_CIFS_DEBUG=y
CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_DFS_UPCALL=y
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_FSCACHE=y
CONFIG_SMB_SERVER=m
CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y
# CONFIG_SMB_SERVER_KERBEROS5 is not set
CONFIG_SMBFS_COMMON=m
CONFIG_CODA_FS=m CONFIG_CODA_FS=m
CONFIG_AFS_FS=m CONFIG_AFS_FS=m
# CONFIG_AFS_DEBUG is not set # CONFIG_AFS_DEBUG is not set
@@ -9454,6 +9541,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_DEV_ATMEL_I2C=m CONFIG_CRYPTO_DEV_ATMEL_I2C=m
CONFIG_CRYPTO_DEV_ATMEL_ECC=m CONFIG_CRYPTO_DEV_ATMEL_ECC=m
@@ -9488,6 +9576,8 @@ CONFIG_SIGNED_PE_FILE_VERIFICATION=y
# Certificates for signature checking # Certificates for signature checking
# #
CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
CONFIG_MODULE_SIG_KEY_TYPE_RSA=y
# CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set
CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_TRUSTED_KEYS=""
CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE=y
@@ -9595,6 +9685,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_SWIOTLB=y CONFIG_SWIOTLB=y
# CONFIG_DMA_RESTRICTED_POOL is not set
CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_COHERENT_POOL=y
CONFIG_DMA_REMAP=y CONFIG_DMA_REMAP=y
@@ -9823,7 +9914,6 @@ CONFIG_RCU_TRACE=y
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set # CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y
@@ -9915,5 +10005,6 @@ CONFIG_TEST_STACKINIT=m
CONFIG_TEST_FREE_PAGES=m CONFIG_TEST_FREE_PAGES=m
CONFIG_ARCH_USE_MEMTEST=y CONFIG_ARCH_USE_MEMTEST=y
CONFIG_MEMTEST=y CONFIG_MEMTEST=y
# CONFIG_HYPERV_TESTING is not set
# end of Kernel Testing and Coverage # end of Kernel Testing and Coverage
# end of Kernel hacking # end of Kernel hacking

200
config/kernel/linux-mvebu-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm 5.13.4 Kernel Configuration # Linux/arm 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -15,6 +15,7 @@ CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_CAN_LINK_STATIC=y
CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_IRQ_WORK=y CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_BUILDTIME_TABLE_SORT=y
@@ -23,6 +24,7 @@ CONFIG_BUILDTIME_TABLE_SORT=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="" CONFIG_BUILD_SALT=""
@@ -147,6 +149,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=16 CONFIG_LOG_BUF_SHIFT=16
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -210,12 +213,12 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y CONFIG_FUTEX_PI=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_SIGNALFD=y CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y CONFIG_TIMERFD=y
@@ -262,7 +265,6 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_HAVE_PROC_CPU=y CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_FIX_EARLYCON_MEM=y CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -541,6 +543,7 @@ CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_ARM_ARMADA_37XX_CPUFREQ=m CONFIG_ARM_ARMADA_37XX_CPUFREQ=m
CONFIG_ARM_ARMADA_8K_CPUFREQ=m CONFIG_ARM_ARMADA_8K_CPUFREQ=m
CONFIG_ARM_SCMI_CPUFREQ=m
# end of CPU Frequency scaling # end of CPU Frequency scaling
# #
@@ -600,20 +603,6 @@ CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y
# end of Power management options # end of Power management options
#
# Firmware Drivers
#
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
# CONFIG_GOOGLE_FIRMWARE is not set
CONFIG_HAVE_ARM_SMCCC=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARM_CRYPTO=y CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM=m CONFIG_CRYPTO_SHA1_ARM=m
CONFIG_CRYPTO_SHA1_ARM_NEON=m CONFIG_CRYPTO_SHA1_ARM_NEON=m
@@ -638,7 +627,6 @@ CONFIG_AS_VFP_VMRS_FPINST=y
# #
# General architecture-dependent options # General architecture-dependent options
# #
CONFIG_SET_FS=y
# CONFIG_KPROBES is not set # CONFIG_KPROBES is not set
CONFIG_JUMP_LABEL=y CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set # CONFIG_STATIC_KEYS_SELFTEST is not set
@@ -647,6 +635,7 @@ CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -737,20 +726,19 @@ CONFIG_MODULE_COMPRESS_XZ=y
CONFIG_MODPROBE_PATH="/sbin/modprobe" CONFIG_MODPROBE_PATH="/sbin/modprobe"
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
CONFIG_BLK_WBT=y CONFIG_BLK_WBT=y
CONFIG_BLK_WBT_MQ=y
# CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set
# CONFIG_BLK_CGROUP_IOCOST is not set # CONFIG_BLK_CGROUP_IOCOST is not set
CONFIG_BLK_WBT_MQ=y # CONFIG_BLK_CGROUP_IOPRIO is not set
# CONFIG_BLK_DEBUG_FS is not set # CONFIG_BLK_DEBUG_FS is not set
# CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_SED_OPAL is not set
# CONFIG_BLK_INLINE_ENCRYPTION is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set
@@ -766,6 +754,7 @@ CONFIG_EFI_PARTITION=y
CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -816,7 +805,6 @@ CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_MEMORY_ISOLATION=y CONFIG_MEMORY_ISOLATION=y
CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_SPLIT_PTLOCK_CPUS=4
@@ -855,10 +843,17 @@ CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=m CONFIG_ZSMALLOC=m
# CONFIG_ZSMALLOC_STAT is not set # CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_PAGE_IDLE_FLAG=y
CONFIG_IDLE_PAGE_TRACKING=y CONFIG_IDLE_PAGE_TRACKING=y
# CONFIG_PERCPU_STATS is not set # CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set # CONFIG_GUP_TEST is not set
CONFIG_KMAP_LOCAL=y CONFIG_KMAP_LOCAL=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -874,6 +869,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
CONFIG_TLS=m CONFIG_TLS=m
# CONFIG_TLS_DEVICE is not set # CONFIG_TLS_DEVICE is not set
@@ -982,6 +978,7 @@ CONFIG_IPV6_SEG6_LWTUNNEL=y
CONFIG_IPV6_SEG6_HMAC=y CONFIG_IPV6_SEG6_HMAC=y
CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_SEG6_BPF=y
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
CONFIG_NETLABEL=y CONFIG_NETLABEL=y
# CONFIG_MPTCP is not set # CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
@@ -998,6 +995,7 @@ CONFIG_NETFILTER_INGRESS=y
CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK=m
CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_BRIDGE=y
CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_FAMILY_ARP=y
CONFIG_NETFILTER_NETLINK_HOOK=m
CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_ACCT=m
CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_QUEUE=m
CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_NETLINK_LOG=m
@@ -1394,7 +1392,6 @@ CONFIG_BRIDGE_VLAN_FILTERING=y
# CONFIG_BRIDGE_MRP is not set # CONFIG_BRIDGE_MRP is not set
# CONFIG_BRIDGE_CFM is not set # CONFIG_BRIDGE_CFM is not set
CONFIG_NET_DSA=m CONFIG_NET_DSA=m
CONFIG_NET_DSA_TAG_8021Q=m
# CONFIG_NET_DSA_TAG_AR9331 is not set # CONFIG_NET_DSA_TAG_AR9331 is not set
CONFIG_NET_DSA_TAG_BRCM_COMMON=m CONFIG_NET_DSA_TAG_BRCM_COMMON=m
CONFIG_NET_DSA_TAG_BRCM=m CONFIG_NET_DSA_TAG_BRCM=m
@@ -1581,6 +1578,7 @@ CONFIG_QRTR_TUN=m
CONFIG_QRTR_MHI=m CONFIG_QRTR_MHI=m
CONFIG_NET_NCSI=y CONFIG_NET_NCSI=y
CONFIG_NCSI_OEM_CMD_GET_MAC=y CONFIG_NCSI_OEM_CMD_GET_MAC=y
# CONFIG_NCSI_OEM_CMD_KEEP_PHY is not set
CONFIG_PCPU_DEV_REFCNT=y CONFIG_PCPU_DEV_REFCNT=y
CONFIG_RPS=y CONFIG_RPS=y
CONFIG_RFS_ACCEL=y CONFIG_RFS_ACCEL=y
@@ -1757,6 +1755,7 @@ CONFIG_AF_RXRPC=m
# CONFIG_RXKAD is not set # CONFIG_RXKAD is not set
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
CONFIG_STREAM_PARSER=y CONFIG_STREAM_PARSER=y
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -2001,7 +2000,6 @@ CONFIG_ARM_CCI=y
# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_BRCMSTB_GISB_ARB is not set
# CONFIG_MOXTET is not set # CONFIG_MOXTET is not set
CONFIG_MVEBU_MBUS=y CONFIG_MVEBU_MBUS=y
CONFIG_SIMPLE_PM_BUS=y
# CONFIG_VEXPRESS_CONFIG is not set # CONFIG_VEXPRESS_CONFIG is not set
CONFIG_MHI_BUS=m CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set # CONFIG_MHI_BUS_DEBUG is not set
@@ -2009,6 +2007,30 @@ CONFIG_MHI_BUS_PCI_GENERIC=m
# end of Bus devices # end of Bus devices
# CONFIG_CONNECTOR is not set # CONFIG_CONNECTOR is not set
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
CONFIG_ARM_SCMI_PROTOCOL=m
# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=m
# end of ARM System Control and Management Interface Protocol
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
# CONFIG_GOOGLE_FIRMWARE is not set
CONFIG_HAVE_ARM_SMCCC=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
# CONFIG_GNSS is not set # CONFIG_GNSS is not set
CONFIG_MTD=y CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set # CONFIG_MTD_TESTS is not set
@@ -2028,6 +2050,10 @@ CONFIG_MTD_OF_PARTS=y
# #
CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
#
# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK.
#
# CONFIG_FTL is not set # CONFIG_FTL is not set
# CONFIG_NFTL is not set # CONFIG_NFTL is not set
# CONFIG_INFTL is not set # CONFIG_INFTL is not set
@@ -2074,6 +2100,7 @@ CONFIG_MTD_CFI_UTIL=m
# CONFIG_MTD_PMC551 is not set # CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_MCHP23K256 is not set # CONFIG_MTD_MCHP23K256 is not set
CONFIG_MTD_MCHP48L640=m
# CONFIG_MTD_SST25L is not set # CONFIG_MTD_SST25L is not set
# CONFIG_MTD_SLRAM is not set # CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set # CONFIG_MTD_PHRAM is not set
@@ -2269,14 +2296,12 @@ CONFIG_UACCE=m
# CONFIG_PVPANIC is not set # CONFIG_PVPANIC is not set
# end of Misc devices # end of Misc devices
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
# #
# SCSI device support # SCSI device support
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
CONFIG_RAID_ATTRS=m CONFIG_RAID_ATTRS=m
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
CONFIG_SCSI_PROC_FS=y CONFIG_SCSI_PROC_FS=y
@@ -2288,6 +2313,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set # CONFIG_BLK_DEV_SR is not set
CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SG=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_LOGGING is not set
@@ -2330,6 +2356,7 @@ CONFIG_ISCSI_BOOT_SYSFS=m
# CONFIG_MEGARAID_SAS is not set # CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_MPT3SAS is not set
# CONFIG_SCSI_MPT2SAS is not set # CONFIG_SCSI_MPT2SAS is not set
CONFIG_SCSI_MPI3MR=m
# CONFIG_SCSI_SMARTPQI is not set # CONFIG_SCSI_SMARTPQI is not set
# CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_UFSHCD is not set
# CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_HPTIOP is not set
@@ -2483,7 +2510,6 @@ CONFIG_DM_THIN_PROVISIONING=m
CONFIG_DM_CACHE=m CONFIG_DM_CACHE=m
CONFIG_DM_CACHE_SMQ=m CONFIG_DM_CACHE_SMQ=m
CONFIG_DM_WRITECACHE=m CONFIG_DM_WRITECACHE=m
# CONFIG_DM_EBS is not set
# CONFIG_DM_ERA is not set # CONFIG_DM_ERA is not set
CONFIG_DM_CLONE=m CONFIG_DM_CLONE=m
CONFIG_DM_MIRROR=m CONFIG_DM_MIRROR=m
@@ -2633,12 +2659,13 @@ CONFIG_GEMINI_ETHERNET=m
# CONFIG_NET_VENDOR_EZCHIP is not set # CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_FARADAY is not set # CONFIG_NET_VENDOR_FARADAY is not set
CONFIG_NET_VENDOR_GOOGLE=y CONFIG_NET_VENDOR_GOOGLE=y
# CONFIG_GVE is not set
# CONFIG_NET_VENDOR_HISILICON is not set # CONFIG_NET_VENDOR_HISILICON is not set
CONFIG_NET_VENDOR_HUAWEI=y CONFIG_NET_VENDOR_HUAWEI=y
# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_INTEL is not set
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
# CONFIG_JME is not set # CONFIG_JME is not set
CONFIG_NET_VENDOR_LITEX=y
CONFIG_LITEX_LITEETH=m
CONFIG_NET_VENDOR_MARVELL=y CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MV643XX_ETH=y CONFIG_MV643XX_ETH=y
CONFIG_MVMDIO=y CONFIG_MVMDIO=y
@@ -2735,10 +2762,13 @@ CONFIG_AX88796B_PHY=m
CONFIG_MARVELL_PHY=y CONFIG_MARVELL_PHY=y
# CONFIG_MARVELL_10G_PHY is not set # CONFIG_MARVELL_10G_PHY is not set
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m
# CONFIG_MICREL_PHY is not set # CONFIG_MICREL_PHY is not set
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
# CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROCHIP_T1_PHY is not set
# CONFIG_MICROSEMI_PHY is not set # CONFIG_MICROSEMI_PHY is not set
CONFIG_MOTORCOMM_PHY=m
CONFIG_NATIONAL_PHY=m CONFIG_NATIONAL_PHY=m
CONFIG_NXP_C45_TJA11XX_PHY=m CONFIG_NXP_C45_TJA11XX_PHY=m
# CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set
@@ -2758,8 +2788,13 @@ CONFIG_DP83848_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set # CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set # CONFIG_MICREL_KS8995MA is not set
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y
CONFIG_OF_MDIO=y CONFIG_OF_MDIO=y
CONFIG_MDIO_DEVRES=y CONFIG_MDIO_DEVRES=y
# CONFIG_MDIO_BITBANG is not set # CONFIG_MDIO_BITBANG is not set
@@ -3081,6 +3116,8 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_WLCORE is not set # CONFIG_WLCORE is not set
# CONFIG_RTL8822BS is not set # CONFIG_RTL8822BS is not set
CONFIG_RTL8723DU=m CONFIG_RTL8723DU=m
CONFIG_RTL8723DS=m
CONFIG_RTL8822CS=m
CONFIG_RTL8822BU=m CONFIG_RTL8822BU=m
CONFIG_RTL8188EU=m CONFIG_RTL8188EU=m
CONFIG_RTL8821CU=m CONFIG_RTL8821CU=m
@@ -3116,15 +3153,15 @@ CONFIG_IEEE802154_HWSIM=m
# Wireless WAN # Wireless WAN
# #
CONFIG_WWAN=m CONFIG_WWAN=m
CONFIG_WWAN_HWSIM=m
CONFIG_MHI_WWAN_CTRL=m CONFIG_MHI_WWAN_CTRL=m
CONFIG_MHI_WWAN_MBIM=m
# end of Wireless WAN # end of Wireless WAN
# CONFIG_VMXNET3 is not set # CONFIG_VMXNET3 is not set
# CONFIG_NETDEVSIM is not set # CONFIG_NETDEVSIM is not set
CONFIG_NET_FAILOVER=m CONFIG_NET_FAILOVER=m
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
CONFIG_NVM=y
# CONFIG_NVM_PBLK is not set
# #
# Input device support # Input device support
@@ -3236,6 +3273,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y
CONFIG_JOYSTICK_WALKERA0701=m CONFIG_JOYSTICK_WALKERA0701=m
# CONFIG_JOYSTICK_PSXPAD_SPI is not set # CONFIG_JOYSTICK_PSXPAD_SPI is not set
# CONFIG_JOYSTICK_PXRC is not set # CONFIG_JOYSTICK_PXRC is not set
CONFIG_JOYSTICK_QWIIC=m
# CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_FSIA6B is not set
# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -3360,13 +3398,13 @@ CONFIG_HW_RANDOM_OPTEE=m
CONFIG_HW_RANDOM_XIPHERA=m CONFIG_HW_RANDOM_XIPHERA=m
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
CONFIG_DEVMEM=y CONFIG_DEVMEM=y
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y CONFIG_DEVPORT=y
# CONFIG_TCG_TPM is not set # CONFIG_TCG_TPM is not set
CONFIG_XILLYBUS_CLASS=m
# CONFIG_XILLYBUS is not set # CONFIG_XILLYBUS is not set
# end of Character devices CONFIG_XILLYUSB=m
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
# #
# I2C support # I2C support
@@ -3449,6 +3487,7 @@ CONFIG_I2C_PARPORT=m
# Other I2C/SMBus bus drivers # Other I2C/SMBus bus drivers
# #
CONFIG_I2C_FSI=m CONFIG_I2C_FSI=m
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
# CONFIG_I2C_STUB is not set # CONFIG_I2C_STUB is not set
@@ -3533,6 +3572,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=m CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_OPTIONAL=m
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
# CONFIG_PTP_1588_CLOCK_INES is not set # CONFIG_PTP_1588_CLOCK_INES is not set
# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
@@ -3651,6 +3691,7 @@ CONFIG_GPIO_XRA1403=m
# #
# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_AGGREGATOR is not set
# CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_MOCKUP is not set
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
CONFIG_W1=m CONFIG_W1=m
@@ -3778,9 +3819,11 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
CONFIG_SENSORS_AS370=m CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
# CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set
CONFIG_SENSORS_ARM_SCMI=m
CONFIG_SENSORS_ASPEED=m CONFIG_SENSORS_ASPEED=m
CONFIG_SENSORS_ATXP1=m CONFIG_SENSORS_ATXP1=m
# CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set
@@ -3870,6 +3913,7 @@ CONFIG_SENSORS_ADM1275=m
CONFIG_SENSORS_BPA_RS600=m CONFIG_SENSORS_BPA_RS600=m
CONFIG_SENSORS_FSP_3Y=m CONFIG_SENSORS_FSP_3Y=m
CONFIG_SENSORS_IBM_CFFPS=m CONFIG_SENSORS_IBM_CFFPS=m
CONFIG_SENSORS_DPS920AB=m
CONFIG_SENSORS_INSPUR_IPSPS=m CONFIG_SENSORS_INSPUR_IPSPS=m
CONFIG_SENSORS_IR35221=m CONFIG_SENSORS_IR35221=m
CONFIG_SENSORS_IR36021=m CONFIG_SENSORS_IR36021=m
@@ -3887,7 +3931,9 @@ CONFIG_SENSORS_MAX20751=m
CONFIG_SENSORS_MAX31785=m CONFIG_SENSORS_MAX31785=m
CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX34440=m
CONFIG_SENSORS_MAX8688=m CONFIG_SENSORS_MAX8688=m
CONFIG_SENSORS_MP2888=m
CONFIG_SENSORS_MP2975=m CONFIG_SENSORS_MP2975=m
CONFIG_SENSORS_PIM4328=m
CONFIG_SENSORS_PM6764TR=m CONFIG_SENSORS_PM6764TR=m
CONFIG_SENSORS_PXE1610=m CONFIG_SENSORS_PXE1610=m
CONFIG_SENSORS_Q54SJ108A2=m CONFIG_SENSORS_Q54SJ108A2=m
@@ -3900,9 +3946,11 @@ CONFIG_SENSORS_UCD9200=m
CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
CONFIG_SENSORS_SHT4x=m
CONFIG_SENSORS_SHTC1=m CONFIG_SENSORS_SHTC1=m
CONFIG_SENSORS_SIS5595=m CONFIG_SENSORS_SIS5595=m
CONFIG_SENSORS_DME1737=m CONFIG_SENSORS_DME1737=m
@@ -3973,6 +4021,7 @@ CONFIG_WATCHDOG_CORE=y
CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_OPEN_TIMEOUT=0
# CONFIG_WATCHDOG_SYSFS is not set # CONFIG_WATCHDOG_SYSFS is not set
# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set
# #
# Watchdog Pretimeout Governors # Watchdog Pretimeout Governors
@@ -4099,6 +4148,7 @@ CONFIG_MFD_NTXEC=m
# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_PM8XXX is not set
# CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RDC321X is not set
CONFIG_MFD_RT4831=m
# CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_RK808 is not set # CONFIG_MFD_RK808 is not set
@@ -4154,8 +4204,11 @@ CONFIG_MFD_STPMIC1=m
CONFIG_MFD_STMFX=m CONFIG_MFD_STMFX=m
CONFIG_MFD_ATC260X=m CONFIG_MFD_ATC260X=m
CONFIG_MFD_ATC260X_I2C=m CONFIG_MFD_ATC260X_I2C=m
CONFIG_MFD_QCOM_PM8008=m
# CONFIG_RAVE_SP_CORE is not set # CONFIG_RAVE_SP_CORE is not set
CONFIG_MFD_INTEL_M10_BMC=m CONFIG_MFD_INTEL_M10_BMC=m
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -4166,6 +4219,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_88PG86X=m CONFIG_REGULATOR_88PG86X=m
CONFIG_REGULATOR_ACT8865=m CONFIG_REGULATOR_ACT8865=m
# CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_AD5398 is not set
CONFIG_REGULATOR_ARM_SCMI=m
CONFIG_REGULATOR_ATC260X=m CONFIG_REGULATOR_ATC260X=m
CONFIG_REGULATOR_BD718XX=m CONFIG_REGULATOR_BD718XX=m
CONFIG_REGULATOR_BD957XMUF=m CONFIG_REGULATOR_BD957XMUF=m
@@ -4187,6 +4241,7 @@ CONFIG_REGULATOR_GPIO=m
CONFIG_REGULATOR_MAX77650=m CONFIG_REGULATOR_MAX77650=m
# CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8660 is not set
CONFIG_REGULATOR_MAX8893=m
# CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MAX8973 is not set # CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MAX77826 is not set
@@ -4206,7 +4261,12 @@ CONFIG_REGULATOR_PF8X00=m
CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m
CONFIG_REGULATOR_ROHM=m CONFIG_REGULATOR_ROHM=m
CONFIG_REGULATOR_RT4801=m CONFIG_REGULATOR_RT4801=m
CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
CONFIG_REGULATOR_RTMV20=m CONFIG_REGULATOR_RTMV20=m
CONFIG_REGULATOR_RTQ6752=m
# CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SLG51000 is not set
CONFIG_REGULATOR_STPMIC1=m CONFIG_REGULATOR_STPMIC1=m
# CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8106A is not set
@@ -4254,6 +4314,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEO_TUNER=m CONFIG_VIDEO_TUNER=m
CONFIG_V4L2_FWNODE=m CONFIG_V4L2_FWNODE=m
CONFIG_V4L2_ASYNC=m
CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_GEN=m
CONFIG_VIDEOBUF_VMALLOC=m CONFIG_VIDEOBUF_VMALLOC=m
# end of Video4Linux options # end of Video4Linux options
@@ -4464,6 +4525,7 @@ CONFIG_VIDEO_CX25840=m
# #
CONFIG_VIDEO_CCS_PLL=m CONFIG_VIDEO_CCS_PLL=m
# CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI556 is not set
CONFIG_VIDEO_IMX208=m
# CONFIG_VIDEO_IMX214 is not set # CONFIG_VIDEO_IMX214 is not set
# CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX219 is not set
# CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX258 is not set
@@ -4471,7 +4533,9 @@ CONFIG_VIDEO_CCS_PLL=m
# CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX290 is not set
# CONFIG_VIDEO_IMX319 is not set # CONFIG_VIDEO_IMX319 is not set
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
# CONFIG_VIDEO_IMX355 is not set # CONFIG_VIDEO_IMX355 is not set
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2640=m
# CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2659 is not set
@@ -4492,6 +4556,7 @@ CONFIG_VIDEO_OV7640=m
# CONFIG_VIDEO_OV7740 is not set # CONFIG_VIDEO_OV7740 is not set
# CONFIG_VIDEO_OV8856 is not set # CONFIG_VIDEO_OV8856 is not set
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
# CONFIG_VIDEO_OV9640 is not set # CONFIG_VIDEO_OV9640 is not set
# CONFIG_VIDEO_OV9650 is not set # CONFIG_VIDEO_OV9650 is not set
# CONFIG_VIDEO_OV13858 is not set # CONFIG_VIDEO_OV13858 is not set
@@ -4717,6 +4782,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=m
CONFIG_BACKLIGHT_KTD253=m CONFIG_BACKLIGHT_KTD253=m
CONFIG_BACKLIGHT_PWM=m CONFIG_BACKLIGHT_PWM=m
# CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set
CONFIG_BACKLIGHT_RT4831=m
CONFIG_BACKLIGHT_ADP8860=m CONFIG_BACKLIGHT_ADP8860=m
CONFIG_BACKLIGHT_ADP8870=m CONFIG_BACKLIGHT_ADP8870=m
CONFIG_BACKLIGHT_LM3630A=m CONFIG_BACKLIGHT_LM3630A=m
@@ -5425,6 +5491,7 @@ CONFIG_DMA_ENGINE_RAID=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_SELFTESTS is not set
# CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options # end of DMABUF options
CONFIG_AUXDISPLAY=y CONFIG_AUXDISPLAY=y
@@ -5442,18 +5509,18 @@ CONFIG_PANEL_PROFILE=5
CONFIG_CHARLCD_BL_FLASH=y CONFIG_CHARLCD_BL_FLASH=y
CONFIG_PANEL=m CONFIG_PANEL=m
# CONFIG_UIO is not set # CONFIG_UIO is not set
CONFIG_VFIO=m
CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_IOMMU_TYPE1=m
CONFIG_VFIO_VIRQFD=m CONFIG_VFIO_VIRQFD=m
CONFIG_VFIO=m
# CONFIG_VFIO_NOIOMMU is not set # CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=m CONFIG_VFIO_PCI_CORE=m
CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI=m
CONFIG_VFIO_PLATFORM=m CONFIG_VFIO_PLATFORM=m
CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m
CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m
CONFIG_VFIO_MDEV=m CONFIG_VFIO_MDEV=m
CONFIG_VFIO_MDEV_DEVICE=m
CONFIG_IRQ_BYPASS_MANAGER=m CONFIG_IRQ_BYPASS_MANAGER=m
# CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO=m CONFIG_VIRTIO=m
@@ -5561,6 +5628,7 @@ CONFIG_AD9834=m
# CONFIG_LTE_GDM724X is not set # CONFIG_LTE_GDM724X is not set
# CONFIG_GS_FPGABOOT is not set # CONFIG_GS_FPGABOOT is not set
# CONFIG_UNISYSSPAR is not set # CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
# CONFIG_MOST_COMPONENTS is not set # CONFIG_MOST_COMPONENTS is not set
# CONFIG_KS7010 is not set # CONFIG_KS7010 is not set
# CONFIG_PI433 is not set # CONFIG_PI433 is not set
@@ -5575,10 +5643,19 @@ CONFIG_HMS_PROFINET=m
# CONFIG_CHROME_PLATFORMS is not set # CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set # CONFIG_MELLANOX_PLATFORM is not set
CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK=y
#
# Clock driver for ARM Reference designs
#
# CONFIG_ICST is not set
# CONFIG_CLK_SP810 is not set
# end of Clock driver for ARM Reference designs
CONFIG_LMK04832=m
CONFIG_COMMON_CLK_MAX9485=m CONFIG_COMMON_CLK_MAX9485=m
CONFIG_COMMON_CLK_SCMI=m
# CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5341 is not set
# CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set # CONFIG_COMMON_CLK_SI514 is not set
@@ -5615,6 +5692,7 @@ CONFIG_CLKSRC_MMIO=y
CONFIG_ARMADA_370_XP_TIMER=y CONFIG_ARMADA_370_XP_TIMER=y
CONFIG_ORION_TIMER=y CONFIG_ORION_TIMER=y
CONFIG_ARM_GLOBAL_TIMER=y CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
# CONFIG_MICROCHIP_PIT64B is not set # CONFIG_MICROCHIP_PIT64B is not set
# end of Clock Source drivers # end of Clock Source drivers
@@ -5669,7 +5747,6 @@ CONFIG_SOC_BRCMSTB=y
# #
CONFIG_LITEX=y CONFIG_LITEX=y
CONFIG_LITEX_SOC_CONTROLLER=m CONFIG_LITEX_SOC_CONTROLLER=m
CONFIG_LITEX_SUBREG_SIZE=4
# end of Enable LiteX SoC Builder specific drivers # end of Enable LiteX SoC Builder specific drivers
# #
@@ -5742,6 +5819,9 @@ CONFIG_DA311=m
CONFIG_DMARD06=m CONFIG_DMARD06=m
CONFIG_DMARD09=m CONFIG_DMARD09=m
CONFIG_DMARD10=m CONFIG_DMARD10=m
CONFIG_FXLS8962AF=m
CONFIG_FXLS8962AF_I2C=m
CONFIG_FXLS8962AF_SPI=m
CONFIG_IIO_ST_ACCEL_3AXIS=m CONFIG_IIO_ST_ACCEL_3AXIS=m
CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m
CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m
@@ -5761,6 +5841,7 @@ CONFIG_MMA9553=m
CONFIG_MXC4005=m CONFIG_MXC4005=m
CONFIG_MXC6255=m CONFIG_MXC6255=m
CONFIG_SCA3000=m CONFIG_SCA3000=m
CONFIG_SCA3300=m
CONFIG_STK8312=m CONFIG_STK8312=m
CONFIG_STK8BA50=m CONFIG_STK8BA50=m
# end of Accelerometers # end of Accelerometers
@@ -5824,6 +5905,7 @@ CONFIG_TI_ADS8688=m
CONFIG_TI_ADS124S08=m CONFIG_TI_ADS124S08=m
CONFIG_TI_ADS131E08=m CONFIG_TI_ADS131E08=m
CONFIG_TI_TLC4541=m CONFIG_TI_TLC4541=m
CONFIG_TI_TSC2046=m
# CONFIG_VF610_ADC is not set # CONFIG_VF610_ADC is not set
CONFIG_XILINX_XADC=m CONFIG_XILINX_XADC=m
# end of Analog to digital converters # end of Analog to digital converters
@@ -5860,7 +5942,10 @@ CONFIG_BME680_SPI=m
CONFIG_PMS7003=m CONFIG_PMS7003=m
# CONFIG_SCD30_CORE is not set # CONFIG_SCD30_CORE is not set
CONFIG_SENSIRION_SGP30=m CONFIG_SENSIRION_SGP30=m
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m
CONFIG_SPS30_SERIAL=m
# CONFIG_VZ89X is not set # CONFIG_VZ89X is not set
# end of Chemical Sensors # end of Chemical Sensors
@@ -5874,6 +5959,7 @@ CONFIG_IIO_MS_SENSORS_I2C=m
# #
# IIO SCMI Sensors # IIO SCMI Sensors
# #
CONFIG_IIO_SCMI=m
# end of IIO SCMI Sensors # end of IIO SCMI Sensors
# #
@@ -6012,6 +6098,9 @@ CONFIG_SI7020=m
# CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set # CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM6DSX is not set
CONFIG_IIO_ST_LSM9DS0=m
CONFIG_IIO_ST_LSM9DS0_I2C=m
CONFIG_IIO_ST_LSM9DS0_SPI=m
# end of Inertial measurement units # end of Inertial measurement units
CONFIG_IIO_ADIS_LIB=m CONFIG_IIO_ADIS_LIB=m
@@ -6058,6 +6147,7 @@ CONFIG_TCS3414=m
CONFIG_TCS3472=m CONFIG_TCS3472=m
CONFIG_SENSORS_TSL2563=m CONFIG_SENSORS_TSL2563=m
CONFIG_TSL2583=m CONFIG_TSL2583=m
CONFIG_TSL2591=m
CONFIG_TSL2772=m CONFIG_TSL2772=m
CONFIG_TSL4531=m CONFIG_TSL4531=m
CONFIG_US5182D=m CONFIG_US5182D=m
@@ -6118,6 +6208,7 @@ CONFIG_IIO_SYSFS_TRIGGER=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
# CONFIG_AD5272 is not set # CONFIG_AD5272 is not set
# CONFIG_DS1803 is not set # CONFIG_DS1803 is not set
CONFIG_MAX5432=m CONFIG_MAX5432=m
@@ -6196,6 +6287,7 @@ CONFIG_MLX90614=m
CONFIG_MLX90632=m CONFIG_MLX90632=m
CONFIG_TMP006=m CONFIG_TMP006=m
CONFIG_TMP007=m CONFIG_TMP007=m
CONFIG_TMP117=m
# CONFIG_TSYS01 is not set # CONFIG_TSYS01 is not set
# CONFIG_TSYS02D is not set # CONFIG_TSYS02D is not set
# CONFIG_MAX31856 is not set # CONFIG_MAX31856 is not set
@@ -6231,6 +6323,7 @@ CONFIG_ORION_IRQCHIP=y
# #
CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PHY_MIPI_DPHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y
CONFIG_PHY_CAN_TRANSCEIVER=m
# CONFIG_BCM_KONA_USB2_PHY is not set # CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_DPHY is not set
@@ -6326,6 +6419,7 @@ CONFIG_COUNTER=m
CONFIG_INTERRUPT_CNT=m CONFIG_INTERRUPT_CNT=m
CONFIG_FTM_QUADDEC=m CONFIG_FTM_QUADDEC=m
# CONFIG_MICROCHIP_TCB_CAPTURE is not set # CONFIG_MICROCHIP_TCB_CAPTURE is not set
CONFIG_INTEL_QEP=m
CONFIG_MOST=m CONFIG_MOST=m
# CONFIG_MOST_USB_HDM is not set # CONFIG_MOST_USB_HDM is not set
CONFIG_MOST_CDEV=m CONFIG_MOST_CDEV=m
@@ -6395,12 +6489,12 @@ CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y CONFIG_F2FS_CHECK_FS=y
# CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_F2FS_FS_COMPRESSION is not set
CONFIG_F2FS_IOSTAT=y
# CONFIG_ZONEFS_FS is not set # CONFIG_ZONEFS_FS is not set
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_VERITY=y CONFIG_FS_VERITY=y
@@ -6434,15 +6528,12 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
# Caches # Caches
# #
CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_SUPPORT=m
# CONFIG_NETFS_STATS is not set CONFIG_NETFS_STATS=y
CONFIG_FSCACHE=m CONFIG_FSCACHE=m
CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_STATS=y
# CONFIG_FSCACHE_HISTOGRAM is not set
# CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_DEBUG is not set
# CONFIG_FSCACHE_OBJECT_LIST is not set
CONFIG_CACHEFILES=m CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_HISTOGRAM is not set
# end of Caches # end of Caches
# #
@@ -6468,6 +6559,9 @@ CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -6626,7 +6720,6 @@ CONFIG_CEPH_FS_SECURITY_LABEL=y
CONFIG_CIFS=m CONFIG_CIFS=m
CONFIG_CIFS_STATS2=y CONFIG_CIFS_STATS2=y
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
CONFIG_CIFS_WEAK_PW_HASH=y
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
@@ -6636,6 +6729,10 @@ CONFIG_CIFS_DEBUG=y
CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_DFS_UPCALL=y
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_FSCACHE=y
CONFIG_SMB_SERVER=m
CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y
# CONFIG_SMB_SERVER_KERBEROS5 is not set
CONFIG_SMBFS_COMMON=m
CONFIG_CODA_FS=m CONFIG_CODA_FS=m
CONFIG_AFS_FS=m CONFIG_AFS_FS=m
# CONFIG_AFS_DEBUG is not set # CONFIG_AFS_DEBUG is not set
@@ -6974,6 +7071,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_DEV_HIFN_795X=m CONFIG_CRYPTO_DEV_HIFN_795X=m
# CONFIG_CRYPTO_DEV_HIFN_795X_RNG is not set # CONFIG_CRYPTO_DEV_HIFN_795X_RNG is not set
@@ -6998,6 +7096,8 @@ CONFIG_SIGNED_PE_FILE_VERIFICATION=y
# Certificates for signature checking # Certificates for signature checking
# #
CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
CONFIG_MODULE_SIG_KEY_TYPE_RSA=y
# CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set
CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_TRUSTED_KEYS=""
CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE=y
@@ -7121,7 +7221,6 @@ CONFIG_LIBFDT=y
CONFIG_OID_REGISTRY=y CONFIG_OID_REGISTRY=y
CONFIG_SG_POOL=y CONFIG_SG_POOL=y
CONFIG_SBITMAP=y CONFIG_SBITMAP=y
# CONFIG_STRING_SELFTEST is not set
# end of Library routines # end of Library routines
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
@@ -7135,6 +7234,7 @@ CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
# #
CONFIG_PRINTK_TIME=y CONFIG_PRINTK_TIME=y
# CONFIG_PRINTK_CALLER is not set # CONFIG_PRINTK_CALLER is not set
# CONFIG_STACKTRACE_BUILD_ID is not set
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
@@ -7279,11 +7379,9 @@ CONFIG_RCU_SCALE_TEST=m
CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_TRACE=y CONFIG_RCU_TRACE=y
# CONFIG_RCU_EQS_DEBUG is not set # CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_RCU_STRICT_GRACE_PERIOD is not set
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set # CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y
@@ -7339,9 +7437,7 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set # CONFIG_KCOV is not set
CONFIG_RUNTIME_TESTING_MENU=y CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_LKDTM is not set # CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_MIN_HEAP is not set
# CONFIG_TEST_SORT is not set
CONFIG_TEST_DIV64=m CONFIG_TEST_DIV64=m
# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set # CONFIG_RBTREE_TEST is not set
@@ -7351,10 +7447,12 @@ CONFIG_REED_SOLOMON_TEST=m
# CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_ASYNC_RAID6_TEST is not set
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
# CONFIG_STRING_SELFTEST is not set
# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_STRING_HELPERS is not set
CONFIG_TEST_STRSCPY=m CONFIG_TEST_STRSCPY=m
# CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set # CONFIG_TEST_PRINTF is not set
CONFIG_TEST_SCANF=m
# CONFIG_TEST_BITMAP is not set # CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set # CONFIG_TEST_UUID is not set
CONFIG_TEST_XARRAY=m CONFIG_TEST_XARRAY=m

189
config/kernel/linux-mvebu64-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.14.1 Kernel Configuration # Linux/arm64 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -25,6 +25,7 @@ CONFIG_THREAD_INFO_IN_TASK=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="y" CONFIG_BUILD_SALT="y"
@@ -141,6 +142,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_BUF_SHIFT=18
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -212,7 +214,6 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
@@ -276,7 +277,6 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
@@ -579,53 +579,6 @@ CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
# end of CPU Frequency scaling # end of CPU Frequency scaling
# end of CPU Power Management # end of CPU Power Management
#
# Firmware Drivers
#
# CONFIG_ARM_SCMI_PROTOCOL is not set
CONFIG_ARM_SCPI_PROTOCOL=m
CONFIG_ARM_SCPI_POWER_DOMAIN=m
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_ISCSI_IBFT is not set
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TURRIS_MOX_RWTM is not set
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
# CONFIG_EFI_CAPSULE_LOADER is not set
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_EFI_EARLYCON=y
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ARCH_SUPPORTS_ACPI=y
CONFIG_ACPI=y CONFIG_ACPI=y
CONFIG_ACPI_GENERIC_GSI=y CONFIG_ACPI_GENERIC_GSI=y
@@ -678,6 +631,8 @@ CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_IRQ_BYPASS=y
CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
CONFIG_KVM_XFER_TO_GUEST_WORK=y
# CONFIG_NVHE_EL2_DEBUG is not set
CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA256_ARM64=y
# CONFIG_CRYPTO_SHA512_ARM64 is not set # CONFIG_CRYPTO_SHA512_ARM64 is not set
@@ -712,6 +667,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -820,16 +776,14 @@ CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
# CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_DEV_ZONED is not set
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
CONFIG_BLK_CMDLINE_PARSER=y
# CONFIG_BLK_WBT is not set # CONFIG_BLK_WBT is not set
# CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set
# CONFIG_BLK_CGROUP_IOCOST is not set # CONFIG_BLK_CGROUP_IOCOST is not set
@@ -850,6 +804,7 @@ CONFIG_BLOCK_COMPAT=y
CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -948,6 +903,12 @@ CONFIG_ZONE_DMA32=y
# CONFIG_GUP_TEST is not set # CONFIG_GUP_TEST is not set
# CONFIG_READ_ONLY_THP_FOR_FS is not set # CONFIG_READ_ONLY_THP_FOR_FS is not set
CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_ARCH_HAS_PTE_SPECIAL=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -964,6 +925,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
# CONFIG_TLS is not set # CONFIG_TLS is not set
CONFIG_XFRM=y CONFIG_XFRM=y
@@ -1068,6 +1030,7 @@ CONFIG_IPV6_PIMSM_V2=y
# CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set
# CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_IPV6_SEG6_HMAC is not set
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
# CONFIG_NETLABEL is not set # CONFIG_NETLABEL is not set
# CONFIG_MPTCP is not set # CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
@@ -1489,7 +1452,6 @@ CONFIG_BRIDGE_VLAN_FILTERING=y
CONFIG_BRIDGE_MRP=y CONFIG_BRIDGE_MRP=y
# CONFIG_BRIDGE_CFM is not set # CONFIG_BRIDGE_CFM is not set
CONFIG_NET_DSA=m CONFIG_NET_DSA=m
CONFIG_NET_DSA_TAG_8021Q=m
CONFIG_NET_DSA_TAG_AR9331=m CONFIG_NET_DSA_TAG_AR9331=m
CONFIG_NET_DSA_TAG_BRCM_COMMON=m CONFIG_NET_DSA_TAG_BRCM_COMMON=m
CONFIG_NET_DSA_TAG_BRCM=m CONFIG_NET_DSA_TAG_BRCM=m
@@ -1810,6 +1772,7 @@ CONFIG_AF_RXRPC=m
# CONFIG_AF_RXRPC_DEBUG is not set # CONFIG_AF_RXRPC_DEBUG is not set
# CONFIG_RXKAD is not set # CONFIG_RXKAD is not set
# CONFIG_AF_KCM is not set # CONFIG_AF_KCM is not set
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -2060,7 +2023,6 @@ CONFIG_GENERIC_ARCH_NUMA=y
CONFIG_ARM_CCI=y CONFIG_ARM_CCI=y
# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_BRCMSTB_GISB_ARB is not set
# CONFIG_MOXTET is not set # CONFIG_MOXTET is not set
# CONFIG_SIMPLE_PM_BUS is not set
CONFIG_VEXPRESS_CONFIG=y CONFIG_VEXPRESS_CONFIG=y
CONFIG_MHI_BUS=m CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set # CONFIG_MHI_BUS_DEBUG is not set
@@ -2068,6 +2030,62 @@ CONFIG_MHI_BUS_PCI_GENERIC=m
# end of Bus devices # end of Bus devices
CONFIG_CONNECTOR=m CONFIG_CONNECTOR=m
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
# CONFIG_ARM_SCMI_PROTOCOL is not set
# end of ARM System Control and Management Interface Protocol
CONFIG_ARM_SCPI_PROTOCOL=m
CONFIG_ARM_SCPI_POWER_DOMAIN=m
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_ISCSI_IBFT is not set
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_SYSFB=y
# CONFIG_SYSFB_SIMPLEFB is not set
# CONFIG_TURRIS_MOX_RWTM is not set
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
# CONFIG_EFI_CAPSULE_LOADER is not set
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_EFI_EARLYCON=y
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
# CONFIG_GNSS is not set # CONFIG_GNSS is not set
CONFIG_MTD=y CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set # CONFIG_MTD_TESTS is not set
@@ -2087,6 +2105,10 @@ CONFIG_MTD_OF_PARTS=y
# #
CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
#
# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK.
#
# CONFIG_FTL is not set # CONFIG_FTL is not set
# CONFIG_NFTL is not set # CONFIG_NFTL is not set
# CONFIG_INFTL is not set # CONFIG_INFTL is not set
@@ -2329,6 +2351,7 @@ CONFIG_UACCE=m
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
CONFIG_RAID_ATTRS=m CONFIG_RAID_ATTRS=m
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
# CONFIG_SCSI_PROC_FS is not set # CONFIG_SCSI_PROC_FS is not set
@@ -2340,6 +2363,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set # CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_LOGGING is not set
@@ -2752,6 +2776,8 @@ CONFIG_ICE=m
# CONFIG_IGC is not set # CONFIG_IGC is not set
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
# CONFIG_JME is not set # CONFIG_JME is not set
CONFIG_NET_VENDOR_LITEX=y
# CONFIG_LITEX_LITEETH is not set
CONFIG_NET_VENDOR_MARVELL=y CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MVMDIO=y CONFIG_MVMDIO=y
CONFIG_MVNETA=y CONFIG_MVNETA=y
@@ -2903,6 +2929,7 @@ CONFIG_BCM_NET_PHYLIB=m
CONFIG_MARVELL_PHY=y CONFIG_MARVELL_PHY=y
CONFIG_MARVELL_10G_PHY=m CONFIG_MARVELL_10G_PHY=m
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m CONFIG_MEDIATEK_GE_PHY=m
# CONFIG_MICREL_PHY is not set # CONFIG_MICREL_PHY is not set
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
@@ -2928,6 +2955,10 @@ CONFIG_DP83869_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set # CONFIG_XILINX_GMII2RGMII is not set
CONFIG_MICREL_KS8995MA=m CONFIG_MICREL_KS8995MA=m
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
@@ -3164,7 +3195,6 @@ CONFIG_WLAN_VENDOR_INTERSIL=y
# CONFIG_HOSTAP is not set # CONFIG_HOSTAP is not set
# CONFIG_HERMES is not set # CONFIG_HERMES is not set
# CONFIG_P54_COMMON is not set # CONFIG_P54_COMMON is not set
# CONFIG_PRISM54 is not set
CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MARVELL=y
CONFIG_LIBERTAS=m CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_USB=m CONFIG_LIBERTAS_USB=m
@@ -3318,6 +3348,7 @@ CONFIG_USB_NET_RNDIS_WLAN=m
CONFIG_WWAN=m CONFIG_WWAN=m
CONFIG_WWAN_HWSIM=m CONFIG_WWAN_HWSIM=m
CONFIG_MHI_WWAN_CTRL=m CONFIG_MHI_WWAN_CTRL=m
CONFIG_MHI_WWAN_MBIM=m
CONFIG_RPMSG_WWAN_CTRL=m CONFIG_RPMSG_WWAN_CTRL=m
# end of Wireless WAN # end of Wireless WAN
@@ -3329,9 +3360,6 @@ CONFIG_USB4_NET=m
CONFIG_NETDEVSIM=m CONFIG_NETDEVSIM=m
CONFIG_NET_FAILOVER=y CONFIG_NET_FAILOVER=y
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
CONFIG_NVM=y
CONFIG_NVM_PBLK=m
# CONFIG_NVM_PBLK_DEBUG is not set
# #
# Input device support # Input device support
@@ -3559,6 +3587,7 @@ CONFIG_HW_RANDOM_CAVIUM=y
CONFIG_HW_RANDOM_OPTEE=m CONFIG_HW_RANDOM_OPTEE=m
CONFIG_HW_RANDOM_CCTRNG=m CONFIG_HW_RANDOM_CCTRNG=m
CONFIG_HW_RANDOM_XIPHERA=m CONFIG_HW_RANDOM_XIPHERA=m
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
CONFIG_DEVMEM=y CONFIG_DEVMEM=y
CONFIG_DEVPORT=y CONFIG_DEVPORT=y
@@ -3566,10 +3595,9 @@ CONFIG_DEVPORT=y
CONFIG_XILLYBUS_CLASS=m CONFIG_XILLYBUS_CLASS=m
# CONFIG_XILLYBUS is not set # CONFIG_XILLYBUS is not set
CONFIG_XILLYUSB=m CONFIG_XILLYUSB=m
# end of Character devices
# CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_CPU is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
# #
# I2C support # I2C support
@@ -3665,6 +3693,7 @@ CONFIG_I2C_TINY_USB=m
# #
# Other I2C/SMBus bus drivers # Other I2C/SMBus bus drivers
# #
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
# CONFIG_I2C_STUB is not set # CONFIG_I2C_STUB is not set
@@ -3744,6 +3773,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
# CONFIG_PTP_1588_CLOCK_INES is not set # CONFIG_PTP_1588_CLOCK_INES is not set
CONFIG_PTP_1588_CLOCK_KVM=m CONFIG_PTP_1588_CLOCK_KVM=m
@@ -3866,6 +3896,7 @@ CONFIG_GPIO_XRA1403=m
# #
CONFIG_GPIO_AGGREGATOR=m CONFIG_GPIO_AGGREGATOR=m
# CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_MOCKUP is not set
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
# CONFIG_W1 is not set # CONFIG_W1 is not set
@@ -3910,6 +3941,7 @@ CONFIG_MANAGER_SBS=m
CONFIG_CHARGER_LTC4162L=m CONFIG_CHARGER_LTC4162L=m
# CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set
CONFIG_CHARGER_MP2629=m CONFIG_CHARGER_MP2629=m
CONFIG_CHARGER_MT6360=m
# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24257 is not set
@@ -3950,6 +3982,7 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
# CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_AS370 is not set
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_AXI_FAN_CONTROL=m CONFIG_SENSORS_AXI_FAN_CONTROL=m
@@ -4077,6 +4110,7 @@ CONFIG_SENSORS_UCD9200=m
CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
@@ -4340,6 +4374,8 @@ CONFIG_MFD_ATC260X_I2C=m
CONFIG_MFD_QCOM_PM8008=m CONFIG_MFD_QCOM_PM8008=m
CONFIG_MFD_VEXPRESS_SYSREG=y CONFIG_MFD_VEXPRESS_SYSREG=y
CONFIG_MFD_INTEL_M10_BMC=m CONFIG_MFD_INTEL_M10_BMC=m
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -4394,7 +4430,9 @@ CONFIG_REGULATOR_RT4801=m
CONFIG_REGULATOR_RT4831=m CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT6160=m CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
CONFIG_REGULATOR_RTMV20=m CONFIG_REGULATOR_RTMV20=m
CONFIG_REGULATOR_RTQ6752=m
# CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SLG51000 is not set
# CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8106A is not set
# CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8824X is not set
@@ -4747,7 +4785,9 @@ CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m CONFIG_VIDEO_IMX290=m
CONFIG_VIDEO_IMX319=m CONFIG_VIDEO_IMX319=m
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
CONFIG_VIDEO_IMX355=m CONFIG_VIDEO_IMX355=m
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
# CONFIG_VIDEO_OV2640 is not set # CONFIG_VIDEO_OV2640 is not set
# CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2659 is not set
@@ -4769,6 +4809,7 @@ CONFIG_VIDEO_OV7640=m
# CONFIG_VIDEO_OV7740 is not set # CONFIG_VIDEO_OV7740 is not set
# CONFIG_VIDEO_OV8856 is not set # CONFIG_VIDEO_OV8856 is not set
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
# CONFIG_VIDEO_OV9640 is not set # CONFIG_VIDEO_OV9640 is not set
# CONFIG_VIDEO_OV9650 is not set # CONFIG_VIDEO_OV9650 is not set
CONFIG_VIDEO_OV9734=m CONFIG_VIDEO_OV9734=m
@@ -5948,17 +5989,19 @@ CONFIG_DMA_ENGINE_RAID=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
# CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_SELFTESTS is not set
# CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options # end of DMABUF options
# CONFIG_AUXDISPLAY is not set # CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set # CONFIG_UIO is not set
CONFIG_VFIO=y
CONFIG_VFIO_IOMMU_TYPE1=y CONFIG_VFIO_IOMMU_TYPE1=y
CONFIG_VFIO_VIRQFD=y CONFIG_VFIO_VIRQFD=y
CONFIG_VFIO=y
# CONFIG_VFIO_NOIOMMU is not set # CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=y CONFIG_VFIO_PCI_CORE=y
CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI=y
CONFIG_VFIO_PLATFORM=y CONFIG_VFIO_PLATFORM=y
# CONFIG_VFIO_AMBA is not set # CONFIG_VFIO_AMBA is not set
# CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET is not set # CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET is not set
@@ -5986,6 +6029,7 @@ CONFIG_VHOST_SCSI=m
# #
# Microsoft Hyper-V guest support # Microsoft Hyper-V guest support
# #
# CONFIG_HYPERV is not set
# end of Microsoft Hyper-V guest support # end of Microsoft Hyper-V guest support
# #
@@ -6096,6 +6140,7 @@ CONFIG_AD2S1210=m
# CONFIG_LTE_GDM724X is not set # CONFIG_LTE_GDM724X is not set
# CONFIG_GS_FPGABOOT is not set # CONFIG_GS_FPGABOOT is not set
# CONFIG_UNISYSSPAR is not set # CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
# CONFIG_FB_TFT is not set # CONFIG_FB_TFT is not set
# CONFIG_KS7010 is not set # CONFIG_KS7010 is not set
# CONFIG_PI433 is not set # CONFIG_PI433 is not set
@@ -6186,6 +6231,8 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# end of Generic IOMMU Pagetable Support # end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y CONFIG_OF_IOMMU=y
CONFIG_IOMMU_DMA=y CONFIG_IOMMU_DMA=y
@@ -6442,6 +6489,7 @@ CONFIG_IAQCORE=m
CONFIG_SCD30_CORE=m CONFIG_SCD30_CORE=m
CONFIG_SCD30_I2C=m CONFIG_SCD30_I2C=m
# CONFIG_SENSIRION_SGP30 is not set # CONFIG_SENSIRION_SGP30 is not set
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m CONFIG_SPS30_I2C=m
CONFIG_VZ89X=m CONFIG_VZ89X=m
@@ -6731,6 +6779,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
CONFIG_AD5272=m CONFIG_AD5272=m
CONFIG_DS1803=m CONFIG_DS1803=m
# CONFIG_MAX5432 is not set # CONFIG_MAX5432 is not set
@@ -7007,7 +7056,6 @@ CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set # CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
# CONFIG_FS_VERITY is not set # CONFIG_FS_VERITY is not set
@@ -7062,6 +7110,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_FAT_DEFAULT_UTF8 is not set
# CONFIG_EXFAT_FS is not set # CONFIG_EXFAT_FS is not set
# CONFIG_NTFS_FS is not set # CONFIG_NTFS_FS is not set
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_64BIT_CLUSTER is not set
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -7161,13 +7213,16 @@ CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CIFS=m CONFIG_CIFS=m
# CONFIG_CIFS_STATS2 is not set # CONFIG_CIFS_STATS2 is not set
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
# CONFIG_CIFS_WEAK_PW_HASH is not set
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DEBUG is not set
# CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_DFS_UPCALL is not set
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_SMB_SERVER=m
CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y
# CONFIG_SMB_SERVER_KERBEROS5 is not set
CONFIG_SMBFS_COMMON=m
# CONFIG_CODA_FS is not set # CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set # CONFIG_AFS_FS is not set
CONFIG_9P_FS=m CONFIG_9P_FS=m
@@ -7469,6 +7524,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
@@ -7600,6 +7656,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_SWIOTLB=y CONFIG_SWIOTLB=y
# CONFIG_DMA_RESTRICTED_POOL is not set
CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_COHERENT_POOL=y
CONFIG_DMA_REMAP=y CONFIG_DMA_REMAP=y
@@ -7818,7 +7875,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=21
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set # CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y
@@ -7864,7 +7920,6 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y
CONFIG_RUNTIME_TESTING_MENU=y CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_LKDTM is not set # CONFIG_LKDTM is not set
# CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_MIN_HEAP is not set
# CONFIG_TEST_SORT is not set
CONFIG_TEST_DIV64=m CONFIG_TEST_DIV64=m
# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set # CONFIG_RBTREE_TEST is not set

36
config/kernel/linux-odroidxu4-edge.config
View File

@@ -5598,41 +5598,7 @@ CONFIG_LTE_GDM724X=m
CONFIG_GS_FPGABOOT=m CONFIG_GS_FPGABOOT=m
# CONFIG_UNISYSSPAR is not set # CONFIG_UNISYSSPAR is not set
CONFIG_COMMON_CLK_XLNX_CLKWZRD=m CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
CONFIG_FB_TFT=m # CONFIG_FB_TFT is not set
CONFIG_FB_TFT_AGM1264K_FL=m
CONFIG_FB_TFT_BD663474=m
CONFIG_FB_TFT_HX8340BN=m
CONFIG_FB_TFT_HX8347D=m
CONFIG_FB_TFT_HX8353D=m
CONFIG_FB_TFT_HX8357D=m
CONFIG_FB_TFT_ILI9163=m
CONFIG_FB_TFT_ILI9320=m
CONFIG_FB_TFT_ILI9325=m
CONFIG_FB_TFT_ILI9340=m
CONFIG_FB_TFT_ILI9341=m
CONFIG_FB_TFT_ILI9481=m
CONFIG_FB_TFT_ILI9486=m
CONFIG_FB_TFT_PCD8544=m
CONFIG_FB_TFT_RA8875=m
CONFIG_FB_TFT_S6D02A1=m
CONFIG_FB_TFT_S6D1121=m
CONFIG_FB_TFT_SEPS525=m
CONFIG_FB_TFT_SH1106=m
CONFIG_FB_TFT_SSD1289=m
CONFIG_FB_TFT_SSD1305=m
CONFIG_FB_TFT_SSD1306=m
CONFIG_FB_TFT_SSD1331=m
CONFIG_FB_TFT_SSD1351=m
CONFIG_FB_TFT_ST7735R=m
CONFIG_FB_TFT_ST7789V=m
CONFIG_FB_TFT_TINYLCD=m
CONFIG_FB_TFT_TLS8204=m
CONFIG_FB_TFT_UC1611=m
CONFIG_FB_TFT_UC1701=m
CONFIG_FB_TFT_UPD161704=m
CONFIG_FB_TFT_WATTEROTT=m
CONFIG_FB_TFT_HKTFT35=m
CONFIG_FB_TFT_HKTFT32=m
CONFIG_MOST_COMPONENTS=m CONFIG_MOST_COMPONENTS=m
CONFIG_MOST_NET=m CONFIG_MOST_NET=m
CONFIG_MOST_VIDEO=m CONFIG_MOST_VIDEO=m

128
config/kernel/linux-rockchip-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm 5.14.4 Kernel Configuration # Linux/arm 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -24,6 +24,7 @@ CONFIG_BUILDTIME_TABLE_SORT=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="" CONFIG_BUILD_SALT=""
@@ -140,6 +141,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_BUF_SHIFT=18
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -203,12 +205,12 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y CONFIG_FUTEX_PI=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_SIGNALFD=y CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y CONFIG_TIMERFD=y
@@ -262,7 +264,6 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_HAVE_PROC_CPU=y CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_FIX_EARLYCON_MEM=y CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -522,6 +523,7 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
# #
CONFIG_CPUFREQ_DT=m CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_ARM_SCMI_CPUFREQ=m
# end of CPU Frequency scaling # end of CPU Frequency scaling
# #
@@ -583,21 +585,6 @@ CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y
# end of Power management options # end of Power management options
#
# Firmware Drivers
#
# CONFIG_FIRMWARE_MEMMAP is not set
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
# CONFIG_GOOGLE_FIRMWARE is not set
CONFIG_HAVE_ARM_SMCCC=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARM_CRYPTO=y CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM=m CONFIG_CRYPTO_SHA1_ARM=m
CONFIG_CRYPTO_SHA1_ARM_NEON=m CONFIG_CRYPTO_SHA1_ARM_NEON=m
@@ -622,7 +609,6 @@ CONFIG_AS_VFP_VMRS_FPINST=y
# #
# General architecture-dependent options # General architecture-dependent options
# #
CONFIG_SET_FS=y
# CONFIG_KPROBES is not set # CONFIG_KPROBES is not set
# CONFIG_JUMP_LABEL is not set # CONFIG_JUMP_LABEL is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
@@ -631,6 +617,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -714,16 +701,14 @@ CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
# CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_DEV_ZONED is not set
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
# CONFIG_BLK_WBT is not set # CONFIG_BLK_WBT is not set
# CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set
# CONFIG_BLK_CGROUP_IOCOST is not set # CONFIG_BLK_CGROUP_IOCOST is not set
@@ -759,6 +744,7 @@ CONFIG_EFI_PARTITION=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -839,10 +825,17 @@ CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set # CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_PAGE_IDLE_FLAG=y
CONFIG_IDLE_PAGE_TRACKING=y CONFIG_IDLE_PAGE_TRACKING=y
# CONFIG_PERCPU_STATS is not set # CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set # CONFIG_GUP_TEST is not set
CONFIG_KMAP_LOCAL=y CONFIG_KMAP_LOCAL=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -858,6 +851,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
CONFIG_TLS=m CONFIG_TLS=m
# CONFIG_TLS_DEVICE is not set # CONFIG_TLS_DEVICE is not set
@@ -964,6 +958,7 @@ CONFIG_IPV6_PIMSM_V2=y
# CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set
# CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_IPV6_SEG6_HMAC is not set
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
CONFIG_NETLABEL=y CONFIG_NETLABEL=y
# CONFIG_MPTCP is not set # CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
@@ -1688,6 +1683,7 @@ CONFIG_BT_VIRTIO=m
# CONFIG_AF_RXRPC is not set # CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set # CONFIG_AF_KCM is not set
CONFIG_STREAM_PARSER=y CONFIG_STREAM_PARSER=y
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -1817,13 +1813,37 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_ARM_CCI=y CONFIG_ARM_CCI=y
# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_BRCMSTB_GISB_ARB is not set
# CONFIG_MOXTET is not set # CONFIG_MOXTET is not set
# CONFIG_SIMPLE_PM_BUS is not set
# CONFIG_VEXPRESS_CONFIG is not set # CONFIG_VEXPRESS_CONFIG is not set
# CONFIG_MHI_BUS is not set # CONFIG_MHI_BUS is not set
# end of Bus devices # end of Bus devices
CONFIG_CONNECTOR=y CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y CONFIG_PROC_EVENTS=y
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
CONFIG_ARM_SCMI_PROTOCOL=m
# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=m
# end of ARM System Control and Management Interface Protocol
# CONFIG_FIRMWARE_MEMMAP is not set
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_TRUSTED_FOUNDATIONS is not set
# CONFIG_GOOGLE_FIRMWARE is not set
CONFIG_HAVE_ARM_SMCCC=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_GNSS=m CONFIG_GNSS=m
# CONFIG_GNSS_MTK_SERIAL is not set # CONFIG_GNSS_MTK_SERIAL is not set
CONFIG_GNSS_SIRF_SERIAL=m CONFIG_GNSS_SIRF_SERIAL=m
@@ -1938,6 +1958,7 @@ CONFIG_MISC_RTSX_USB=m
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set # CONFIG_RAID_ATTRS is not set
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
CONFIG_SCSI_PROC_FS=y CONFIG_SCSI_PROC_FS=y
@@ -1949,6 +1970,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_ST is not set
CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR=y
# CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_LOGGING is not set
@@ -2002,7 +2024,6 @@ CONFIG_DM_THIN_PROVISIONING=m
CONFIG_DM_CACHE=m CONFIG_DM_CACHE=m
CONFIG_DM_CACHE_SMQ=m CONFIG_DM_CACHE_SMQ=m
CONFIG_DM_WRITECACHE=m CONFIG_DM_WRITECACHE=m
CONFIG_DM_EBS=m
CONFIG_DM_ERA=m CONFIG_DM_ERA=m
CONFIG_DM_CLONE=m CONFIG_DM_CLONE=m
CONFIG_DM_MIRROR=m CONFIG_DM_MIRROR=m
@@ -2123,6 +2144,8 @@ CONFIG_NET_VENDOR_GOOGLE=y
# CONFIG_NET_VENDOR_HUAWEI is not set # CONFIG_NET_VENDOR_HUAWEI is not set
# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_INTEL is not set
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
CONFIG_NET_VENDOR_LITEX=y
# CONFIG_LITEX_LITEETH is not set
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set # CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
@@ -2189,6 +2212,7 @@ CONFIG_BCM_NET_PHYLIB=m
# CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_PHY is not set
# CONFIG_MARVELL_10G_PHY is not set # CONFIG_MARVELL_10G_PHY is not set
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m CONFIG_MEDIATEK_GE_PHY=m
# CONFIG_MICREL_PHY is not set # CONFIG_MICREL_PHY is not set
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
@@ -2214,6 +2238,10 @@ CONFIG_DP83869_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set # CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set # CONFIG_MICREL_KS8995MA is not set
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
@@ -2468,7 +2496,6 @@ CONFIG_WWAN_HWSIM=m
# CONFIG_NETDEVSIM is not set # CONFIG_NETDEVSIM is not set
CONFIG_NET_FAILOVER=m CONFIG_NET_FAILOVER=m
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
# CONFIG_NVM is not set
# #
# Input device support # Input device support
@@ -2827,9 +2854,8 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_XILLYBUS_CLASS=m CONFIG_XILLYBUS_CLASS=m
# CONFIG_XILLYBUS is not set # CONFIG_XILLYBUS is not set
CONFIG_XILLYUSB=m CONFIG_XILLYUSB=m
# end of Character devices
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
# #
# I2C support # I2C support
@@ -2889,6 +2915,7 @@ CONFIG_I2C_CP2615=m
# Other I2C/SMBus bus drivers # Other I2C/SMBus bus drivers
# #
CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
CONFIG_I2C_STUB=m CONFIG_I2C_STUB=m
@@ -2961,6 +2988,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
# CONFIG_PTP_1588_CLOCK_INES is not set # CONFIG_PTP_1588_CLOCK_INES is not set
# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
@@ -3013,6 +3041,7 @@ CONFIG_GPIO_HLWD=m
# CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MB86S7X is not set
# CONFIG_GPIO_MPC8XXX is not set # CONFIG_GPIO_MPC8XXX is not set
# CONFIG_GPIO_PL061 is not set # CONFIG_GPIO_PL061 is not set
CONFIG_GPIO_ROCKCHIP=m
# CONFIG_GPIO_SAMA5D2_PIOBU is not set # CONFIG_GPIO_SAMA5D2_PIOBU is not set
# CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SIFIVE is not set
# CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_SYSCON is not set
@@ -3066,6 +3095,7 @@ CONFIG_GPIO_MAX77650=m
# #
# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_AGGREGATOR is not set
# CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_MOCKUP is not set
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
CONFIG_W1=m CONFIG_W1=m
@@ -3162,6 +3192,7 @@ CONFIG_BATTERY_GOLDFISH=m
CONFIG_BATTERY_RT5033=m CONFIG_BATTERY_RT5033=m
# CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9455 is not set
CONFIG_CHARGER_CROS_USBPD=m CONFIG_CHARGER_CROS_USBPD=m
CONFIG_CHARGER_CROS_PCHG=m
CONFIG_CHARGER_UCS1002=m CONFIG_CHARGER_UCS1002=m
# CONFIG_CHARGER_BD99954 is not set # CONFIG_CHARGER_BD99954 is not set
CONFIG_HWMON=y CONFIG_HWMON=y
@@ -3189,9 +3220,11 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
CONFIG_SENSORS_AS370=m CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
# CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set
CONFIG_SENSORS_ARM_SCMI=m
# CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ASPEED is not set
CONFIG_SENSORS_ATXP1=m CONFIG_SENSORS_ATXP1=m
CONFIG_SENSORS_CORSAIR_CPRO=m CONFIG_SENSORS_CORSAIR_CPRO=m
@@ -3274,6 +3307,7 @@ CONFIG_SENSORS_PCF8591=m
# CONFIG_PMBUS is not set # CONFIG_PMBUS is not set
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
@@ -3503,6 +3537,8 @@ CONFIG_MFD_KHADAS_MCU=m
# CONFIG_MFD_QCOM_PM8008 is not set # CONFIG_MFD_QCOM_PM8008 is not set
# CONFIG_RAVE_SP_CORE is not set # CONFIG_RAVE_SP_CORE is not set
CONFIG_MFD_INTEL_M10_BMC=m CONFIG_MFD_INTEL_M10_BMC=m
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -3515,6 +3551,7 @@ CONFIG_REGULATOR_ACT8865=y
# CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ARIZONA_LDO1 is not set # CONFIG_REGULATOR_ARIZONA_LDO1 is not set
# CONFIG_REGULATOR_ARIZONA_MICSUPP is not set # CONFIG_REGULATOR_ARIZONA_MICSUPP is not set
CONFIG_REGULATOR_ARM_SCMI=m
CONFIG_REGULATOR_ATC260X=m CONFIG_REGULATOR_ATC260X=m
CONFIG_REGULATOR_BD718XX=m CONFIG_REGULATOR_BD718XX=m
CONFIG_REGULATOR_BD957XMUF=m CONFIG_REGULATOR_BD957XMUF=m
@@ -3562,7 +3599,9 @@ CONFIG_REGULATOR_RT4801=m
CONFIG_REGULATOR_RT4831=m CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT6160=m CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
CONFIG_REGULATOR_RTMV20=m CONFIG_REGULATOR_RTMV20=m
CONFIG_REGULATOR_RTQ6752=m
# CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SLG51000 is not set
# CONFIG_REGULATOR_STPMIC1 is not set # CONFIG_REGULATOR_STPMIC1 is not set
# CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8106A is not set
@@ -4027,7 +4066,9 @@ CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m CONFIG_VIDEO_IMX290=m
# CONFIG_VIDEO_IMX319 is not set # CONFIG_VIDEO_IMX319 is not set
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
# CONFIG_VIDEO_IMX355 is not set # CONFIG_VIDEO_IMX355 is not set
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m CONFIG_VIDEO_OV2659=m
@@ -4048,6 +4089,7 @@ CONFIG_VIDEO_OV7670=m
CONFIG_VIDEO_OV7740=m CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV8856=m CONFIG_VIDEO_OV8856=m
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
CONFIG_VIDEO_OV9640=m CONFIG_VIDEO_OV9640=m
CONFIG_VIDEO_OV9650=m CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_OV13858=m CONFIG_VIDEO_OV13858=m
@@ -4324,6 +4366,7 @@ CONFIG_DVB_SP2=m
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set # CONFIG_DRM_DP_AUX_CHARDEV is not set
CONFIG_DRM_DEBUG_MM=y CONFIG_DRM_DEBUG_MM=y
# CONFIG_DRM_DEBUG_SELFTEST is not set # CONFIG_DRM_DEBUG_SELFTEST is not set
@@ -4393,7 +4436,9 @@ CONFIG_DRM_PANEL_SIMPLE=y
# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set
# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
CONFIG_DRM_PANEL_ILITEK_ILI9341=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KHADAS_TS050=m
@@ -4416,6 +4461,8 @@ CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_PANEL_RAYDIUM_RM67191=m CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
CONFIG_DRM_PANEL_RAYDIUM_RM68200=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m
CONFIG_DRM_PANEL_SAMSUNG_DB7430=m
# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
@@ -4438,6 +4485,7 @@ CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TPO_TPG110=m
# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m
# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
# end of Display Panels # end of Display Panels
@@ -4755,6 +4803,7 @@ CONFIG_SND_SOC_ES8328=m
CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_I2C=m
CONFIG_SND_SOC_ES8328_SPI=m CONFIG_SND_SOC_ES8328_SPI=m
# CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_GTM601 is not set
CONFIG_SND_SOC_ICS43432=m
# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98088 is not set
CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98090=m
@@ -5596,6 +5645,7 @@ CONFIG_DMABUF_MOVE_NOTIFY=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
CONFIG_DMABUF_SELFTESTS=m CONFIG_DMABUF_SELFTESTS=m
CONFIG_DMABUF_HEAPS=y CONFIG_DMABUF_HEAPS=y
# CONFIG_DMABUF_SYSFS_STATS is not set
CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMABUF_HEAPS_CMA=y CONFIG_DMABUF_HEAPS_CMA=y
# end of DMABUF options # end of DMABUF options
@@ -5772,6 +5822,7 @@ CONFIG_COMMON_CLK=y
CONFIG_LMK04832=m CONFIG_LMK04832=m
CONFIG_COMMON_CLK_MAX9485=m CONFIG_COMMON_CLK_MAX9485=m
CONFIG_COMMON_CLK_RK808=y CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_SCMI=m
# CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5341 is not set
# CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set # CONFIG_COMMON_CLK_SI514 is not set
@@ -5826,6 +5877,8 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# end of Generic IOMMU Pagetable Support # end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y CONFIG_OF_IOMMU=y
CONFIG_ROCKCHIP_IOMMU=y CONFIG_ROCKCHIP_IOMMU=y
@@ -6089,6 +6142,7 @@ CONFIG_SCD30_CORE=m
CONFIG_SCD30_I2C=m CONFIG_SCD30_I2C=m
CONFIG_SCD30_SERIAL=m CONFIG_SCD30_SERIAL=m
CONFIG_SENSIRION_SGP30=m CONFIG_SENSIRION_SGP30=m
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m CONFIG_SPS30_I2C=m
CONFIG_SPS30_SERIAL=m CONFIG_SPS30_SERIAL=m
@@ -6107,6 +6161,7 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m
# #
# IIO SCMI Sensors # IIO SCMI Sensors
# #
CONFIG_IIO_SCMI=m
# end of IIO SCMI Sensors # end of IIO SCMI Sensors
# #
@@ -6360,6 +6415,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
CONFIG_AD5272=m CONFIG_AD5272=m
# CONFIG_DS1803 is not set # CONFIG_DS1803 is not set
CONFIG_MAX5432=m CONFIG_MAX5432=m
@@ -6468,6 +6524,7 @@ CONFIG_MADERA_IRQ=m
# CONFIG_IPACK_BUS is not set # CONFIG_IPACK_BUS is not set
CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_SCMI=m
# CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_SYSCON is not set
# #
@@ -6617,15 +6674,15 @@ CONFIG_F2FS_FS_SECURITY=y
# CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FAULT_INJECTION is not set
CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_COMPRESSION=y
CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZO=y
CONFIG_F2FS_FS_LZORLE=y
CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_LZ4=y
CONFIG_F2FS_FS_LZ4HC=y CONFIG_F2FS_FS_LZ4HC=y
CONFIG_F2FS_FS_ZSTD=y CONFIG_F2FS_FS_ZSTD=y
CONFIG_F2FS_FS_LZORLE=y CONFIG_F2FS_IOSTAT=y
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set # CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
# CONFIG_FS_VERITY is not set # CONFIG_FS_VERITY is not set
@@ -6656,15 +6713,12 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
# Caches # Caches
# #
CONFIG_NETFS_SUPPORT=y CONFIG_NETFS_SUPPORT=y
# CONFIG_NETFS_STATS is not set CONFIG_NETFS_STATS=y
CONFIG_FSCACHE=y CONFIG_FSCACHE=y
CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_STATS=y
CONFIG_FSCACHE_HISTOGRAM=y
# CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_DEBUG is not set
# CONFIG_FSCACHE_OBJECT_LIST is not set
CONFIG_CACHEFILES=y CONFIG_CACHEFILES=y
# CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_HISTOGRAM is not set
# end of Caches # end of Caches
# #
@@ -6690,6 +6744,9 @@ CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -6819,7 +6876,6 @@ CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CIFS=m CONFIG_CIFS=m
# CONFIG_CIFS_STATS2 is not set # CONFIG_CIFS_STATS2 is not set
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
# CONFIG_CIFS_WEAK_PW_HASH is not set
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
@@ -6827,6 +6883,8 @@ CONFIG_CIFS_POSIX=y
# CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_DFS_UPCALL is not set
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_FSCACHE=y
# CONFIG_SMB_SERVER is not set
CONFIG_SMBFS_COMMON=m
# CONFIG_CODA_FS is not set # CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set # CONFIG_AFS_FS is not set
CONFIG_NLS=y CONFIG_NLS=y
@@ -7125,6 +7183,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
@@ -7440,7 +7499,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set # CONFIG_LATENCYTOP is not set
CONFIG_NOP_TRACER=y CONFIG_NOP_TRACER=y

220
config/kernel/linux-rockchip64-edge.config
View File

@@ -1,6 +1,6 @@
# #
# Automatically generated file; DO NOT EDIT. # Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.14.14 Kernel Configuration # Linux/arm64 5.15.1 Kernel Configuration
# #
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0" CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y CONFIG_CC_IS_GCC=y
@@ -25,6 +25,7 @@ CONFIG_THREAD_INFO_IN_TASK=y
# #
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set # CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT="" CONFIG_BUILD_SALT=""
@@ -148,6 +149,7 @@ CONFIG_IKHEADERS=m
CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_BUF_SHIFT=17
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
# CONFIG_PRINTK_INDEX is not set
CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SCHED_CLOCK=y
# #
@@ -220,7 +222,6 @@ CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
@@ -284,7 +285,6 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
@@ -582,54 +582,6 @@ CONFIG_ARM_SCPI_CPUFREQ=y
# end of CPU Frequency scaling # end of CPU Frequency scaling
# end of CPU Power Management # end of CPU Power Management
#
# Firmware Drivers
#
# CONFIG_ARM_SCMI_PROTOCOL is not set
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ARM_SCPI_POWER_DOMAIN=y
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_ROCKCHIP_SIP=y
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=y
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
CONFIG_EFI_CAPSULE_LOADER=y
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_EFI_EARLYCON=y
CONFIG_MESON_SM=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ARCH_SUPPORTS_ACPI=y
# CONFIG_ACPI is not set # CONFIG_ACPI is not set
CONFIG_IRQ_BYPASS_MANAGER=y CONFIG_IRQ_BYPASS_MANAGER=y
@@ -647,6 +599,8 @@ CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_IRQ_BYPASS=y
CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
CONFIG_KVM_XFER_TO_GUEST_WORK=y
# CONFIG_NVHE_EL2_DEBUG is not set
CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA256_ARM64=y
CONFIG_CRYPTO_SHA512_ARM64=y CONFIG_CRYPTO_SHA512_ARM64=y
@@ -682,6 +636,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_SMP_IDLE_THREAD=y
@@ -799,16 +754,14 @@ CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_RWSTAT=y
CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSG_COMMON=y
CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_DEV_THROTTLING_LOW is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
CONFIG_BLK_WBT=y CONFIG_BLK_WBT=y
CONFIG_BLK_WBT_MQ=y CONFIG_BLK_WBT_MQ=y
# CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set
@@ -832,6 +785,7 @@ CONFIG_BLOCK_COMPAT=y
CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y CONFIG_BLK_PM=y
CONFIG_BLOCK_HOLDER_DEPRECATED=y
# #
# IO Schedulers # IO Schedulers
@@ -945,6 +899,12 @@ CONFIG_ZONE_DMA32=y
CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_MAPPING_DIRTY_HELPERS=y CONFIG_MAPPING_DIRTY_HELPERS=y
CONFIG_SECRETMEM=y CONFIG_SECRETMEM=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options # end of Memory Management options
CONFIG_NET=y CONFIG_NET=y
@@ -961,6 +921,7 @@ CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_UNIX_SCM=y CONFIG_UNIX_SCM=y
CONFIG_AF_UNIX_OOB=y
CONFIG_UNIX_DIAG=m CONFIG_UNIX_DIAG=m
CONFIG_TLS=m CONFIG_TLS=m
CONFIG_TLS_DEVICE=y CONFIG_TLS_DEVICE=y
@@ -1070,6 +1031,7 @@ CONFIG_IPV6_SEG6_LWTUNNEL=y
CONFIG_IPV6_SEG6_HMAC=y CONFIG_IPV6_SEG6_HMAC=y
CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_SEG6_BPF=y
# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set
# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
CONFIG_NETLABEL=y CONFIG_NETLABEL=y
# CONFIG_MPTCP is not set # CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
@@ -1749,7 +1711,7 @@ CONFIG_CAN_SOFTING=m
# #
CONFIG_CAN_HI311X=m CONFIG_CAN_HI311X=m
CONFIG_CAN_MCP251X=m CONFIG_CAN_MCP251X=m
CONFIG_CAN_MCP251XFD=m # CONFIG_CAN_MCP251XFD is not set
# end of CAN SPI interfaces # end of CAN SPI interfaces
# #
@@ -1833,6 +1795,7 @@ CONFIG_AF_RXRPC=m
# CONFIG_RXKAD is not set # CONFIG_RXKAD is not set
# CONFIG_AF_KCM is not set # CONFIG_AF_KCM is not set
CONFIG_STREAM_PARSER=y CONFIG_STREAM_PARSER=y
CONFIG_MCTP=m
CONFIG_FIB_RULES=y CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT=y
@@ -1996,9 +1959,12 @@ CONFIG_PCIE_ROCKCHIP_EP=y
# #
# DesignWare PCI Core Support # DesignWare PCI Core Support
# #
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
# CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCIE_DW_PLAT_HOST is not set
# CONFIG_PCIE_DW_PLAT_EP is not set # CONFIG_PCIE_DW_PLAT_EP is not set
# CONFIG_PCI_HISI is not set # CONFIG_PCI_HISI is not set
CONFIG_PCIE_ROCKCHIP_DW_HOST=y
# CONFIG_PCIE_KIRIN is not set # CONFIG_PCIE_KIRIN is not set
# CONFIG_PCI_MESON is not set # CONFIG_PCI_MESON is not set
# CONFIG_PCIE_AL is not set # CONFIG_PCIE_AL is not set
@@ -2091,7 +2057,6 @@ CONFIG_GENERIC_ARCH_NUMA=y
CONFIG_ARM_CCI=y CONFIG_ARM_CCI=y
CONFIG_BRCMSTB_GISB_ARB=y CONFIG_BRCMSTB_GISB_ARB=y
# CONFIG_MOXTET is not set # CONFIG_MOXTET is not set
# CONFIG_SIMPLE_PM_BUS is not set
CONFIG_SUN50I_DE2_BUS=y CONFIG_SUN50I_DE2_BUS=y
CONFIG_SUNXI_RSB=m CONFIG_SUNXI_RSB=m
CONFIG_VEXPRESS_CONFIG=y CONFIG_VEXPRESS_CONFIG=y
@@ -2101,6 +2066,63 @@ CONFIG_MHI_BUS_PCI_GENERIC=m
# end of Bus devices # end of Bus devices
CONFIG_CONNECTOR=m CONFIG_CONNECTOR=m
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
# CONFIG_ARM_SCMI_PROTOCOL is not set
# end of ARM System Control and Management Interface Protocol
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ARM_SCPI_POWER_DOMAIN=y
# CONFIG_ARM_SDE_INTERFACE is not set
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
# CONFIG_FW_CFG_SYSFS is not set
CONFIG_SYSFB=y
# CONFIG_SYSFB_SIMPLEFB is not set
CONFIG_ROCKCHIP_SIP=y
CONFIG_ARM_FFA_TRANSPORT=m
CONFIG_ARM_FFA_SMCCC=y
# CONFIG_GOOGLE_FIRMWARE is not set
#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_VARS_PSTORE=y
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_GENERIC_STUB=y
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
CONFIG_EFI_CAPSULE_LOADER=y
# CONFIG_EFI_TEST is not set
# CONFIG_RESET_ATTACK_MITIGATION is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# end of EFI (Extensible Firmware Interface) Support
CONFIG_EFI_EARLYCON=y
CONFIG_MESON_SM=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_PSCI_CHECKER is not set
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
CONFIG_ARM_SMCCC_SOC_ID=y
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
CONFIG_GNSS=m CONFIG_GNSS=m
CONFIG_GNSS_SERIAL=m CONFIG_GNSS_SERIAL=m
CONFIG_GNSS_MTK_SERIAL=m CONFIG_GNSS_MTK_SERIAL=m
@@ -2124,6 +2146,10 @@ CONFIG_MTD_OF_PARTS=y
# #
CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
#
# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK.
#
# CONFIG_FTL is not set # CONFIG_FTL is not set
# CONFIG_NFTL is not set # CONFIG_NFTL is not set
# CONFIG_INFTL is not set # CONFIG_INFTL is not set
@@ -2289,6 +2315,7 @@ CONFIG_TIFM_CORE=m
CONFIG_TIFM_7XX1=m CONFIG_TIFM_7XX1=m
# CONFIG_ICS932S401 is not set # CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HI6421V600_IRQ=m
# CONFIG_HP_ILO is not set # CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set # CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set # CONFIG_ISL29003 is not set
@@ -2351,6 +2378,7 @@ CONFIG_HABANA_AI=m
# #
CONFIG_SCSI_MOD=y CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set # CONFIG_RAID_ATTRS is not set
CONFIG_SCSI_COMMON=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y CONFIG_SCSI_DMA=y
# CONFIG_SCSI_PROC_FS is not set # CONFIG_SCSI_PROC_FS is not set
@@ -2362,6 +2390,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_ST is not set
CONFIG_BLK_DEV_SR=m CONFIG_BLK_DEV_SR=m
CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SG=m
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_LOGGING is not set
@@ -2821,6 +2850,8 @@ CONFIG_IGBVF=y
# CONFIG_IGC is not set # CONFIG_IGC is not set
CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MICROSOFT=y
# CONFIG_JME is not set # CONFIG_JME is not set
CONFIG_NET_VENDOR_LITEX=y
CONFIG_LITEX_LITEETH=m
CONFIG_NET_VENDOR_MARVELL=y CONFIG_NET_VENDOR_MARVELL=y
CONFIG_MVMDIO=y CONFIG_MVMDIO=y
# CONFIG_SKGE is not set # CONFIG_SKGE is not set
@@ -2978,6 +3009,7 @@ CONFIG_LSI_ET1011C_PHY=m
CONFIG_MARVELL_PHY=m CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m CONFIG_MARVELL_10G_PHY=m
CONFIG_MARVELL_88X2222_PHY=m CONFIG_MARVELL_88X2222_PHY=m
CONFIG_MAXLINEAR_GPHY=m
CONFIG_MEDIATEK_GE_PHY=m CONFIG_MEDIATEK_GE_PHY=m
CONFIG_MICREL_PHY=y CONFIG_MICREL_PHY=y
CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_PHY=m
@@ -3003,6 +3035,10 @@ CONFIG_DP83869_PHY=m
CONFIG_VITESSE_PHY=m CONFIG_VITESSE_PHY=m
# CONFIG_XILINX_GMII2RGMII is not set # CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_MICREL_KS8995MA is not set # CONFIG_MICREL_KS8995MA is not set
#
# MCTP Device Drivers
#
CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y CONFIG_MDIO_BUS=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
@@ -3207,7 +3243,6 @@ CONFIG_WLAN_VENDOR_INTERSIL=y
# CONFIG_HOSTAP is not set # CONFIG_HOSTAP is not set
# CONFIG_HERMES is not set # CONFIG_HERMES is not set
# CONFIG_P54_COMMON is not set # CONFIG_P54_COMMON is not set
# CONFIG_PRISM54 is not set
CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MARVELL=y
# CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS is not set
CONFIG_LIBERTAS_THINFIRM=m CONFIG_LIBERTAS_THINFIRM=m
@@ -3358,6 +3393,7 @@ CONFIG_IEEE802154_HWSIM=m
CONFIG_WWAN=m CONFIG_WWAN=m
CONFIG_WWAN_HWSIM=m CONFIG_WWAN_HWSIM=m
CONFIG_MHI_WWAN_CTRL=m CONFIG_MHI_WWAN_CTRL=m
CONFIG_MHI_WWAN_MBIM=m
# end of Wireless WAN # end of Wireless WAN
CONFIG_XEN_NETDEV_FRONTEND=m CONFIG_XEN_NETDEV_FRONTEND=m
@@ -3366,7 +3402,6 @@ CONFIG_VMXNET3=m
CONFIG_NETDEVSIM=m CONFIG_NETDEVSIM=m
CONFIG_NET_FAILOVER=m CONFIG_NET_FAILOVER=m
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
# CONFIG_NVM is not set
# #
# Input device support # Input device support
@@ -3762,6 +3797,7 @@ CONFIG_HW_RANDOM_MESON=m
CONFIG_HW_RANDOM_CAVIUM=m CONFIG_HW_RANDOM_CAVIUM=m
# CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_CCTRNG is not set
# CONFIG_HW_RANDOM_XIPHERA is not set # CONFIG_HW_RANDOM_XIPHERA is not set
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
CONFIG_DEVMEM=y CONFIG_DEVMEM=y
CONFIG_DEVPORT=y CONFIG_DEVPORT=y
@@ -3769,10 +3805,9 @@ CONFIG_DEVPORT=y
CONFIG_XILLYBUS_CLASS=m CONFIG_XILLYBUS_CLASS=m
# CONFIG_XILLYBUS is not set # CONFIG_XILLYBUS is not set
CONFIG_XILLYUSB=m CONFIG_XILLYUSB=m
# end of Character devices
# CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_CPU is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
# #
# I2C support # I2C support
@@ -3859,6 +3894,7 @@ CONFIG_I2C_TINY_USB=m
# Other I2C/SMBus bus drivers # Other I2C/SMBus bus drivers
# #
CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_VIRTIO=m
# end of I2C Hardware Bus support # end of I2C Hardware Bus support
CONFIG_I2C_STUB=m CONFIG_I2C_STUB=m
@@ -3903,6 +3939,7 @@ CONFIG_SPI_OC_TINY=m
CONFIG_SPI_PL022=y CONFIG_SPI_PL022=y
# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_PXA2XX is not set
CONFIG_SPI_ROCKCHIP=y CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_ROCKCHIP_SFC=m
# CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SC18IS602 is not set
# CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SIFIVE is not set
CONFIG_SPI_SUN4I=m CONFIG_SPI_SUN4I=m
@@ -3950,6 +3987,7 @@ CONFIG_PPS_CLIENT_GPIO=m
# PTP clock support # PTP clock support
# #
CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_DP83640_PHY=m CONFIG_DP83640_PHY=m
CONFIG_PTP_1588_CLOCK_INES=m CONFIG_PTP_1588_CLOCK_INES=m
CONFIG_PTP_1588_CLOCK_KVM=m CONFIG_PTP_1588_CLOCK_KVM=m
@@ -4040,6 +4078,7 @@ CONFIG_GPIO_HLWD=m
CONFIG_GPIO_LOGICVC=m CONFIG_GPIO_LOGICVC=m
CONFIG_GPIO_MB86S7X=m CONFIG_GPIO_MB86S7X=m
CONFIG_GPIO_PL061=y CONFIG_GPIO_PL061=y
CONFIG_GPIO_ROCKCHIP=y
CONFIG_GPIO_SAMA5D2_PIOBU=m CONFIG_GPIO_SAMA5D2_PIOBU=m
# CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SIFIVE is not set
CONFIG_GPIO_SYSCON=m CONFIG_GPIO_SYSCON=m
@@ -4107,6 +4146,7 @@ CONFIG_GPIO_XRA1403=m
# #
# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_AGGREGATOR is not set
CONFIG_GPIO_MOCKUP=m CONFIG_GPIO_MOCKUP=m
CONFIG_GPIO_VIRTIO=m
# end of Virtual GPIO drivers # end of Virtual GPIO drivers
CONFIG_W1=m CONFIG_W1=m
@@ -4184,7 +4224,6 @@ CONFIG_BATTERY_BQ27XXX_HDQ=m
CONFIG_CHARGER_AXP20X=m CONFIG_CHARGER_AXP20X=m
CONFIG_BATTERY_AXP20X=m CONFIG_BATTERY_AXP20X=m
CONFIG_AXP20X_POWER=m CONFIG_AXP20X_POWER=m
CONFIG_AXP288_FUEL_GAUGE=m
CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17040=m
CONFIG_BATTERY_MAX17042=m CONFIG_BATTERY_MAX17042=m
CONFIG_BATTERY_MAX1721X=m CONFIG_BATTERY_MAX1721X=m
@@ -4211,6 +4250,7 @@ CONFIG_BATTERY_GOLDFISH=m
CONFIG_BATTERY_RT5033=m CONFIG_BATTERY_RT5033=m
# CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9455 is not set
# CONFIG_CHARGER_CROS_USBPD is not set # CONFIG_CHARGER_CROS_USBPD is not set
CONFIG_CHARGER_CROS_PCHG=m
CONFIG_CHARGER_UCS1002=m CONFIG_CHARGER_UCS1002=m
# CONFIG_CHARGER_BD99954 is not set # CONFIG_CHARGER_BD99954 is not set
# CONFIG_RN5T618_POWER is not set # CONFIG_RN5T618_POWER is not set
@@ -4239,6 +4279,7 @@ CONFIG_SENSORS_ADT7462=m
CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7470=m
CONFIG_SENSORS_ADT7475=m CONFIG_SENSORS_ADT7475=m
CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AHT10=m
CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m
CONFIG_SENSORS_AS370=m CONFIG_SENSORS_AS370=m
CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_ASC7621=m
CONFIG_SENSORS_AXI_FAN_CONTROL=m CONFIG_SENSORS_AXI_FAN_CONTROL=m
@@ -4367,6 +4408,7 @@ CONFIG_SENSORS_XDPE122=m
CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_ZL6100=m
CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBTSI=m
CONFIG_SENSORS_SBRMI=m
CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT15=m
CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT21=m
CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT3x=m
@@ -4456,7 +4498,6 @@ CONFIG_WATCHDOG_SYSFS=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
CONFIG_SOFT_WATCHDOG=m CONFIG_SOFT_WATCHDOG=m
CONFIG_BD70528_WATCHDOG=m
CONFIG_BD957XMUF_WATCHDOG=m CONFIG_BD957XMUF_WATCHDOG=m
# CONFIG_GPIO_WATCHDOG is not set # CONFIG_GPIO_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set # CONFIG_XILINX_WATCHDOG is not set
@@ -4544,6 +4585,7 @@ CONFIG_MFD_CROS_EC_DEV=y
# CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_MP2629 is not set
# CONFIG_MFD_HI6421_PMIC is not set # CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_MFD_HI6421_SPMI is not set
# CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set # CONFIG_HTC_I2CPLD is not set
# CONFIG_LPC_ICH is not set # CONFIG_LPC_ICH is not set
@@ -4635,6 +4677,8 @@ CONFIG_MFD_QCOM_PM8008=m
CONFIG_MFD_VEXPRESS_SYSREG=y CONFIG_MFD_VEXPRESS_SYSREG=y
CONFIG_RAVE_SP_CORE=m CONFIG_RAVE_SP_CORE=m
# CONFIG_MFD_INTEL_M10_BMC is not set # CONFIG_MFD_INTEL_M10_BMC is not set
CONFIG_MFD_RSMU_I2C=m
CONFIG_MFD_RSMU_SPI=m
# end of Multifunction device drivers # end of Multifunction device drivers
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
@@ -4703,7 +4747,9 @@ CONFIG_REGULATOR_RT4831=m
CONFIG_REGULATOR_RT5033=m CONFIG_REGULATOR_RT5033=m
CONFIG_REGULATOR_RT6160=m CONFIG_REGULATOR_RT6160=m
CONFIG_REGULATOR_RT6245=m CONFIG_REGULATOR_RT6245=m
CONFIG_REGULATOR_RTQ2134=m
# CONFIG_REGULATOR_RTMV20 is not set # CONFIG_REGULATOR_RTMV20 is not set
CONFIG_REGULATOR_RTQ6752=m
# CONFIG_REGULATOR_S2MPA01 is not set # CONFIG_REGULATOR_S2MPA01 is not set
CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S2MPS11=y
# CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_S5M8767 is not set
@@ -4742,6 +4788,7 @@ CONFIG_IR_IMON=m
CONFIG_IR_IMON_RAW=m CONFIG_IR_IMON_RAW=m
CONFIG_IR_MCEUSB=m CONFIG_IR_MCEUSB=m
CONFIG_IR_MESON=m CONFIG_IR_MESON=m
CONFIG_IR_MESON_TX=m
CONFIG_IR_REDRAT3=m CONFIG_IR_REDRAT3=m
CONFIG_IR_SPI=m CONFIG_IR_SPI=m
CONFIG_IR_STREAMZAP=m CONFIG_IR_STREAMZAP=m
@@ -5191,7 +5238,9 @@ CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_IMX290=m CONFIG_VIDEO_IMX290=m
CONFIG_VIDEO_IMX319=m CONFIG_VIDEO_IMX319=m
CONFIG_VIDEO_IMX334=m CONFIG_VIDEO_IMX334=m
CONFIG_VIDEO_IMX335=m
CONFIG_VIDEO_IMX355=m CONFIG_VIDEO_IMX355=m
CONFIG_VIDEO_IMX412=m
CONFIG_VIDEO_OV02A10=m CONFIG_VIDEO_OV02A10=m
CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m CONFIG_VIDEO_OV2659=m
@@ -5212,6 +5261,7 @@ CONFIG_VIDEO_OV7670=m
CONFIG_VIDEO_OV7740=m CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV8856=m CONFIG_VIDEO_OV8856=m
CONFIG_VIDEO_OV8865=m CONFIG_VIDEO_OV8865=m
CONFIG_VIDEO_OV9282=m
CONFIG_VIDEO_OV9640=m CONFIG_VIDEO_OV9640=m
CONFIG_VIDEO_OV9650=m CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_OV13858=m CONFIG_VIDEO_OV13858=m
@@ -5494,6 +5544,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_DRM=m CONFIG_DRM=m
CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DBI=m
CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_MIPI_DSI=y
CONFIG_DRM_DP_AUX_BUS=m
# CONFIG_DRM_DP_AUX_CHARDEV is not set # CONFIG_DRM_DP_AUX_CHARDEV is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set # CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_HELPER=m
@@ -5558,7 +5609,6 @@ CONFIG_DRM_SUN8I_DW_HDMI=m
CONFIG_DRM_SUN8I_MIXER=m CONFIG_DRM_SUN8I_MIXER=m
CONFIG_DRM_SUN8I_TCON_TOP=m CONFIG_DRM_SUN8I_TCON_TOP=m
# CONFIG_DRM_QXL is not set # CONFIG_DRM_QXL is not set
CONFIG_DRM_BOCHS=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m
CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL=y
@@ -5577,7 +5627,9 @@ CONFIG_DRM_PANEL_ELIDA_KD35T133=m
CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m
CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m
CONFIG_DRM_PANEL_ILITEK_IL9322=m CONFIG_DRM_PANEL_ILITEK_IL9322=m
CONFIG_DRM_PANEL_ILITEK_ILI9341=m
CONFIG_DRM_PANEL_ILITEK_ILI9881C=m CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m
CONFIG_DRM_PANEL_JDI_LT070ME05000=m CONFIG_DRM_PANEL_JDI_LT070ME05000=m
CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KHADAS_TS050=m
@@ -5600,6 +5652,8 @@ CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
CONFIG_DRM_PANEL_RAYDIUM_RM67191=m CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
CONFIG_DRM_PANEL_RAYDIUM_RM68200=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m
CONFIG_DRM_PANEL_RONBO_RB070D30=m CONFIG_DRM_PANEL_RONBO_RB070D30=m
CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m
CONFIG_DRM_PANEL_SAMSUNG_DB7430=m
CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m
CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
@@ -5622,6 +5676,7 @@ CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TPO_TPG110=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m
CONFIG_DRM_PANEL_XINPENG_XPP055C272=m CONFIG_DRM_PANEL_XINPENG_XPP055C272=m
# end of Display Panels # end of Display Panels
@@ -5683,6 +5738,7 @@ CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_MESON=m CONFIG_DRM_MESON=m
CONFIG_DRM_MESON_DW_HDMI=m CONFIG_DRM_MESON_DW_HDMI=m
# CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_ARCPGU is not set
CONFIG_DRM_BOCHS=m
# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_CIRRUS_QEMU is not set
CONFIG_DRM_GM12U320=m CONFIG_DRM_GM12U320=m
CONFIG_DRM_SIMPLEDRM=m CONFIG_DRM_SIMPLEDRM=m
@@ -6112,6 +6168,7 @@ CONFIG_SND_SOC_ES8328=m
CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_I2C=m
CONFIG_SND_SOC_ES8328_SPI=m CONFIG_SND_SOC_ES8328_SPI=m
# CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_GTM601 is not set
CONFIG_SND_SOC_ICS43432=m
# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98088 is not set
CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98090=m
@@ -6884,7 +6941,7 @@ CONFIG_LEDS_USER=y
# LED Triggers # LED Triggers
# #
CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_ONESHOT=m CONFIG_LEDS_TRIGGER_ONESHOT=m
CONFIG_LEDS_TRIGGER_DISK=y CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LEDS_TRIGGER_MTD=y CONFIG_LEDS_TRIGGER_MTD=y
@@ -6921,6 +6978,7 @@ CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0" CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set # CONFIG_RTC_DEBUG is not set
CONFIG_RTC_LIB_KUNIT_TEST=m
CONFIG_RTC_NVMEM=y CONFIG_RTC_NVMEM=y
# #
@@ -7093,6 +7151,7 @@ CONFIG_SYNC_FILE=y
# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_DEBUG is not set
CONFIG_DMABUF_SELFTESTS=m CONFIG_DMABUF_SELFTESTS=m
# CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_HEAPS is not set
# CONFIG_DMABUF_SYSFS_STATS is not set
# end of DMABUF options # end of DMABUF options
# CONFIG_AUXDISPLAY is not set # CONFIG_AUXDISPLAY is not set
@@ -7106,13 +7165,14 @@ CONFIG_UIO=m
# CONFIG_UIO_NETX is not set # CONFIG_UIO_NETX is not set
# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_PRUSS is not set
# CONFIG_UIO_MF624 is not set # CONFIG_UIO_MF624 is not set
CONFIG_VFIO=y
CONFIG_VFIO_IOMMU_TYPE1=y CONFIG_VFIO_IOMMU_TYPE1=y
CONFIG_VFIO_VIRQFD=y CONFIG_VFIO_VIRQFD=y
CONFIG_VFIO=y
# CONFIG_VFIO_NOIOMMU is not set # CONFIG_VFIO_NOIOMMU is not set
CONFIG_VFIO_PCI=y CONFIG_VFIO_PCI_CORE=y
CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_MMAP=y
CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI_INTX=y
CONFIG_VFIO_PCI=y
# CONFIG_VFIO_PLATFORM is not set # CONFIG_VFIO_PLATFORM is not set
# CONFIG_VFIO_MDEV is not set # CONFIG_VFIO_MDEV is not set
CONFIG_VIRT_DRIVERS=y CONFIG_VIRT_DRIVERS=y
@@ -7131,6 +7191,7 @@ CONFIG_VDPA=m
CONFIG_VDPA_SIM=m CONFIG_VDPA_SIM=m
CONFIG_VDPA_SIM_NET=m CONFIG_VDPA_SIM_NET=m
CONFIG_VDPA_SIM_BLOCK=m CONFIG_VDPA_SIM_BLOCK=m
CONFIG_VDPA_USER=m
CONFIG_IFCVF=m CONFIG_IFCVF=m
CONFIG_VP_VDPA=m CONFIG_VP_VDPA=m
CONFIG_VHOST_IOTLB=m CONFIG_VHOST_IOTLB=m
@@ -7313,7 +7374,6 @@ CONFIG_HMS_ANYBUSS_BUS=m
# CONFIG_HMS_PROFINET is not set # CONFIG_HMS_PROFINET is not set
# CONFIG_QLGE is not set # CONFIG_QLGE is not set
CONFIG_WFX=m CONFIG_WFX=m
# CONFIG_MFD_HI6421_SPMI is not set
# CONFIG_GOLDFISH is not set # CONFIG_GOLDFISH is not set
CONFIG_CHROME_PLATFORMS=y CONFIG_CHROME_PLATFORMS=y
CONFIG_CROS_EC=y CONFIG_CROS_EC=y
@@ -7448,6 +7508,8 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# end of Generic IOMMU Pagetable Support # end of Generic IOMMU Pagetable Support
# CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y CONFIG_OF_IOMMU=y
CONFIG_IOMMU_DMA=y CONFIG_IOMMU_DMA=y
@@ -7744,6 +7806,7 @@ CONFIG_BME680_SPI=m
CONFIG_PMS7003=m CONFIG_PMS7003=m
# CONFIG_SCD30_CORE is not set # CONFIG_SCD30_CORE is not set
CONFIG_SENSIRION_SGP30=m CONFIG_SENSIRION_SGP30=m
CONFIG_SENSIRION_SGP40=m
CONFIG_SPS30=m CONFIG_SPS30=m
CONFIG_SPS30_I2C=m CONFIG_SPS30_I2C=m
CONFIG_SPS30_SERIAL=m CONFIG_SPS30_SERIAL=m
@@ -8036,6 +8099,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# #
# Digital potentiometers # Digital potentiometers
# #
CONFIG_AD5110=m
CONFIG_AD5272=m CONFIG_AD5272=m
# CONFIG_DS1803 is not set # CONFIG_DS1803 is not set
CONFIG_MAX5432=m CONFIG_MAX5432=m
@@ -8350,13 +8414,13 @@ CONFIG_F2FS_FS_SECURITY=y
CONFIG_F2FS_CHECK_FS=y CONFIG_F2FS_CHECK_FS=y
# CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_F2FS_FS_COMPRESSION is not set
CONFIG_F2FS_IOSTAT=y
CONFIG_ZONEFS_FS=m CONFIG_ZONEFS_FS=m
CONFIG_FS_DAX=y CONFIG_FS_DAX=y
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y CONFIG_EXPORTFS=y
CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_FILE_LOCKING=y CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION=y
CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_ALGS=y
CONFIG_FS_VERITY=y CONFIG_FS_VERITY=y
@@ -8391,15 +8455,12 @@ CONFIG_OVERLAY_FS_XINO_AUTO=y
# Caches # Caches
# #
CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_SUPPORT=m
# CONFIG_NETFS_STATS is not set CONFIG_NETFS_STATS=y
CONFIG_FSCACHE=m CONFIG_FSCACHE=m
CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_STATS=y
# CONFIG_FSCACHE_HISTOGRAM is not set
# CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_DEBUG is not set
# CONFIG_FSCACHE_OBJECT_LIST is not set
CONFIG_CACHEFILES=m CONFIG_CACHEFILES=m
# CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_DEBUG is not set
# CONFIG_CACHEFILES_HISTOGRAM is not set
# end of Caches # end of Caches
# #
@@ -8420,11 +8481,16 @@ CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_FAT_DEFAULT_UTF8=y CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_FAT_KUNIT_TEST=m
CONFIG_EXFAT_FS=m CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y CONFIG_NTFS_RW=y
CONFIG_NTFS3_FS=m
# CONFIG_NTFS3_64BIT_CLUSTER is not set
# CONFIG_NTFS3_LZX_XPRESS is not set
# CONFIG_NTFS3_FS_POSIX_ACL is not set
# end of DOS/FAT/EXFAT/NT Filesystems # end of DOS/FAT/EXFAT/NT Filesystems
# #
@@ -8589,7 +8655,6 @@ CONFIG_CEPH_FS_SECURITY_LABEL=y
CONFIG_CIFS=m CONFIG_CIFS=m
CONFIG_CIFS_STATS2=y CONFIG_CIFS_STATS2=y
CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
CONFIG_CIFS_WEAK_PW_HASH=y
CONFIG_CIFS_UPCALL=y CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y CONFIG_CIFS_POSIX=y
@@ -8599,6 +8664,10 @@ CONFIG_CIFS_DEBUG=y
CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_DFS_UPCALL=y
# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_FSCACHE=y
CONFIG_SMB_SERVER=m
CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y
# CONFIG_SMB_SERVER_KERBEROS5 is not set
CONFIG_SMBFS_COMMON=m
CONFIG_CODA_FS=m CONFIG_CODA_FS=m
CONFIG_AFS_FS=m CONFIG_AFS_FS=m
# CONFIG_AFS_DEBUG is not set # CONFIG_AFS_DEBUG is not set
@@ -8942,6 +9011,7 @@ CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305=m
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SM4=m
CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_DEV_ALLWINNER=y CONFIG_CRYPTO_DEV_ALLWINNER=y
CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_CRYPTO_DEV_SUN4I_SS=m
@@ -8982,6 +9052,8 @@ CONFIG_SIGNED_PE_FILE_VERIFICATION=y
# Certificates for signature checking # Certificates for signature checking
# #
CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
CONFIG_MODULE_SIG_KEY_TYPE_RSA=y
# CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set
CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_TRUSTED_KEYS=""
CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE=y
@@ -9089,6 +9161,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_SWIOTLB=y CONFIG_SWIOTLB=y
# CONFIG_DMA_RESTRICTED_POOL is not set
CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_COHERENT_POOL=y
CONFIG_DMA_REMAP=y CONFIG_DMA_REMAP=y
@@ -9317,7 +9390,6 @@ CONFIG_RCU_TRACE=y
# end of RCU Debugging # end of RCU Debugging
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set # CONFIG_LATENCYTOP is not set
CONFIG_NOP_TRACER=y CONFIG_NOP_TRACER=y

2
config/sources/families/imx6.conf
View File

@@ -15,7 +15,7 @@ case $BRANCH in
edge) edge)
KERNELBRANCH='branch:linux-5.14.y' KERNELBRANCH='branch:linux-5.15.y'
;; ;;

2
config/sources/families/include/meson64_common.inc
View File

@@ -34,7 +34,7 @@ case $BRANCH in
;; ;;
edge) edge)
KERNELBRANCH='branch:linux-5.14.y' KERNELBRANCH='branch:linux-5.15.y'
KERNELPATCHDIR='meson64-edge' KERNELPATCHDIR='meson64-edge'
;; ;;

2
config/sources/families/include/rockchip64_common.inc
View File

@@ -90,7 +90,7 @@ case $BRANCH in
edge) edge)
KERNELPATCHDIR='rockchip64-'$BRANCH KERNELPATCHDIR='rockchip64-'$BRANCH
KERNELBRANCH="branch:linux-5.14.y" KERNELBRANCH="branch:linux-5.15.y"
LINUXFAMILY=rockchip64 LINUXFAMILY=rockchip64
LINUXCONFIG='linux-rockchip64-'$BRANCH LINUXCONFIG='linux-rockchip64-'$BRANCH

2
config/sources/families/jetson-nano.conf
View File

@@ -23,7 +23,7 @@ case $BRANCH in
;; ;;
edge) edge)
KERNELBRANCH="branch:linux-5.14.y" KERNELBRANCH="branch:linux-5.15.y"
KERNELPATCHDIR='rockchip64-'$BRANCH KERNELPATCHDIR='rockchip64-'$BRANCH
;; ;;

2
config/sources/families/mvebu.conf
View File

@@ -22,7 +22,7 @@ case $BRANCH in
edge) edge)
KERNELBRANCH='branch:linux-5.14.y' KERNELBRANCH='branch:linux-5.15.y'
LINUXCONFIG='linux-mvebu-edge' LINUXCONFIG='linux-mvebu-edge'
KERNELPATCHDIR="mvebu-edge" KERNELPATCHDIR="mvebu-edge"

2
config/sources/families/mvebu64.conf
View File

@@ -40,7 +40,7 @@ case $BRANCH in
;; ;;
edge) edge)
KERNELBRANCH='branch:linux-5.14.y' KERNELBRANCH='branch:linux-5.15.y'
;; ;;
esac esac

2
config/sources/families/odroidxu4.conf
View File

@@ -23,7 +23,7 @@ case $BRANCH in
;; ;;
edge) edge)
KERNELBRANCH='branch:linux-5.14.y' KERNELBRANCH='branch:linux-5.15.y'
;; ;;
esac esac

287
patch/kernel/archive/imx6-5.15/- Normal file
View File

@@ -0,0 +1,287 @@
From 3ec70749ae3cb072f19d886981a217121f776415 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h header
files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000000..9d1342807b59
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000000..3168137adae8
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.25.1

287
patch/kernel/archive/imx6-5.15/0001-Revert-net-Remove-net-ipx.h-and-uapi-linux-ipx.h-hea.patch Normal file
View File

@@ -0,0 +1,287 @@
From 3ec70749ae3cb072f19d886981a217121f776415 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h header
files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000000..9d1342807b59
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000000..3168137adae8
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.25.1

73
patch/kernel/archive/imx6-5.15/0001-binding-doc-power-pwrseq-generic-add-binding-doc-for.patch Normal file
View File

@@ -0,0 +1,73 @@
From f5528e96b7dd2b30e1accc518df85d14baad6bae Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@nxp.com>
Date: Thu, 18 May 2017 08:48:57 +0800
Subject: [PATCH 1/9] binding-doc: power: pwrseq-generic: add binding doc for
generic power sequence library
Add binding doc for generic power sequence library.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/power/pwrseq/pwrseq-generic.txt | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
diff --git a/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt b/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
new file mode 100644
index 000000000000..ebf0d477b688
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
@@ -0,0 +1,48 @@
+The generic power sequence library
+
+Some hard-wired devices (eg USB/MMC) need to do power sequence before
+the device can be enumerated on the bus, the typical power sequence
+like: enable USB PHY clock, toggle reset pin, etc. But current
+Linux device driver lacks of such code to do it, it may cause some
+hard-wired devices works abnormal or can't be recognized by
+controller at all. The power sequence will be done before this device
+can be found at the bus.
+
+The power sequence properties is under the device node.
+
+Optional properties:
+- clocks: the input clocks for device.
+- reset-gpios: Should specify the GPIO for reset.
+- reset-duration-us: the duration in microsecond for assert reset signal.
+
+Below is the example of USB power sequence properties on USB device
+nodes which have two level USB hubs.
+
+&usbotg1 {
+ vbus-supply = <&reg_usb_otg1_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg1_id>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ genesys: hub@1 {
+ compatible = "usb5e3,608";
+ reg = <1>;
+
+ clocks = <&clks IMX6SX_CLK_CKO>;
+ reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* hub reset pin */
+ reset-duration-us = <10>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ asix: ethernet@1 {
+ compatible = "usbb95,1708";
+ reg = <1>;
+
+ clocks = <&clks IMX6SX_CLK_IPG>;
+ reset-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* ethernet_rst */
+ reset-duration-us = <15>;
+ };
+ };
+};
--
2.20.1

853
patch/kernel/archive/imx6-5.15/0002-power-add-power-sequence-library.patch Normal file
View File

@@ -0,0 +1,853 @@
From e42fbf22376c41b275d47b9cfac360c66ee718dc Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@nxp.com>
Date: Thu, 18 May 2017 08:48:58 +0800
Subject: [PATCH 2/9] power: add power sequence library
We have an well-known problem that the device needs to do some power
sequence before it can be recognized by related host, the typical
example like hard-wired mmc devices and usb devices.
This power sequence is hard to be described at device tree and handled by
related host driver, so we have created a common power sequence
library to cover this requirement. The core code has supplied
some common helpers for host driver, and individual power sequence
libraries handle kinds of power sequence for devices. The pwrseq
librares always need to allocate extra instance for compatible
string match.
pwrseq_generic is intended for general purpose of power sequence, which
handles gpios and clocks currently, and can cover other controls in
future. The host driver just needs to call of_pwrseq_on/of_pwrseq_off
if only one power sequence is needed, else call of_pwrseq_on_list
/of_pwrseq_off_list instead (eg, USB hub driver).
For new power sequence library, it can add its compatible string
to pwrseq_of_match_table, then the pwrseq core will match it with
DT's, and choose this library at runtime.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Tested-by Joshua Clayton <stillcompiling@gmail.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
---
Documentation/power/power-sequence/design.rst | 54 +++
MAINTAINERS | 9 +
drivers/power/Kconfig | 1 +
drivers/power/Makefile | 1 +
drivers/power/pwrseq/Kconfig | 20 ++
drivers/power/pwrseq/Makefile | 2 +
drivers/power/pwrseq/core.c | 335 ++++++++++++++++++
drivers/power/pwrseq/pwrseq_generic.c | 234 ++++++++++++
include/linux/power/pwrseq.h | 81 +++++
9 files changed, 737 insertions(+)
create mode 100644 Documentation/power/power-sequence/design.rst
create mode 100644 drivers/power/pwrseq/Kconfig
create mode 100644 drivers/power/pwrseq/Makefile
create mode 100644 drivers/power/pwrseq/core.c
create mode 100644 drivers/power/pwrseq/pwrseq_generic.c
create mode 100644 include/linux/power/pwrseq.h
diff --git a/Documentation/power/power-sequence/design.rst b/Documentation/power/power-sequence/design.rst
new file mode 100644
index 000000000000..554608e5f3b6
--- /dev/null
+++ b/Documentation/power/power-sequence/design.rst
@@ -0,0 +1,54 @@
+====================================
+Power Sequence Library
+====================================
+
+:Date: Feb, 2017
+:Author: Peter Chen <peter.chen@nxp.com>
+
+
+Introduction
+============
+
+We have an well-known problem that the device needs to do a power
+sequence before it can be recognized by related host, the typical
+examples are hard-wired mmc devices and usb devices. The host controller
+can't know what kinds of this device is in its bus if the power
+sequence has not done, since the related devices driver's probe calling
+is determined by runtime according to eunumeration results. Besides,
+the devices may have custom power sequence, so the power sequence library
+which is independent with the devices is needed.
+
+Design
+============
+
+The power sequence library includes the core file and customer power
+sequence library. The core file exports interfaces are called by
+host controller driver for power sequence and customer power sequence
+library files to register its power sequence instance to global
+power sequence list. The custom power sequence library creates power
+sequence instance and implement custom power sequence.
+
+Since the power sequence describes hardware design, the description is
+located at board description file, eg, device tree dts file. And
+a specific power sequence belongs to device, so its description
+is under the device node, please refer to:
+Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
+
+Custom power sequence library allocates one power sequence instance at
+bootup periods using postcore_initcall, this static allocated instance is
+used to compare with device-tree (DT) node to see if this library can be
+used for the node or not. When the result is matched, the core API will
+try to get resourses (->get, implemented at each library) for power
+sequence, if all resources are got, it will try to allocate another
+instance for next possible request from host driver.
+
+Then, the host controller driver can carry out power sequence on for this
+DT node, the library will do corresponding operations, like open clocks,
+toggle gpio, etc. The power sequence off routine will close and free the
+resources, and is called when the parent is removed. And the power
+sequence suspend and resume routine can be called at host driver's
+suspend and resume routine if needed.
+
+The exported interfaces
+.. kernel-doc:: drivers/power/pwrseq/core.c
+ :export:
diff --git a/MAINTAINERS b/MAINTAINERS
index 429c6c624861..88fd31d1870f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12599,6 +12599,15 @@ F: drivers/firmware/psci/
F: include/linux/psci.h
F: include/uapi/linux/psci.h
+POWER SEQUENCE LIBRARY
+M: Peter Chen <Peter.Chen@nxp.com>
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
+L: linux-pm@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/power/pwrseq/
+F: drivers/power/pwrseq/
+F: include/linux/power/pwrseq.h
+
POWER SUPPLY CLASS/SUBSYSTEM and DRIVERS
M: Sebastian Reichel <sre@kernel.org>
L: linux-pm@vger.kernel.org
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index ff0350ca3b74..78b6fa270cf9 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -2,3 +2,4 @@
source "drivers/power/avs/Kconfig"
source "drivers/power/reset/Kconfig"
source "drivers/power/supply/Kconfig"
+source "drivers/power/pwrseq/Kconfig"
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b7c2e372186b..13046c7fb499 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -2,3 +2,4 @@
obj-$(CONFIG_POWER_AVS) += avs/
obj-$(CONFIG_POWER_RESET) += reset/
obj-$(CONFIG_POWER_SUPPLY) += supply/
+obj-$(CONFIG_POWER_SEQUENCE) += pwrseq/
diff --git a/drivers/power/pwrseq/Kconfig b/drivers/power/pwrseq/Kconfig
new file mode 100644
index 000000000000..c6b356926cca
--- /dev/null
+++ b/drivers/power/pwrseq/Kconfig
@@ -0,0 +1,20 @@
+#
+# Power Sequence library
+#
+
+menuconfig POWER_SEQUENCE
+ bool "Power sequence control"
+ help
+ It is used for drivers which needs to do power sequence
+ (eg, turn on clock, toggle reset gpio) before the related
+ devices can be found by hardware, eg, USB bus.
+
+if POWER_SEQUENCE
+
+config PWRSEQ_GENERIC
+ bool "Generic power sequence control"
+ depends on OF
+ help
+ This is the generic power sequence control library, and is
+ supposed to support common power sequence usage.
+endif
diff --git a/drivers/power/pwrseq/Makefile b/drivers/power/pwrseq/Makefile
new file mode 100644
index 000000000000..ad82389028c2
--- /dev/null
+++ b/drivers/power/pwrseq/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_POWER_SEQUENCE) += core.o
+obj-$(CONFIG_PWRSEQ_GENERIC) += pwrseq_generic.o
diff --git a/drivers/power/pwrseq/core.c b/drivers/power/pwrseq/core.c
new file mode 100644
index 000000000000..3d19e62a2e76
--- /dev/null
+++ b/drivers/power/pwrseq/core.c
@@ -0,0 +1,335 @@
+/*
+ * core.c power sequence core file
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Author: Peter Chen <peter.chen@nxp.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.
+ */
+
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/power/pwrseq.h>
+
+static DEFINE_MUTEX(pwrseq_list_mutex);
+static LIST_HEAD(pwrseq_list);
+
+static int pwrseq_get(struct device_node *np, struct pwrseq *p)
+{
+ if (p && p->get)
+ return p->get(np, p);
+
+ return -ENOTSUPP;
+}
+
+static int pwrseq_on(struct pwrseq *p)
+{
+ if (p && p->on)
+ return p->on(p);
+
+ return -ENOTSUPP;
+}
+
+static void pwrseq_off(struct pwrseq *p)
+{
+ if (p && p->off)
+ p->off(p);
+}
+
+static void pwrseq_put(struct pwrseq *p)
+{
+ if (p && p->put)
+ p->put(p);
+}
+
+/**
+ * pwrseq_register - Add pwrseq instance to global pwrseq list
+ *
+ * @pwrseq: the pwrseq instance
+ */
+void pwrseq_register(struct pwrseq *pwrseq)
+{
+ mutex_lock(&pwrseq_list_mutex);
+ list_add(&pwrseq->node, &pwrseq_list);
+ mutex_unlock(&pwrseq_list_mutex);
+}
+EXPORT_SYMBOL_GPL(pwrseq_register);
+
+/**
+ * pwrseq_unregister - Remove pwrseq instance from global pwrseq list
+ *
+ * @pwrseq: the pwrseq instance
+ */
+void pwrseq_unregister(struct pwrseq *pwrseq)
+{
+ mutex_lock(&pwrseq_list_mutex);
+ list_del(&pwrseq->node);
+ mutex_unlock(&pwrseq_list_mutex);
+}
+EXPORT_SYMBOL_GPL(pwrseq_unregister);
+
+static struct pwrseq *pwrseq_find_available_instance(struct device_node *np)
+{
+ struct pwrseq *pwrseq;
+
+ mutex_lock(&pwrseq_list_mutex);
+ list_for_each_entry(pwrseq, &pwrseq_list, node) {
+ if (pwrseq->used)
+ continue;
+
+ /* compare compatible string for pwrseq node */
+ if (of_match_node(pwrseq->pwrseq_of_match_table, np)) {
+ pwrseq->used = true;
+ mutex_unlock(&pwrseq_list_mutex);
+ return pwrseq;
+ }
+
+ /* return generic pwrseq instance */
+ if (!strcmp(pwrseq->pwrseq_of_match_table->compatible,
+ "generic")) {
+ pr_debug("using generic pwrseq instance for %s\n",
+ np->full_name);
+ pwrseq->used = true;
+ mutex_unlock(&pwrseq_list_mutex);
+ return pwrseq;
+ }
+ }
+ mutex_unlock(&pwrseq_list_mutex);
+ pr_debug("Can't find any pwrseq instances for %s\n", np->full_name);
+
+ return NULL;
+}
+
+/**
+ * of_pwrseq_on - Carry out power sequence on for device node
+ *
+ * @np: the device node would like to power on
+ *
+ * Carry out a single device power on. If multiple devices
+ * need to be handled, use of_pwrseq_on_list() instead.
+ *
+ * Return a pointer to the power sequence instance on success,
+ * or an error code otherwise.
+ */
+struct pwrseq *of_pwrseq_on(struct device_node *np)
+{
+ struct pwrseq *pwrseq;
+ int ret;
+
+ pwrseq = pwrseq_find_available_instance(np);
+ if (!pwrseq)
+ return ERR_PTR(-ENOENT);
+
+ ret = pwrseq_get(np, pwrseq);
+ if (ret) {
+ /* Mark current pwrseq as unused */
+ pwrseq->used = false;
+ return ERR_PTR(ret);
+ }
+
+ ret = pwrseq_on(pwrseq);
+ if (ret)
+ goto pwr_put;
+
+ return pwrseq;
+
+pwr_put:
+ pwrseq_put(pwrseq);
+ return ERR_PTR(ret);
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_on);
+
+/**
+ * of_pwrseq_off - Carry out power sequence off for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance which related device would like to be off
+ *
+ * This API is used to power off single device, it is the opposite
+ * operation for of_pwrseq_on.
+ */
+void of_pwrseq_off(struct pwrseq *pwrseq)
+{
+ pwrseq_off(pwrseq);
+ pwrseq_put(pwrseq);
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_off);
+
+/**
+ * of_pwrseq_on_list - Carry out power sequence on for list
+ *
+ * @np: the device node would like to power on
+ * @head: the list head for pwrseq list on this bus
+ *
+ * This API is used to power on multiple devices at single bus.
+ * If there are several devices on bus (eg, USB bus), uses this
+ * this API. Otherwise, use of_pwrseq_on instead. After the device
+ * is powered on successfully, it will be added to pwrseq list for
+ * this bus. The caller needs to use mutex_lock for concurrent.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int of_pwrseq_on_list(struct device_node *np, struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+
+ pwrseq_list_node = kzalloc(sizeof(*pwrseq_list_node), GFP_KERNEL);
+ if (!pwrseq_list_node)
+ return -ENOMEM;
+
+ pwrseq = of_pwrseq_on(np);
+ if (IS_ERR(pwrseq)) {
+ kfree(pwrseq_list_node);
+ return PTR_ERR(pwrseq);
+ }
+
+ pwrseq_list_node->pwrseq = pwrseq;
+ list_add(&pwrseq_list_node->list, head);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_on_list);
+
+/**
+ * of_pwrseq_off_list - Carry out power sequence off for the list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to power off all devices on this bus, it is
+ * the opposite operation for of_pwrseq_on_list.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+void of_pwrseq_off_list(struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node, *tmp_node;
+
+ list_for_each_entry_safe(pwrseq_list_node, tmp_node, head, list) {
+ pwrseq = pwrseq_list_node->pwrseq;
+ of_pwrseq_off(pwrseq);
+ list_del(&pwrseq_list_node->list);
+ kfree(pwrseq_list_node);
+ }
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_off_list);
+
+/**
+ * pwrseq_suspend - Carry out power sequence suspend for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance
+ *
+ * This API is used to do suspend operation on pwrseq instance.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int pwrseq_suspend(struct pwrseq *p)
+{
+ int ret = 0;
+
+ if (p && p->suspend)
+ ret = p->suspend(p);
+ else
+ return ret;
+
+ if (!ret)
+ p->suspended = true;
+ else
+ pr_err("%s failed\n", __func__);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_suspend);
+
+/**
+ * pwrseq_resume - Carry out power sequence resume for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance
+ *
+ * This API is used to do resume operation on pwrseq instance.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int pwrseq_resume(struct pwrseq *p)
+{
+ int ret = 0;
+
+ if (p && p->resume)
+ ret = p->resume(p);
+ else
+ return ret;
+
+ if (!ret)
+ p->suspended = false;
+ else
+ pr_err("%s failed\n", __func__);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_resume);
+
+/**
+ * pwrseq_suspend_list - Carry out power sequence suspend for list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to do suspend on all power sequence instances on this bus.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+int pwrseq_suspend_list(struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+ int ret = 0;
+
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ ret = pwrseq_suspend(pwrseq_list_node->pwrseq);
+ if (ret)
+ break;
+ }
+
+ if (ret) {
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ pwrseq = pwrseq_list_node->pwrseq;
+ if (pwrseq->suspended)
+ pwrseq_resume(pwrseq);
+ }
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_suspend_list);
+
+/**
+ * pwrseq_resume_list - Carry out power sequence resume for the list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to do resume on all power sequence instances on this bus.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+int pwrseq_resume_list(struct list_head *head)
+{
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+ int ret = 0;
+
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ ret = pwrseq_resume(pwrseq_list_node->pwrseq);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_resume_list);
diff --git a/drivers/power/pwrseq/pwrseq_generic.c b/drivers/power/pwrseq/pwrseq_generic.c
new file mode 100644
index 000000000000..4e7c09086cfb
--- /dev/null
+++ b/drivers/power/pwrseq/pwrseq_generic.c
@@ -0,0 +1,234 @@
+/*
+ * pwrseq_generic.c Generic power sequence handling
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Author: Peter Chen <peter.chen@nxp.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+
+#include <linux/power/pwrseq.h>
+
+struct pwrseq_generic {
+ struct pwrseq pwrseq;
+ struct gpio_desc *gpiod_reset;
+ struct clk *clks[PWRSEQ_MAX_CLKS];
+ u32 duration_us;
+ bool suspended;
+};
+
+#define to_generic_pwrseq(p) container_of(p, struct pwrseq_generic, pwrseq)
+
+static int pwrseq_generic_alloc_instance(void);
+static const struct of_device_id generic_id_table[] = {
+ { .compatible = "generic",},
+ { /* sentinel */ }
+};
+
+static int pwrseq_generic_suspend(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ for (clk = PWRSEQ_MAX_CLKS - 1; clk >= 0; clk--)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ pwrseq_gen->suspended = true;
+ return 0;
+}
+
+static int pwrseq_generic_resume(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk, ret = 0;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS && pwrseq_gen->clks[clk]; clk++) {
+ ret = clk_prepare_enable(pwrseq_gen->clks[clk]);
+ if (ret) {
+ pr_err("Can't enable clock, ret=%d\n", ret);
+ goto err_disable_clks;
+ }
+ }
+
+ pwrseq_gen->suspended = false;
+ return ret;
+
+err_disable_clks:
+ while (--clk >= 0)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ return ret;
+}
+
+static void pwrseq_generic_put(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ if (pwrseq_gen->gpiod_reset)
+ gpiod_put(pwrseq_gen->gpiod_reset);
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS; clk++)
+ clk_put(pwrseq_gen->clks[clk]);
+
+ pwrseq_unregister(&pwrseq_gen->pwrseq);
+ kfree(pwrseq_gen);
+}
+
+static void pwrseq_generic_off(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ if (pwrseq_gen->suspended)
+ return;
+
+ for (clk = PWRSEQ_MAX_CLKS - 1; clk >= 0; clk--)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+}
+
+static int pwrseq_generic_on(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk, ret = 0;
+ struct gpio_desc *gpiod_reset = pwrseq_gen->gpiod_reset;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS && pwrseq_gen->clks[clk]; clk++) {
+ ret = clk_prepare_enable(pwrseq_gen->clks[clk]);
+ if (ret) {
+ pr_err("Can't enable clock, ret=%d\n", ret);
+ goto err_disable_clks;
+ }
+ }
+
+ if (gpiod_reset) {
+ u32 duration_us = pwrseq_gen->duration_us;
+
+ if (duration_us <= 10)
+ udelay(10);
+ else
+ usleep_range(duration_us, duration_us + 100);
+ gpiod_set_value(gpiod_reset, 0);
+ }
+
+ return ret;
+
+err_disable_clks:
+ while (--clk >= 0)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ return ret;
+}
+
+static int pwrseq_generic_get(struct device_node *np, struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ enum of_gpio_flags flags;
+ int reset_gpio, clk, ret = 0;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS; clk++) {
+ pwrseq_gen->clks[clk] = of_clk_get(np, clk);
+ if (IS_ERR(pwrseq_gen->clks[clk])) {
+ ret = PTR_ERR(pwrseq_gen->clks[clk]);
+ if (ret != -ENOENT)
+ goto err_put_clks;
+ pwrseq_gen->clks[clk] = NULL;
+ break;
+ }
+ }
+
+ reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &flags);
+ if (gpio_is_valid(reset_gpio)) {
+ unsigned long gpio_flags;
+
+ if (flags & OF_GPIO_ACTIVE_LOW)
+ gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_LOW;
+ else
+ gpio_flags = GPIOF_OUT_INIT_HIGH;
+
+ ret = gpio_request_one(reset_gpio, gpio_flags,
+ "pwrseq-reset-gpios");
+ if (ret)
+ goto err_put_clks;
+
+ pwrseq_gen->gpiod_reset = gpio_to_desc(reset_gpio);
+ of_property_read_u32(np, "reset-duration-us",
+ &pwrseq_gen->duration_us);
+ } else if (reset_gpio == -ENOENT) {
+ ; /* no such gpio */
+ } else {
+ ret = reset_gpio;
+ pr_err("Failed to get reset gpio on %s, err = %d\n",
+ np->full_name, reset_gpio);
+ goto err_put_clks;
+ }
+
+ /* allocate new one for later pwrseq instance request */
+ ret = pwrseq_generic_alloc_instance();
+ if (ret)
+ goto err_put_gpio;
+
+ return 0;
+
+err_put_gpio:
+ if (pwrseq_gen->gpiod_reset)
+ gpiod_put(pwrseq_gen->gpiod_reset);
+err_put_clks:
+ while (--clk >= 0)
+ clk_put(pwrseq_gen->clks[clk]);
+ return ret;
+}
+
+/**
+ * pwrseq_generic_alloc_instance - power sequence instance allocation
+ *
+ * This function is used to allocate one generic power sequence instance,
+ * it is called when the system boots up and after one power sequence
+ * instance is got successfully.
+ *
+ * Return zero on success or an error code otherwise.
+ */
+static int pwrseq_generic_alloc_instance(void)
+{
+ struct pwrseq_generic *pwrseq_gen;
+
+ pwrseq_gen = kzalloc(sizeof(*pwrseq_gen), GFP_KERNEL);
+ if (!pwrseq_gen)
+ return -ENOMEM;
+
+ pwrseq_gen->pwrseq.pwrseq_of_match_table = generic_id_table;
+ pwrseq_gen->pwrseq.get = pwrseq_generic_get;
+ pwrseq_gen->pwrseq.on = pwrseq_generic_on;
+ pwrseq_gen->pwrseq.off = pwrseq_generic_off;
+ pwrseq_gen->pwrseq.put = pwrseq_generic_put;
+ pwrseq_gen->pwrseq.suspend = pwrseq_generic_suspend;
+ pwrseq_gen->pwrseq.resume = pwrseq_generic_resume;
+
+ pwrseq_register(&pwrseq_gen->pwrseq);
+ return 0;
+}
+
+/* Allocate one pwrseq instance during boots up */
+static int __init pwrseq_generic_register(void)
+{
+ return pwrseq_generic_alloc_instance();
+}
+postcore_initcall(pwrseq_generic_register)
diff --git a/include/linux/power/pwrseq.h b/include/linux/power/pwrseq.h
new file mode 100644
index 000000000000..cbc344cdf9d2
--- /dev/null
+++ b/include/linux/power/pwrseq.h
@@ -0,0 +1,81 @@
+#ifndef __LINUX_PWRSEQ_H
+#define __LINUX_PWRSEQ_H
+
+#include <linux/of.h>
+
+#define PWRSEQ_MAX_CLKS 3
+
+/**
+ * struct pwrseq - the power sequence structure
+ * @pwrseq_of_match_table: the OF device id table this pwrseq library supports
+ * @node: the list pointer to be added to pwrseq list
+ * @get: the API is used to get pwrseq instance from the device node
+ * @on: do power on for this pwrseq instance
+ * @off: do power off for this pwrseq instance
+ * @put: release the resources on this pwrseq instance
+ * @suspend: do suspend operation on this pwrseq instance
+ * @resume: do resume operation on this pwrseq instance
+ * @used: this pwrseq instance is used by device
+ */
+struct pwrseq {
+ const struct of_device_id *pwrseq_of_match_table;
+ struct list_head node;
+ int (*get)(struct device_node *np, struct pwrseq *p);
+ int (*on)(struct pwrseq *p);
+ void (*off)(struct pwrseq *p);
+ void (*put)(struct pwrseq *p);
+ int (*suspend)(struct pwrseq *p);
+ int (*resume)(struct pwrseq *p);
+ bool used;
+ bool suspended;
+};
+
+/* used for power sequence instance list in one driver */
+struct pwrseq_list_per_dev {
+ struct pwrseq *pwrseq;
+ struct list_head list;
+};
+
+#if IS_ENABLED(CONFIG_POWER_SEQUENCE)
+void pwrseq_register(struct pwrseq *pwrseq);
+void pwrseq_unregister(struct pwrseq *pwrseq);
+struct pwrseq *of_pwrseq_on(struct device_node *np);
+void of_pwrseq_off(struct pwrseq *pwrseq);
+int of_pwrseq_on_list(struct device_node *np, struct list_head *head);
+void of_pwrseq_off_list(struct list_head *head);
+int pwrseq_suspend(struct pwrseq *p);
+int pwrseq_resume(struct pwrseq *p);
+int pwrseq_suspend_list(struct list_head *head);
+int pwrseq_resume_list(struct list_head *head);
+#else
+static inline void pwrseq_register(struct pwrseq *pwrseq) {}
+static inline void pwrseq_unregister(struct pwrseq *pwrseq) {}
+static inline struct pwrseq *of_pwrseq_on(struct device_node *np)
+{
+ return NULL;
+}
+static void of_pwrseq_off(struct pwrseq *pwrseq) {}
+static int of_pwrseq_on_list(struct device_node *np, struct list_head *head)
+{
+ return 0;
+}
+static void of_pwrseq_off_list(struct list_head *head) {}
+static int pwrseq_suspend(struct pwrseq *p)
+{
+ return 0;
+}
+static int pwrseq_resume(struct pwrseq *p)
+{
+ return 0;
+}
+static int pwrseq_suspend_list(struct list_head *head)
+{
+ return 0;
+}
+static int pwrseq_resume_list(struct list_head *head)
+{
+ return 0;
+}
+#endif /* CONFIG_POWER_SEQUENCE */
+
+#endif /* __LINUX_PWRSEQ_H */
--
2.20.1

165
patch/kernel/archive/imx6-5.15/0004-usb-core-add-power-sequence-handling-for-USB-devices.patch Normal file
View File

@@ -0,0 +1,165 @@
From a42362841fe263a6c97a1793ccd4b9246ac2b108 Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@nxp.com>
Date: Thu, 18 May 2017 08:49:00 +0800
Subject: [PATCH 4/9] usb: core: add power sequence handling for USB devices
Some hard-wired USB devices need to do power sequence to let the
device work normally, the typical power sequence like: enable USB
PHY clock, toggle reset pin, etc. But current Linux USB driver
lacks of such code to do it, it may cause some hard-wired USB devices
works abnormal or can't be recognized by controller at all.
In this patch, it calls power sequence library APIs to finish
the power sequence events. It will do power on sequence at hub's
probe for all devices under this hub (includes root hub).
At hub_disconnect, it will do power off sequence which is at powered
on list.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Tested-by Joshua Clayton <stillcompiling@gmail.com>
Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Reviewed-by: Vaibhav Hiremath <hvaibhav.linux@gmail.com>
---
drivers/usb/Kconfig | 1 +
drivers/usb/core/hub.c | 49 ++++++++++++++++++++++++++++++++++++++----
drivers/usb/core/hub.h | 1 +
3 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 6e59d370ef81..2162fd85b32d 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -47,6 +47,7 @@ config USB
depends on USB_ARCH_HAS_HCD
select GENERIC_ALLOCATOR
select USB_COMMON
+ select POWER_SEQUENCE
select NLS # for UTF-8 strings
---help---
Universal Serial Bus (USB) is a specification for a serial bus
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 236313f41f4a..3db75b0d2426 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -29,6 +29,7 @@
#include <linux/random.h>
#include <linux/pm_qos.h>
#include <linux/kobject.h>
+#include <linux/power/pwrseq.h>
#include <linux/uaccess.h>
#include <asm/byteorder.h>
@@ -1705,6 +1706,7 @@ static void hub_disconnect(struct usb_interface *intf)
hub->error = 0;
hub_quiesce(hub, HUB_DISCONNECT);
+ of_pwrseq_off_list(&hub->pwrseq_on_list);
mutex_lock(&usb_port_peer_mutex);
/* Avoid races with recursively_mark_NOTATTACHED() */
@@ -1751,11 +1753,41 @@ static bool hub_descriptor_is_sane(struct usb_host_interface *desc)
return true;
}
+#ifdef CONFIG_OF
+static int hub_of_pwrseq_on(struct usb_hub *hub)
+{
+ struct device *parent;
+ struct usb_device *hdev = hub->hdev;
+ struct device_node *np;
+ int ret;
+
+ if (hdev->parent)
+ parent = &hdev->dev;
+ else
+ parent = bus_to_hcd(hdev->bus)->self.sysdev;
+
+ for_each_child_of_node(parent->of_node, np) {
+ ret = of_pwrseq_on_list(np, &hub->pwrseq_on_list);
+ /* Maybe no power sequence library is chosen */
+ if (ret && ret != -ENOENT)
+ return ret;
+ }
+
+ return 0;
+}
+#else
+static int hub_of_pwrseq_on(struct usb_hub *hub)
+{
+ return 0;
+}
+#endif
+
static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
{
struct usb_host_interface *desc;
struct usb_device *hdev;
struct usb_hub *hub;
+ int ret = -ENODEV;
desc = intf->cur_altsetting;
hdev = interface_to_usbdev(intf);
@@ -1846,6 +1878,7 @@ static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
INIT_DELAYED_WORK(&hub->leds, led_work);
INIT_DELAYED_WORK(&hub->init_work, NULL);
INIT_WORK(&hub->events, hub_event);
+ INIT_LIST_HEAD(&hub->pwrseq_on_list);
spin_lock_init(&hub->irq_urb_lock);
timer_setup(&hub->irq_urb_retry, hub_retry_irq_urb, 0);
usb_get_intf(intf);
@@ -1861,11 +1894,14 @@ static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
if (id->driver_info & HUB_QUIRK_CHECK_PORT_AUTOSUSPEND)
hub->quirk_check_port_auto_suspend = 1;
- if (hub_configure(hub, &desc->endpoint[0].desc) >= 0)
- return 0;
+ if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) {
+ ret = hub_of_pwrseq_on(hub);
+ if (!ret)
+ return 0;
+ }
hub_disconnect(intf);
- return -ENODEV;
+ return ret;
}
static int
@@ -3720,7 +3756,7 @@ static int hub_suspend(struct usb_interface *intf, pm_message_t msg)
/* stop hub_wq and related activity */
hub_quiesce(hub, HUB_SUSPEND);
- return 0;
+ return pwrseq_suspend_list(&hub->pwrseq_on_list);
}
/* Report wakeup requests from the ports of a resuming root hub */
@@ -3760,8 +3796,13 @@ static void report_wakeup_requests(struct usb_hub *hub)
static int hub_resume(struct usb_interface *intf)
{
struct usb_hub *hub = usb_get_intfdata(intf);
+ int ret;
dev_dbg(&intf->dev, "%s\n", __func__);
+ ret = pwrseq_resume_list(&hub->pwrseq_on_list);
+ if (ret)
+ return ret;
+
hub_activate(hub, HUB_RESUME);
/*
diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
index a9e24e4b8df1..feab956a1414 100644
--- a/drivers/usb/core/hub.h
+++ b/drivers/usb/core/hub.h
@@ -72,6 +72,7 @@ struct usb_hub {
spinlock_t irq_urb_lock;
struct timer_list irq_urb_retry;
struct usb_port **ports;
+ struct list_head pwrseq_on_list; /* powered pwrseq node list */
};
/**
--
2.20.1

49
patch/kernel/archive/imx6-5.15/0005-ARM-dts-imx6qdl-Enable-usb-node-children-with-reg.patch Normal file
View File

@@ -0,0 +1,49 @@
From bf1b3a63aa2f3438750f5acdf372705f8a1beb41 Mon Sep 17 00:00:00 2001
From: Joshua Clayton <stillcompiling@gmail.com>
Date: Thu, 18 May 2017 08:49:01 +0800
Subject: [PATCH 5/9] ARM: dts: imx6qdl: Enable usb node children with <reg>
Give usb nodes #address and #size attributes, so that a child node
representing a permanently connected device such as an onboard hub may
be addressed with a <reg> attribute
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index fe17a3405edc..a5f2f981255f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -977,6 +977,8 @@
usbh1: usb@2184200 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184200 0x200>;
interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
@@ -991,6 +993,8 @@
usbh2: usb@2184400 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184400 0x200>;
interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
@@ -1006,6 +1010,8 @@
usbh3: usb@2184600 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184600 0x200>;
interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
--
2.20.1

79
patch/kernel/archive/imx6-5.15/0006-ARM-dts-imx6qdl-udoo.dtsi-fix-onboard-USB-HUB-proper.patch Normal file
View File

@@ -0,0 +1,79 @@
From c46707dde637ec75182c2f42f61aab96486bbcee Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@nxp.com>
Date: Thu, 18 May 2017 08:49:02 +0800
Subject: [PATCH 6/9] ARM: dts: imx6qdl-udoo.dtsi: fix onboard USB HUB property
The current dts describes USB HUB's property at USB controller's
entry, it is improper. The USB HUB should be the child node
under USB controller, and power sequence properties are under
it. Besides, using gpio pinctrl setting for USB2415's reset pin.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
---
arch/arm/boot/dts/imx6qdl-udoo.dtsi | 26 ++++++++++++--------------
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 776bfc77f89d..4781a9e04338 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -5,6 +5,8 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
+#include <dt-bindings/gpio/gpio.h>
+
/ {
aliases {
backlight = &backlight;
@@ -62,17 +64,6 @@
#address-cells = <1>;
#size-cells = <0>;
- reg_usb_h1_vbus: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
- gpio = <&gpio7 12 0>;
- };
-
reg_panel: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
@@ -205,7 +196,7 @@
pinctrl_usbh: usbhgrp {
fsl,pins = <
- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
>;
};
@@ -282,9 +273,16 @@
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh>;
- vbus-supply = <&reg_usb_h1_vbus>;
- clocks = <&clks IMX6QDL_CLK_CKO>;
status = "okay";
+
+ usb2415: hub@1 {
+ compatible = "usb424,2514";
+ reg = <1>;
+
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ reset-duration-us = <3000>;
+ };
};
&usdhc3 {
--
2.20.1

74
patch/kernel/archive/imx6-5.15/0007-ARM-dts-imx6q-evi-Fix-onboard-hub-reset-line.patch Normal file
View File

@@ -0,0 +1,74 @@
From 0ae59d1767a9cf9875b35a026b5df13eeb3694db Mon Sep 17 00:00:00 2001
From: Joshua Clayton <stillcompiling@gmail.com>
Date: Thu, 18 May 2017 08:49:03 +0800
Subject: [PATCH 7/9] ARM: dts: imx6q-evi: Fix onboard hub reset line
Previously the onboard hub was made to work by treating its
reset gpio as a regulator enable.
Get rid of that kludge now that pwseq has added reset gpio support
Move pin muxing the hub reset pin into the usbh1 group
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
---
arch/arm/boot/dts/imx6q-evi.dts | 25 +++++++------------------
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index c63f371ede8b..546d9d4e8ca1 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -55,18 +55,6 @@
reg = <0x10000000 0x40000000>;
};
- reg_usbh1_vbus: regulator-usbhubreset {
- compatible = "regulator-fixed";
- regulator-name = "usbh1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- startup-delay-us = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1_hubreset>;
- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
- };
-
reg_usb_otg_vbus: regulator-usbotgvbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
@@ -214,12 +202,18 @@
};
&usbh1 {
- vbus-supply = <&reg_usbh1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
dr_mode = "host";
disable-over-current;
status = "okay";
+
+ usb2415host: hub@1 {
+ compatible = "usb424,2513";
+ reg = <1>;
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ reset-duration-us = <3000>;
+ };
};
&usbotg {
@@ -482,11 +476,6 @@
MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0
/* usbh1_b OC */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
- >;
- };
-
- pinctrl_usbh1_hubreset: usbh1hubresetgrp {
- fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
>;
};
--
2.20.1

511
patch/kernel/archive/imx6-5.15/0008-ARM-dts-driver-imx6-udooqdl-add-arduino-manager-driv.patch Normal file
View File

@@ -0,0 +1,511 @@
From 9a4d8e886600c7c330590a2435dd74eb16d480ce Mon Sep 17 00:00:00 2001
From: Steve Arnold <nerdboy@gentoo.org>
Date: Fri, 15 Dec 2017 16:43:22 -0800
Subject: [PATCH 8/9] ARM: dts,driver: imx6,udooqdl: add arduino manager driver
and update dts
* note this is required to upload sketches to sam3 from arduino IDE
Signed-off-by: Steve Arnold <nerdboy@gentoo.org>
---
arch/arm/boot/dts/imx6qdl-udoo.dtsi | 20 ++
drivers/misc/Kconfig | 7 +
drivers/misc/Makefile | 1 +
drivers/misc/udoo_ard.c | 417 ++++++++++++++++++++++++++++
4 files changed, 445 insertions(+)
create mode 100755 drivers/misc/udoo_ard.c
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 4781a9e04338..554f601eb72a 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -84,6 +84,17 @@
mux-int-port = <1>;
mux-ext-port = <6>;
};
+
+ udoo_ard: udoo_ard_manager {
+ compatible = "udoo,imx6q-udoo-ard";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_udooard>;
+ bossac-clk-gpio = <&gpio6 3 0>;
+ bossac-dat-gpio = <&gpio5 18 0>;
+ bossac-erase-gpio = <&gpio4 21 0>;
+ bossac-reset-gpio = <&gpio1 0 0>;
+ status = "okay";
+ };
};
&fec {
@@ -201,6 +212,15 @@
>;
};
+ pinctrl_udooard: udooardgrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x80000000
+ MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x80000000
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 2cf9db44e4b2..f4616fc61808 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -487,6 +487,13 @@ config PVPANIC
a paravirtualized device provided by QEMU; it lets a virtual machine
(guest) communicate panic events to the host.
+config UDOO_ARD
+ tristate "UDOO-Arduino erase/reset Driver"
+ default y
+ help
+ This driver is used to erase and reset arduino board via command sent
+ over USB-to-SERIAL connection.
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index dcc801e8834e..13e132dd62c9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o
obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
obj-$(CONFIG_DUMMY_IRQ) += dummy-irq.o
obj-$(CONFIG_ICS932S401) += ics932s401.o
+obj-$(CONFIG_UDOO_ARD) += udoo_ard.o
obj-$(CONFIG_LKDTM) += lkdtm/
obj-$(CONFIG_TIFM_CORE) += tifm_core.o
obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
diff --git a/drivers/misc/udoo_ard.c b/drivers/misc/udoo_ard.c
new file mode 100755
index 000000000000..2210738e09c0
--- /dev/null
+++ b/drivers/misc/udoo_ard.c
@@ -0,0 +1,417 @@
+/*
+ * udoo_ard.c
+ * UDOO quad/dual Arduino flash erase / CPU resetter
+ *
+ * Copyright (C) 2013-2015 Aidilab srl
+ * Author: UDOO Team <social@udoo.org>
+ * Author: Giuseppe Pagano <giuseppe.pagano@seco.com>
+ * Author: Francesco Montefoschi <francesco.monte@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/sched.h>
+#include <linux/sched/clock.h>
+#include <linux/kernel.h>
+#include <linux/workqueue.h>
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_gpio.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/uaccess.h>
+
+#define DRIVER_NAME "udoo_ard"
+#define PINCTRL_DEFAULT "default"
+#define AUTH_TOKEN 0x5A5A
+#define MAX_MSEC_SINCE_LAST_IRQ 400
+#define GRAY_TIME_BETWEEN_RESET 10000 // In this time we can't accept new erase/reset code
+
+static struct workqueue_struct *erase_reset_wq;
+typedef struct {
+ struct work_struct erase_reset_work;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ int step;
+ int cmdcode;
+ int erase_reset_lock;
+ int gpio_bossac_clk;
+ int gpio_bossac_dat;
+ int gpio_ard_erase;
+ int gpio_ard_reset;
+ unsigned long last_int_time_in_ns;
+ unsigned long last_int_time_in_sec;
+} erase_reset_work_t;
+
+erase_reset_work_t *work;
+static u32 origTX, origRX; // original UART4 TX/RX pad control registers
+static int major; // for /dev/udoo_ard
+static struct class *udoo_class;
+
+static struct platform_device_id udoo_ard_devtype[] = {
+ {
+ /* keep it for coldfire */
+ .name = DRIVER_NAME,
+ .driver_data = 0,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, udoo_ard_devtype);
+
+static const struct of_device_id udoo_ard_dt_ids[] = {
+ { .compatible = "udoo,imx6q-udoo-ard", .data = &udoo_ard_devtype[0], },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, udoo_ard_dt_ids);
+
+static void disable_serial(void)
+{
+ u32 addrTX;
+ void __iomem *_addrTX;
+
+ printk("[bossac] Disable UART4 serial port.\n");
+
+ addrTX = 0x20E01F8;
+ _addrTX = ioremap(addrTX, 8);
+
+ origTX = __raw_readl(_addrTX);
+ origRX = __raw_readl(_addrTX + 0x4);
+
+ __raw_writel(0x15, _addrTX);
+ __raw_writel(0x15, _addrTX + 0x4);
+
+ iounmap(_addrTX);
+}
+
+static void enable_serial(void)
+{
+ u32 addrTX;
+ void __iomem *_addrTX;
+
+ printk("[bossac] Enable UART4 serial port.\n");
+
+ addrTX = 0x20E01F8;
+ _addrTX = ioremap(addrTX, 8);
+
+ __raw_writel(origTX, _addrTX);
+ __raw_writel(origRX, _addrTX + 0x4);
+
+ iounmap(_addrTX);
+}
+
+static void erase_reset(void)
+{
+ printk("[bossac] UDOO ERASE and RESET on Sam3x started.\n");
+
+ gpio_direction_input(work->gpio_ard_erase);
+ gpio_set_value(work->gpio_ard_reset, 1);
+ msleep(1);
+
+ gpio_direction_output(work->gpio_ard_erase, 1);
+ msleep(300);
+ gpio_direction_input(work->gpio_ard_erase);
+
+ msleep(10);
+ gpio_set_value(work->gpio_ard_reset, 0);
+
+ msleep(80);
+ gpio_set_value(work->gpio_ard_reset, 1);
+
+ printk("[bossac] UDOO ERASE and RESET on Sam3x EXECUTED.\n");
+}
+
+static void shutdown_sam3x(void)
+{
+ printk("[bossac] RESET on Sam3x.\n");
+
+ gpio_set_value(work->gpio_ard_reset, 0);
+}
+
+static void erase_reset_wq_function( struct work_struct *work2)
+{
+ disable_serial();
+ erase_reset();
+ msleep(GRAY_TIME_BETWEEN_RESET);
+
+ work->erase_reset_lock = 0;
+}
+
+/*
+ * Called everytime the gpio_bossac_clk signal toggles.
+ * If the auth token (16 bit) is found, we look for the command code (4 bit).
+ * The code 0x0F is sent by Bossac to trigger an erase/reset (to achieve this,
+ * erase_reset_wq is scheduled). Before starting to program the flash, we disable
+ * the UART4 serial port, otherwise there is too noise on the serial lines (the
+ * programming port and UART4 port are connected together, see hw schematics).
+ * When Bossac finishes to flash/verify, the code 0x00 is sent which re-enables
+ * the UART4 port.
+ */
+static irqreturn_t udoo_bossac_req(int irq, void *dev_id)
+{
+ int retval, auth_bit, expected_bit, msec_since_last_irq;
+ u64 nowsec;
+ unsigned long rem_nsec;
+ erase_reset_work_t *erase_reset_work;
+
+ auth_bit = 0;
+ if (gpio_get_value(work->gpio_bossac_dat) != 0x0) {
+ auth_bit = 1;
+ }
+
+ erase_reset_work = (erase_reset_work_t *)work;
+
+ nowsec = local_clock();
+ rem_nsec = do_div(nowsec, 1000000000) ;
+ msec_since_last_irq = (((unsigned long)nowsec * 1000) + rem_nsec/1000000 ) - (((unsigned long)erase_reset_work->last_int_time_in_sec * 1000) + erase_reset_work->last_int_time_in_ns/1000000);
+
+ if (msec_since_last_irq > MAX_MSEC_SINCE_LAST_IRQ) {
+ erase_reset_work->step = 0;
+#ifdef DEBUG
+ printk("[bossac] Reset authentication timeout!\n");
+#endif
+ }
+
+#ifdef DEBUG
+ printk("[bossac] STEP %d -> 0x%d \n", erase_reset_work->step, auth_bit);
+#endif
+ erase_reset_work->last_int_time_in_ns = rem_nsec;
+ erase_reset_work->last_int_time_in_sec = nowsec;
+
+ if ( erase_reset_work->step < 16 ) { // Authenticating received token bit.
+ expected_bit = (( AUTH_TOKEN >> erase_reset_work->step ) & 0x01 );
+ if ( auth_bit == expected_bit ) {
+ erase_reset_work->step = erase_reset_work->step + 1;
+ } else {
+ erase_reset_work->step = 0;
+ }
+ } else { // Passed all authentication step. Receiving command code.
+ erase_reset_work->cmdcode = erase_reset_work->cmdcode | (auth_bit << (erase_reset_work->step - 16));
+ erase_reset_work->step = erase_reset_work->step + 1;
+ }
+
+#ifdef DEBUG
+ printk("erase_reset_work->erase_reset_lock = %d \n", erase_reset_work->erase_reset_lock);
+#endif
+ if ( erase_reset_work->step == 20 ) { // Passed authentication and code acquiring step.
+#ifdef DEBUG
+ printk("[bossac] Received code = 0x%04x \n", erase_reset_work->cmdcode);
+#endif
+ if (erase_reset_work->cmdcode == 0xF) {
+ if (erase_reset_work->erase_reset_lock == 0) {
+ erase_reset_work->erase_reset_lock = 1;
+ retval = queue_work( erase_reset_wq, (struct work_struct *)work );
+ } else {
+#ifdef DEBUG
+ printk("Erase and reset operation already in progress. Do nothing.\n");
+#endif
+ }
+ } else {
+ enable_serial();
+ }
+ erase_reset_work->step = 0;
+ erase_reset_work->cmdcode = 0;
+ }
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * Takes control of clock, data, erase, reset GPIOs.
+ */
+static int gpio_setup(void)
+{
+ int ret;
+
+ ret = gpio_request(work->gpio_bossac_clk, "BOSSA_CLK");
+ if (ret) {
+ printk(KERN_ERR "request BOSSA_CLK IRQ\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_bossac_clk);
+ }
+
+ ret = gpio_request(work->gpio_bossac_dat, "BOSSA_DAT");
+ if (ret) {
+ printk(KERN_ERR "request BOSSA_DAT IRQ\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_bossac_dat);
+ }
+
+ ret = gpio_request(work->gpio_ard_erase, "BOSSAC");
+ if (ret) {
+ printk(KERN_ERR "request GPIO FOR ARDUINO ERASE\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_ard_erase);
+ }
+
+ ret = gpio_request(work->gpio_ard_reset, "BOSSAC");
+ if (ret) {
+ printk(KERN_ERR "request GPIO FOR ARDUINO RESET\n");
+ return -1;
+ } else {
+ gpio_direction_output(work->gpio_ard_reset, 1);
+ }
+
+ return 0;
+}
+
+static ssize_t device_write(struct file *filp, const char *buff, size_t len, loff_t *off)
+{
+ char msg[10];
+ long res;
+
+ if (len > 10)
+ return -EINVAL;
+
+
+ res = copy_from_user(msg, buff, len);
+ if (res) {
+ return -EFAULT;
+ }
+ msg[len] = '\0';
+
+ if (strcmp(msg, "erase")==0) {
+ erase_reset();
+ } else if (strcmp(msg, "shutdown")==0) {
+ shutdown_sam3x();
+ } else if (strcmp(msg, "uartoff")==0) {
+ disable_serial();
+ } else if (strcmp(msg, "uarton")==0) {
+ enable_serial();
+ } else {
+ printk("[bossac] udoo_ard invalid operation! %s", msg);
+ }
+
+ return len;
+}
+
+static struct file_operations fops = {
+ .write = device_write,
+};
+
+/*
+ * If a fdt udoo_ard entry is found, we register an IRQ on bossac clock line
+ * and we create /dev/udoo_ard
+ */
+static int udoo_ard_probe(struct platform_device *pdev)
+{
+ int retval;
+ struct device *temp_class;
+ struct platform_device *bdev;
+ struct device_node *np;
+
+ bdev = kzalloc(sizeof(*bdev), GFP_KERNEL);
+ np = pdev->dev.of_node;
+
+ if (!np)
+ return -ENODEV;
+
+ work = (erase_reset_work_t *)kmalloc(sizeof(erase_reset_work_t), GFP_KERNEL);
+ if (work) {
+ work->gpio_ard_reset = of_get_named_gpio(np, "bossac-reset-gpio", 0);
+ work->gpio_ard_erase = of_get_named_gpio(np, "bossac-erase-gpio", 0);
+ work->gpio_bossac_clk = of_get_named_gpio(np, "bossac-clk-gpio", 0);
+ work->gpio_bossac_dat = of_get_named_gpio(np, "bossac-dat-gpio", 0);
+ work->pinctrl = devm_pinctrl_get(&pdev->dev);
+ work->pins_default = pinctrl_lookup_state(work->pinctrl, PINCTRL_DEFAULT);
+ } else {
+ printk("[bossac] Failed to allocate data structure.");
+ return -ENOMEM;
+ }
+
+ pinctrl_select_state(work->pinctrl, work->pins_default);
+ gpio_setup();
+
+ printk("[bossac] Registering IRQ %d for BOSSAC Arduino erase/reset operation\n", gpio_to_irq(work->gpio_bossac_clk));
+ retval = request_irq(gpio_to_irq(work->gpio_bossac_clk), udoo_bossac_req, IRQF_TRIGGER_FALLING, "UDOO", bdev);
+
+ major = register_chrdev(major, "udoo_ard", &fops);
+ if (major < 0) {
+ printk(KERN_ERR "[bossac] Cannot get major for UDOO Ard\n");
+ return -EBUSY;
+ }
+
+ udoo_class = class_create(THIS_MODULE, "udoo_ard");
+ if (IS_ERR(udoo_class)) {
+ return PTR_ERR(udoo_class);
+ }
+
+ temp_class = device_create(udoo_class, NULL, MKDEV(major, 0), NULL, "udoo_ard");
+ if (IS_ERR(temp_class)) {
+ return PTR_ERR(temp_class);
+ }
+
+ printk("[bossac] Created device file /dev/udoo_ard\n");
+
+ erase_reset_wq = create_workqueue("erase_reset_queue");
+ if (erase_reset_wq) {
+
+ /* Queue some work (item 1) */
+ if (work) {
+ INIT_WORK( (struct work_struct *)work, erase_reset_wq_function );
+ work->step = 1;
+ work->cmdcode = 0;
+ work->last_int_time_in_ns = 0;
+ work->last_int_time_in_sec = 0;
+ work->erase_reset_lock = 0;
+ // retval = queue_work( erase_reset_wq, (struct work_struct *)work );
+ }
+ }
+ return 0;
+}
+
+static int udoo_ard_remove(struct platform_device *pdev)
+{
+ printk("[bossac] Unloading UDOO ard driver.\n");
+ free_irq(gpio_to_irq(work->gpio_bossac_clk), NULL);
+
+ gpio_free(work->gpio_ard_reset);
+ gpio_free(work->gpio_ard_erase);
+ gpio_free(work->gpio_bossac_clk);
+ gpio_free(work->gpio_bossac_dat);
+
+ device_destroy(udoo_class, MKDEV(major, 0));
+ class_destroy(udoo_class);
+ unregister_chrdev(major, "udoo_ard");
+
+ return 0;
+}
+
+static struct platform_driver udoo_ard_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = udoo_ard_dt_ids,
+ },
+ .id_table = udoo_ard_devtype,
+ .probe = udoo_ard_probe,
+ .remove = udoo_ard_remove,
+};
+
+module_platform_driver(udoo_ard_driver);
+
+MODULE_ALIAS("platform:"DRIVER_NAME);
+MODULE_LICENSE("GPL");
--
2.20.1

11
patch/kernel/archive/imx6-5.15/Feroceon-no-inline-l2_inv_all.patch Normal file
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@@ -0,0 +1,11 @@
--- ./arch/arm/mm/cache-feroceon-l2.c.orig 2013-04-26 13:18:32.000000000 -0600
+++ ./arch/arm/mm/cache-feroceon-l2.c 2013-04-28 04:01:09.815592333 -0600
@@ -117,7 +117,7 @@ static inline void l2_inv_pa_range(unsig
l2_put_va(va_start);
}
-static inline void l2_inv_all(void)
+static void l2_inv_all(void)
{
__asm__("mcr p15, 1, %0, c15, c11, 0" : : "r" (0));
}

66
patch/kernel/archive/imx6-5.15/Linux-3.18.2-Hummingboard-i2c3.patch Normal file
View File

@@ -0,0 +1,66 @@
--- ./arch/arm/boot/dts/imx6qdl-hummingboard.dtsi.orig 2015-01-08 11:30:41.000000000 -0700
+++ ./arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 2015-01-13 14:19:29.696485445 -0700
@@ -94,6 +94,31 @@
status = "okay";
};
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hummingboard_i2c3>;
+ status = "okay";
+};
+
+&ecspi2 {
+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&gpio2 26 1>, <&gpio2 27 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hummingboard_spi>;
+ status = "okay";
+ spidev@0x00 {
+ compatible = "spidev";
+ spi-max-frequency = <5000000>;
+ reg = <0>;
+ };
+ spidev@0x01 {
+ compatible = "spidev";
+ spi-max-frequency = <5000000>;
+ reg = <1>;
+ };
+};
+
&iomuxc {
hummingboard {
pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
@@ -103,6 +128,17 @@
>;
};
+ pinctrl_hummingboard_spi: hummingboard_spi {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+ /* MX6QDL_PAD_EIM_RW__ECSPI2_SS0 0x100b1 */
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
+ MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 0x100b1
+ >;
+ };
+
pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5 {
fsl,pins = <
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
@@ -129,6 +165,13 @@
>;
};
+ pinctrl_hummingboard_i2c3: hummingboard-i2c3 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
pinctrl_hummingboard_spdif: hummingboard-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
};

11
patch/kernel/archive/imx6-5.15/Linux-4.2.6-systemd-timer.patch Normal file
View File

@@ -0,0 +1,11 @@
--- ./fs/timerfd.c.orig 2015-11-09 15:37:56.000000000 -0700
+++ ./fs/timerfd.c 2015-11-14 08:20:51.720068530 -0700
@@ -134,7 +134,7 @@ static void timerfd_setup_cancel(struct
{
if ((ctx->clockid == CLOCK_REALTIME ||
ctx->clockid == CLOCK_REALTIME_ALARM) &&
- (flags & TFD_TIMER_ABSTIME) && (flags & TFD_TIMER_CANCEL_ON_SET)) {
+ (flags & TFD_TIMER_CANCEL_ON_SET)) {
if (!ctx->might_cancel) {
ctx->might_cancel = true;
spin_lock(&cancel_lock);

34
patch/kernel/archive/meson64-5.15/0001-Add-higher-clocks-for-SM1-family.patch Normal file
View File

@@ -0,0 +1,34 @@
From a11802ecb5686153614aa19a089900c22928988c Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Tue, 4 Aug 2020 22:51:56 +0200
Subject: [PATCH] Add higher clocks for SM1 family
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index d4ec735fb..a35cad1d4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -150,6 +150,16 @@ opp-1908000000 {
opp-hz = /bits/ 64 <1908000000>;
opp-microvolt = <950000>;
};
+
+ opp-2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1000000>;
+ };
+
+ opp-2100000000 {
+ opp-hz = /bits/ 64 <2100000000>;
+ opp-microvolt = <1022000>;
+ };
};
};
--
Created with Armbian build tools https://github.com/armbian/build

46
patch/kernel/archive/meson64-5.15/0001-Add-missing-CPU-opp-values-for-clocking-g12b-N2-high.patch Normal file
View File

@@ -0,0 +1,46 @@
From 712b399ed54f49e0ac7ae92c57ed775604eaaed9 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Wed, 10 Feb 2021 18:07:08 +0100
Subject: [PATCH] Add missing CPU opp values for clocking g12b / N2+ higher
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
.../arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
index d61f43052..75030d197 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
@@ -65,6 +65,14 @@ opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1001000>;
};
+ opp-1908000000 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <1030000>;
+ };
+ opp-2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1040000>;
+ };
};
cpub_opp_table_1: opp-table-1 {
@@ -145,5 +153,13 @@ opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <1011000>;
};
+ opp-2304000000 {
+ opp-hz = /bits/ 64 <2304000000>;
+ opp-microvolt = <1030000>;
+ };
+ opp-2400000000 {
+ opp-hz = /bits/ 64 <2400000000>;
+ opp-microvolt = <1040000>;
+ };
};
};
--
Created with Armbian build tools https://github.com/armbian/build

28
patch/kernel/archive/meson64-5.15/0001-HACK-set-meson-gx-cma-pool-to-896MB.patch Normal file
View File

@@ -0,0 +1,28 @@
From bb85ad77a67b5216c3dbc7bb9c8368e6d0e9a2d3 Mon Sep 17 00:00:00 2001
From: chewitt <github@chrishewitt.net>
Date: Sat, 13 Apr 2019 05:41:51 +0000
Subject: [PATCH 01/58] HACK: set meson-gx cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 0edd137151f8..797e193af8e3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -46,7 +46,7 @@ secmon_reserved_alt: secmon@5000000 {
linux,cma {
compatible = "shared-dma-pool";
reusable;
- size = <0x0 0x10000000>;
+ size = <0x0 0x38000000>;
alignment = <0x0 0x400000>;
linux,cma-default;
};
--
2.25.1

287
patch/kernel/archive/meson64-5.15/0001-Revert-net-Remove-net-ipx.h-and-uapi-linux-ipx.h-hea.patch Normal file
View File

@@ -0,0 +1,287 @@
From 3ec70749ae3cb072f19d886981a217121f776415 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h header
files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000000..9d1342807b59
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000000..3168137adae8
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.25.1

28
patch/kernel/archive/meson64-5.15/0002-HACK-set-meson-g12-cma-pool-to-896MB.patch Normal file
View File

@@ -0,0 +1,28 @@
From 0e84989008624cb175bb2b8a730309e4b3d3d12e Mon Sep 17 00:00:00 2001
From: chewitt <github@chrishewitt.net>
Date: Wed, 14 Aug 2019 19:58:14 +0000
Subject: [PATCH 02/58] HACK: set meson-g12 cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index b858c5e43cc8..3a4f20506a61 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -104,7 +104,7 @@ secmon_reserved: secmon@5000000 {
linux,cma {
compatible = "shared-dma-pool";
reusable;
- size = <0x0 0x10000000>;
+ size = <0x0 0x38000000>;
alignment = <0x0 0x400000>;
linux,cma-default;
};
--
2.25.1

31
patch/kernel/archive/meson64-5.15/0003-HACK-arm64-fix-Kodi-sysinfo-CPU-information.patch Normal file
View File

@@ -0,0 +1,31 @@
From 3404ba428d2f01d4467c0bf5c8d04b4b479d6320 Mon Sep 17 00:00:00 2001
From: chewitt <github@chrishewitt.net>
Date: Sat, 13 Apr 2019 05:45:18 +0000
Subject: [PATCH 03/58] HACK: arm64: fix Kodi sysinfo CPU information
This allows the CPU information to show in the Kodi sysinfo screen, e.g.
"ARMv8 Processor rev 4 (v81)" on Amlogic devices
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/kernel/cpuinfo.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 77605aec25fe..d69b4e486098 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -148,8 +148,7 @@ static int c_show(struct seq_file *m, void *v)
* "processor". Give glibc what it expects.
*/
seq_printf(m, "processor\t: %d\n", i);
- if (compat)
- seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",
+ seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",
MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
--
2.25.1

37
patch/kernel/archive/meson64-5.15/0004-HACK-arm64-dts-meson-gx-add-ATF-BL32-reserved-memory.patch Normal file
View File

@@ -0,0 +1,37 @@
From 403915f89bba1bef487b8a54a8e2c77163f16702 Mon Sep 17 00:00:00 2001
From: kszaq <kszaquitto@gmail.com>
Date: Sat, 6 Jul 2019 07:54:44 +0000
Subject: [PATCH 04/58] HACK: arm64: dts: meson-gx: add ATF BL32 reserved
memory region
Vendor firmware/uboot has an additional reserved region for BL32 trusted
firmware. If a board uses BL32 firmware, booting kernel without knowledge
of this region would cause an immediate kernel panic on SError Interrupt.
TODO: This should be enabled only for boards actually requiring it.
Signed-off-by: kszaq <kszaquitto@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 797e193af8e3..cf9eb7c8a6f0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -43,6 +43,12 @@ secmon_reserved_alt: secmon@5000000 {
no-map;
};
+ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+ secmon_reserved_bl32: secmon@5300000 {
+ reg = <0x0 0x05300000 0x0 0x2000000>;
+ no-map;
+ };
+
linux,cma {
compatible = "shared-dma-pool";
reusable;
--
2.25.1

49
patch/kernel/archive/meson64-5.15/0005-HACK-drm-meson-add-YUV422-output-support.patch Normal file
View File

@@ -0,0 +1,49 @@
From 3d8c15d79e8d7499453b067d6b9f99be8bd8e060 Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Wed, 29 Jul 2020 04:05:03 +0900
Subject: [PATCH 05/58] HACK: drm/meson: add YUV422 output support
Support YUV422 output from the Amlogic Meson SoC VPU to the HDMI
controller. This incorrectly fixes the green-line on GX devices.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index aad75a22dc33..97d670081824 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -703,6 +703,7 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
static const u32 meson_dw_hdmi_out_bus_fmts[] = {
MEDIA_BUS_FMT_YUV8_1X24,
+ MEDIA_BUS_FMT_UYVY8_1X16,
MEDIA_BUS_FMT_UYYVYY8_0_5X24,
};
@@ -802,7 +803,8 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
yuv420_mode = true;
- }
+ } else if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
+ ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
/* VENC + VENC-DVI Mode setup */
meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);
@@ -814,6 +816,10 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_bridge *bridge,
/* Setup YUV420 to HDMI-TX, no 10bit diphering */
writel_relaxed(2 | (2 << 2),
priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
+ else if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
+ /* Setup YUV422 to HDMI-TX, no 10bit diphering */
+ writel_relaxed(1 | (2 << 2),
+ priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
else
/* Setup YUV444 to HDMI-TX, no 10bit diphering */
writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
--
2.25.1

39
patch/kernel/archive/meson64-5.15/0008-FROMLIST-v1-drm-panfrost-fix-reference-leak-in-panfr.patch Normal file
View File

@@ -0,0 +1,39 @@
From 0eb45601fe5d6b3aa9eb7038bb51df6b5fb9f860 Mon Sep 17 00:00:00 2001
From: Qinglang Miao <miaoqinglang@huawei.com>
Date: Sat, 28 Nov 2020 16:10:04 +0000
Subject: [PATCH 08/58] FROMLIST(v1): drm/panfrost: fix reference leak in
panfrost_job_hw_submit
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to putting operation will result in a
reference leak here.
A new function pm_runtime_resume_and_get is introduced in
[0] to keep usage counter balanced. So We fix the reference
leak by replacing it with new funtion.
[0] dd8088d5a896 ("PM: runtime: Add pm_runtime_resume_and_get to deal with usage counter")
Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
---
drivers/gpu/drm/panfrost/panfrost_job.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
index 04e6f6f9b742..d6d5c15184f9 100644
--- a/drivers/gpu/drm/panfrost/panfrost_job.c
+++ b/drivers/gpu/drm/panfrost/panfrost_job.c
@@ -157,7 +157,7 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js)
panfrost_devfreq_record_busy(&pfdev->pfdevfreq);
- ret = pm_runtime_get_sync(pfdev->dev);
+ ret = pm_runtime_resume_and_get(pfdev->dev);
if (ret < 0)
return;
--
2.25.1

48
patch/kernel/archive/meson64-5.15/0014-FROMLIST-v1-phy-amlogic-phy-meson-gxl-usb2-fix-share.patch Normal file
View File

@@ -0,0 +1,48 @@
From dbb14693f1efbb904658288c0914f7747965ab0d Mon Sep 17 00:00:00 2001
From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Date: Fri, 13 Nov 2020 07:45:15 +0000
Subject: [PATCH 14/58] FROMLIST(v1): phy: amlogic: phy-meson-gxl-usb2: fix
shared reset controller use
Use reset_control_rearm() call if an error occurs in case
phy_meson_gxl_usb2_init() fails after reset() has been called ; or in case
phy_meson_gxl_usb2_exit() is called i.e the resource is no longer used
and the reset line may be triggered again by other devices.
reset_control_rearm() keeps use of triggered_count sane in the reset
framework. Therefore, use of reset_control_reset() on shared reset line
should be balanced with reset_control_rearm().
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
index 2b3c0d730f20..17826cd03142 100644
--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
@@ -114,8 +114,10 @@ static int phy_meson_gxl_usb2_init(struct phy *phy)
return ret;
ret = clk_prepare_enable(priv->clk);
- if (ret)
+ if (ret) {
+ reset_control_rearm(priv->reset);
return ret;
+ }
return 0;
}
@@ -124,6 +126,7 @@ static int phy_meson_gxl_usb2_exit(struct phy *phy)
{
struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
+ reset_control_rearm(priv->reset);
clk_disable_unprepare(priv->clk);
return 0;
--
2.25.1

105
patch/kernel/archive/meson64-5.15/0015-FROMLIST-v1-usb-dwc3-meson-g12a-fix-shared-reset-con.patch Normal file
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@@ -0,0 +1,105 @@
From 1ff484448145880c7bd8083439fd267598b77169 Mon Sep 17 00:00:00 2001
From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Date: Fri, 13 Nov 2020 07:46:15 +0000
Subject: [PATCH 15/58] FROMLIST(v1): usb: dwc3: meson-g12a: fix shared reset
control use
reset_control_(de)assert() calls are called on a shared reset line when
reset_control_reset has been used. This is not allowed by the reset
framework.
Use reset_control_rearm() call in suspend() and remove() as a way to state
that the resource is no longer used, hence the shared reset line
may be triggered again by other devices. Use reset_control_rearm() also in
case probe fails after reset() has been called.
reset_control_rearm() keeps use of triggered_count sane in the reset
framework, use of reset_control_reset() on shared reset line should be
balanced with reset_control_rearm().
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/usb/dwc3/dwc3-meson-g12a.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index bdf1f98dfad8..6570146cabc5 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -750,7 +750,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
ret = dwc3_meson_g12a_get_phys(priv);
if (ret)
- goto err_disable_clks;
+ goto err_rearm;
ret = priv->drvdata->setup_regmaps(priv, base);
if (ret)
@@ -759,7 +759,7 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
if (priv->vbus) {
ret = regulator_enable(priv->vbus);
if (ret)
- goto err_disable_clks;
+ goto err_rearm;
}
/* Get dr_mode */
@@ -775,13 +775,13 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
ret = priv->drvdata->usb_init(priv);
if (ret)
- goto err_disable_regulator;
+ goto err_rearm;
/* Init PHYs */
for (i = 0 ; i < PHY_COUNT ; ++i) {
ret = phy_init(priv->phys[i]);
if (ret)
- goto err_disable_regulator;
+ goto err_rearm;
}
/* Set PHY Power */
@@ -816,6 +816,9 @@ static int dwc3_meson_g12a_probe(struct platform_device *pdev)
for (i = 0 ; i < PHY_COUNT ; ++i)
phy_exit(priv->phys[i]);
+err_rearm:
+ reset_control_rearm(priv->reset);
+
err_disable_clks:
clk_bulk_disable_unprepare(priv->drvdata->num_clks,
priv->drvdata->clks);
@@ -843,6 +846,8 @@ static int dwc3_meson_g12a_remove(struct platform_device *pdev)
pm_runtime_put_noidle(dev);
pm_runtime_set_suspended(dev);
+ reset_control_rearm(priv->reset);
+
clk_bulk_disable_unprepare(priv->drvdata->num_clks,
priv->drvdata->clks);
@@ -883,7 +888,7 @@ static int __maybe_unused dwc3_meson_g12a_suspend(struct device *dev)
phy_exit(priv->phys[i]);
}
- reset_control_assert(priv->reset);
+ reset_control_rearm(priv->reset);
return 0;
}
@@ -893,7 +898,9 @@ static int __maybe_unused dwc3_meson_g12a_resume(struct device *dev)
struct dwc3_meson_g12a *priv = dev_get_drvdata(dev);
int i, ret;
- reset_control_deassert(priv->reset);
+ ret = reset_control_reset(priv->reset);
+ if (ret)
+ return ret;
ret = priv->drvdata->usb_init(priv);
if (ret)
--
2.25.1

90
patch/kernel/archive/meson64-5.15/0017-FROMLIST-v1-spi-nor-add-support-for-XT25F128B.patch Normal file
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@@ -0,0 +1,90 @@
From a5dc8bb92c6b67be7e48d442e821837b03fc129a Mon Sep 17 00:00:00 2001
From: Andreas Rammhold <andreas@rammhold.de>
Date: Thu, 28 Jan 2021 09:43:36 +0000
Subject: [PATCH 17/58] FROMLIST(v1): spi-nor: add support for XT25F128B
This adds support for the XT25F128B as found on the RockPi4b SBC.
Signed-off-by: Andreas Rammhold <andreas@rammhold.de>
---
This continues the efforts done in [1] & [2] that went stale. I've
tested this patch on my RockPi4b which only has the xt25f128b (and not
the xt25f32b as also propsed in [2]). I have tried to obtain a copy of
the datasheets but was unable to find them. Not sure whre you would get
them.
While [1] was already for the new spi-nor layout it was missing the bits
in the core.{c,h} files.
[1]: https://patchwork.ozlabs.org/project/linux-mtd/patch/CAMgqO2y9MYDj6antOaWLBRKU8vGEwqCB-Y1TkXTSWsmsed+W6A@mail.gmail.com/
[2]: https://patchwork.ozlabs.org/project/linux-mtd/patch/20200206171941.GA2398@makrotopia.org/
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 1 +
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/xtx.c | 16 ++++++++++++++++
4 files changed, 19 insertions(+)
create mode 100644 drivers/mtd/spi-nor/xtx.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index 653923896205..3f7a52d7fa0b 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -17,6 +17,7 @@ spi-nor-objs += sst.o
spi-nor-objs += winbond.o
spi-nor-objs += xilinx.o
spi-nor-objs += xmc.o
+spi-nor-objs += xtx.o
obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
obj-$(CONFIG_MTD_SPI_NOR) += controllers/
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0522304f52fa..9a89ec473e4b 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = {
&spi_nor_winbond,
&spi_nor_xilinx,
&spi_nor_xmc,
+ &spi_nor_xtx,
};
static const struct flash_info *
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 4a3f7f150b5d..ee0e45eaffcd 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst;
extern const struct spi_nor_manufacturer spi_nor_winbond;
extern const struct spi_nor_manufacturer spi_nor_xilinx;
extern const struct spi_nor_manufacturer spi_nor_xmc;
+extern const struct spi_nor_manufacturer spi_nor_xtx;
void spi_nor_spimem_setup_op(const struct spi_nor *nor,
struct spi_mem_op *op,
diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c
new file mode 100644
index 000000000000..a10102d8b3e2
--- /dev/null
+++ b/drivers/mtd/spi-nor/xtx.c
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static const struct flash_info xtx_parts[] = {
+ /* XTX (Shenzhen Xin Tian Xia Tech) */
+ { "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256, SECT_4K) },
+};
+
+const struct spi_nor_manufacturer spi_nor_xtx = {
+ .name = "xtx",
+ .parts = xtx_parts,
+ .nparts = ARRAY_SIZE(xtx_parts),
+};
--
2.25.1

174
patch/kernel/archive/meson64-5.15/0019-FROMLIST-v1-arm64-dts-meson-add-initial-device-tree-.patch.disabled Normal file
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@@ -0,0 +1,174 @@
From 7b86df42383a0783882d51976b15598e69b2b7b1 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 19 Jan 2021 12:57:11 +0000
Subject: [PATCH 19/58] FROMLIST(v1): arm64: dts: meson: add initial
device-tree for Minix NEO U9-H
Minix NEO U9-H is based on the Amlogic Q200 reference board with an
S912-H chip and the following specs:
- 2GB DDR3 RAM
- 16GB eMMC
- 10/100/1000 Base-T Ethernet
- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
- RTC chip
- HDMI 2.1 video
- S/PDIF optical output
- ES8323 audio codec
- Analogue headphone output
- 3x USB 2.0 ports (1x OTG)
- IR receiver
- 1x Power LED (white)
- 1x Power button (rear)
- 1x Update/Reset button (underside)
- 1x micro SD card slot
Tested-by: Wes Bradley <komplex@live.ie>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../dts/amlogic/meson-gxm-minix-neo-u9h.dts | 120 ++++++++++++++++++
2 files changed, 121 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 78a569d7fa20..aebd49c88719 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-khadas-vim2.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-minix-neo-u9h.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
new file mode 100644
index 000000000000..a414cd39c2b1
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "minix,neo-u9h", "amlogic,s912", "amlogic,meson-gxm";
+ model = "Minix Neo U9-H";
+
+ leds {
+ compatible = "gpio-leds";
+
+ white {
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_POWER;
+ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
+ };
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "update";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ button@0 {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ethmac {
+ pinctrl-0 = <&eth_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&external_phy>;
+ amlogic,tx-delay-ns = <2>;
+ phy-mode = "rgmii";
+};
+
+&external_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_15 */
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-minix-neo";
+};
+
+&i2c_B {
+ status = "okay";
+ pinctrl-0 = <&i2c_b_pins>;
+ pinctrl-names = "default";
+
+ rtc: rtc@51 {
+ status = "okay";
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ wakeup-source;
+ };
+};
+
+&sd_emmc_a {
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
--
2.25.1

69
patch/kernel/archive/meson64-5.15/0021-FROMLIST-v1-drm-meson-add-shutdown-function-to-meson.patch.disabled Normal file
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@@ -0,0 +1,69 @@
From f11388785b09c4685a14303f0961f2bed875ab88 Mon Sep 17 00:00:00 2001
From: Artem Lapkin <art@khadas.com>
Date: Wed, 24 Feb 2021 12:12:53 +0000
Subject: [PATCH 21/58] FROMLIST(v1): drm/meson: add shutdown function to
meson_drv
Problem: random stucks on reboot stage about 1/20 stuck/reboots
// debug kernel log
[ 4.496660] reboot: kernel restart prepare CMD:(null)
[ 4.498114] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown begin
[ 4.503949] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown domain 0:VPU...
...STUCK...
Solution: add shutdown function to meson_drm driver
// debug kernel log
[ 5.231896] reboot: kernel restart prepare CMD:(null)
[ 5.246135] [drm:meson_drv_shutdown]
...
[ 5.259271] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown begin
[ 5.274688] meson_ee_pwrc c883c000.system-controller:power-controller: shutdown domain 0:VPU...
[ 5.338331] reboot: Restarting system
[ 5.358293] psci: PSCI_0_2_FN_SYSTEM_RESET reboot_mode:0 cmd:(null)
bl31 reboot reason: 0xd
bl31 reboot reason: 0x0
system cmd 1.
...REBOOT...
Tested: on VIM1 VIM2 VIM3 VIM3L khadas sbcs - 1000+ successful reboots
and Odroid boards, WeTek Play2 (GXBB)
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Artem Lapkin <art@khadas.com>
---
drivers/gpu/drm/meson/meson_drv.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index 42c5d3246cfc..ac3808e846ff 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -482,6 +482,17 @@ static int meson_probe_remote(struct platform_device *pdev,
return count;
}
+static void meson_drv_shutdown(struct platform_device *pdev)
+{
+ struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
+ struct drm_device *drm = priv->drm;
+
+ dev_warn(&pdev->dev, "%s", __func__);
+ //drm_dev_unregister(drm);
+ drm_kms_helper_poll_fini(drm);
+ drm_atomic_helper_shutdown(drm);
+}
+
static int meson_drv_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
@@ -553,6 +564,7 @@ static const struct dev_pm_ops meson_drv_pm_ops = {
static struct platform_driver meson_drm_platform_driver = {
.probe = meson_drv_probe,
+ .shutdown = meson_drv_shutdown,
.driver = {
.name = "meson-drm",
.of_match_table = dt_match,
--
2.25.1

135
patch/kernel/archive/meson64-5.15/0023-WIP-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch Normal file
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@@ -0,0 +1,135 @@
From 700cd65f3e839c539477ba6194ed54989af2557e Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:23 +0100
Subject: [PATCH 23/58] WIP: arm64: meson: add Amlogic Meson GX PM Suspend
The Amlogic Meson GX SoCs uses a non-standard argument to the
PSCI CPU_SUSPEND call to enter system suspend.
Implement such call within platform_suspend_ops.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/firmware/meson/Kconfig | 6 ++
drivers/firmware/meson/Makefile | 1 +
drivers/firmware/meson/meson_gx_pm.c | 86 ++++++++++++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 drivers/firmware/meson/meson_gx_pm.c
diff --git a/drivers/firmware/meson/Kconfig b/drivers/firmware/meson/Kconfig
index f2fdd3756648..d3ead92ac61b 100644
--- a/drivers/firmware/meson/Kconfig
+++ b/drivers/firmware/meson/Kconfig
@@ -9,3 +9,9 @@ config MESON_SM
depends on ARM64_4K_PAGES
help
Say y here to enable the Amlogic secure monitor driver
+
+config MESON_GX_PM
+ bool
+ default ARCH_MESON if ARM64
+ help
+ Say y here to enable the Amlogic GX SoC Power Management
diff --git a/drivers/firmware/meson/Makefile b/drivers/firmware/meson/Makefile
index c6c09483b622..0193cdfee32f 100644
--- a/drivers/firmware/meson/Makefile
+++ b/drivers/firmware/meson/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_MESON_SM) += meson_sm.o
+obj-$(CONFIG_MESON_GX_PM) += meson_gx_pm.o
diff --git a/drivers/firmware/meson/meson_gx_pm.c b/drivers/firmware/meson/meson_gx_pm.c
new file mode 100644
index 000000000000..c104c2e4c77f
--- /dev/null
+++ b/drivers/firmware/meson/meson_gx_pm.c
@@ -0,0 +1,86 @@
+/*
+ * Amlogic Meson GX Power Management
+ *
+ * Copyright (c) 2016 Baylibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/suspend.h>
+#include <linux/arm-smccc.h>
+
+#include <uapi/linux/psci.h>
+
+#include <asm/suspend.h>
+
+/*
+ * The Amlogic GX SoCs uses a special argument value to the
+ * PSCI CPU_SUSPEND method to enter SUSPEND_MEM.
+ */
+
+#define MESON_SUSPEND_PARAM 0x0010000
+#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name
+
+static int meson_gx_suspend_finish(unsigned long arg)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(PSCI_FN_NATIVE(0_2, CPU_SUSPEND), arg,
+ virt_to_phys(cpu_resume), 0, 0, 0, 0, 0, &res);
+
+ return res.a0;
+}
+
+static int meson_gx_suspend_enter(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_MEM:
+ return cpu_suspend(MESON_SUSPEND_PARAM,
+ meson_gx_suspend_finish);
+ }
+
+ return -EINVAL;
+}
+
+static const struct platform_suspend_ops meson_gx_pm_ops = {
+ .enter = meson_gx_suspend_enter,
+ .valid = suspend_valid_only_mem,
+};
+
+static const struct of_device_id meson_gx_pm_match[] = {
+ { .compatible = "amlogic,meson-gx-pm", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, meson_gx_pm_match);
+
+static int meson_gx_pm_probe(struct platform_device *pdev)
+{
+ suspend_set_ops(&meson_gx_pm_ops);
+
+ return 0;
+}
+
+static struct platform_driver meson_gx_pm_driver = {
+ .probe = meson_gx_pm_probe,
+ .driver = {
+ .name = "meson-gx-pm",
+ .of_match_table = meson_gx_pm_match,
+ },
+};
+
+module_platform_driver(meson_gx_pm_driver);
+
+MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
+MODULE_DESCRIPTION("Amlogic Meson GX PM driver");
+MODULE_LICENSE("GPL v2");
--
2.25.1

41
patch/kernel/archive/meson64-5.15/0024-WIP-arm64-dts-meson-add-support-for-GX-PM-and-Virtua.patch Normal file
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@@ -0,0 +1,41 @@
From 42a1afe49ebd6f14b852523ec7b6bad2a72585eb Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:25 +0100
Subject: [PATCH 24/58] WIP: arm64: dts: meson: add support for GX PM and
Virtual RTC
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 14ff467c6be8..2c7afe34112b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -221,6 +221,10 @@ sm: secure-monitor {
};
};
+ system-suspend {
+ compatible = "amlogic,meson-gx-pm";
+ };
+
efuse: efuse {
compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
#address-cells = <1>;
@@ -458,6 +462,11 @@ clkc_AO: clock-controller {
};
};
+ vrtc: rtc@a8 {
+ compatible = "amlogic,meson-vrtc";
+ reg = <0x0 0x000a8 0x0 0x4>;
+ };
+
cec_AO: cec@100 {
compatible = "amlogic,meson-gx-ao-cec";
reg = <0x0 0x00100 0x0 0x14>;
--
2.25.1

30
patch/kernel/archive/meson64-5.15/0025-WIP-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas-V.patch Normal file
View File

@@ -0,0 +1,30 @@
From 39fd5fbd1d33a1789b0a7d93f30a2ab2f60a3e21 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 21 Jan 2021 01:35:36 +0000
Subject: [PATCH 25/58] WIP: arm64: dts: meson: add rtc/vrtc aliases to Khadas
VIM
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
while the onboard rtc chip claims /dev/rtc0.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 60feac0179c0..df287b12975b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -29,6 +29,8 @@ button-function {
aliases {
serial2 = &uart_AO_B;
ethernet0 = &ethmac;
+ rtc0 = &rtc;
+ rtc1 = &vrtc;
};
gpio-keys-polled {
--
2.25.1

32
patch/kernel/archive/meson64-5.15/0026-WIP-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-NE.patch Normal file
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@@ -0,0 +1,32 @@
From a44c5fc233c2834db3f977b1ec3de12a32b68c3a Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Mon, 1 Feb 2021 19:27:40 +0000
Subject: [PATCH 26/58] WIP: arm64: dts: meson: add rtc/vrtc aliases to Minix
NEO U9-H
Add node aliases to prevent meson-vrtc from claiming /dev/rtc0
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
index a414cd39c2b1..443cea738e53 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
@@ -14,6 +14,11 @@ / {
compatible = "minix,neo-u9h", "amlogic,s912", "amlogic,meson-gxm";
model = "Minix Neo U9-H";
+ aliases {
+ rtc0 = &rtc;
+ rtc1 = &vrtc;
+ };
+
leds {
compatible = "gpio-leds";
--
2.25.1

41
patch/kernel/archive/meson64-5.15/0027-WIP-arm64-dts-meson-add-spifc-node-to-ODROID-HC4.patch Normal file
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@@ -0,0 +1,41 @@
From c56aba5bb32d03e1c8806363dfa50245175907b4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 28 Jan 2021 17:15:22 +0000
Subject: [PATCH 27/58] WIP: arm64: dts: meson: add spifc node to ODROID-HC4
Add a node for the XT25F128B SPI-NOR flash to make it accessible
from Linux.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-sm1-odroid-hc4.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
index bf15700c4b15..5268d064ba1b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
@@ -90,6 +90,20 @@ &sd_emmc_c {
status = "disabled";
};
+&spifc {
+ status = "okay";
+ pinctrl-0 = <&nor_pins>;
+ pinctrl-names = "default";
+
+ xt25f128b: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <104000000>;
+ };
+};
+
&usb {
phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy0", "usb2-phy1";
--
2.25.1

70
patch/kernel/archive/meson64-5.15/0029-WIP-arm64-dts-meson-add-audio-playback-to-p201.patch Normal file
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@@ -0,0 +1,70 @@
From d7883bb41fa93676e84b27306f07b982d39eaa89 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 15 May 2020 07:52:47 +0000
Subject: [PATCH 29/58] WIP: arm64: dts: meson: add audio playback to p201
Add initial audio support limited to HDMI i2s.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-gxbb-p201.dts | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
index 150a82f3b2d7..22bd0070146b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
@@ -8,10 +8,50 @@
/dts-v1/;
#include "meson-gxbb-p20x.dtsi"
+#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "amlogic,p201", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P201 Development Board";
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "P201";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
};
&ethmac {
--
2.25.1

99
patch/kernel/archive/meson64-5.15/0030-WIP-arm64-dts-meson-add-audio-playback-to-p200.patch Normal file
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@@ -0,0 +1,99 @@
From d95a5829ef1ba7e9778dbaf7605dab90d592469f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 15 May 2020 07:56:15 +0000
Subject: [PATCH 30/58] WIP: arm64: dts: meson: add audio playback to p200
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-gxbb-p200.dts | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 3c93d1898b40..27b3ab20f070 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -9,11 +9,19 @@
#include "meson-gxbb-p20x.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "amlogic,p200", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P200 Development Board";
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
avdd18_usb_adc: regulator-avdd18_usb_adc {
compatible = "regulator-fixed";
regulator-name = "AVDD18_USB_ADC";
@@ -57,6 +65,59 @@ button-menu {
press-threshold-microvolt = <0>; /* 0% */
};
};
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "P200";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
+ pinctrl-0 = <&spdif_out_y_pins>;
+ pinctrl-names = "default";
};
&ethmac {
--
2.25.1

74
patch/kernel/archive/meson64-5.15/0031-WIP-arm64-dts-meson-add-audio-playback-to-p212-s905x.patch Normal file
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@@ -0,0 +1,74 @@
From 7fad546b01a485b99119028d9510f4abb368c1b1 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 15 May 2020 08:02:54 +0000
Subject: [PATCH 31/58] WIP: arm64: dts: meson: add audio playback to
p212-s905x dtsi
Add initial audio support limited to HDMI i2s.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../dts/amlogic/meson-gxl-s905x-p212.dtsi | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index 05cb2f5e5c36..5d41d93bd008 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -11,6 +11,7 @@
/* Common DTSI for devices which are based on the P212 reference board. */
#include "meson-gxl-s905x.dtsi"
+#include <dt-bindings/sound/meson-aiu.h>
/ {
aliases {
@@ -85,6 +86,45 @@ sdio_pwrseq: sdio-pwrseq {
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "S905X-P212";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
};
&ethmac {
--
2.25.1

127
patch/kernel/archive/meson64-5.15/0032-WIP-arm64-dts-meson-add-audio-playback-to-rbox-pro.patch Normal file
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@@ -0,0 +1,127 @@
From fbd19b8e193d7389a58fede058304200b978f205 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 15 May 2020 08:13:00 +0000
Subject: [PATCH 32/58] WIP: arm64: dts: meson: add audio playback to rbox-pro
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-gxm-rbox-pro.dts | 80 +++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
index dde7cfe12cff..0208c95e92cf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
@@ -14,6 +14,7 @@
/dts-v1/;
#include "meson-gxm.dtsi"
+#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "kingnovel,r-box-pro", "amlogic,s912", "amlogic,meson-gxm";
@@ -33,6 +34,13 @@ memory@0 {
reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */
};
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
leds {
compatible = "gpio-leds";
@@ -51,6 +59,25 @@ led-red {
};
};
+ vddio_ao18: regulator-vddio_ao18 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ hdmi_5v: regulator-hdmi-5v {
+ compatible = "regulator-fixed";
+
+ regulator-name = "HDMI_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
vddio_boot: regulator-vddio-boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
@@ -90,6 +117,59 @@ sdio_pwrseq: sdio-pwrseq {
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "RBOX-PRO";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
+ pinctrl-0 = <&spdif_out_h_pins>;
+ pinctrl-names = "default";
};
&ethmac {
--
2.25.1

192
patch/kernel/archive/meson64-5.15/0033-WIP-arm64-dts-meson-add-audio-playback-to-u200.patch Normal file
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@@ -0,0 +1,192 @@
From 12798fae0a0c5d6dda0ddd4d84c047fcdc8fc811 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 17 May 2020 05:00:55 +0000
Subject: [PATCH 33/58] WIP: arm64: dts: meson: add audio playback to u200
Add initial support limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-g12a-u200.dts | 131 ++++++++++++++++++
1 file changed, 131 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
index a26bfe72550f..280f8159ebb1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -8,6 +8,7 @@
#include "meson-g12a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "amlogic,u200", "amlogic,g12a";
@@ -18,6 +19,13 @@ aliases {
ethernet0 = &ethmac;
};
+ spdif_dit: audio-codec-1 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -147,6 +155,91 @@ vddcpu: regulator-vddcpu {
regulator-boot-on;
regulator-always-on;
};
+
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "U200";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT",
+ "SPDIFOUT IN 0", "FRDDR_A OUT 3",
+ "SPDIFOUT IN 1", "FRDDR_B OUT 3",
+ "SPDIFOUT IN 2", "FRDDR_C OUT 3";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* spdif hdmi or toslink interface */
+ dai-link-4 {
+ sound-dai = <&spdifout>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+
+ codec-1 {
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
+ };
+ };
+
+ /* spdif hdmi interface */
+ dai-link-5 {
+ sound-dai = <&spdifout_b>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-6 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
};
&cec_AO {
@@ -163,6 +256,10 @@ &cecb_AO {
hdmi-phandle = <&hdmi_tx>;
};
+&clkc_audio {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
@@ -203,6 +300,18 @@ &ethmac {
phy-mode = "rmii";
};
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
@@ -288,6 +397,28 @@ &sd_emmc_c {
vqmmc-supply = <&flash_1v8>;
};
+&spdifout {
+ pinctrl-0 = <&spdif_out_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&spdifout_b {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
--
2.25.1

33
patch/kernel/archive/meson64-5.15/0036-WIP-clk-meson-g12a-fix-hifi-pll-lock.patch Normal file
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@@ -0,0 +1,33 @@
From c5899d7604cd6da75919fed2ee041dc7e56db4a0 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Tue, 14 Apr 2020 10:45:08 +0200
Subject: [PATCH 36/58] WIP: clk: meson: g12a: fix hifi pll lock
The HIFI pll of the g12a sometimes takes a long time to report the lock in
HIFI_PLL_CNTL0 bit 31. The would eventually be reported but the delay may
be so long that the driver consider it a lock failure.
Bit 30 seems to do the same job but more quickly, let's try this instead.
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/g12a.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index a805bac93c11..c22611d3669a 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -1783,7 +1783,7 @@ static struct clk_regmap g12a_hifi_pll_dco = {
},
.l = {
.reg_off = HHI_HIFI_PLL_CNTL0,
- .shift = 31,
+ .shift = 30,
.width = 1,
},
.rst = {
--
2.25.1

202
patch/kernel/archive/meson64-5.15/0037-WIP-ASoC-hdmi-codec-reorder-channel-allocation-list.patch Normal file
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@@ -0,0 +1,202 @@
From 7af9b8917cc6ccd1a66d92a909acd06e077b6cf7 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 23 Dec 2018 02:24:38 +0100
Subject: [PATCH 37/58] WIP: ASoC: hdmi-codec: reorder channel allocation list
Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().
E.g when ELD reports FL|FR|LFE|FC|RL|RR or FL|FR|LFE|FC|RL|RR|RC|RLC|RRC
ca_id 0x01 with speaker mask FL|FR|LFE gets selected instead of
ca_id 0x03 with speaker mask FL|FR|LFE|FC for 4 channels
and
ca_id 0x04 with speaker mask FL|FR|RC gets selected instead of
ca_id 0x0b with speaker mask FL|FR|LFE|FC|RL|RR for 6 channels
Fix this by reorder the channel allocation list with
most specific speaker mask at the top.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
sound/soc/codecs/hdmi-codec.c | 140 +++++++++++++++++++---------------
1 file changed, 77 insertions(+), 63 deletions(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index 422539f933de..8f59265d2c93 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -189,84 +189,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
/*
* hdmi_codec_channel_alloc: speaker configuration available for CEA
*
- * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
+ * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps
* The preceding ones have better chances to be selected by
* hdmi_codec_get_ch_alloc_table_idx().
*/
static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
{ .ca_id = 0x00, .n_ch = 2,
- .mask = FL | FR},
- /* 2.1 */
- { .ca_id = 0x01, .n_ch = 4,
- .mask = FL | FR | LFE},
- /* Dolby Surround */
+ .mask = FL | FR },
+ { .ca_id = 0x03, .n_ch = 4,
+ .mask = FL | FR | LFE | FC },
{ .ca_id = 0x02, .n_ch = 4,
.mask = FL | FR | FC },
- /* surround51 */
+ { .ca_id = 0x01, .n_ch = 4,
+ .mask = FL | FR | LFE },
{ .ca_id = 0x0b, .n_ch = 6,
- .mask = FL | FR | LFE | FC | RL | RR},
- /* surround40 */
- { .ca_id = 0x08, .n_ch = 6,
- .mask = FL | FR | RL | RR },
- /* surround41 */
- { .ca_id = 0x09, .n_ch = 6,
- .mask = FL | FR | LFE | RL | RR },
- /* surround50 */
+ .mask = FL | FR | LFE | FC | RL | RR },
{ .ca_id = 0x0a, .n_ch = 6,
.mask = FL | FR | FC | RL | RR },
- /* 6.1 */
- { .ca_id = 0x0f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | RC },
- /* surround71 */
+ { .ca_id = 0x09, .n_ch = 6,
+ .mask = FL | FR | LFE | RL | RR },
+ { .ca_id = 0x08, .n_ch = 6,
+ .mask = FL | FR | RL | RR },
+ { .ca_id = 0x07, .n_ch = 6,
+ .mask = FL | FR | LFE | FC | RC },
+ { .ca_id = 0x06, .n_ch = 6,
+ .mask = FL | FR | FC | RC },
+ { .ca_id = 0x05, .n_ch = 6,
+ .mask = FL | FR | LFE | RC },
+ { .ca_id = 0x04, .n_ch = 6,
+ .mask = FL | FR | RC },
{ .ca_id = 0x13, .n_ch = 8,
.mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
- /* others */
- { .ca_id = 0x03, .n_ch = 8,
- .mask = FL | FR | LFE | FC },
- { .ca_id = 0x04, .n_ch = 8,
- .mask = FL | FR | RC},
- { .ca_id = 0x05, .n_ch = 8,
- .mask = FL | FR | LFE | RC },
- { .ca_id = 0x06, .n_ch = 8,
- .mask = FL | FR | FC | RC },
- { .ca_id = 0x07, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RC },
- { .ca_id = 0x0c, .n_ch = 8,
- .mask = FL | FR | RC | RL | RR },
- { .ca_id = 0x0d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RC },
- { .ca_id = 0x0e, .n_ch = 8,
- .mask = FL | FR | FC | RL | RR | RC },
- { .ca_id = 0x10, .n_ch = 8,
- .mask = FL | FR | RL | RR | RLC | RRC },
- { .ca_id = 0x11, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
{ .ca_id = 0x12, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | RLC | RRC },
- { .ca_id = 0x14, .n_ch = 8,
- .mask = FL | FR | FLC | FRC },
- { .ca_id = 0x15, .n_ch = 8,
- .mask = FL | FR | LFE | FLC | FRC },
- { .ca_id = 0x16, .n_ch = 8,
- .mask = FL | FR | FC | FLC | FRC },
- { .ca_id = 0x17, .n_ch = 8,
- .mask = FL | FR | LFE | FC | FLC | FRC },
- { .ca_id = 0x18, .n_ch = 8,
- .mask = FL | FR | RC | FLC | FRC },
- { .ca_id = 0x19, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FLC | FRC },
- { .ca_id = 0x1a, .n_ch = 8,
- .mask = FL | FR | RC | FC | FLC | FRC },
- { .ca_id = 0x1b, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FC | FLC | FRC },
- { .ca_id = 0x1c, .n_ch = 8,
- .mask = FL | FR | RL | RR | FLC | FRC },
- { .ca_id = 0x1d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | FLC | FRC },
{ .ca_id = 0x1e, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | FLC | FRC },
- { .ca_id = 0x1f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ { .ca_id = 0x11, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ { .ca_id = 0x10, .n_ch = 8,
+ .mask = FL | FR | RL | RR | RLC | RRC },
+ { .ca_id = 0x1c, .n_ch = 8,
+ .mask = FL | FR | RL | RR | FLC | FRC },
+ { .ca_id = 0x0f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | RC },
+ { .ca_id = 0x1b, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+ { .ca_id = 0x0e, .n_ch = 8,
+ .mask = FL | FR | FC | RL | RR | RC },
+ { .ca_id = 0x1a, .n_ch = 8,
+ .mask = FL | FR | RC | FC | FLC | FRC },
+ { .ca_id = 0x0d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RC },
+ { .ca_id = 0x19, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FLC | FRC },
+ { .ca_id = 0x0c, .n_ch = 8,
+ .mask = FL | FR | RC | RL | RR },
+ { .ca_id = 0x18, .n_ch = 8,
+ .mask = FL | FR | RC | FLC | FRC },
+ { .ca_id = 0x17, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | FLC | FRC },
+ { .ca_id = 0x16, .n_ch = 8,
+ .mask = FL | FR | FC | FLC | FRC },
+ { .ca_id = 0x15, .n_ch = 8,
+ .mask = FL | FR | LFE | FLC | FRC },
+ { .ca_id = 0x14, .n_ch = 8,
+ .mask = FL | FR | FLC | FRC },
+ { .ca_id = 0x0b, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR },
+ { .ca_id = 0x0a, .n_ch = 8,
+ .mask = FL | FR | FC | RL | RR },
+ { .ca_id = 0x09, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR },
+ { .ca_id = 0x08, .n_ch = 8,
+ .mask = FL | FR | RL | RR },
+ { .ca_id = 0x07, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RC },
+ { .ca_id = 0x06, .n_ch = 8,
+ .mask = FL | FR | FC | RC },
+ { .ca_id = 0x05, .n_ch = 8,
+ .mask = FL | FR | LFE | RC },
+ { .ca_id = 0x04, .n_ch = 8,
+ .mask = FL | FR | RC },
+ { .ca_id = 0x03, .n_ch = 8,
+ .mask = FL | FR | LFE | FC },
+ { .ca_id = 0x02, .n_ch = 8,
+ .mask = FL | FR | FC },
+ { .ca_id = 0x01, .n_ch = 8,
+ .mask = FL | FR | LFE },
};
struct hdmi_codec_priv {
@@ -374,7 +387,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
struct hdmi_codec_priv *hcp = info->private_data;
- map = info->chmap[hcp->chmap_idx].map;
+ if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN)
+ map = info->chmap[hcp->chmap_idx].map;
for (i = 0; i < info->max_channels; i++) {
if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
--
2.25.1

60
patch/kernel/archive/meson64-5.15/0038-WIP-ASoC-meson-aiu-encoder-spdif-implement-the-.mute.patch Normal file
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@@ -0,0 +1,60 @@
From 3c114698990fb506d478fd5dd27a3298e526ef50 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Wed, 23 Dec 2020 02:45:27 +0100
Subject: [PATCH 38/58] WIP: ASoC: meson: aiu: encoder-spdif: implement the
.mute_stream callback
Implement the .mute_stream callback based on code from the vendor
driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
sound/soc/meson/aiu-encoder-spdif.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/sound/soc/meson/aiu-encoder-spdif.c b/sound/soc/meson/aiu-encoder-spdif.c
index de850913975f..5c42a784cee4 100644
--- a/sound/soc/meson/aiu-encoder-spdif.c
+++ b/sound/soc/meson/aiu-encoder-spdif.c
@@ -19,6 +19,8 @@
#define AIU_958_MISC_U_FROM_STREAM BIT(12)
#define AIU_958_MISC_FORCE_LR BIT(13)
#define AIU_958_CTRL_HOLD_EN BIT(0)
+#define AIU_958_CTRL_MUTE_RIGHT_SPEAKER BIT(3)
+#define AIU_958_CTRL_MUTE_LEFT_SPEAKER BIT(4)
#define AIU_CLK_CTRL_958_DIV_EN BIT(1)
#define AIU_CLK_CTRL_958_DIV GENMASK(5, 4)
#define AIU_CLK_CTRL_958_DIV_MORE BIT(12)
@@ -200,10 +202,29 @@ static void aiu_encoder_spdif_shutdown(struct snd_pcm_substream *substream,
clk_bulk_disable_unprepare(aiu->spdif.clk_num, aiu->spdif.clks);
}
+static int aiu_encoder_spdif_mute_stream(struct snd_soc_dai *dai, int mute,
+ int stream)
+{
+ struct snd_soc_component *component = dai->component;
+ u32 value = 0;
+
+ if (mute)
+ value = AIU_958_CTRL_MUTE_RIGHT_SPEAKER |
+ AIU_958_CTRL_MUTE_LEFT_SPEAKER;
+
+ snd_soc_component_update_bits(component, AIU_958_CTRL,
+ AIU_958_CTRL_MUTE_RIGHT_SPEAKER |
+ AIU_958_CTRL_MUTE_LEFT_SPEAKER,
+ value);
+
+ return 0;
+}
+
const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops = {
.trigger = aiu_encoder_spdif_trigger,
.hw_params = aiu_encoder_spdif_hw_params,
.hw_free = aiu_encoder_spdif_hw_free,
.startup = aiu_encoder_spdif_startup,
.shutdown = aiu_encoder_spdif_shutdown,
+ .mute_stream = aiu_encoder_spdif_mute_stream,
};
--
2.25.1

69
patch/kernel/archive/meson64-5.15/0039-WIP-ASoC-meson-aiu-encoder-i2s-implement-the-.mute_s.patch Normal file
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@@ -0,0 +1,69 @@
From 8cfc53316641c6df99e9d19c241df99237d55685 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Wed, 23 Dec 2020 02:46:54 +0100
Subject: [PATCH 39/58] WIP: ASoC: meson: aiu: encoder-i2s: implement the
.mute_stream callback
Implement the .mute_stream callback based on the code from the vendor
driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
sound/soc/meson/aiu-encoder-i2s.c | 15 +++++++++++++++
sound/soc/meson/aiu.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/sound/soc/meson/aiu-encoder-i2s.c b/sound/soc/meson/aiu-encoder-i2s.c
index 932224552146..d6aea7797641 100644
--- a/sound/soc/meson/aiu-encoder-i2s.c
+++ b/sound/soc/meson/aiu-encoder-i2s.c
@@ -28,6 +28,8 @@
#define AIU_CLK_CTRL_MORE_I2S_DIV GENMASK(5, 0)
#define AIU_CODEC_DAC_LRCLK_CTRL_DIV GENMASK(11, 0)
+#define AIU_I2S_MUTE_SWAP_MUTE GENMASK(15, 8)
+
static void aiu_encoder_i2s_divider_enable(struct snd_soc_component *component,
bool enable)
{
@@ -352,6 +354,18 @@ static void aiu_encoder_i2s_shutdown(struct snd_pcm_substream *substream,
clk_bulk_disable_unprepare(aiu->i2s.clk_num, aiu->i2s.clks);
}
+static int aiu_encoder_i2s_mute_stream(struct snd_soc_dai *dai, int mute,
+ int stream)
+{
+ struct snd_soc_component *component = dai->component;
+
+ snd_soc_component_update_bits(component, AIU_I2S_MUTE_SWAP,
+ AIU_I2S_MUTE_SWAP_MUTE,
+ mute ? AIU_I2S_MUTE_SWAP_MUTE : 0);
+
+ return 0;
+}
+
const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops = {
.trigger = aiu_encoder_i2s_trigger,
.hw_params = aiu_encoder_i2s_hw_params,
@@ -360,5 +374,6 @@ const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops = {
.set_sysclk = aiu_encoder_i2s_set_sysclk,
.startup = aiu_encoder_i2s_startup,
.shutdown = aiu_encoder_i2s_shutdown,
+ .mute_stream = aiu_encoder_i2s_mute_stream,
};
diff --git a/sound/soc/meson/aiu.h b/sound/soc/meson/aiu.h
index 393b6c2307e4..7884c50f244d 100644
--- a/sound/soc/meson/aiu.h
+++ b/sound/soc/meson/aiu.h
@@ -66,6 +66,7 @@ extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops;
#define AIU_958_CHSTAT_L0 0x020
#define AIU_958_CHSTAT_L1 0x024
#define AIU_958_CTRL 0x028
+#define AIU_I2S_MUTE_SWAP 0x030
#define AIU_I2S_SOURCE_DESC 0x034
#define AIU_I2S_DAC_CFG 0x040
#define AIU_I2S_SYNC 0x044
--
2.25.1

59
patch/kernel/archive/meson64-5.15/0040-WIP-mmc-meson-gx-mmc-set-core-clock-phase-to-270-deg.patch Normal file
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@@ -0,0 +1,59 @@
From 7d0a1b039aafd09bbee5007422c987e3effb1741 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 14 Jan 2021 17:43:02 +0100
Subject: [PATCH 40/58] WIP: mmc: meson-gx-mmc: set core clock phase to 270
degres for AXG compatible controllers
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/mmc/host/meson-gx-mmc.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index eb6c02bc4a02..3f835f73adf8 100644
--- a/drivers/mmc/host/meson-gx-mmc.c
+++ b/drivers/mmc/host/meson-gx-mmc.c
@@ -38,6 +38,7 @@
#define CLK_RX_PHASE_MASK GENMASK(13, 12)
#define CLK_PHASE_0 0
#define CLK_PHASE_180 2
+#define CLK_PHASE_270 3
#define CLK_V2_TX_DELAY_MASK GENMASK(19, 16)
#define CLK_V2_RX_DELAY_MASK GENMASK(23, 20)
#define CLK_V2_ALWAYS_ON BIT(24)
@@ -136,6 +137,7 @@ struct meson_mmc_data {
unsigned int rx_delay_mask;
unsigned int always_on;
unsigned int adjust;
+ unsigned int clk_core_phase;
};
struct sd_emmc_desc {
@@ -421,7 +423,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
clk_reg = CLK_ALWAYS_ON(host);
clk_reg |= CLK_DIV_MASK;
- clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);
+ clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, host->data->clk_core_phase);
clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);
clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
writel(clk_reg, host->regs + SD_EMMC_CLOCK);
@@ -1247,6 +1249,7 @@ static const struct meson_mmc_data meson_gx_data = {
.rx_delay_mask = CLK_V2_RX_DELAY_MASK,
.always_on = CLK_V2_ALWAYS_ON,
.adjust = SD_EMMC_ADJUST,
+ .clk_core_phase = CLK_PHASE_180,
};
static const struct meson_mmc_data meson_axg_data = {
@@ -1254,6 +1257,7 @@ static const struct meson_mmc_data meson_axg_data = {
.rx_delay_mask = CLK_V3_RX_DELAY_MASK,
.always_on = CLK_V3_ALWAYS_ON,
.adjust = SD_EMMC_V3_ADJUST,
+ .clk_core_phase = CLK_PHASE_270,
};
static const struct of_device_id meson_mmc_of_match[] = {
--
2.25.1

33
patch/kernel/archive/meson64-5.15/0041-arm64-dts-meson-add-sd-uhs-modes-to-ODROID-N2-N2.patch Normal file
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@@ -0,0 +1,33 @@
From b78360135c312a57c2b5e6b6866d9d75fd0dad90 Mon Sep 17 00:00:00 2001
From: Chang-Kon Kim <changkon12@gmail.com>
Date: Sun, 21 Feb 2021 05:51:27 +0000
Subject: [PATCH 41/58] arm64: dts: meson: add sd-uhs modes to ODROID-N2/N2+
Increase max-frequency to 200000000 and add sd-uhs modes to the
SD card node in the ODROID N2/N2+ common dtsi.
Signed-off-by: Chang-Kon Kim <changkon12@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 58ce569b2ace..5c70935a583e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -517,7 +517,11 @@ &sd_emmc_b {
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ max-frequency = <200000000>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
--
2.25.1

30
patch/kernel/archive/meson64-5.15/0043-arm64-dts-meson-add-saradc-node-to-ODROID-N2-N2.patch Normal file
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@@ -0,0 +1,30 @@
From e9d4f3e314399e72271c2a4c98fd71a16dc117b1 Mon Sep 17 00:00:00 2001
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Sun, 21 Feb 2021 06:03:20 +0000
Subject: [PATCH 43/58] arm64: dts: meson: add saradc node to ODROID N2/N2+
Add the meson saradc node to the ODROID N2/N2+ common dtsi.
Signed-off-by: Hyeonki Hong <hhk7734@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index ac396067911d..f71d012e5460 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -553,6 +553,10 @@ &pwm_AO_cd {
status = "okay";
};
+&saradc {
+ status = "okay";
+};
+
/* SD card */
&sd_emmc_b {
status = "okay";
--
2.25.1

369
patch/kernel/archive/meson64-5.15/0046-ODROID-COMMON-pwm-gpio-Add-a-generic-gpio-based-PWM-.patch Normal file
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@@ -0,0 +1,369 @@
From 6b8539046586e0d420e7f310df2da69b4a13d19f Mon Sep 17 00:00:00 2001
From: Kevin Kim <ckkim@hardkernel.com>
Date: Wed, 16 Jan 2019 14:45:10 +0900
Subject: [PATCH 46/75] ODROID-COMMON: pwm: gpio: Add a generic gpio based PWM
driver
From: Olliver Schinagl <oliver@schinagl.nl>
This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
to allow nano-second resolution, though it obviously strongly depends on
the switching speed of the gpio pins, hrtimer and system load.
Each pwm node can have 1 or more "pwm-gpio" entries, which will be
treated as pwm's as part of a pwm chip.
Change-Id: Idd42bf6d79f8ce52275a15965b02af470f28da7c
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
---
.../devicetree/bindings/pwm/pwm-gpio.txt | 18 ++
MAINTAINERS | 5 +
drivers/pwm/Kconfig | 15 ++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-gpio.c | 255 ++++++++++++++++++
5 files changed, 294 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-gpio.txt
create mode 100644 drivers/pwm/pwm-gpio.c
diff --git a/Documentation/devicetree/bindings/pwm/pwm-gpio.txt b/Documentation/devicetree/bindings/pwm/pwm-gpio.txt
new file mode 100644
index 000000000000..336f61faa446
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-gpio.txt
@@ -0,0 +1,18 @@
+Generic GPIO bit-banged PWM driver
+
+Required properties:
+ - compatible: should be "pwm-gpio"
+ - #pwm-cells: should be 3, see pwm.txt in this directory for a general
+ description of the cells format.
+ - pwm-gpios: one or more gpios describing the used gpio, see the gpio
+ bindings for the used gpio driver.
+
+Example:
+#include <dt-bindings/gpio/gpio.h>
+
+ pwm: pwm@0 {
+ compatible = "pwm-gpio";
+ #pwm-cells = 3;
+ pwm-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
+ pwm-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 3b79fd441dde..99f6ccfe48ad 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7825,6 +7825,11 @@ F: Documentation/i2c/muxes/i2c-mux-gpio.rst
F: drivers/i2c/muxes/i2c-mux-gpio.c
F: include/linux/platform_data/i2c-mux-gpio.h
+GENERIC GPIO PWM DRIVER
+M: Olliver Schinagl <oliver@schinagl.nl>
+S: Maintained
+F: drivers/pwm/pwm-gpio.c
+
GENERIC HDLC (WAN) DRIVERS
M: Krzysztof Halasa <khc@pm.waw.pl>
S: Maintained
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index aa29841bbb79..9100da8ef27a 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -195,6 +195,21 @@ config PWM_FSL_FTM
To compile this driver as a module, choose M here: the module
will be called pwm-fsl-ftm.
+config PWM_GPIO
+ tristate "Generic GPIO bit-banged PWM driver"
+ depends on OF
+ depends on GPIOLIB
+ help
+ Some platforms do not offer any hardware PWM capabilities but do have
+ General Purpose Input Output (GPIO) pins available. Using the kernels
+ High-Resolution Timer API this driver tries to toggle GPIO using the
+ generic kernel PWM framework. The maximum frequency and/or accuracy
+ is dependent on several factors such as system load and the maximum
+ speed a pin can be toggled at the hardware.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pwm-gpio.
+
config PWM_HIBVT
tristate "HiSilicon BVT PWM support"
depends on ARCH_HISI || COMPILE_TEST
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 708840b7fba8..f190bbc3af8d 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_PWM_CROS_EC) += pwm-cros-ec.o
obj-$(CONFIG_PWM_DWC) += pwm-dwc.o
obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o
obj-$(CONFIG_PWM_FSL_FTM) += pwm-fsl-ftm.o
+obj-$(CONFIG_PWM_GPIO) += pwm-gpio.o
obj-$(CONFIG_PWM_HIBVT) += pwm-hibvt.o
obj-$(CONFIG_PWM_IMG) += pwm-img.o
obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o
diff --git a/drivers/pwm/pwm-gpio.c b/drivers/pwm/pwm-gpio.c
new file mode 100644
index 000000000000..6707a5dbe5fb
--- /dev/null
+++ b/drivers/pwm/pwm-gpio.c
@@ -0,0 +1,255 @@
+/*
+ * Copyright (c) 2015 Olliver Schinagl <oliver@schinagl.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This driver adds a high-resolution timer based PWM driver. Since this is a
+ * bit-banged driver, accuracy will always depend on a lot of factors, such as
+ * GPIO toggle speed and system load.
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/property.h>
+#include <linux/pwm.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
+#include <linux/ktime.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#define DRV_NAME "pwm-gpio"
+
+struct gpio_pwm_data {
+ struct hrtimer timer;
+ struct gpio_desc *gpiod;
+ bool polarity;
+ bool pin_on;
+ int on_time;
+ int off_time;
+ bool run;
+};
+
+struct gpio_pwm_chip {
+ struct pwm_chip chip;
+};
+
+static void gpio_pwm_off(struct gpio_pwm_data *gpio_data)
+{
+ gpiod_set_value_cansleep(gpio_data->gpiod, gpio_data->polarity ? 0 : 1);
+}
+
+static void gpio_pwm_on(struct gpio_pwm_data *gpio_data)
+{
+ gpiod_set_value_cansleep(gpio_data->gpiod, gpio_data->polarity ? 1 : 0);
+}
+
+enum hrtimer_restart gpio_pwm_timer(struct hrtimer *timer)
+{
+ struct gpio_pwm_data *gpio_data = container_of(timer,
+ struct gpio_pwm_data,
+ timer);
+ if (!gpio_data->run) {
+ gpio_pwm_off(gpio_data);
+ gpio_data->pin_on = false;
+ return HRTIMER_NORESTART;
+ }
+
+ if (!gpio_data->pin_on) {
+ hrtimer_forward_now(&gpio_data->timer,
+ ns_to_ktime(gpio_data->on_time));
+ gpio_pwm_on(gpio_data);
+ gpio_data->pin_on = true;
+ } else {
+ hrtimer_forward_now(&gpio_data->timer,
+ ns_to_ktime(gpio_data->off_time));
+ gpio_pwm_off(gpio_data);
+ gpio_data->pin_on = false;
+ }
+
+ return HRTIMER_RESTART;
+}
+
+static int gpio_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
+ int duty_ns, int period_ns)
+{
+ struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm);
+
+ gpio_data->on_time = duty_ns;
+ gpio_data->off_time = period_ns - duty_ns;
+
+ return 0;
+}
+
+static int gpio_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
+ enum pwm_polarity polarity)
+{
+ struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm);
+
+ gpio_data->polarity = (polarity != PWM_POLARITY_NORMAL) ? true : false;
+
+ return 0;
+}
+
+static int gpio_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm);
+
+ if (gpio_data->run)
+ return -EBUSY;
+
+ gpio_data->run = true;
+ if (gpio_data->off_time) {
+ hrtimer_start(&gpio_data->timer, ktime_set(0, 0),
+ HRTIMER_MODE_REL);
+ } else {
+ if (gpio_data->on_time)
+ gpio_pwm_on(gpio_data);
+ else
+ gpio_pwm_off(gpio_data);
+ }
+
+ return 0;
+}
+
+static void gpio_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct gpio_pwm_data *gpio_data = pwm_get_chip_data(pwm);
+
+ gpio_data->run = false;
+ if (!gpio_data->off_time)
+ gpio_pwm_off(gpio_data);
+}
+
+static const struct pwm_ops gpio_pwm_ops = {
+ .config = gpio_pwm_config,
+ .set_polarity = gpio_pwm_set_polarity,
+ .enable = gpio_pwm_enable,
+ .disable = gpio_pwm_disable,
+ .owner = THIS_MODULE,
+};
+
+static int gpio_pwm_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct gpio_pwm_chip *gpio_chip;
+ int npwm, i;
+ int hrtimer = 0;
+
+ npwm = of_gpio_named_count(pdev->dev.of_node, "pwm-gpios");
+ if (npwm < 1)
+ return -ENODEV;
+
+ gpio_chip = devm_kzalloc(&pdev->dev, sizeof(*gpio_chip), GFP_KERNEL);
+ if (!gpio_chip)
+ return -ENOMEM;
+
+ gpio_chip->chip.dev = &pdev->dev;
+ gpio_chip->chip.ops = &gpio_pwm_ops;
+ gpio_chip->chip.base = -1;
+ gpio_chip->chip.npwm = npwm;
+ gpio_chip->chip.of_xlate = of_pwm_xlate_with_flags;
+ gpio_chip->chip.of_pwm_n_cells = 3;
+
+ ret = pwmchip_add(&gpio_chip->chip);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
+ return ret;
+ }
+
+ for (i = 0; i < npwm; i++) {
+ struct gpio_desc *gpiod;
+ struct gpio_pwm_data *gpio_data;
+
+ gpiod = devm_gpiod_get_index(&pdev->dev, "pwm", i,
+ GPIOD_OUT_LOW);
+ if (IS_ERR(gpiod)) {
+ int error;
+
+ error = PTR_ERR(gpiod);
+ if (error != -EPROBE_DEFER)
+ dev_err(&pdev->dev,
+ "failed to get gpio flags, error: %d\n",
+ error);
+ return error;
+ }
+
+ gpio_data = devm_kzalloc(&pdev->dev, sizeof(*gpio_data),
+ GFP_KERNEL);
+
+ hrtimer_init(&gpio_data->timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ gpio_data->timer.function = &gpio_pwm_timer;
+ gpio_data->gpiod = gpiod;
+ gpio_data->pin_on = false;
+ gpio_data->run = false;
+
+ if (hrtimer_is_hres_active(&gpio_data->timer))
+ hrtimer++;
+
+ pwm_set_chip_data(&gpio_chip->chip.pwms[i], gpio_data);
+ }
+ if (!hrtimer) {
+ dev_warn(&pdev->dev, "unable to use High-Resolution timer,");
+ dev_warn(&pdev->dev, "%s is restricted to low resolution.",
+ DRV_NAME);
+ }
+
+ platform_set_drvdata(pdev, gpio_chip);
+
+ dev_info(&pdev->dev, "%d gpio pwms loaded\n", npwm);
+
+ return 0;
+}
+
+static int gpio_pwm_remove(struct platform_device *pdev)
+{
+ struct gpio_pwm_chip *gpio_chip;
+ int i;
+
+ gpio_chip = platform_get_drvdata(pdev);
+ for (i = 0; i < gpio_chip->chip.npwm; i++) {
+ struct gpio_pwm_data *gpio_data;
+
+ gpio_data = pwm_get_chip_data(&gpio_chip->chip.pwms[i]);
+
+ hrtimer_cancel(&gpio_data->timer);
+ }
+
+ pwmchip_remove(&gpio_chip->chip);
+
+ return 0;
+}
+
+static const struct of_device_id gpio_pwm_of_match[] = {
+ { .compatible = DRV_NAME, },
+ {/* sentinel */},
+};
+MODULE_DEVICE_TABLE(of, gpio_pwm_of_match);
+
+static struct platform_driver gpio_pwm_driver = {
+ .probe = gpio_pwm_probe,
+ .remove = gpio_pwm_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .of_match_table = of_match_ptr(gpio_pwm_of_match),
+ },
+};
+module_platform_driver(gpio_pwm_driver);
+
+MODULE_AUTHOR("Olliver Schinagl <oliver@schinagl.nl>");
+MODULE_DESCRIPTION("Generic GPIO bit-banged PWM driver");
+MODULE_LICENSE("GPL");
--
2.25.1

322
patch/kernel/archive/meson64-5.15/0047-arm64-dts-meson-add-common-SM1-ac2xx-dtsi.patch Normal file
View File

@@ -0,0 +1,322 @@
From 7b0f6b008e5167351fc32a759de75d58026f1011 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 24 Jun 2020 12:41:46 +0000
Subject: [PATCH 47/58] arm64: dts: meson: add common SM1 ac2xx dtsi
Add a common dtsi for Android STB devices based on the Amlogic S905X3
(AC213/AC214) and S905D3 (AC201/AC202) reference designs. The dtsi is
loosely based on the existing SEI610 device-tree.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-sm1-ac2xx.dtsi | 298 ++++++++++++++++++
1 file changed, 298 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
new file mode 100644
index 000000000000..b3872983b5ce
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ *
+ * AC200/AC202 = S905D3
+ * AC213/AC214 = S905X3
+ *
+ */
+
+#include "meson-sm1.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = &ethmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ dc_in: regulator-dc_in {
+ compatible = "regulator-fixed";
+ regulator-name = "DC_IN";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ emmc_1v8: regulator-emmc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "EMMC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ vddcpu: regulator-vddcpu {
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU";
+ regulator-min-microvolt = <690000>;
+ regulator-max-microvolt = <1050000>;
+
+ vin-supply = <&dc_in>;
+
+ pwms = <&pwm_AO_cd 1 1500 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddio_ao1v8: regulator-vddio_ao1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU1_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu2 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU2_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu3 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU3_CLK>;
+ clock-latency = <50000>;
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+ pinctrl-0 = <&pwm_ao_a_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddio_ao1v8>;
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddio_ao1v8>;
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&emmc_1v8>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "otg";
+};
--
2.25.1

309
patch/kernel/archive/meson64-5.15/0049-arm64-dts-meson-add-initial-device-trees-for-X96-AIR.patch Normal file
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@@ -0,0 +1,309 @@
From bfa1583bbbd778a6ceb918bdd24b166bfa91ee34 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 24 Jun 2020 15:04:10 +0000
Subject: [PATCH 49/58] arm64: dts: meson: add initial device-trees for X96-AIR
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The Amediatek X96-AIR is based on Amlogic S905X3 reference board
designs and ships in multiple configurations:
– 4GB DDR3 + 64GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
– 4GB DDR3 + 32GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
– 4GB DDR3 + 32GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
– 2GB DDR3 + 16GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
...
- HDMI 2.1 video
- S/PDIF optical output
- AV output
- 2x USB 2.0 inc. OTG port
- 1x USB 3.0 port
- IR receiver
- 1x micro SD card slot (internal)
- 1x Reset/Update button (in AV jack)
- 7-segment VFD
The device-tree with -100 suffix supports models with 10/100 Ethernet
and with -1000 suffix supports models with Gigabit Ethernet.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 2 +
.../dts/amlogic/meson-sm1-x96-air-100.dts | 112 +++++++++++++++
.../dts/amlogic/meson-sm1-x96-air-1000.dts | 133 ++++++++++++++++++
3 files changed, 247 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index da11ef28a47b..5de47ce6d8a4 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -51,4 +51,6 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-100.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-1000.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
new file mode 100644
index 000000000000..54a765c1948b
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-100.dts
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-ac2xx.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "amediatech,x96-air-100", "amlogic,sm1";
+ model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "X96-AIR";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&ethmac {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "rmii";
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&ir {
+ linux,rc-map-name = "rc-beelink-gs1";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
new file mode 100644
index 000000000000..8047c6b116fe
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-1000.dts
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-ac2xx.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "amediatech,x96-air-1000", "amlogic,sm1";
+ model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "X96-AIR";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&ethmac {
+ status = "okay";
+
+ pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ phy-mode = "rgmii-txid";
+ phy-handle = <&external_phy>;
+
+ rx-internal-delay-ps = <800>;
+};
+
+&ext_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_14 */
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&ir {
+ linux,rc-map-name = "rc-x96max";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
--
2.25.1

304
patch/kernel/archive/meson64-5.15/0051-arm64-dts-meson-add-initial-device-trees-for-A95XF3-.patch Normal file
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@@ -0,0 +1,304 @@
From 9f465b038eb937d9bc4b8c9c23162b20824021a5 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 3 Jun 2020 18:03:22 +0000
Subject: [PATCH 51/58] arm64: dts: meson: add initial device-trees for
A95XF3-AIR
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The CYX A95XF3-AIR is based on Amlogic S905X3 reference board
designs and ships in multiple configurations:
– 4GB DDR3 + 64GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
– 4GB DDR3 + 32GB eMMC + WiFi a/b/g/n/ac + BT + Gb Ethernet
– 2GB DDR3 + 16GB eMMC + WiFi b/g/n (no BT) + 10/100 Ethernet
...
- HDMI 2.1 video
- S/PDIF optical output
- AV output
- 1x USB 2.0 OTG port
- 1x USB 3.0 port
- IR receiver
- 1x micro SD card slot (internal)
- 1x Reset/Update button (in AV jack)
- 7-segment VFD
- Multicolour case LED 'arc'
The device-tree with -100 suffix supports models with 10/100 Ethernet
and with -1000 suffix supports models with Gigabit Ethernet.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 2 +
.../dts/amlogic/meson-sm1-a95xf3-air-100.dts | 108 +++++++++++++++
.../dts/amlogic/meson-sm1-a95xf3-air-1000.dts | 129 ++++++++++++++++++
3 files changed, 239 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 5de47ce6d8a4..47a9d1f85596 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -46,6 +46,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-100.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-1000.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
new file mode 100644
index 000000000000..1d3820c4a2f5
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-100.dts
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-ac2xx.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "cyx,a95xf3-air-100", "amlogic,sm1";
+ model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "A95XF3-AIR";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&ethmac {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "rmii";
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
new file mode 100644
index 000000000000..c87d948fa3e6
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-1000.dts
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-ac2xx.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "cyx,a95xf3-air-1000", "amlogic,sm1";
+ model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "A95XF3-AIR";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&ethmac {
+ status = "okay";
+
+ pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ phy-mode = "rgmii-txid";
+ phy-handle = <&external_phy>;
+
+ rx-internal-delay-ps = <800>;
+};
+
+&ext_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_14 */
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
--
2.25.1

29
patch/kernel/archive/meson64-5.15/0052-dt-bindings-vendor-prefixes-add-haochuangyi-prefix.patch Normal file
View File

@@ -0,0 +1,29 @@
From 559161b51f5b05553a46c7c9907bfc374db5200b Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 12 Jan 2021 17:24:07 +0000
Subject: [PATCH 52/58] dt-bindings: vendor-prefixes: add haochuangyi prefix
Shenzhen Haochuangyi Technology Co.,Ltd are a manufcaturer of Android
Set-Top Box devices.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index f6064d84a424..b0b4857b7ae8 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -455,6 +455,8 @@ patternProperties:
deprecated: true
"^hannstar,.*":
description: HannStar Display Corporation
+ "^haochuangyi,.*":
+ description: Shenzhen Haochuangyi Technology Co.,Ltd
"^haoyu,.*":
description: Haoyu Microelectronic Co. Ltd.
"^hardkernel,.*":
--
2.25.1

194
patch/kernel/archive/meson64-5.15/0054-arm64-dts-meson-add-initial-device-tree-for-H96-Max.patch Normal file
View File

@@ -0,0 +1,194 @@
From 695ce53e74edb9760b08c60a7fb5221e5a8733cf Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 12 Jan 2021 17:26:42 +0000
Subject: [PATCH 54/58] arm64: dts: meson: add initial device-tree for H96-Max
The Haochuangyi H96-Max is based on the Amlogic S905X3 reference
design with the following specs:
- 4GB DDR4 RAM
- 32/64/128GB eMMC
- HDMI 2.1 video
- S/PDIF optical output
- AV output
- 10/100/1000 Base-T Ethernet
- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
- 1x USB 2.0 OTG port
- 1x USB 3.0 port
- IR receiver
- 1x micro SD card slot (internal)
- 1x Reset/Update button (in AV jack)
- 7-segment VFD
Tested-by: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../boot/dts/amlogic/meson-sm1-h96-max.dts | 145 ++++++++++++++++++
2 files changed, 146 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 47a9d1f85596..7dd039173ef0 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -49,4 +49,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-100.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-1000.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
new file mode 100644
index 000000000000..0f6660e68e72
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre SAS. All rights reserved.
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-ac2xx.dtsi"
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "haochuangyi,h96-max", "amlogic,sm1";
+ model = "Shenzhen Haochuangyi Technology Co., Ltd H96 Max";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "H96-MAX";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&ethmac {
+ status = "okay";
+
+ pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ phy-mode = "rgmii-txid";
+ phy-handle = <&external_phy>;
+
+ rx-internal-delay-ps = <800>;
+};
+
+&ext_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_14 */
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
+&uart_A {
+ status = "okay";
+
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
--
2.25.1

40
patch/kernel/archive/meson64-5.15/0055-HACK-media-cec-silence-CEC-timeout-message.patch Normal file
View File

@@ -0,0 +1,40 @@
From 03bfb3f6a703d7671508b698c5a552d0a0e0197b Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 7 Jan 2020 07:12:47 +0000
Subject: [PATCH 055/101] HACK: media: cec: silence CEC timeout message
If testing with an AVR that does not pass-through CEC state the system
log fills with timeout messages. Silence this to stop the log rotation
and ensure other issues are visible.
[ 42.718009] cec-meson_ao_cec: message ff 84 50 00 01 timed out
[ 45.021994] cec-meson_ao_cec: message ff 87 00 15 82 timed out
[ 47.325965] cec-meson_ao_cec: message 10 timed out
[ 49.630023] cec-meson_ao_cec: message 10 timed out
[ 51.933960] cec-meson_ao_cec: message 10 timed out
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/media/cec/core/cec-adap.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/media/cec/core/cec-adap.c b/drivers/media/cec/core/cec-adap.c
index 6c95dc471d4c..8613cc93eb93 100644
--- a/drivers/media/cec/core/cec-adap.c
+++ b/drivers/media/cec/core/cec-adap.c
@@ -510,9 +510,9 @@ int cec_thread_func(void *_adap)
* unable to transmit for CEC_XFER_TIMEOUT_MS (2.1s).
*/
if (adap->transmitting) {
- pr_warn("cec-%s: message %*ph timed out\n", adap->name,
- adap->transmitting->msg.len,
- adap->transmitting->msg.msg);
+ //pr_warn("cec-%s: message %*ph timed out\n", adap->name,
+ // adap->transmitting->msg.len,
+ // adap->transmitting->msg.msg);
/* Just give up on this. */
cec_data_cancel(adap->transmitting,
CEC_TX_STATUS_TIMEOUT);
--
2.17.1

29
patch/kernel/archive/meson64-5.15/0055-dt-bindings-arm-amlogic-add-support-for-the-Tanix-TX.patch Normal file
View File

@@ -0,0 +1,29 @@
From 6e61f9d59b12ccba2bf51dd41278dfe03f470b92 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 29 Feb 2020 15:13:02 +0000
Subject: [PATCH 55/58] dt-bindings: arm: amlogic: add support for the Tanix
TX5 Max
The Oranth (Tanix) TX5 Max is based on the Amlogic U200 reference
board with an S905X2 chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 455cdd951c6e..e8aec4b53553 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -140,6 +140,7 @@ properties:
- amediatech,x96-max
- amlogic,u200
- seirobotics,sei510
+ - oranth,tx5-max
- const: amlogic,g12a
- description: Boards with the Amlogic Meson G12B A311D SoC
--
2.25.1

112
patch/kernel/archive/meson64-5.15/0056-HACK-revert-mm-emit-tracepoint-when-RSS-changes.patch.disabled Normal file
View File

@@ -0,0 +1,112 @@
From 4430c1295e48c617757c1293b1b3457928162ab9 Mon Sep 17 00:00:00 2001
From: chewitt <christianshewitt@gmail.com>
Date: Thu, 12 Dec 2019 13:48:45 +0000
Subject: [PATCH 056/101] HACK: revert mm: emit tracepoint when RSS changes
---
include/linux/mm.h | 14 +++-----------
include/trace/events/kmem.h | 28 ----------------------------
mm/memory.c | 6 ------
3 files changed, 3 insertions(+), 45 deletions(-)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index c54fb96cb1e6..db55e0dea9a5 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1629,27 +1629,19 @@ static inline unsigned long get_mm_counter(struct mm_struct *mm, int member)
return (unsigned long)val;
}
-void mm_trace_rss_stat(struct mm_struct *mm, int member, long count);
-
static inline void add_mm_counter(struct mm_struct *mm, int member, long value)
{
- long count = atomic_long_add_return(value, &mm->rss_stat.count[member]);
-
- mm_trace_rss_stat(mm, member, count);
+ atomic_long_add(value, &mm->rss_stat.count[member]);
}
static inline void inc_mm_counter(struct mm_struct *mm, int member)
{
- long count = atomic_long_inc_return(&mm->rss_stat.count[member]);
-
- mm_trace_rss_stat(mm, member, count);
+ atomic_long_inc(&mm->rss_stat.count[member]);
}
static inline void dec_mm_counter(struct mm_struct *mm, int member)
{
- long count = atomic_long_dec_return(&mm->rss_stat.count[member]);
-
- mm_trace_rss_stat(mm, member, count);
+ atomic_long_dec(&mm->rss_stat.count[member]);
}
/* Optimized variant when page is already known not to be PageAnon */
diff --git a/include/trace/events/kmem.h b/include/trace/events/kmem.h
index f65b1f6db22d..788e049f899c 100644
--- a/include/trace/events/kmem.h
+++ b/include/trace/events/kmem.h
@@ -335,34 +335,6 @@ static unsigned int __maybe_unused mm_ptr_to_hash(const void *ptr)
#define __PTR_TO_HASHVAL
#endif
-TRACE_EVENT(rss_stat,
-
- TP_PROTO(struct mm_struct *mm,
- int member,
- long count),
-
- TP_ARGS(mm, member, count),
-
- TP_STRUCT__entry(
- __field(unsigned int, mm_id)
- __field(unsigned int, curr)
- __field(int, member)
- __field(long, size)
- ),
-
- TP_fast_assign(
- __entry->mm_id = mm_ptr_to_hash(mm);
- __entry->curr = !!(current->mm == mm);
- __entry->member = member;
- __entry->size = (count << PAGE_SHIFT);
- ),
-
- TP_printk("mm_id=%u curr=%d member=%d size=%ldB",
- __entry->mm_id,
- __entry->curr,
- __entry->member,
- __entry->size)
- );
#endif /* _TRACE_KMEM_H */
/* This part must be outside protection */
diff --git a/mm/memory.c b/mm/memory.c
index e8bfdf0d9d1d..889bfbb49e19 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -72,8 +72,6 @@
#include <linux/oom.h>
#include <linux/numa.h>
-#include <trace/events/kmem.h>
-
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>
@@ -154,10 +152,6 @@ static int __init init_zero_pfn(void)
}
core_initcall(init_zero_pfn);
-void mm_trace_rss_stat(struct mm_struct *mm, int member, long count)
-{
- trace_rss_stat(mm, member, count);
-}
#if defined(SPLIT_RSS_COUNTING)
--
2.17.1

528
patch/kernel/archive/meson64-5.15/0056-arm64-dts-meson-add-support-for-the-Tanix-TX5-Max.patch Normal file
View File

@@ -0,0 +1,528 @@
From 10f56e851df75361f15f37aac326fc1eeea68533 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 20 Oct 2019 04:06:59 +0000
Subject: [PATCH 56/58] arm64: dts: meson: add support for the Tanix TX5 Max
The Tanix TX5 Max is based on the Amlogic U200 reference design
using the S905X2 chipset. Hardware specification:
- 4GB LPDDR4 RAM
- 32GB eMMC storage
- 10/100/1000 Base-T Ethernet using External RGMII PHY
- 802.11 a/b/g/b/ac + BT 4.1 sdio wireless
- HDMI 2.0 (4k@60p) video
- Composite video + 2-channel audio output on 3.5mm jack
- S/PDIF audio output
- 1x USB 3.0
- 1x USB 2.0
- 1x micro SD card slot
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../dts/amlogic/meson-g12a-tanix-tx5max.dts | 481 ++++++++++++++++++
2 files changed, 482 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 7dd039173ef0..7d8586c718a1 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12a-tanix-tx5max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
new file mode 100644
index 000000000000..0e55427ca398
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-tanix-tx5max.dts
@@ -0,0 +1,481 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-g12a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "oranth,tx5-max", "amlogic,g12a";
+ model = "Tanix TX5 Max";
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = &ethmac;
+ };
+
+ spdif_dit: audio-codec-1 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ cvbs-connector {
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ flash_1v8: regulator-flash_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "FLASH_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ dc_in: regulator-dc_in {
+ compatible = "regulator-fixed";
+ regulator-name = "DC_IN";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ vcc_5v: regulator-vcc_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_in>;
+
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
+ enable-active-low;
+ };
+
+ vddao_1v8: regulator-vddao_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ vddcpu: regulator-vddcpu {
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+
+ vin-supply = <&dc_in>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "TANIX-TX5MAX";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT",
+ "SPDIFOUT IN 0", "FRDDR_A OUT 3",
+ "SPDIFOUT IN 1", "FRDDR_B OUT 3",
+ "SPDIFOUT IN 2", "FRDDR_C OUT 3";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* spdif hdmi or toslink interface */
+ dai-link-4 {
+ sound-dai = <&spdifout>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+
+ codec-1 {
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
+ };
+ };
+
+ /* spdif hdmi interface */
+ dai-link-5 {
+ sound-dai = <&spdifout_b>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-6 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu2 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu3 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&vcc_5v>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+ linux,rc-map-name = "rc-tx5max";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
+&ext_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+ eee-broken-1000t;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_14 */
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&ethmac {
+ pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&external_phy>;
+ amlogic,tx-delay-ns = <2>;
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "host";
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&flash_1v8>;
+};
+
+&spdifout {
+ pinctrl-0 = <&spdif_out_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&spdifout_b {
+ status = "okay";
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
--
2.25.1

68
patch/kernel/archive/meson64-5.15/0058-arm64-dts-meson-fixups-for-WeTek-common-dtsi.patch Normal file
View File

@@ -0,0 +1,68 @@
From b7a3260479da902b11b1ce7738b2f5a86aa39834 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 29 Dec 2020 09:31:57 +0000
Subject: [PATCH 58/58] arm64: dts: meson: fixups for WeTek common dtsi
Minor changes that result from work on mainline u-boot support, closer
study of vendor 3.14 device-tree, and access to vendor schematics:
- Add missing GPIO binding
- Add higher max-freq to SDIO and SD
- Add higher rates to SDIO
- Use updated LED bindings
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
index a350fee1264d..8c6453fd130f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
@@ -6,6 +6,8 @@
*/
#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
/ {
aliases {
@@ -25,8 +27,10 @@ memory@0 {
leds {
compatible = "gpio-leds";
- led-system {
- label = "wetek-play:system-status";
+ blue {
+ /* red in suspend or power-off */
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_POWER;
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
default-state = "on";
panic-indicator;
@@ -199,7 +203,10 @@ &sd_emmc_a {
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ max-frequency = <200000000>;
non-removable;
disable-wp;
@@ -227,7 +234,7 @@ &sd_emmc_b {
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
--
2.25.1

77
patch/kernel/archive/meson64-5.15/0068-ODROID-COMMON-gpu-drm-add-new-display-resolution-256.patch Normal file
View File

@@ -0,0 +1,77 @@
From 913a27622881566eeb70336f72f6d40e0598119b Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 10 Sep 2020 11:01:33 +0900
Subject: [PATCH 68/75] ODROID-COMMON: gpu/drm: add new display resolution
2560x1440
Signed-off-by: Joy Cho <joy.cho@hardkernel.com>
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
---
drivers/gpu/drm/meson/meson_vclk.c | 18 ++++++++++++++++++
drivers/gpu/drm/meson/meson_venc.c | 5 +++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 0eb86943a358..e734d1be553d 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -357,6 +357,8 @@ enum {
MESON_VCLK_HDMI_594000,
/* 2970 /1 /1 /1 /5 /1 => /1 /2 */
MESON_VCLK_HDMI_594000_YUV420,
+/* 4830 /2 /1 /2 /5 /1 => /1 /1 */
+ MESON_VCLK_HDMI_241500,
};
struct meson_vclk_params {
@@ -467,6 +469,18 @@ struct meson_vclk_params {
.vid_pll_div = VID_PLL_DIV_5,
.vclk_div = 1,
},
+ [MESON_VCLK_HDMI_241500] = {
+ .pll_freq = 4830000,
+ .phy_freq = 2415000,
+ .venc_freq = 241500,
+ .vclk_freq = 241500,
+ .pixel_freq = 241500,
+ .pll_od1 = 2,
+ .pll_od2 = 1,
+ .pll_od3 = 2,
+ .vid_pll_div = VID_PLL_DIV_5,
+ .vclk_div = 1,
+ },
{ /* sentinel */ },
};
@@ -873,6 +887,10 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
m = 0xf7;
frac = vic_alternate_clock ? 0x8148 : 0x10000;
break;
+ case 4830000:
+ m = 0xc9;
+ frac = 0xd560;
+ break;
}
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c
index f93c725b6f02..ebe4f2a92fe0 100644
--- a/drivers/gpu/drm/meson/meson_venc.c
+++ b/drivers/gpu/drm/meson/meson_venc.c
@@ -866,10 +866,11 @@ meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode)
DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC))
return MODE_BAD;
- if (mode->hdisplay < 640 || mode->hdisplay > 1920)
+ /* support higher resolution than 1920x1080 */
+ if (mode->hdisplay < 640 || mode->hdisplay > 2560)
return MODE_BAD_HVALUE;
- if (mode->vdisplay < 480 || mode->vdisplay > 1200)
+ if (mode->vdisplay < 480 || mode->vdisplay > 1600)
return MODE_BAD_VVALUE;
return MODE_OK;
--
2.25.1

36
patch/kernel/archive/meson64-5.15/0074-ODROID-C4-arm64-dts-reboot-power-off-support-for-ODR.patch Normal file
View File

@@ -0,0 +1,36 @@
From 090381e6bb3063bf9d9c7a4d103d03505c655559 Mon Sep 17 00:00:00 2001
From: ckkim <changkon12@gmail.com>
Date: Tue, 6 Oct 2020 17:49:18 +0900
Subject: [PATCH 74/75] ODROID-C4: arm64:dts: reboot / power off support for
ODROID-C4
Signed-off-by: ckkim <changkon12@gmail.com>
Change-Id: I22316a4ab896a0d8511d2cb2c34ac00360bb44d1
---
arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts b/arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts
index 761702fc2170..ff1296a94be2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -9,6 +9,16 @@
/ {
compatible = "hardkernel,odroid-c4", "amlogic,sm1";
model = "Hardkernel ODROID-C4";
+
+ odroid-reboot {
+ compatible = "odroid,reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+
+ sd-vqen = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
+ sd-vqsw = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+ sd-vmmc = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ };
aliases {
ethernet0 = &ethmac;
--
2.25.1

93
patch/kernel/archive/meson64-5.15/0081-FROMLIST-arm64-dts-meson-gxl-s905x-khadas-vim-add-th.patch Normal file
View File

@@ -0,0 +1,93 @@
From 8ab1155a0723c02a717267e34ae823f118f40e53 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 21 Feb 2020 05:28:24 +0000
Subject: [PATCH 081/101] FROMLIST: arm64: dts: meson: gxl-s905x-khadas-vim:
add thermal zones
Add thermal zones to the VIM1 board so that a cooling fan can be driven
using the i2c interface. Zone config is copied from the VIM2.
Suggested-by: Nick Xie <nick@khadas.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../amlogic/meson-gxl-s905x-khadas-vim.dts | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 440bc23c7342..2c198c4212b2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -8,6 +8,7 @@
#include "meson-gxl-s905x-p212.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/meson-aiu.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
@@ -63,6 +64,39 @@
};
};
};
+
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+
+ thermal-sensors = <&scpi_sensors 0>;
+
+ trips {
+ cpu_alert0: cpu-alert0 {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "active";
+ };
+
+ cpu_alert1: cpu-alert1 {
+ temperature = <80000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
};
&cec_AO {
@@ -72,6 +106,22 @@
hdmi-phandle = <&hdmi_tx>;
};
+&cpu0 {
+ #cooling-cells = <2>;
+};
+
+&cpu1 {
+ #cooling-cells = <2>;
+};
+
+&cpu2 {
+ #cooling-cells = <2>;
+};
+
+&cpu3 {
+ #cooling-cells = <2>;
+};
+
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
--
2.17.1

53
patch/kernel/archive/meson64-5.15/01-10-soc-sunxi-convert-to-devm_platform_ioremap_resource.patch.disabled Normal file
View File

@@ -0,0 +1,53 @@
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
---
drivers/soc/amlogic/meson-canvas.c | 4 +---
drivers/soc/amlogic/meson-clk-measure.c | 4 +---
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/amlogic/meson-canvas.c b/drivers/soc/amlogic/meson-canvas.c
index c655f5f92b12..561044063319 100644
--- a/drivers/soc/amlogic/meson-canvas.c
+++ b/drivers/soc/amlogic/meson-canvas.c
@@ -166,7 +166,6 @@ EXPORT_SYMBOL_GPL(meson_canvas_free);
static int meson_canvas_probe(struct platform_device *pdev)
{
- struct resource *res;
struct meson_canvas *canvas;
struct device *dev = &pdev->dev;
@@ -174,8 +173,7 @@ static int meson_canvas_probe(struct platform_device *pdev)
if (!canvas)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- canvas->reg_base = devm_ioremap_resource(dev, res);
+ canvas->reg_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(canvas->reg_base))
return PTR_ERR(canvas->reg_base);
diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/meson-clk-measure.c
index 0fa47d77577d..173baa53fce3 100644
--- a/drivers/soc/amlogic/meson-clk-measure.c
+++ b/drivers/soc/amlogic/meson-clk-measure.c
@@ -605,7 +605,6 @@ static int meson_msr_probe(struct platform_device *pdev)
{
const struct meson_msr_id *match_data;
struct meson_msr *priv;
- struct resource *res;
struct dentry *root, *clks;
void __iomem *base;
int i;
@@ -623,8 +622,7 @@ static int meson_msr_probe(struct platform_device *pdev)
memcpy(priv->msr_table, match_data, sizeof(priv->msr_table));
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base = devm_ioremap_resource(&pdev->dev, res);
+ base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base)) {
dev_err(&pdev->dev, "io resource mapping failed\n");
return PTR_ERR(base);

74
patch/kernel/archive/meson64-5.15/0100-ETH-setup-mac-address-from-command-line.patch.disabled Normal file
View File

@@ -0,0 +1,74 @@
From d714aa2f0b8cb6265beb0d15f99d4c87fb934c15 Mon Sep 17 00:00:00 2001
From: Nick Xie <nick@khadas.com>
Date: Wed, 25 Dec 2019 13:41:52 +0800
Subject: [PATCH 100/101] ETH: setup mac address from command line
Signed-off-by: Nick Xie <nick@khadas.com>
---
.../ethernet/stmicro/stmmac/stmmac_platform.c | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 13fafd905db8..2b2dccd04cbf 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -21,6 +21,40 @@
#ifdef CONFIG_OF
+#if defined (CONFIG_DWMAC_MESON) || defined (CONFIG_DWMAC_ROCKCHIP)
+static u8 DEFMAC[] = {0, 0, 0, 0, 0, 0};
+static unsigned int g_mac_addr_setup;
+static unsigned char chartonum(char c)
+{
+ if (c >= '0' && c <= '9')
+ return c - '0';
+ if (c >= 'A' && c <= 'F')
+ return (c - 'A') + 10;
+ if (c >= 'a' && c <= 'f')
+ return (c - 'a') + 10;
+
+ return 0;
+}
+
+static int __init mac_addr_set(char *line)
+{
+ unsigned char mac[6];
+ int i = 0;
+
+ for (i = 0; i < 6 && line[0] != '\0' && line[1] != '\0'; i++) {
+ mac[i] = chartonum(line[0]) << 4 | chartonum(line[1]);
+ line += 3;
+ }
+ memcpy(DEFMAC, mac, 6);
+ pr_info("uboot setup mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ DEFMAC[0], DEFMAC[1], DEFMAC[2], DEFMAC[3], DEFMAC[4], DEFMAC[5]);
+ g_mac_addr_setup++;
+ return 0;
+}
+__setup("mac=", mac_addr_set);
+#endif
+
+
/**
* dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
* @dev: struct device of the platform device
@@ -404,7 +438,15 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
if (!plat)
return ERR_PTR(-ENOMEM);
+#if defined (CONFIG_DWMAC_MESON) || defined (CONFIG_DWMAC_ROCKCHIP)
+ if (g_mac_addr_setup) /*so uboot mac= is first priority.*/
+ *mac = DEFMAC;
+ else
+ *mac = of_get_mac_address(np);
+#else
*mac = of_get_mac_address(np);
+#endif
+
if (IS_ERR(*mac)) {
if (PTR_ERR(*mac) == -EPROBE_DEFER)
return ERR_CAST(*mac);
--
2.17.1

29
patch/kernel/archive/meson64-5.15/0350-drm-dw-hdmi-call-hdmi_set_cts_n-after-clock-is-.patch Normal file
View File

@@ -0,0 +1,29 @@
From 192ff185a6f85f2519cc4b97aa015a836f5a8fbb Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 9 Jul 2018 21:25:15 +0200
Subject: [PATCH 10/84] TEMP: drm: dw-hdmi: call hdmi_set_cts_n after clock is
enabled
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 521d689..e4ab11a 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -688,6 +688,11 @@ static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable)
else
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE;
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
+
+ if (enable) {
+ hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
+ hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
+ }
}
static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
--
2.7.1

83
patch/kernel/archive/meson64-5.15/9999-HACK-Add_SPI_Flash_enabled_versions_of_N2_and_N2Plus_DTBs.patch Normal file
View File

@@ -0,0 +1,83 @@
Index: arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-spi.dts
IDEA additional info:
Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
<+>UTF-8
===================================================================
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-spi.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-spi.dts
new file mode 100644
--- /dev/null (date 1630421486471)
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-spi.dts (date 1630421486471)
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "meson-g12b-odroid-n2.dts"
+
+/ {
+ model = "Hardkernel ODROID-N2 with SPI";
+};
+
+#include "meson-g12b-odroid-n2-enable-spi.dtsi"
Index: arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus-spi.dts
IDEA additional info:
Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
<+>UTF-8
===================================================================
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus-spi.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus-spi.dts
new file mode 100644
--- /dev/null (date 1630421477913)
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus-spi.dts (date 1630421477913)
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "meson-g12b-odroid-n2-plus.dts"
+
+/ {
+ model = "Hardkernel ODROID-N2Plus with SPI";
+};
+
+#include "meson-g12b-odroid-n2-enable-spi.dtsi"
Index: arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-enable-spi.dtsi
IDEA additional info:
Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
<+>UTF-8
===================================================================
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-enable-spi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-enable-spi.dtsi
new file mode 100644
--- /dev/null (date 1630421525557)
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-enable-spi.dtsi (date 1630421525557)
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/*
+ * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, and change bus-width to 4 then spifc can be enabled.
+ */
+&sd_emmc_c {
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_4b_pins>, <&emmc_ds_pins>;
+ bus-width = <4>;
+};
+
+&spifc {
+ status = "okay";
+};
Index: arch/arm64/boot/dts/amlogic/Makefile
IDEA additional info:
Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
<+>UTF-8
===================================================================
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
--- a/arch/arm64/boot/dts/amlogic/Makefile (revision b91db6a0b52e019b6bdabea3f1dbe36d85c7e52c)
+++ b/arch/arm64/boot/dts/amlogic/Makefile (date 1630421076946)
@@ -9,7 +9,9 @@
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-spi.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus-spi.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-ugoos-am6.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-kii-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb

25
patch/kernel/archive/meson64-5.15/9999-revert-meson_drv_shutdown.patch Normal file
View File

@@ -0,0 +1,25 @@
From 22ce3ced8b11ceb313dea2aab1bb8ac028320dbb Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Tue, 15 Jun 2021 19:53:41 +0200
Subject: [PATCH] Remove shutdown
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
drivers/gpu/drm/meson/meson_drv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index 2753067c0..b591aee04 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -564,7 +564,6 @@ static const struct dev_pm_ops meson_drv_pm_ops = {
static struct platform_driver meson_drm_platform_driver = {
.probe = meson_drv_probe,
- .shutdown = meson_drv_shutdown,
.driver = {
.name = "meson-drm",
.of_match_table = dt_match,
--
Created with Armbian build tools https://github.com/armbian/build

89
patch/kernel/archive/meson64-5.15/Add-support-of-CEC-wakeup-on-Amlogic-G12-and-SM1-SoCs.patch Normal file
View File

@@ -0,0 +1,89 @@
add register configuration to activate wakeup feature in bl301
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/media/platform/meson/ao-cec-g12a.c | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/media/cec/platform/meson/ao-cec-g12a.c b/drivers/media/cec/platform/meson/ao-cec-g12a.c
index 891533060d49..85850b974126 100644
--- a/drivers/media/cec/platform/meson/ao-cec-g12a.c
+++ b/drivers/media/cec/platform/meson/ao-cec-g12a.c
@@ -25,6 +25,7 @@
#include <media/cec.h>
#include <media/cec-notifier.h>
#include <linux/clk-provider.h>
+#include <linux/mfd/syscon.h>
/* CEC Registers */
@@ -168,6 +169,18 @@
#define CECB_WAKEUPCTRL 0x31
+#define CECB_FUNC_CFG_REG 0xA0
+#define CECB_FUNC_CFG_MASK GENMASK(6, 0)
+#define CECB_FUNC_CFG_CEC_ON 0x01
+#define CECB_FUNC_CFG_OTP_ON 0x02
+#define CECB_FUNC_CFG_AUTO_STANDBY 0x04
+#define CECB_FUNC_CFG_AUTO_POWER_ON 0x08
+#define CECB_FUNC_CFG_ALL 0x2f
+#define CECB_FUNC_CFG_NONE 0x0
+
+#define CECB_LOG_ADDR_REG 0xA4
+#define CECB_LOG_ADDR_MASK GENMASK(22, 16)
+
struct meson_ao_cec_g12a_data {
/* Setup the internal CECB_CTRL2 register */
bool ctrl2_setup;
@@ -177,6 +190,7 @@ struct meson_ao_cec_g12a_device {
struct platform_device *pdev;
struct regmap *regmap;
struct regmap *regmap_cec;
+ struct regmap *regmap_ao_sysctrl;
spinlock_t cec_reg_lock;
struct cec_notifier *notify;
struct cec_adapter *adap;
@@ -518,6 +532,13 @@ meson_ao_cec_g12a_set_log_addr(struct cec_adapter *adap, u8 logical_addr)
BIT(logical_addr - 8));
}
+ if (ao_cec->regmap_ao_sysctrl)
+ ret |= regmap_update_bits(ao_cec->regmap_ao_sysctrl,
+ CECB_LOG_ADDR_REG,
+ CECB_LOG_ADDR_MASK,
+ FIELD_PREP(CECB_LOG_ADDR_MASK,
+ logical_addr));
+
/* Always set Broadcast/Unregistered 15 address */
ret |= regmap_update_bits(ao_cec->regmap_cec, CECB_LADD_HIGH,
BIT(CEC_LOG_ADDR_UNREGISTERED - 8),
@@ -618,6 +639,13 @@ static int meson_ao_cec_g12a_adap_enable(struct cec_adapter *adap, bool enable)
regmap_write(ao_cec->regmap_cec, CECB_CTRL2,
FIELD_PREP(CECB_CTRL2_RISE_DEL_MAX, 2));
+ if (ao_cec->regmap_ao_sysctrl) {
+ regmap_update_bits(ao_cec->regmap_ao_sysctrl,
+ CECB_FUNC_CFG_REG,
+ CECB_FUNC_CFG_MASK,
+ CECB_FUNC_CFG_ALL);
+ }
+
meson_ao_cec_g12a_irq_setup(ao_cec, true);
return 0;
@@ -685,6 +713,11 @@ static int meson_ao_cec_g12a_probe(struct platform_device *pdev)
goto out_probe_adapter;
}
+ ao_cec->regmap_ao_sysctrl = syscon_regmap_lookup_by_phandle
+ (pdev->dev.of_node, "amlogic,ao-sysctrl");
+ if (IS_ERR(ao_cec->regmap_ao_sysctrl))
+ dev_warn(&pdev->dev, "ao-sysctrl syscon regmap lookup failed.\n");
+
irq = platform_get_irq(pdev, 0);
ret = devm_request_threaded_irq(&pdev->dev, irq,
meson_ao_cec_g12a_irq,

451
patch/kernel/archive/meson64-5.15/arm64-dts-amlogic-add-support-for-Radxa-Zero-0001.patch Normal file
View File

@@ -0,0 +1,451 @@
From 5221fc430d7b1ee3b81ca2f7c2f20cc2202cfd30 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 6 Aug 2021 12:16:10 +0000
Subject: [PATCH] FROMLIST(v2): arm64: dts: amlogic: add support for Radxa Zero
Radxa Zero is a small form factor SBC based on the Amlogic S905Y2
chipset that ships in a number of RAM/eMMC configurations:
Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436
wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB
eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
- Amlogic S905Y2 quad-core Cortex-A53
- Mali G31-MP2 GPU
- HDMI 2.1 output (micro)
- 1x USB 2.0 port - Type C (OTG)
- 1x USB 3.0 port - Type C (Host)
- 1x micro SD Card slot
- 40 Pin GPIO header
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../dts/amlogic/meson-g12a-radxa-zero.dts | 407 ++++++++++++++++++
2 files changed, 408 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index faa0a79a34f549..be308361e2f1b3 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12a-radxa-zero.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
new file mode 100644
index 00000000000000..c7bf2ee4113464
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-g12a.dtsi"
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "radxa,zero", "amlogic,g12a";
+ model = "Radxa Zero";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ cvbs-connector {
+ status = "disabled";
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ hdmi_pw: regulator-hdmi_pw {
+ compatible = "regulator-fixed";
+ regulator-name = "HDMI_PW";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+ vddao_1v8: regulator-vddao_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+ vddcpu: regulator-vddcpu {
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+
+ vin-supply = <&ao_5v>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "RADXA-ZERO";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu2 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu3 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&hdmi_pw>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&ir {
+ status = "disabled";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddao_1v8>;
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupts = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ max-frequency = <200000000>;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "host";
+};

94
patch/kernel/archive/meson64-5.15/arm64-dts-amlogic-add-support-for-Radxa-Zero-0002-fusb302-typec-contr.patch Normal file
View File

@@ -0,0 +1,94 @@
From 667b57e46fb8c8091ca029f1eb461206e02e2394 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 17 Aug 2021 16:16:43 +0000
Subject: [PATCH] WIP: arm64: dts: amlogic: radxa-zero: add support for the usb
type-c controller
Radxa Zero uses an FUSB302 type-c controller, so lets enable it.
NB: Polarity swapping via GPIO is not implemented in the current driver
(see drivers/usb/typec/tcpm/fusb302.c) so it is not possible to handle
GPIOAO_6 for USB3 polarity control.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../dts/amlogic/meson-g12a-radxa-zero.dts | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index c7bf2ee4113464..6d0cca4494a1e0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -60,6 +60,17 @@
clock-names = "ext_clock";
};
+ typec2_vbus: regulator-typec2_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "TYPEC2_VBUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&ao_5v>;
+
+ gpio = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
@@ -191,6 +202,18 @@
};
};
+&ao_pinctrl {
+ /* Ensure the TYPE C controller irq pin is not driven by the SoC */
+ fusb302_irq_pins: fusb302_irq {
+ mux {
+ groups = "GPIOAO_5";
+ function = "gpio_aobus";
+ bias-pull-up;
+ output-disable;
+ };
+ };
+};
+
&arb {
status = "okay";
};
@@ -278,6 +301,22 @@
pinctrl-names = "default";
};
+&i2c_AO {
+ fusb302@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+
+ pinctrl-0 = <&fusb302_irq_pins>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio_intc>;
+ interrupts = <59 IRQ_TYPE_LEVEL_LOW>;
+
+ vbus-supply = <&typec2_vbus>;
+
+ status = "okay";
+ };
+};
+
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
@@ -405,3 +444,11 @@
status = "okay";
dr_mode = "host";
};
+
+&usb2_phy0 {
+ phy-supply = <&typec2_vbus>;
+};
+
+&usb3_pcie_phy {
+ phy-supply = <&typec2_vbus>;
+};

923
patch/kernel/archive/meson64-5.15/board-VIM1-add-simple-MCU-driver-for-FAN.patch Normal file
View File

@@ -0,0 +1,923 @@
From 9d62f1b8abb852a12a437b94ddc67c3294dd0953 Mon Sep 17 00:00:00 2001
From: Nick Xie <nick@khadas.com>
Date: Mon, 23 Dec 2019 22:51:19 +0800
Subject: [PATCH 098/101] arm64: dts: VIMs: add simple MCU driver for FAN
Signed-off-by: Nick Xie <nick@khadas.com>
---
.../amlogic/meson-gxl-s905x-khadas-vim.dts | 10 +
.../dts/amlogic/meson-gxm-khadas-vim2.dts | 10 +
.../boot/dts/amlogic/meson-khadas-vim3.dtsi | 10 +
drivers/hwmon/scpi-hwmon.c | 18 +
drivers/misc/Kconfig | 5 +
drivers/misc/Makefile | 1 +
drivers/misc/khadas-mcu.c | 720 ++++++++++++++++++
drivers/thermal/amlogic_thermal.c | 19 +
8 files changed, 793 insertions(+)
create mode 100644 drivers/misc/khadas-mcu.c
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 0786ea55f839..02b6691768b3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -155,6 +155,16 @@
clock-frequency = <32768>;
clock-output-names = "xin32k";
};
+
+ khadas-mcu@18 {
+ status = "okay";
+ compatible = "khadas-mcu";
+ reg = <0x18>;
+ fan,trig_temp_level0 = <50>;
+ fan,trig_temp_level1 = <60>;
+ fan,trig_temp_level2 = <70>;
+ hwver = "VIM1.V12"; /* Will be updated in uboot. */
+ };
};
&ir {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 57de06faa841..f9ec3f3efbe1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -363,6 +363,16 @@
clock-frequency = <32768>;
clock-output-names = "xin32k";
};
+
+ khadas-mcu@18 {
+ status = "okay";
+ compatible = "khadas-mcu";
+ reg = <0x18>;
+ fan,trig_temp_level0 = <50>;
+ fan,trig_temp_level1 = <60>;
+ fan,trig_temp_level2 = <70>;
+ hwver = "VIM2.V12"; /* Will be updated in uboot. */
+ };
};
&ir {
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index 6d0163f56b0d..f6b5de8328ac 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -242,6 +242,16 @@
reg = <0x51>;
#clock-cells = <0>;
};
+
+ khadas-mcu@18 {
+ status = "okay";
+ compatible = "khadas-mcu";
+ reg = <0x18>;
+ fan,trig_temp_level0 = <50>;
+ fan,trig_temp_level1 = <60>;
+ fan,trig_temp_level2 = <70>;
+ hwver = "VIM3.V11"; /* Will be updated in uboot. */
+ };
};
&ir {
diff --git a/drivers/hwmon/scpi-hwmon.c b/drivers/hwmon/scpi-hwmon.c
index 25aac40f2764..3dd7af04c5bd 100644
--- a/drivers/hwmon/scpi-hwmon.c
+++ b/drivers/hwmon/scpi-hwmon.c
@@ -54,6 +54,8 @@ static const u32 scpi_scale[] = {
[ENERGY] = 1000000, /* (microjoules) */
};
+static struct scpi_thermal_zone *g_scpi_thermal_zone_ptr;
+
static void scpi_scale_reading(u64 *value, struct sensor_data *sensor)
{
if (scpi_scale[sensor->info.class] != sensor->scale) {
@@ -81,6 +83,20 @@ static int scpi_read_temp(void *dev, int *temp)
return 0;
}
+int meson_gx_get_temperature(void)
+{
+ int temp;
+ int ret;
+ ret = scpi_read_temp(g_scpi_thermal_zone_ptr, &temp);
+ if (ret) {
+ printk("scpi_read_temp() failed!\n");
+ return ret;
+ }
+
+ return temp / 1000;
+}
+EXPORT_SYMBOL(meson_gx_get_temperature);
+
/* hwmon callback functions */
static ssize_t
scpi_show_sensor(struct device *dev, struct device_attribute *attr, char *buf)
@@ -266,6 +282,8 @@ static int scpi_hwmon_probe(struct platform_device *pdev)
if (!zone)
return -ENOMEM;
+ g_scpi_thermal_zone_ptr = zone;
+
zone->sensor_id = i;
zone->scpi_sensors = scpi_sensors;
z = devm_thermal_zone_of_sensor_register(dev,
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 7f0d48f406e3..fb0a3830fd87 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -465,6 +465,11 @@ config PVPANIC
a paravirtualized device provided by QEMU; it lets a virtual machine
(guest) communicate panic events to the host.
+config KHADAS_MCU
+ tristate "Khadas boards on-board MCU"
+ help
+ This driver provides support for Khadas boards on-board MCU.
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index c1860d35dc7e..9bbf2a479405 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -57,4 +57,5 @@ obj-y += cardreader/
obj-$(CONFIG_HABANA_AI) += habanalabs/
obj-$(CONFIG_UACCE) += uacce/
obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
+obj-$(CONFIG_KHADAS_MCU) += khadas-mcu.o
obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o
diff --git a/drivers/misc/khadas-mcu.c b/drivers/misc/khadas-mcu.c
new file mode 100644
index 000000000000..7c6f2903b7a5
--- /dev/null
+++ b/drivers/misc/khadas-mcu.c
@@ -0,0 +1,720 @@
+/*
+ * Khadas MCU control driver
+ *
+ * Written by: Nick <nick@khadas.com>
+ *
+ * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+#include <linux/list.h>
+#include <linux/sysfs.h>
+#include <linux/ctype.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+
+/* Device registers */
+#define MCU_BOOT_EN_WOL_REG 0x21
+#define MCU_CMD_FAN_STATUS_CTRL_REG 0x88
+#define MCU_USB_PCIE_SWITCH_REG 0x33 /* VIM3/VIM3L only */
+#define MCU_PWR_OFF_CMD_REG 0x80
+#define MCU_SHUTDOWN_NORMAL_REG 0x2c
+
+#define MCU_FAN_TRIG_TEMP_LEVEL0 50 // 50 degree if not set
+#define MCU_FAN_TRIG_TEMP_LEVEL1 60 // 60 degree if not set
+#define MCU_FAN_TRIG_TEMP_LEVEL2 70 // 70 degree if not set
+#define MCU_FAN_TRIG_MAXTEMP 80
+#define MCU_FAN_LOOP_SECS (30 * HZ) // 30 seconds
+#define MCU_FAN_TEST_LOOP_SECS (5 * HZ) // 5 seconds
+#define MCU_FAN_LOOP_NODELAY_SECS 0
+#define MCU_FAN_SPEED_OFF 0
+#define MCU_FAN_SPEED_LOW 1
+#define MCU_FAN_SPEED_MID 2
+#define MCU_FAN_SPEED_HIGH 3
+
+enum mcu_fan_mode {
+ MCU_FAN_MODE_MANUAL = 0,
+ MCU_FAN_MODE_AUTO,
+};
+
+enum mcu_fan_level {
+ MCU_FAN_LEVEL_0 = 0,
+ MCU_FAN_LEVEL_1,
+ MCU_FAN_LEVEL_2,
+ MCU_FAN_LEVEL_3,
+};
+
+enum mcu_fan_status {
+ MCU_FAN_STATUS_DISABLE = 0,
+ MCU_FAN_STATUS_ENABLE,
+};
+
+enum mcu_usb_pcie_switch_mode {
+ MCU_USB_PCIE_SWITCH_MODE_USB3 = 0,
+ MCU_USB_PCIE_SWITCH_MODE_PCIE
+};
+
+enum khadas_board_hwver {
+ KHADAS_BOARD_HWVER_NONE = 0,
+ KHADAS_BOARD_HWVER_V11,
+ KHADAS_BOARD_HWVER_V12,
+ KHADAS_BOARD_HWVER_V13,
+ KHADAS_BOARD_HWVER_V14
+};
+
+enum khadas_board {
+ KHADAS_BOARD_NONE,
+ KHADAS_BOARD_VIM1,
+ KHADAS_BOARD_VIM2,
+ KHADAS_BOARD_VIM3
+};
+
+struct mcu_fan_data {
+ struct platform_device *pdev;
+ struct class *fan_class;
+ struct delayed_work work;
+ struct delayed_work fan_test_work;
+ enum mcu_fan_status enable;
+ enum mcu_fan_mode mode;
+ enum mcu_fan_level level;
+ int trig_temp_level0;
+ int trig_temp_level1;
+ int trig_temp_level2;
+};
+
+struct mcu_data {
+ struct i2c_client *client;
+ struct class *usb_pcie_switch_class;
+ struct class *mcu_class;
+ u8 usb_pcie_switch_mode;
+ enum khadas_board board;
+ enum khadas_board_hwver hwver;
+ struct mcu_fan_data fan_data;
+};
+
+struct mcu_data *g_mcu_data;
+
+static char * mcu_board_type_to_str(enum khadas_board board)
+{
+ switch (board) {
+ case KHADAS_BOARD_NONE:
+ return "Unknown";
+ case KHADAS_BOARD_VIM1:
+ return "VIM1";
+ case KHADAS_BOARD_VIM2:
+ return "VIM2";
+ case KHADAS_BOARD_VIM3:
+ return "VIM3";
+ default:
+ return "Unknown";
+ }
+}
+
+static char * mcu_board_hardware_version_str(enum khadas_board_hwver hwver)
+{
+ switch (hwver) {
+ case KHADAS_BOARD_HWVER_NONE:
+ return "Unknown";
+ case KHADAS_BOARD_HWVER_V11:
+ return "V11";
+ case KHADAS_BOARD_HWVER_V12:
+ return "V12";
+ case KHADAS_BOARD_HWVER_V13:
+ return "V13";
+ case KHADAS_BOARD_HWVER_V14:
+ return "V14";
+ default:
+ return "Unknown";
+ }
+}
+
+static int i2c_master_reg8_send(const struct i2c_client *client,
+ const char reg, const char *buf, int count)
+{
+ struct i2c_adapter *adap = client->adapter;
+ struct i2c_msg msg;
+ int ret;
+ char *tx_buf = kzalloc(count + 1, GFP_KERNEL);
+ if (!tx_buf)
+ return -ENOMEM;
+ tx_buf[0] = reg;
+ memcpy(tx_buf+1, buf, count);
+
+ msg.addr = client->addr;
+ msg.flags = client->flags;
+ msg.len = count + 1;
+ msg.buf = (char *)tx_buf;
+
+ ret = i2c_transfer(adap, &msg, 1);
+ kfree(tx_buf);
+ return (ret == 1) ? count : ret;
+}
+
+static int i2c_master_reg8_recv(const struct i2c_client *client,
+ const char reg, char *buf, int count)
+{
+ struct i2c_adapter *adap = client->adapter;
+ struct i2c_msg msgs[2];
+ int ret;
+ char reg_buf = reg;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = client->flags;
+ msgs[0].len = 1;
+ msgs[0].buf = &reg_buf;
+
+ msgs[1].addr = client->addr;
+ msgs[1].flags = client->flags | I2C_M_RD;
+ msgs[1].len = count;
+ msgs[1].buf = (char *)buf;
+
+ ret = i2c_transfer(adap, msgs, 2);
+
+ return (ret == 2) ? count : ret;
+}
+
+static int mcu_i2c_read_regs(struct i2c_client *client,
+ u8 reg, u8 buf[], unsigned len)
+{
+ int ret;
+ ret = i2c_master_reg8_recv(client, reg, buf, len);
+ return ret;
+}
+
+static int mcu_i2c_write_regs(struct i2c_client *client,
+ u8 reg, u8 const buf[], __u16 len)
+{
+ int ret;
+ ret = i2c_master_reg8_send(client, reg, buf, (int)len);
+ return ret;
+}
+
+static int is_mcu_fan_control_supported(void)
+{
+ // MCU FAN control is supported for:
+ // 1. Khadas VIM1 V13 and later
+ // 2. Khadas VIM2 V13 and later
+ // 3. Khadas VIM3 V11 and later
+ if (KHADAS_BOARD_VIM1 == g_mcu_data->board) {
+ if (g_mcu_data->hwver >= KHADAS_BOARD_HWVER_V13)
+ return 1;
+ else
+ return 0;
+ } else if (KHADAS_BOARD_VIM2 == g_mcu_data->board) {
+ if (g_mcu_data->hwver > KHADAS_BOARD_HWVER_V12)
+ return 1;
+ else
+ return 0;
+ } else if (KHADAS_BOARD_VIM3 == g_mcu_data->board) {
+ if (g_mcu_data->hwver >= KHADAS_BOARD_HWVER_V11)
+ return 1;
+ else
+ return 0;
+ } else
+ return 0;
+}
+
+static bool is_mcu_usb_pcie_switch_supported(void)
+{
+ // MCU USB PCIe switch is supported for:
+ // 1. Khadas VIM3
+ if (KHADAS_BOARD_VIM3 == g_mcu_data->board)
+ return 1;
+ else
+ return 0;
+}
+
+static void mcu_fan_level_set(struct mcu_fan_data *fan_data, int level)
+{
+ if (is_mcu_fan_control_supported()) {
+ int ret;
+ u8 data[2] = {0};
+
+ if(0 == level) {
+ data[0] = MCU_FAN_SPEED_OFF;
+ }else if(1 == level){
+ data[0] = MCU_FAN_SPEED_LOW;
+ }else if(2 == level){
+ data[0] = MCU_FAN_SPEED_MID;
+ }else if(3 == level){
+ data[0] = MCU_FAN_SPEED_HIGH;
+ }
+
+ g_mcu_data->fan_data.level = data[0];
+
+ ret = mcu_i2c_write_regs(g_mcu_data->client, MCU_CMD_FAN_STATUS_CTRL_REG, data, 1);
+ if (ret < 0) {
+ printk("write fan control err\n");
+ return;
+ }
+ }
+}
+
+extern int meson_gx_get_temperature(void);
+extern int meson_g12_get_temperature(void);
+static void fan_work_func(struct work_struct *_work)
+{
+ if (is_mcu_fan_control_supported()) {
+ int temp = -EINVAL;
+ struct mcu_fan_data *fan_data = &g_mcu_data->fan_data;
+
+ if ((KHADAS_BOARD_VIM1 == g_mcu_data->board) ||
+ (KHADAS_BOARD_VIM2 == g_mcu_data->board))
+ temp = meson_gx_get_temperature();
+ else if (KHADAS_BOARD_VIM3 == g_mcu_data->board)
+ temp = meson_g12_get_temperature();
+
+ if(temp != -EINVAL){
+ if(temp < fan_data->trig_temp_level0 ) {
+ mcu_fan_level_set(fan_data, 0);
+ }else if(temp < fan_data->trig_temp_level1 ) {
+ mcu_fan_level_set(fan_data, 1);
+ }else if(temp < fan_data->trig_temp_level2 ) {
+ mcu_fan_level_set(fan_data, 2);
+ }else{
+ mcu_fan_level_set(fan_data, 3);
+ }
+ }
+
+ schedule_delayed_work(&fan_data->work, MCU_FAN_LOOP_SECS);
+ }
+}
+
+static void khadas_fan_set(struct mcu_fan_data *fan_data)
+{
+ if (is_mcu_fan_control_supported()) {
+
+ cancel_delayed_work(&fan_data->work);
+
+ if (fan_data->enable == MCU_FAN_STATUS_DISABLE) {
+ mcu_fan_level_set(fan_data, 0);
+ return;
+ }
+ switch (fan_data->mode) {
+ case MCU_FAN_MODE_MANUAL:
+ switch(fan_data->level) {
+ case MCU_FAN_LEVEL_0:
+ mcu_fan_level_set(fan_data, 0);
+ break;
+ case MCU_FAN_LEVEL_1:
+ mcu_fan_level_set(fan_data, 1);
+ break;
+ case MCU_FAN_LEVEL_2:
+ mcu_fan_level_set(fan_data, 2);
+ break;
+ case MCU_FAN_LEVEL_3:
+ mcu_fan_level_set(fan_data, 3);
+ break;
+ default:
+ break;
+ }
+ break;
+
+ case MCU_FAN_MODE_AUTO:
+ // FIXME: achieve with a better way
+ schedule_delayed_work(&fan_data->work, MCU_FAN_LOOP_NODELAY_SECS);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+static ssize_t show_fan_enable(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan enable: %d\n", g_mcu_data->fan_data.enable);
+}
+
+static ssize_t store_fan_enable(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int enable;
+
+ if (kstrtoint(buf, 0, &enable))
+ return -EINVAL;
+
+ // 0: manual, 1: auto
+ if( enable >= 0 && enable < 2 ){
+ g_mcu_data->fan_data.enable = enable;
+ khadas_fan_set(&g_mcu_data->fan_data);
+ }
+
+ return count;
+}
+
+static ssize_t show_fan_mode(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan mode: %d\n", g_mcu_data->fan_data.mode);
+}
+
+static ssize_t store_fan_mode(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int mode;
+
+ if (kstrtoint(buf, 0, &mode))
+ return -EINVAL;
+
+ // 0: manual, 1: auto
+ if( mode >= 0 && mode < 2 ){
+ g_mcu_data->fan_data.mode = mode;
+ khadas_fan_set(&g_mcu_data->fan_data);
+ }
+
+ return count;
+}
+
+static ssize_t show_fan_level(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan level: %d\n", g_mcu_data->fan_data.level);
+}
+
+static ssize_t store_fan_level(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int level;
+
+ if (kstrtoint(buf, 0, &level))
+ return -EINVAL;
+
+ if( level >= 0 && level < 4){
+ g_mcu_data->fan_data.level = level;
+ khadas_fan_set(&g_mcu_data->fan_data);
+ }
+
+ return count;
+}
+
+static ssize_t show_fan_temp(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ int temp = -EINVAL;
+
+ if ((KHADAS_BOARD_VIM1 == g_mcu_data->board) ||
+ (KHADAS_BOARD_VIM2 == g_mcu_data->board))
+ temp = meson_gx_get_temperature();
+ else if (KHADAS_BOARD_VIM3 == g_mcu_data->board)
+ temp = meson_g12_get_temperature();
+
+ return sprintf(buf, "cpu_temp:%d\nFan trigger temperature: level0:%d level1:%d level2:%d\n", temp, g_mcu_data->fan_data.trig_temp_level0, g_mcu_data->fan_data.trig_temp_level1, g_mcu_data->fan_data.trig_temp_level2);
+}
+
+static ssize_t store_usb_pcie_switch_mode(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int ret;
+ int mode;
+
+ if (kstrtoint(buf, 0, &mode))
+ return -EINVAL;
+
+ if (0 != mode && 1 != mode)
+ return -EINVAL;
+
+ if ((mode < MCU_USB_PCIE_SWITCH_MODE_USB3) || (mode > MCU_USB_PCIE_SWITCH_MODE_PCIE))
+ return -EINVAL;
+
+ g_mcu_data->usb_pcie_switch_mode = (u8)mode;
+ ret = mcu_i2c_write_regs(g_mcu_data->client, MCU_USB_PCIE_SWITCH_REG, &g_mcu_data->usb_pcie_switch_mode, 1);
+ if (ret < 0) {
+ printk("write USB PCIe switch error\n");
+
+ return ret;
+ }
+
+ printk("Set USB PCIe Switch Mode: %s\n", g_mcu_data->usb_pcie_switch_mode ? "PCIe" : "USB3.0");
+
+ return count;
+}
+
+static ssize_t show_usb_pcie_switch_mode(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ printk("USB PCIe Switch Mode: %s\n", g_mcu_data->usb_pcie_switch_mode ? "PCIe" : "USB3.0");
+ return sprintf(buf, "%d\n", g_mcu_data->usb_pcie_switch_mode);
+}
+
+static ssize_t store_mcu_poweroff(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int ret;
+ int val;
+ u8 reg;
+
+ if (kstrtoint(buf, 0, &val))
+ return -EINVAL;
+
+ if (1 != val)
+ return -EINVAL;
+
+ reg = (u8)val;
+ ret = mcu_i2c_write_regs(g_mcu_data->client, MCU_PWR_OFF_CMD_REG, &reg, 1);
+ if (ret < 0) {
+ printk("write poweroff cmd error\n");
+
+ return ret;
+ }
+
+ return count;
+}
+
+static ssize_t store_mcu_rst(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ u8 reg[2];
+ int ret;
+ int rst;
+
+ if (kstrtoint(buf, 0, &rst))
+ return -EINVAL;
+
+ reg[0] = rst;
+ ret = mcu_i2c_write_regs(g_mcu_data->client, MCU_SHUTDOWN_NORMAL_REG, reg, 1);
+ if (ret < 0)
+ printk("rst mcu err\n");
+
+ return count;
+}
+
+static struct class_attribute fan_class_attrs[] = {
+ __ATTR(enable, 0644, show_fan_enable, store_fan_enable),
+ __ATTR(mode, 0644, show_fan_mode, store_fan_mode),
+ __ATTR(level, 0644, show_fan_level, store_fan_level),
+ __ATTR(temp, 0644, show_fan_temp, NULL),
+};
+
+static struct class_attribute mcu_class_attrs[] = {
+ __ATTR(poweroff, 0644, NULL, store_mcu_poweroff),
+ __ATTR(usb_pcie_switch_mode, 0644, show_usb_pcie_switch_mode, store_usb_pcie_switch_mode),
+ __ATTR(rst, 0644, NULL, store_mcu_rst),
+};
+
+static void create_mcu_attrs(void)
+{
+ int i;
+ printk("%s\n",__func__);
+
+ g_mcu_data->mcu_class = class_create(THIS_MODULE, "mcu");
+ if (IS_ERR(g_mcu_data->mcu_class)) {
+ pr_err("create mcu_class debug class fail\n");
+ return;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(mcu_class_attrs); i++) {
+ if (strstr(mcu_class_attrs[i].attr.name, "usb_pcie_switch_mode")) {
+ if (!is_mcu_usb_pcie_switch_supported())
+ continue;
+ }
+ if (class_create_file(g_mcu_data->mcu_class, &mcu_class_attrs[i]))
+ pr_err("create mcu attribute %s fail\n", mcu_class_attrs[i].attr.name);
+ }
+
+ if (is_mcu_fan_control_supported()) {
+ g_mcu_data->fan_data.fan_class = class_create(THIS_MODULE, "fan");
+ if (IS_ERR(g_mcu_data->fan_data.fan_class)) {
+ pr_err("create fan_class debug class fail\n");
+ return;
+ }
+
+ for (i=0; i<ARRAY_SIZE(fan_class_attrs); i++) {
+ if (class_create_file(g_mcu_data->fan_data.fan_class, &fan_class_attrs[i]))
+ pr_err("create fan attribute %s fail\n", fan_class_attrs[i].attr.name);
+ }
+ }
+}
+
+static int mcu_parse_dt(struct device *dev)
+{
+ int ret;
+ const char *hwver = NULL;
+
+ if (NULL == dev) return -EINVAL;
+
+ // Get hardwere version
+ ret = of_property_read_string(dev->of_node, "hwver", &hwver);
+ if (ret < 0) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V12;
+ g_mcu_data->board = KHADAS_BOARD_VIM2;
+ } else {
+ if (strstr(hwver, "VIM1"))
+ g_mcu_data->board = KHADAS_BOARD_VIM1;
+ else if (strstr(hwver, "VIM2"))
+ g_mcu_data->board = KHADAS_BOARD_VIM2;
+ else if (strstr(hwver, "VIM3"))
+ g_mcu_data->board = KHADAS_BOARD_VIM3;
+ else
+ g_mcu_data->board = KHADAS_BOARD_NONE;
+
+ if (KHADAS_BOARD_VIM1 == g_mcu_data->board) {
+ if (0 == strcmp(hwver, "VIM1.V13")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V13;
+ } else if (0 == strcmp(hwver, "VIM1.V14")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V14;
+ } else {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_NONE;
+ }
+ } else if (KHADAS_BOARD_VIM2 == g_mcu_data->board) {
+ if (0 == strcmp(hwver, "VIM2.V12")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V12;
+ } else if (0 == strcmp(hwver, "VIM2.V13")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V13;
+ } else if (0 == strcmp(hwver, "VIM2.V14")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V14;
+ } else {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_NONE;
+ }
+ } else if (KHADAS_BOARD_VIM3 == g_mcu_data->board) {
+ if (0 == strcmp(hwver, "VIM3.V11")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V11;
+ } else if (0 == strcmp(hwver, "VIM3.V12")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V12;
+ } else if (0 == strcmp(hwver, "VIM3.V13")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V13;
+ } else if (0 == strcmp(hwver, "VIM3.V14")) {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_V14;
+ } else {
+ g_mcu_data->hwver = KHADAS_BOARD_HWVER_NONE;
+ }
+ }
+ }
+
+ ret = of_property_read_u32(dev->of_node, "fan,trig_temp_level0", &g_mcu_data->fan_data.trig_temp_level0);
+ if (ret < 0)
+ g_mcu_data->fan_data.trig_temp_level0 = MCU_FAN_TRIG_TEMP_LEVEL0;
+ ret = of_property_read_u32(dev->of_node, "fan,trig_temp_level1", &g_mcu_data->fan_data.trig_temp_level1);
+ if (ret < 0)
+ g_mcu_data->fan_data.trig_temp_level1 = MCU_FAN_TRIG_TEMP_LEVEL1;
+ ret = of_property_read_u32(dev->of_node, "fan,trig_temp_level2", &g_mcu_data->fan_data.trig_temp_level2);
+ if (ret < 0)
+ g_mcu_data->fan_data.trig_temp_level2 = MCU_FAN_TRIG_TEMP_LEVEL2;
+
+ return ret;
+}
+
+static int mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ u8 reg[2];
+ int ret;
+
+ printk("%s\n", __func__);
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+ return -ENODEV;
+
+ g_mcu_data = kzalloc(sizeof(struct mcu_data), GFP_KERNEL);
+
+ if (g_mcu_data == NULL)
+ return -ENOMEM;
+
+ mcu_parse_dt(&client->dev);
+
+ printk("%s: board: %s (%d), hwver: %s (%d)\n", __func__,
+ mcu_board_type_to_str(g_mcu_data->board),
+ (int)g_mcu_data->board,
+ mcu_board_hardware_version_str(g_mcu_data->hwver),
+ (int)g_mcu_data->hwver);
+
+ g_mcu_data->client = client;
+
+ if (is_mcu_usb_pcie_switch_supported()) {
+ // Get USB PCIe Switch status
+ ret = mcu_i2c_read_regs(client, MCU_USB_PCIE_SWITCH_REG, reg, 1);
+ if (ret < 0)
+ goto exit;
+ g_mcu_data->usb_pcie_switch_mode = (u8)reg[0];
+ }
+
+ if (is_mcu_fan_control_supported()) {
+ g_mcu_data->fan_data.mode = MCU_FAN_MODE_AUTO;
+ g_mcu_data->fan_data.level = MCU_FAN_LEVEL_0;
+ g_mcu_data->fan_data.enable = MCU_FAN_STATUS_DISABLE;
+
+ INIT_DELAYED_WORK(&g_mcu_data->fan_data.work, fan_work_func);
+ mcu_fan_level_set(&g_mcu_data->fan_data, 0);
+ }
+ create_mcu_attrs();
+
+ return 0;
+exit:
+ return ret;
+}
+
+
+static int mcu_remove(struct i2c_client *client)
+{
+ return 0;
+}
+
+static void khadas_fan_shutdown(struct i2c_client *client)
+{
+ g_mcu_data->fan_data.enable = MCU_FAN_STATUS_DISABLE;
+ khadas_fan_set(&g_mcu_data->fan_data);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int khadas_fan_suspend(struct device *dev)
+{
+ cancel_delayed_work(&g_mcu_data->fan_data.work);
+ mcu_fan_level_set(&g_mcu_data->fan_data, 0);
+
+ return 0;
+}
+
+static int khadas_fan_resume(struct device *dev)
+{
+ return 0;
+}
+
+static const struct dev_pm_ops fan_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(khadas_fan_suspend, khadas_fan_resume)
+};
+
+#define FAN_PM_OPS (&(fan_dev_pm_ops))
+
+#endif
+
+static const struct i2c_device_id mcu_id[] = {
+ { "khadas-mcu", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, mcu_id);
+
+
+static struct of_device_id mcu_dt_ids[] = {
+ { .compatible = "khadas-mcu" },
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, mcu_dt_ids);
+
+struct i2c_driver mcu_driver = {
+ .driver = {
+ .name = "khadas-mcu",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(mcu_dt_ids),
+#ifdef CONFIG_PM_SLEEP
+ .pm = FAN_PM_OPS,
+#endif
+ },
+ .probe = mcu_probe,
+ .remove = mcu_remove,
+ .shutdown = khadas_fan_shutdown,
+ .id_table = mcu_id,
+};
+module_i2c_driver(mcu_driver);
+
+MODULE_AUTHOR("Nick <nick@khadas.com>");
+MODULE_DESCRIPTION("Khadas MCU control driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/thermal/amlogic_thermal.c b/drivers/thermal/amlogic_thermal.c
index ccb1fe18e993..3947f3c1f91f 100644
--- a/drivers/thermal/amlogic_thermal.c
+++ b/drivers/thermal/amlogic_thermal.c
@@ -104,6 +104,8 @@ struct amlogic_thermal {
u32 trim_info;
};
+static struct amlogic_thermal *amlogic_thermal_data_ptr;
+
/*
* Calculate a temperature value from a temperature code.
* The unit of the temperature is degree milliCelsius.
@@ -194,6 +196,21 @@ static int amlogic_thermal_get_temp(void *data, int *temp)
return 0;
}
+int meson_g12_get_temperature(void)
+{
+ int temp;
+ int ret;
+
+ ret = amlogic_thermal_get_temp(amlogic_thermal_data_ptr, &temp);
+ if (ret) {
+ printk("amlogic_thermal_get_temp() failed!\n");
+ return ret;
+ }
+
+ return temp / 1000;
+}
+EXPORT_SYMBOL(meson_g12_get_temperature);
+
static const struct thermal_zone_of_device_ops amlogic_thermal_ops = {
.get_temp = amlogic_thermal_get_temp,
};
@@ -248,6 +265,8 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
if (!pdata)
return -ENOMEM;
+ amlogic_thermal_data_ptr = pdata;
+
pdata->data = of_device_get_match_data(dev);
pdata->pdev = pdev;
platform_set_drvdata(pdev, pdata);
--
2.17.1

481
patch/kernel/archive/meson64-5.15/board-VIM2-add-GPIO-FAN-driver-for-V12-version.patch Normal file
View File

@@ -0,0 +1,481 @@
From 037976f20acf9b7d0240fae01870b78580929c24 Mon Sep 17 00:00:00 2001
From: Nick Xie <nick@khadas.com>
Date: Wed, 25 Dec 2019 11:32:49 +0800
Subject: [PATCH 099/101] VIM2: add GPIO FAN driver for V12 version
Signed-off-by: Nick Xie <nick@khadas.com>
---
.../dts/amlogic/meson-gxm-khadas-vim2.dts | 12 +
drivers/misc/Kconfig | 6 +
drivers/misc/Makefile | 1 +
drivers/misc/khadas-fan.c | 407 ++++++++++++++++++
4 files changed, 426 insertions(+)
create mode 100644 drivers/misc/khadas-fan.c
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index f9ec3f3efbe1..fc618b72d5b5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -56,7 +56,19 @@
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
+ fan {
+ compatible = "fanctl";
+ fan_ctl0 = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
+ fan_ctl1 = <&gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
+ trig_temp_level0 = <50>;
+ trig_temp_level1 = <60>;
+ trig_temp_level2 = <70>;
+ hwver = "VIM2.V12"; /* Will be updated in uboot. */
+ status = "okay";
+ };
+
gpio_fan: gpio-fan {
+ status = "disabled";
compatible = "gpio-fan";
gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
&gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index fb0a3830fd87..264e39ccc330 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -465,6 +465,12 @@ config PVPANIC
a paravirtualized device provided by QEMU; it lets a virtual machine
(guest) communicate panic events to the host.
+config KHADAS_FAN
+ tristate "Khadas FAN"
+ default y
+ help
+ This driver is for Khadas FAN.
+
config KHADAS_MCU
tristate "Khadas boards on-board MCU"
help
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9bbf2a479405..c24a29e12f1f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -57,4 +57,5 @@ obj-y += cardreader/
obj-$(CONFIG_HABANA_AI) += habanalabs/
obj-$(CONFIG_UACCE) += uacce/
obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
+obj-$(CONFIG_KHADAS_FAN) += khadas-fan.o
obj-$(CONFIG_KHADAS_MCU) += khadas-mcu.o
diff --git a/drivers/misc/khadas-fan.c b/drivers/misc/khadas-fan.c
new file mode 100644
index 000000000000..ee0fd42a9dae
--- /dev/null
+++ b/drivers/misc/khadas-fan.c
@@ -0,0 +1,407 @@
+/*
+ * gpio-fan.c - driver for fans controlled by GPIO.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/time.h>
+#include <linux/workqueue.h>
+
+#define KHADAS_FAN_TRIG_TEMP_LEVEL0 50 // 50 degree if not set
+#define KHADAS_FAN_TRIG_TEMP_LEVEL1 60 // 60 degree if not set
+#define KHADAS_FAN_TRIG_TEMP_LEVEL2 70 // 70 degree if not set
+#define KHADAS_FAN_TRIG_MAXTEMP 80
+#define KHADAS_FAN_LOOP_SECS 30 * HZ // 30 seconds
+#define KHADAS_FAN_TEST_LOOP_SECS 5 * HZ // 5 seconds
+#define KHADAS_FAN_LOOP_NODELAY_SECS 0
+#define KHADAS_FAN_GPIO_OFF 0
+#define KHADAS_FAN_GPIO_ON 1
+
+enum khadas_fan_mode {
+ KHADAS_FAN_STATE_MANUAL = 0,
+ KHADAS_FAN_STATE_AUTO,
+};
+
+enum khadas_fan_level {
+ KHADAS_FAN_LEVEL_0 = 0,
+ KHADAS_FAN_LEVEL_1,
+ KHADAS_FAN_LEVEL_2,
+ KHADAS_FAN_LEVEL_3,
+};
+
+enum khadas_fan_enable {
+ KHADAS_FAN_DISABLE = 0,
+ KHADAS_FAN_ENABLE,
+};
+
+enum khadas_fan_hwver {
+ KHADAS_FAN_HWVER_NONE = 0,
+ KHADAS_FAN_HWVER_V12,
+ KHADAS_FAN_HWVER_V13,
+ KHADAS_FAN_HWVER_V14
+};
+
+struct khadas_fan_data {
+ int initialized;
+ struct platform_device *pdev;
+ struct class *class;
+ struct delayed_work work;
+ struct delayed_work fan_test_work;
+ enum khadas_fan_enable enable;
+ enum khadas_fan_mode mode;
+ enum khadas_fan_level level;
+ int ctrl_gpio0;
+ int ctrl_gpio1;
+ int trig_temp_level0;
+ int trig_temp_level1;
+ int trig_temp_level2;
+ enum khadas_fan_hwver hwver;
+};
+
+struct khadas_fan_data *fan_data = NULL;
+
+void khadas_fan_level_set(struct khadas_fan_data *fan_data, int level )
+{
+ if(0 == level){
+ gpio_set_value(fan_data->ctrl_gpio0, KHADAS_FAN_GPIO_OFF);
+ gpio_set_value(fan_data->ctrl_gpio1, KHADAS_FAN_GPIO_OFF);
+ }else if(1 == level){
+ gpio_set_value(fan_data->ctrl_gpio0, KHADAS_FAN_GPIO_ON);
+ gpio_set_value(fan_data->ctrl_gpio1, KHADAS_FAN_GPIO_OFF);
+ }else if(2 == level){
+ gpio_set_value(fan_data->ctrl_gpio0, KHADAS_FAN_GPIO_OFF);
+ gpio_set_value(fan_data->ctrl_gpio1, KHADAS_FAN_GPIO_ON);
+ }else if(3 == level){
+ gpio_set_value(fan_data->ctrl_gpio0, KHADAS_FAN_GPIO_ON);
+ gpio_set_value(fan_data->ctrl_gpio1, KHADAS_FAN_GPIO_ON);
+ }
+}
+
+extern int meson_gx_get_temperature(void);
+static void fan_work_func(struct work_struct *_work)
+{
+ int temp = -EINVAL;
+ struct khadas_fan_data *fan_data = container_of(_work,
+ struct khadas_fan_data, work.work);
+
+ temp = meson_gx_get_temperature();
+
+ if(temp != -EINVAL){
+ if(temp < fan_data->trig_temp_level0 ){
+ khadas_fan_level_set(fan_data,0);
+
+ }else if(temp < fan_data->trig_temp_level1 ){
+ khadas_fan_level_set(fan_data,1);
+
+ }else if(temp < fan_data->trig_temp_level2 ){
+ khadas_fan_level_set(fan_data,2);
+
+ }else{
+ khadas_fan_level_set(fan_data,3);
+ }
+ }
+
+ schedule_delayed_work(&fan_data->work, KHADAS_FAN_LOOP_SECS);
+}
+
+//static void fan_test_work_func(struct work_struct *_work)
+//{
+// struct khadas_fan_data *fan_data = container_of(_work,
+// struct khadas_fan_data, fan_test_work.work);
+//
+//
+// khadas_fan_level_set(fan_data,0);
+//
+//}
+
+
+static void khadas_fan_set(struct khadas_fan_data *fan_data)
+{
+
+ cancel_delayed_work(&fan_data->work);
+
+ if (fan_data->enable == KHADAS_FAN_DISABLE) {
+ khadas_fan_level_set(fan_data,0);
+ return;
+ }
+ switch (fan_data->mode) {
+ case KHADAS_FAN_STATE_MANUAL:
+ switch(fan_data->level){
+ case KHADAS_FAN_LEVEL_1:
+ khadas_fan_level_set(fan_data,1);
+ break;
+ case KHADAS_FAN_LEVEL_2:
+ khadas_fan_level_set(fan_data,2);
+ break;
+ case KHADAS_FAN_LEVEL_3:
+ khadas_fan_level_set(fan_data,3);
+ break;
+ default:
+ break;
+ }
+ break;
+
+ case KHADAS_FAN_STATE_AUTO:
+ // FIXME: achieve with a better way
+ schedule_delayed_work(&fan_data->work, KHADAS_FAN_LOOP_NODELAY_SECS);
+ break;
+
+ default:
+ break;
+ }
+}
+
+static ssize_t fan_enable_show(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan enable: %d\n", fan_data->enable);
+}
+
+static ssize_t fan_enable_store(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int enable;
+
+ if (kstrtoint(buf, 0, &enable))
+ return -EINVAL;
+
+ // 0: manual, 1: auto
+ if( enable >= 0 && enable < 2 ){
+ fan_data->enable = enable;
+ khadas_fan_set(fan_data);
+ }
+
+ return count;
+}
+
+static ssize_t fan_mode_show(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan mode: %d\n", fan_data->mode);
+}
+
+static ssize_t fan_mode_store(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int mode;
+
+ if (kstrtoint(buf, 0, &mode))
+ return -EINVAL;
+
+ // 0: manual, 1: auto
+ if( mode >= 0 && mode < 2 ){
+ fan_data->mode = mode;
+ khadas_fan_set(fan_data);
+ }
+
+ return count;
+}
+
+static ssize_t fan_level_show(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ return sprintf(buf, "Fan level: %d\n", fan_data->level);
+}
+
+static ssize_t fan_level_store(struct class *cls, struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ int level;
+
+ if (kstrtoint(buf, 0, &level))
+ return -EINVAL;
+
+ if( level >= 0 && level < 4){
+ fan_data->level = level;
+ khadas_fan_set(fan_data);
+ }
+
+ return count;
+}
+
+
+static ssize_t fan_temp_show(struct class *cls,
+ struct class_attribute *attr, char *buf)
+{
+ int temp = -EINVAL;
+ temp = meson_gx_get_temperature();
+
+ return sprintf(buf, "cpu_temp:%d\nFan trigger temperature: level0:%d level1:%d level2:%d\n", temp, fan_data->trig_temp_level0, fan_data->trig_temp_level1, fan_data->trig_temp_level2);
+}
+
+#if 0
+static ssize_t fan_temp_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct khadas_fan_data *fan_data = dev_get_drvdata(dev);
+ int temp;
+
+ if (kstrtoint(buf, 0, &temp))
+ return -EINVAL;
+
+ if (temp > KHADAS_FAN_TRIG_MAXTEMP)
+ temp = KHADAS_FAN_TRIG_MAXTEMP;
+ fan_data->trig_temp_level0 = temp;
+
+ return count;
+}
+#endif
+
+static struct class_attribute fan_class_attrs[] = {
+ __ATTR(enable, 0644, fan_enable_show, fan_enable_store),
+ __ATTR(mode, 0644, fan_mode_show, fan_mode_store),
+ __ATTR(level, 0644, fan_level_show, fan_level_store),
+ __ATTR(temp, 0644, fan_temp_show, NULL),
+};
+
+static int khadas_fan_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ int ret;
+ int i;
+ const char *hwver = NULL;
+
+ printk("khadas_fan_probe\n");
+
+ fan_data = devm_kzalloc(dev, sizeof(struct khadas_fan_data), GFP_KERNEL);
+ if (!fan_data)
+ return -ENOMEM;
+
+ // Get hardwere version
+ ret = of_property_read_string(dev->of_node, "hwver", &hwver);
+ if (ret < 0) {
+ fan_data->hwver = KHADAS_FAN_HWVER_V12;
+ } else {
+ if (0 == strcmp(hwver, "VIM2.V12")) {
+ fan_data->hwver = KHADAS_FAN_HWVER_V12;
+ } else if (0 == strcmp(hwver, "VIM2.V13")) {
+ fan_data->hwver = KHADAS_FAN_HWVER_V13;
+ } else if (0 == strcmp(hwver, "VIM2.V14")) {
+ fan_data->hwver = KHADAS_FAN_HWVER_V14;
+ }
+ else {
+ fan_data->hwver = KHADAS_FAN_HWVER_NONE;
+ }
+ }
+
+ if (KHADAS_FAN_HWVER_V12 != fan_data->hwver) {
+ // This driver is only for Khadas VIM2 V12 version.
+ printk("FAN: This driver is only for Khadas VIM2 V12 version.\n");
+ return 0;
+ }
+
+ ret = of_property_read_u32(dev->of_node, "trig_temp_level0", &fan_data->trig_temp_level0);
+ if (ret < 0)
+ fan_data->trig_temp_level0 = KHADAS_FAN_TRIG_TEMP_LEVEL0;
+ ret = of_property_read_u32(dev->of_node, "trig_temp_level1", &fan_data->trig_temp_level1);
+ if (ret < 0)
+ fan_data->trig_temp_level1 = KHADAS_FAN_TRIG_TEMP_LEVEL1;
+ ret = of_property_read_u32(dev->of_node, "trig_temp_level2", &fan_data->trig_temp_level2);
+ if (ret < 0)
+ fan_data->trig_temp_level2 = KHADAS_FAN_TRIG_TEMP_LEVEL2;
+
+ fan_data->ctrl_gpio0 = of_get_named_gpio(dev->of_node, "fan_ctl0", 0);
+ fan_data->ctrl_gpio1 = of_get_named_gpio(dev->of_node, "fan_ctl1", 0);
+ if ((gpio_request(fan_data->ctrl_gpio0, "FAN") != 0)|| (gpio_request(fan_data->ctrl_gpio1, "FAN") != 0))
+ return -EIO;
+
+ gpio_direction_output(fan_data->ctrl_gpio0, KHADAS_FAN_GPIO_OFF);
+ gpio_direction_output(fan_data->ctrl_gpio1, KHADAS_FAN_GPIO_OFF);
+ fan_data->mode = KHADAS_FAN_STATE_AUTO;
+ fan_data->level = KHADAS_FAN_LEVEL_0;
+ fan_data->enable = KHADAS_FAN_DISABLE;
+
+ INIT_DELAYED_WORK(&fan_data->work, fan_work_func);
+ khadas_fan_level_set(fan_data,0);
+// INIT_DELAYED_WORK(&fan_data->fan_test_work, fan_test_work_func);
+// schedule_delayed_work(&fan_data->fan_test_work, KHADAS_FAN_TEST_LOOP_SECS);
+
+ fan_data->pdev = pdev;
+ platform_set_drvdata(pdev, fan_data);
+
+ fan_data->class = class_create(THIS_MODULE, "fan");
+ if (IS_ERR(fan_data->class)) {
+ return PTR_ERR(fan_data->class);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(fan_class_attrs); i++){
+ ret = class_create_file(fan_data->class, &fan_class_attrs[i]);
+ if(0!=ret){
+ printk("khadas_fan_probe,class_create_file%d failed \n", i);
+ }
+ }
+ dev_info(dev, "trigger temperature is level0:%d, level1:%d, level2:%d.\n", fan_data->trig_temp_level0, fan_data->trig_temp_level1, fan_data->trig_temp_level2);
+
+ fan_data->initialized = 1;
+
+ return 0;
+}
+
+static int khadas_fan_remove(struct platform_device *pdev)
+{
+ if (fan_data->initialized) {
+ fan_data->enable = KHADAS_FAN_DISABLE;
+ khadas_fan_set(fan_data);
+ }
+
+ return 0;
+}
+
+static void khadas_fan_shutdown(struct platform_device *pdev)
+{
+ if (fan_data->initialized) {
+ fan_data->enable = KHADAS_FAN_DISABLE;
+ khadas_fan_set(fan_data);
+ }
+}
+
+#ifdef CONFIG_PM
+static int khadas_fan_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ if (fan_data->initialized) {
+ cancel_delayed_work(&fan_data->work);
+ khadas_fan_level_set(fan_data, 0);
+ }
+
+ return 0;
+}
+
+static int khadas_fan_resume(struct platform_device *pdev)
+{
+ if (fan_data->initialized) {
+ khadas_fan_set(fan_data);
+ }
+
+ return 0;
+}
+#endif
+
+static struct of_device_id of_khadas_fan_match[] = {
+ { .compatible = "fanctl", },
+ {},
+};
+
+static struct platform_driver khadas_fan_driver = {
+ .probe = khadas_fan_probe,
+#ifdef CONFIG_PM
+ .suspend = khadas_fan_suspend,
+ .resume = khadas_fan_resume,
+#endif
+ .remove = khadas_fan_remove,
+ .shutdown = khadas_fan_shutdown,
+ .driver = {
+ .name = "fanctl",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(of_khadas_fan_match),
+ },
+};
+
+module_platform_driver(khadas_fan_driver);
+
+MODULE_AUTHOR("kenny <kenny@khadas.com>");
+MODULE_DESCRIPTION("khadas GPIO Fan driver");
+MODULE_LICENSE("GPL");
--
2.17.1

29
patch/kernel/archive/meson64-5.15/board-VIM3-disable-sd-uhs-sdr50-to-fix-AP63.patch Normal file
View File

@@ -0,0 +1,29 @@
From 21c5b2840c068b8640e43ce61f9e26b67f48ecc9 Mon Sep 17 00:00:00 2001
From: Nick Xie <nick@khadas.com>
Date: Thu, 19 Dec 2019 21:40:58 +0800
Subject: [PATCH 097/101] arm64: dts: SDIO: VIM3: disable 'sd-uhs-sdr50' to fix
AP6398S
Signed-off-by: Nick Xie <nick@khadas.com>
---
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
index 124a80901084..d855c79a8288 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
@@ -15,6 +15,10 @@
compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
};
+&sd_emmc_a {
+ /delete-property/ sd-uhs-sdr50;
+};
+
/*
* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
--
2.17.1

38
patch/kernel/archive/meson64-5.15/board-khadas-vim3-fix-missing-i2c3-nod.patch Normal file
View File

@@ -0,0 +1,38 @@
From 04ba78002ded0f9089b7fae6550a56ccd0669e65 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 21 Feb 2020 04:43:22 +0000
Subject: [PATCH 086/101] WIP: arm64: dts: meson: khadas-vim3: fix missing i2c3
node
Fixes: c6d29c66e582 ("arm64: dts: meson-g12b-khadas-vim3: add initial device-tree")
The i2c3 node was missed in the original device-tree and is required for the
optional Khadas 3705 fan to work.
Suggested-by: Art Nikpal <email2tema@gmail.com>
Signed-off-by: Christian Hewittt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index 0ef60c7151cb..6022805d2032 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -217,6 +217,13 @@
};
};
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&i2c_AO {
status = "okay";
pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
--
2.17.1

38
patch/kernel/archive/meson64-5.15/board-nanopi-k2-add-spidev.patch Normal file
View File

@@ -0,0 +1,38 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index fa4d9f927..b498186a5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -162,6 +162,32 @@
};
};
};
+
+ spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ ranges;
+ status = "ok";
+ sck-gpios = <&gpio GPIOY_9 0>;
+ miso-gpios = <&gpio GPIOY_7 0>;
+ mosi-gpios = <&gpio GPIOY_5 0>;
+ cs-gpios = <&gpio GPIOY_8 0
+ &gpio GPIOY_10 0>;
+ num-chipselects = <2>;
+
+ /* clients */
+ spidev0@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <500000>;
+ };
+ spidev0@1 {
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <500000>;
+ };
+ };
};
&audio {

12
patch/kernel/archive/meson64-5.15/board-nanopi-k2-add-uartC-alias.patch Normal file
View File

@@ -0,0 +1,12 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index cbe99bd..80c87e0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -13,6 +13,7 @@
aliases {
serial0 = &uart_AO;
+ serial2 = &uart_C;
ethernet0 = &ethmac;
};

22
patch/kernel/archive/meson64-5.15/board-nanopi-k2-enable-emmc.patch Normal file
View File

@@ -0,0 +1,22 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 80c87e0bb..340559727 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -382,7 +382,7 @@
/* eMMC */
&sd_emmc_c {
- status = "disabled";
+ status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
@@ -392,8 +392,6 @@
non-removable;
disable-wp;
cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc3v3>;

32
patch/kernel/archive/meson64-5.15/board-odroidc2-add-uartA-uartC.patch Normal file
View File

@@ -0,0 +1,32 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 1cc9dc6..9f48dff 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -16,6 +16,8 @@
aliases {
serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_C;
ethernet0 = &ethmac;
};
@@ -290,6 +355,18 @@
pinctrl-names = "default";
};
+&uart_A {
+ status = "disabled";
+ pinctrl-0 = <&uart_a_pins>;
+ pinctrl-names = "default";
+};
+
+&uart_C {
+ status = "disabled";
+ pinctrl-0 = <&uart_c_pins>;
+ pinctrl-names = "default";
+};
+
&usb0_phy {
status = "okay";
phy-supply = <&usb_otg_pwr>;

37
patch/kernel/archive/meson64-5.15/board-odroidc2-enable-SPI.patch Normal file
View File

@@ -0,0 +1,37 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 0916dcb..cbc03df 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -116,6 +116,32 @@
};
};
};
+
+ spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ ranges;
+ status = "disabled";
+ sck-gpios = <&gpio GPIOX_2 0>;
+ miso-gpios = <&gpio GPIOX_4 0>;
+ mosi-gpios = <&gpio GPIOX_7 0>;
+ cs-gpios = <&gpio GPIOX_3 0
+ &gpio GPIOX_1 0>;
+ num-chipselects = <2>;
+
+ /* clients */
+ spidev0@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <500000>;
+ };
+ spidev0@1 {
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <500000>;
+ };
+ };
sound {
compatible = "simple-audio-card";

14
patch/kernel/archive/meson64-5.15/board-odroidc2-enable-scpi-dvfs.patch Normal file
View File

@@ -0,0 +1,14 @@
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index d147c853a..dbde670ba 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -246,7 +246,8 @@
};
&scpi_clocks {
- status = "disabled";
+ /* Works only with new blobs that have limited DVFS table */
+ status = "okay";
};
/* SD */

64
patch/kernel/archive/meson64-5.15/board-tanix-tx3-add-thermal-zones.patch Normal file
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@@ -0,0 +1,64 @@
diff -Naur linux-5.3-rc8-old/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts linux-5.3-rc8-new/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts
--- linux-5.3-rc8-old/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts 2019-09-10 13:18:29.000000007 +0200
+++ linux-5.3-rc8-new/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts 2019-09-10 11:51:15.700000008 +0200
@@ -10,6 +10,7 @@
#include "meson-gxl-s905x.dtsi"
#include "meson-gx-p23x-q20x.dtsi"
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "oranth,tx3-mini", "amlogic,s905w", "amlogic,meson-gxl";
@@ -19,8 +20,49 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>; /* 1 GiB or 2 GiB */
};
-};
-&ir {
- linux,rc-map-name = "rc-tanix-tx3mini";
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+
+ thermal-sensors = <&scpi_sensors 0>;
+
+ trips {
+ cpu_alert0: cpu-alert0 {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "active";
+ };
+
+ cpu_alert1: cpu-alert1 {
+ temperature = <80000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
+ };
+
+ map1 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
+ };
+ };
+ };
+ };
+
+ gpio_fan: gpio-fan {
+ compatible = "gpio-fan";
+ /* Dummy RPM values since fan is optional */
+ gpio-fan,speed-map = <0 0
+ 1 1
+ 2 2
+ 3 3>;
+ #cooling-cells = <2>;
+ };
};

53
patch/kernel/archive/meson64-5.15/docs-FROMLIST-dt-bindings-display-bridge-lvds-codec-Add-n.patch Normal file
View File

@@ -0,0 +1,53 @@
From a248c9db1deae60a1d77d094599a81a1639976d1 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 22 Oct 2019 16:15:50 +0200
Subject: [PATCH 065/101] FROMLIST: dt-bindings: display: bridge: lvds-codec:
Add new bus-width prop
Add the bus-width property to describe the input bus format.
v10:
* Add changelog to the commit message
* Add Rob's R-b
v8 -> v9:
* No changes
v7:
* Rebase on top of lvds-codec changes
* Drop the data-mapping property
v4 -> v6:
* Not part of the series
v3:
* New patch
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/display/bridge/lvds-codec.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml
index 8f373029f5d2..7c4e42f4de61 100644
--- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml
@@ -55,6 +55,14 @@ properties:
description: |
For LVDS encoders, port 0 is the parallel input
For LVDS decoders, port 0 is the LVDS input
+ properties:
+ bus-width:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [18, 24]
+ - default: 24
+ description:
+ Number of data lines used to transmit the RGB data.
port@1:
type: object
--
2.17.1

173
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-fifo-to-schema.patch Normal file
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@@ -0,0 +1,173 @@
From a97f73e2f405892e47e27b7382b18a055c9cfec5 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 15:40:25 +0100
Subject: [PATCH 037/101] WIP: ASoC: meson: convert axg fifo to schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-fifo.txt | 34 ------
.../bindings/sound/amlogic,axg-fifo.yaml | 111 ++++++++++++++++++
2 files changed, 111 insertions(+), 34 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt
deleted file mode 100644
index fa4545ed81ca..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt
+++ /dev/null
@@ -1,34 +0,0 @@
-* Amlogic Audio FIFO controllers
-
-Required properties:
-- compatible: 'amlogic,axg-toddr' or
- 'amlogic,axg-toddr' or
- 'amlogic,g12a-frddr' or
- 'amlogic,g12a-toddr' or
- 'amlogic,sm1-frddr' or
- 'amlogic,sm1-toddr'
-- reg: physical base address of the controller and length of memory
- mapped region.
-- interrupts: interrupt specifier for the fifo.
-- clocks: phandle to the fifo peripheral clock provided by the audio
- clock controller.
-- resets: list of reset phandle, one for each entry reset-names.
-- reset-names: should contain the following:
- * "arb" : memory ARB line (required)
- * "rst" : dedicated device reset line (optional)
-- #sound-dai-cells: must be 0.
-- amlogic,fifo-depth: The size of the controller's fifo in bytes. This
- is useful for determining certain configuration such
- as the flush threshold of the fifo
-
-Example of FRDDR A on the A113 SoC:
-
-frddr_a: audio-controller@1c0 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x1c>;
- #sound-dai-cells = <0>;
- interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>;
- fifo-depth = <512>;
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml
new file mode 100644
index 000000000000..d9fe4f624784
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-fifo.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic AXG Audio FIFO controllers
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ oneOf:
+ - items:
+ - const:
+ amlogic,axg-toddr
+ - items:
+ - const:
+ amlogic,axg-frddr
+ - items:
+ - enum:
+ - amlogic,g12a-toddr
+ - amlogic,sm1-toddr
+ - const:
+ amlogic,axg-toddr
+ - items:
+ - enum:
+ - amlogic,g12a-frddr
+ - amlogic,sm1-frddr
+ - const:
+ amlogic,axg-frddr
+
+ clocks:
+ items:
+ - description: Peripheral clock
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ resets:
+ minItems: 1
+ items:
+ - description: Memory ARB line
+ - description: Dedicated device reset line
+
+ reset-names:
+ minItems: 1
+ items:
+ - const: arb
+ - const: rst
+
+ amlogic,fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Size of the controller's fifo in bytes
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - interrupts
+ - reg
+ - clocks
+ - resets
+ - amlogic,fifo-depth
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-toddr
+ - amlogic,sm1-toddr
+ - amlogic,g12a-frddr
+ - amlogic,sm1-frddr
+then:
+ properties:
+ resets:
+ minItems: 2
+ reset-names:
+ minItems: 2
+ required:
+ - reset-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
+ #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
+
+ frddr_a: audio-controller@1c0 {
+ compatible = "amlogic,g12a-frddr", "amlogic,axg-frddr";
+ reg = <0x0 0x1c0 0x0 0x1c>;
+ #sound-dai-cells = <0>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
+ resets = <&arb AXG_ARB_FRDDR_A>, <&clkc_audio AUD_RESET_FRDDR_A>;
+ reset-names = "arb", "rst";
+ amlogic,fifo-depth = <512>;
+ };
+
--
2.17.1

136
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-pdm-to-schema.patch Normal file
View File

@@ -0,0 +1,136 @@
From 74524d2255deea105d57a441b266655a304b27f5 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 12:13:40 +0100
Subject: [PATCH 036/101] WIP: ASoC: meson: convert axg pdm to schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-pdm.txt | 29 -------
.../bindings/sound/amlogic,axg-pdm.yaml | 79 +++++++++++++++++++
2 files changed, 79 insertions(+), 29 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt
deleted file mode 100644
index 716878107a24..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-* Amlogic Audio PDM input
-
-Required properties:
-- compatible: 'amlogic,axg-pdm' or
- 'amlogic,g12a-pdm' or
- 'amlogic,sm1-pdm'
-- reg: physical base address of the controller and length of memory
- mapped region.
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "pclk" : peripheral clock.
- * "dclk" : pdm digital clock
- * "sysclk" : dsp system clock
-- #sound-dai-cells: must be 0.
-
-Optional property:
-- resets: phandle to the dedicated reset line of the pdm input.
-
-Example of PDM on the A113 SoC:
-
-pdm: audio-controller@ff632000 {
- compatible = "amlogic,axg-pdm";
- reg = <0x0 0xff632000 0x0 0x34>;
- #sound-dai-cells = <0>;
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml
new file mode 100644
index 000000000000..aa90b77e593d
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-pdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio AXG PDM input
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - amlogic,g12a-pdm
+ - amlogic,sm1-pdm
+ - const:
+ amlogic,axg-pdm
+ - items:
+ - const:
+ amlogic,axg-pdm
+
+ clocks:
+ items:
+ - description: Peripheral clock
+ - description: PDM digital clock
+ - description: DSP system clock
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: dclk
+ - const: sysclk
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-pdm
+ - amlogic,sm1-pdm
+then:
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+
+ pdm: audio-controller@ff632000 {
+ compatible = "amlogic,axg-pdm";
+ reg = <0x0 0xff632000 0x0 0x34>;
+ #sound-dai-cells = <0>;
+ clocks = <&clkc_audio AUD_CLKID_PDM>,
+ <&clkc_audio AUD_CLKID_PDM_DCLK>,
+ <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
+ clock-names = "pclk", "dclk", "sysclk";
+ };
--
2.17.1

334
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-sound-card-control-to-sch.patch Normal file
View File

@@ -0,0 +1,334 @@
From 3b0d0fb9fb7faf1b00703693500a666be85209a0 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 18:23:36 +0100
Subject: [PATCH 041/101] WIP: ASoC: meson: convert axg sound card control to
schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-sound-card.txt | 124 ------------
.../sound/amlogic,axg-sound-card.yaml | 181 ++++++++++++++++++
2 files changed, 181 insertions(+), 124 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt
deleted file mode 100644
index 80b411296480..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt
+++ /dev/null
@@ -1,124 +0,0 @@
-Amlogic AXG sound card:
-
-Required properties:
-
-- compatible: "amlogic,axg-sound-card"
-- model : User specified audio sound card name, one string
-
-Optional properties:
-
-- audio-aux-devs : List of phandles pointing to auxiliary devices
-- audio-widgets : Please refer to widgets.txt.
-- audio-routing : A list of the connections between audio components.
-
-Subnodes:
-
-- dai-link: Container for dai-link level properties and the CODEC
- sub-nodes. There should be at least one (and probably more)
- subnode of this type.
-
-Required dai-link properties:
-
-- sound-dai: phandle and port of the CPU DAI.
-
-Required TDM Backend dai-link properties:
-- dai-format : CPU/CODEC common audio format
-
-Optional TDM Backend dai-link properties:
-- dai-tdm-slot-rx-mask-{0,1,2,3}: Receive direction slot masks
-- dai-tdm-slot-tx-mask-{0,1,2,3}: Transmit direction slot masks
- When omitted, mask is assumed to have to no
- slots. A valid must have at one slot, so at
- least one these mask should be provided with
- an enabled slot.
-- dai-tdm-slot-num : Please refer to tdm-slot.txt.
- If omitted, slot number is set to accommodate the largest
- mask provided.
-- dai-tdm-slot-width : Please refer to tdm-slot.txt. default to 32 if omitted.
-- mclk-fs : Multiplication factor between stream rate and mclk
-
-Backend dai-link subnodes:
-
-- codec: dai-link representing backend links should have at least one subnode.
- One subnode for each codec of the dai-link.
- dai-link representing frontend links have no codec, therefore have no
- subnodes
-
-Required codec subnodes properties:
-
-- sound-dai: phandle and port of the CODEC DAI.
-
-Optional codec subnodes properties:
-
-- dai-tdm-slot-tx-mask : Please refer to tdm-slot.txt.
-- dai-tdm-slot-rx-mask : Please refer to tdm-slot.txt.
-
-Example:
-
-sound {
- compatible = "amlogic,axg-sound-card";
- model = "AXG-S420";
- audio-aux-devs = <&tdmin_a>, <&tdmout_c>;
- audio-widgets = "Line", "Lineout",
- "Line", "Linein",
- "Speaker", "Speaker1 Left",
- "Speaker", "Speaker1 Right";
- "Speaker", "Speaker2 Left",
- "Speaker", "Speaker2 Right";
- audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 2", "TDM_C Capture",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "Lineout", "Lineout AOUTL",
- "Lineout", "Lineout AOUTR",
- "Speaker1 Left", "SPK1 OUT_A",
- "Speaker2 Left", "SPK2 OUT_A",
- "Speaker1 Right", "SPK1 OUT_B",
- "Speaker2 Right", "SPK2 OUT_B",
- "Linein AINL", "Linein",
- "Linein AINR", "Linein";
-
- dai-link@0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link@1 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link@2 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- dai-tdm-slot-rx-mask-1 = <1 1>;
- mclk-fs = <256>;
-
- codec@0 {
- sound-dai = <&lineout>;
- };
-
- codec@1 {
- sound-dai = <&speaker_amp1>;
- };
-
- codec@2 {
- sound-dai = <&speaker_amp2>;
- };
-
- codec@3 {
- sound-dai = <&linein>;
- };
-
- };
-
- dai-link@3 {
- sound-dai = <&spdifout>;
-
- codec {
- sound-dai = <&spdif_dit>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
new file mode 100644
index 000000000000..168d84b2dcb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
@@ -0,0 +1,181 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic AXG sound card
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ compatible:
+ items:
+ - const: amlogic,axg-sound-card
+
+ audio-aux-devs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: list of auxiliary devices
+
+ audio-routing:
+ $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+ minItems: 2
+ description: |-
+ A list of the connections between audio components. Each entry is a
+ pair of strings, the first being the connection's sink, the second
+ being the connection's source.
+
+ audio-widgets:
+ $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+ minItems: 2
+ description: |-
+ A list off component DAPM widget. Each entry is a pair of strings,
+ the first being the widget type, the second being the widget name
+
+ model:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: User specified audio sound card name
+
+patternProperties:
+ "^dai-link-[0-9]+$":
+ type: object
+ description: |-
+ dai-link child nodes:
+ Container for dai-link level properties and the CODEC sub-nodes.
+ There should be at least one (and probably more) subnode of this type
+
+ properties:
+ dai-format:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ i2s, left-j, dsp_a ]
+
+ dai-tdm-slot-num:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Number of slots in use. If omitted, slot number is set to
+ accommodate the largest mask provided.
+ maximum: 32
+
+ dai-tdm-slot-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Width in bits for each slot
+ enum: [ 8, 16, 20, 24, 32 ]
+ default: 32
+
+ mclk-fs:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |-
+ Multiplication factor between the frame rate and master clock
+ rate
+
+ sound-dai:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle of the CPU DAI
+
+ patternProperties:
+ "^dai-tdm-slot-(t|r)x-mask-[0-3]$":
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |-
+ Transmit and receive cpu slot masks of each TDM lane
+ When omitted, mask is assumed to have to no slots. A valid must have
+ at one slot, so at least one these mask should be provided with
+ an enabled slot.
+
+ "^codec-[0-9]+$":
+ type: object
+ description: |-
+ Codecs:
+ dai-link representing backend links should have at least one subnode.
+ One subnode for each codec of the dai-link. dai-link representing
+ frontend links have no codec, therefore have no subnodes
+
+ properties:
+ sound-dai:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle of the codec DAI
+
+ patternProperties:
+ "^dai-tdm-slot-(t|r)x-mask$":
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: Transmit and receive codec slot masks
+
+ required:
+ - sound-dai
+
+ required:
+ - sound-dai
+
+required:
+ - model
+ - dai-link-0
+
+examples:
+ - |
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "AXG-S420";
+ audio-aux-devs = <&tdmin_a>, <&tdmout_c>;
+ audio-widgets = "Line", "Lineout",
+ "Line", "Linein",
+ "Speaker", "Speaker1 Left",
+ "Speaker", "Speaker1 Right",
+ "Speaker", "Speaker2 Left",
+ "Speaker", "Speaker2 Right";
+ audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
+ "SPDIFOUT IN 0", "FRDDR_A OUT 3",
+ "TDM_C Playback", "TDMOUT_C OUT",
+ "TDMIN_A IN 2", "TDM_C Capture",
+ "TDMIN_A IN 5", "TDM_C Loopback",
+ "TODDR_A IN 0", "TDMIN_A OUT",
+ "Lineout", "Lineout AOUTL",
+ "Lineout", "Lineout AOUTR",
+ "Speaker1 Left", "SPK1 OUT_A",
+ "Speaker2 Left", "SPK2 OUT_A",
+ "Speaker1 Right", "SPK1 OUT_B",
+ "Speaker2 Right", "SPK2 OUT_B",
+ "Linein AINL", "Linein",
+ "Linein AINR", "Linein";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&toddr_a>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&tdmif_c>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ dai-tdm-slot-rx-mask-1 = <1 1>;
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&lineout>;
+ };
+
+ codec-1 {
+ sound-dai = <&speaker_amp1>;
+ };
+
+ codec-2 {
+ sound-dai = <&speaker_amp2>;
+ };
+
+ codec-3 {
+ sound-dai = <&linein>;
+ };
+ };
+
+ dai-link@3 {
+ sound-dai = <&spdifout>;
+
+ codec {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+ };
+
--
2.17.1

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@@ -0,0 +1,139 @@
From d44d6ce650b53d6a05279113e77634405e87e589 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 15:52:03 +0100
Subject: [PATCH 038/101] WIP: ASoC: meson: convert axg spdif input to schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-spdifin.txt | 27 ------
.../bindings/sound/amlogic,axg-spdifin.yaml | 84 +++++++++++++++++++
2 files changed, 84 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt
deleted file mode 100644
index df92a4ecf288..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Amlogic Audio SPDIF Input
-
-Required properties:
-- compatible: 'amlogic,axg-spdifin' or
- 'amlogic,g12a-spdifin' or
- 'amlogic,sm1-spdifin'
-- interrupts: interrupt specifier for the spdif input.
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "pclk" : peripheral clock.
- * "refclk" : spdif input reference clock
-- #sound-dai-cells: must be 0.
-
-Optional property:
-- resets: phandle to the dedicated reset line of the spdif input.
-
-Example on the A113 SoC:
-
-spdifin: audio-controller@400 {
- compatible = "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml
new file mode 100644
index 000000000000..b9b0863c5723
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-spdifin.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio AXG SPDIF Input
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ oneOf:
+ - items:
+ - const:
+ amlogic,axg-spdifin
+ - items:
+ - enum:
+ - amlogic,g12a-spdifin
+ - amlogic,sm1-spdifin
+ - const:
+ amlogic,axg-spdifin
+
+ clocks:
+ items:
+ - description: Peripheral clock
+ - description: SPDIF input reference clock
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: refclk
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-spdifin
+ - amlogic,sm1-spdifin
+then:
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ spdifin: audio-controller@400 {
+ compatible = "amlogic,axg-spdifin";
+ reg = <0x0 0x400 0x0 0x30>;
+ #sound-dai-cells = <0>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
+ <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
+ clock-names = "pclk", "refclk";
+ };
+
--
2.17.1

130
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-spdif-output-to-schema.patch Normal file
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@@ -0,0 +1,130 @@
From 4c8c6dedc0943fcc7a58ea7a41cdd46eda3a69f7 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 15:58:18 +0100
Subject: [PATCH 039/101] WIP: ASoC: meson: convert axg spdif output to schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-spdifout.txt | 25 ------
.../bindings/sound/amlogic,axg-spdifout.yaml | 77 +++++++++++++++++++
2 files changed, 77 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt
deleted file mode 100644
index 28381dd1f633..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-* Amlogic Audio SPDIF Output
-
-Required properties:
-- compatible: 'amlogic,axg-spdifout' or
- 'amlogic,g12a-spdifout' or
- 'amlogic,sm1-spdifout'
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "pclk" : peripheral clock.
- * "mclk" : master clock
-- #sound-dai-cells: must be 0.
-
-Optional property:
-- resets: phandle to the dedicated reset line of the spdif output.
-
-Example on the A113 SoC:
-
-spdifout: audio-controller@480 {
- compatible = "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml
new file mode 100644
index 000000000000..9ac52916f88b
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-spdifout.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio AXG SPDIF Output
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ oneOf:
+ - items:
+ - const:
+ amlogic,axg-spdifout
+ - items:
+ - enum:
+ - amlogic,g12a-spdifout
+ - amlogic,sm1-spdifout
+ - const:
+ amlogic,axg-spdifout
+
+ clocks:
+ items:
+ - description: Peripheral clock
+ - description: SPDIF output master clock
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: mclk
+
+ reg:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: dedicated device reset line
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-spdifout
+ - amlogic,sm1-spdifout
+then:
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+
+ spdifout: audio-controller@480 {
+ compatible = "amlogic,axg-spdifout";
+ reg = <0x0 0x480 0x0 0x50>;
+ #sound-dai-cells = <0>;
+ clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
+ <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
+ clock-names = "pclk", "mclk";
+ };
--
2.17.1

166
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-tdm-formatters-to-schema.patch Normal file
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@@ -0,0 +1,166 @@
From 222de230f3cb9c1452441001807c4ab876e0c959 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 12:00:01 +0100
Subject: [PATCH 035/101] WIP: ASoC: meson: convert axg tdm formatters to
schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../sound/amlogic,axg-tdm-formatters.txt | 36 -------
.../sound/amlogic,axg-tdm-formatters.yaml | 101 ++++++++++++++++++
2 files changed, 101 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
deleted file mode 100644
index 5996c0cd89c2..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-* Amlogic Audio TDM formatters
-
-Required properties:
-- compatible: 'amlogic,axg-tdmin' or
- 'amlogic,axg-tdmout' or
- 'amlogic,g12a-tdmin' or
- 'amlogic,g12a-tdmout' or
- 'amlogic,sm1-tdmin' or
- 'amlogic,sm1-tdmout
-- reg: physical base address of the controller and length of memory
- mapped region.
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "pclk" : peripheral clock.
- * "sclk" : bit clock.
- * "sclk_sel" : bit clock input multiplexer.
- * "lrclk" : sample clock
- * "lrclk_sel": sample clock input multiplexer
-
-Optional property:
-- resets: phandle to the dedicated reset line of the tdm formatter.
-
-Example of TDMOUT_A on the S905X2 SoC:
-
-tdmout_a: audio-controller@500 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
new file mode 100644
index 000000000000..77b994df0c84
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
@@ -0,0 +1,101 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio AXG TDM formatters
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - amlogic,g12a-tdmout
+ - amlogic,sm1-tdmout
+ - const:
+ amlogic,axg-tdmout
+ - items:
+ - const:
+ amlogic,axg-tdmout
+ - items:
+ - enum:
+ - amlogic,g12a-tdmin
+ - amlogic,sm1-tdmin
+ - const:
+ amlogic,axg-tdmin
+ - items:
+ - const:
+ amlogic,axg-tdmin
+
+ clocks:
+ items:
+ - description: Peripheral clock
+ - description: Bit clock
+ - description: Bit clock input multiplexer
+ - description: Sample clock
+ - description: Sample clock input multiplexer
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: sclk
+ - const: sclk_sel
+ - const: lrclk
+ - const: lrclk_sel
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-tdmin
+ - amlogic,sm1-tdmin
+ - amlogic,g12a-tdmout
+ - amlogic,sm1-tdmout
+then:
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+ #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
+
+ tdmout_a: audio-controller@500 {
+ compatible = "amlogic,g12a-tdmout",
+ "amlogic,axg-tdmout";
+ #sound-dai-cells = <0>;
+ reg = <0x0 0x500 0x0 0x40>;
+ resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
+ clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
+ clock-names = "pclk", "sclk", "sclk_sel",
+ "lrclk", "lrclk_sel";
+ };
+
--
2.17.1

107
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-axg-tdm-interface-to-schema.patch Normal file
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@@ -0,0 +1,107 @@
From ea2bee83aa1bb6a88d6862756b9e1602324ca78b Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 11:08:09 +0100
Subject: [PATCH 034/101] WIP: ASoC: meson: convert axg tdm interface to schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,axg-tdm-iface.txt | 22 -------
.../bindings/sound/amlogic,axg-tdm-iface.yaml | 57 +++++++++++++++++++
2 files changed, 57 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt
deleted file mode 100644
index cabfb26a5f22..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* Amlogic Audio TDM Interfaces
-
-Required properties:
-- compatible: 'amlogic,axg-tdm-iface'
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "sclk" : bit clock.
- * "lrclk": sample clock
- * "mclk" : master clock
- -> optional if the interface is in clock slave mode.
-- #sound-dai-cells: must be 0.
-
-Example of TDM_A on the A113 SoC:
-
-tdmif_a: audio-controller@0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml
new file mode 100644
index 000000000000..5f04f9cf30a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio TDM Interfaces
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller-.*"
+
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ items:
+ - const: 'amlogic,axg-tdm-iface'
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+ items:
+ - description: Bit clock
+ - description: Sample clock
+ - description: Master clock #optional
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+ items:
+ - const: sclk
+ - const: lrclk
+ - const: mclk
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - clocks
+ - clock-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+
+ tdmif_a: audio-controller-0 {
+ compatible = "amlogic,axg-tdm-iface";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
+ <&clkc_audio AUD_CLKID_MST_A_LRCLK>,
+ <&clkc_audio AUD_CLKID_MST_A_MCLK>;
+ clock-names = "sclk", "lrclk", "mclk";
+ };
+
--
2.17.1

140
patch/kernel/archive/meson64-5.15/docs-WIP-ASoC-meson-convert-g12a-tohdmitx-control-to-sche.patch Normal file
View File

@@ -0,0 +1,140 @@
From 2c10c55e9061c3ebfb059a54e531c512a9d19aa3 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 24 Jan 2020 16:02:43 +0100
Subject: [PATCH 040/101] WIP: ASoC: meson: convert g12a tohdmitx control to
schema
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../bindings/sound/amlogic,g12a-tohdmitx.txt | 58 -------------------
.../bindings/sound/amlogic,g12a-tohdmitx.yaml | 53 +++++++++++++++++
2 files changed, 53 insertions(+), 58 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt b/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt
deleted file mode 100644
index 4e8cd7eb7cec..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.txt
+++ /dev/null
@@ -1,58 +0,0 @@
-* Amlogic HDMI Tx control glue
-
-Required properties:
-- compatible: "amlogic,g12a-tohdmitx" or
- "amlogic,sm1-tohdmitx"
-- reg: physical base address of the controller and length of memory
- mapped region.
-- #sound-dai-cells: should be 1.
-- resets: phandle to the dedicated reset line of the hdmitx glue.
-
-Example on the S905X2 SoC:
-
-tohdmitx: audio-controller@744 {
- compatible = "amlogic,g12a-tohdmitx";
- reg = <0x0 0x744 0x0 0x4>;
- #sound-dai-cells = <1>;
- resets = <&clkc_audio AUD_RESET_TOHDMITX>;
-};
-
-Example of an 'amlogic,axg-sound-card':
-
-sound {
- compatible = "amlogic,axg-sound-card";
-
-[...]
-
- dai-link-x {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
-
- codec-1 {
- sound-dai = <&external_dac>;
- };
- };
-
- dai-link-y {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
- };
- };
-
- dai-link-z {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.yaml
new file mode 100644
index 000000000000..fdd64d103f33
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-tohdmitx.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,g12a-tohdmitx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic G12a HDMI Tx Control Glue
+
+maintainers:
+ - Jerome Brunet <jbrunet@baylibre.com>
+
+properties:
+ $nodename:
+ pattern: "^audio-controller@.*"
+
+ "#sound-dai-cells":
+ const: 1
+
+ compatible:
+ oneOf:
+ - items:
+ - const:
+ amlogic,g12a-tohdmitx
+ - items:
+ - enum:
+ - amlogic,sm1-tohdmitx
+ - const:
+ amlogic,g12a-tohdmitx
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
+
+ tohdmitx: audio-controller@744 {
+ compatible = "amlogic,g12a-tohdmitx";
+ reg = <0x0 0x744 0x0 0x4>;
+ #sound-dai-cells = <1>;
+ resets = <&clkc_audio AUD_RESET_TOHDMITX>;
+ };
+
+
--
2.17.1

14
patch/kernel/archive/meson64-5.15/driver-rc-drivers-should-produce-alternate-pulse-and-space-timing-events.patch Normal file
View File

@@ -0,0 +1,14 @@
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
index f449b35d25e7..9747426719b2 100644
--- a/drivers/media/rc/meson-ir.c
+++ b/drivers/media/rc/meson-ir.c
@@ -97,7 +97,8 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
status = readl_relaxed(ir->reg + IR_DEC_STATUS);
rawir.pulse = !!(status & STATUS_IR_DEC_IN);
- ir_raw_event_store_with_timeout(ir->rc, &rawir);
+ if (ir_raw_event_store_with_filter(ir->rc, &rawir))
+ ir_raw_event_handle(ir->rc);
spin_unlock(&ir->lock);

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