meson: onecloud: Update GPIO descriptions

This commit is contained in:
hzy
2023-04-01 10:38:00 +08:00
committed by Igor Pečovnik
parent 30566d6f96
commit ae4a1747c1
2 changed files with 109 additions and 102 deletions

View File

@@ -1,13 +1,13 @@
From 88fcc44bde57c647846fc126d4278c8975a55f50 Mon Sep 17 00:00:00 2001
From 7fb30acbbaede99a02cf97c815699db379429dea Mon Sep 17 00:00:00 2001
From: hzy <hzyitc@outlook.com>
Date: Sat, 1 Apr 2023 10:29:11 +0800
Date: Sat, 1 Apr 2023 10:35:39 +0800
Subject: [PATCH 1/2] ARM: dts: meson8b: Add DTS for Xunlei Onecloud
Signed-off-by: hzy <hzyitc@outlook.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/meson8b-onecloud.dts | 403 +++++++++++++++++++++++++
2 files changed, 404 insertions(+)
arch/arm/boot/dts/meson8b-onecloud.dts | 410 +++++++++++++++++++++++++
2 files changed, 411 insertions(+)
create mode 100644 arch/arm/boot/dts/meson8b-onecloud.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
@@ -24,10 +24,10 @@ index 6aa7dc4d..e3a3577b 100644
pxa168-aspenite.dtb \
diff --git a/arch/arm/boot/dts/meson8b-onecloud.dts b/arch/arm/boot/dts/meson8b-onecloud.dts
new file mode 100644
index 00000000..77ffb139
index 00000000..1bb8bd1d
--- /dev/null
+++ b/arch/arm/boot/dts/meson8b-onecloud.dts
@@ -0,0 +1,403 @@
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Author: hzy <hzyitc@outlook.com>
@@ -231,109 +231,116 @@ index 00000000..77ffb139
+
+&gpio {
+ gpio-line-names =
+ // 0-3 Bank GPIOX 0-3
+ "7U1_PIN_18", "7U1_PIN_19",
+ "7U1_PIN_14", "7U1_PIN_15",
+ // 4-7 Bank GPIOX 4-7
+ "7U1_PIN_27", "7U1_PIN_25",
+ "7U1_PIN_28", "7U1_PIN_26",
+ // 8 Bank GPIOX 8
+ "R_RightOf_LED",
+ // 9 Bank GPIOX 9
+ "7U1_PIN_16",
+ // 10 Bank GPIOX 10
+ "",
+ // 11 Bank GPIOX 11
+ "7U1_PIN_12",
+ // 12-16 Bank GPIOX 16-20
+ "7U1_PIN_43", "7U1_PIN_42",
+ "7U1_PIN_41(Resistor)", "7U1_PIN_44",
+ "7U1_PIN_34",
+ // 17 Bank GPIOX 21
+ "7U1_PIN_13",
+ /* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
+ /* 1 */ "WIFI_SDIO_D1 PIN19 (GPIOX_1)",
+ /* 2 */ "WIFI_SDIO_D2 PIN14 (GPIOX_2)",
+ /* 3 */ "WIFI_SDIO_D3 PIN15 (GPIOX_3)",
+ /* 4 */ "WIFI_PCM_DIN PIN27 (GPIOX_4)",
+ /* 5 */ "WIFI_PCM_DOUT PIN25 (GPIOX_5)",
+ /* 6 */ "WIFI_PCM_SYNC PIN28 (GPIOX_6)",
+ /* 7 */ "WIFI_PCM_CLK PIN26 (GPIOX_7)",
+ /* 8 */ "WIFI_SDIO_CLK PIN17_Resistor (GPIOX_8)",
+ /* 9 */ "WIFI_SDIO_CMD PIN16 (GPIOX_9)",
+ /* 10 */ "GPIOX_10",
+ /* 11 */ "WIFI PIN12 (GPIOX_11)",
+ /* 12 */ "WIFI_UART_RX PIN43 (GPIOX_16)",
+ /* 13 */ "WIFI_UART_TX PIN42 (GPIOX_17)",
+ /* 14 */ "WIFI_UART_RTS PIN41_Resistor (GPIOX_18)",
+ /* 15 */ "WIFI_UART_CTS PIN44 (GPIOX_19)",
+ /* 16 */ "WIFI PIN34 (GPIOX_20)",
+ /* 17 */ "WIFI_WAKE PIN13 (GPIOX_21)",
+
+ // 18 Bank GPIOY 0
+ "Resistor_TopOf_LED",
+ // 19-20 Bank GPIOY 1-3
+ "", "",
+ // 21-26 Bank GPIOY 6-11
+ "", "",
+ "", "",
+ "", "",
+ // 27 Bank GPIOY 12
+ "",
+ // 28-29 Bank GPIOY 13-14
+ "Left_BottomOf_CPU", "Right_BottomOf_CPU",
+ /* 18 */ "Resistor_TopOf_LED (GPIOY_0)",
+ /* 19 */ "GPIOY_1",
+ /* 20 */ "GPIOY_3",
+ /* 21 */ "GPIOY_6",
+ /* 22 */ "GPIOY_7",
+ /* 23 */ "GPIOY_8",
+ /* 24 */ "GPIOY_9",
+ /* 25 */ "GPIOY_10",
+ /* 26 */ "GPIOY_11",
+ /* 27 */ "GPIOY_12",
+ /* 28 */ "Left_BottomOf_CPU (GPIOY_13)",
+ /* 29 */ "Right_BottomOf_CPU (GPIOY_14)",
+
+ // 30 Bank GPIODV 9
+ "VCCK_PWM (PWM_C)",
+ // 31-35 Bank GPIODV 24-28
+ "I2CA_SDA", "I2CA_SCL",
+ "I2CB_SDA", "I2CB_SCL",
+ "VDDEE_PWM (PWM_D)",
+ // 36 Bank GPIODV 29
+ "",
+ /* 30 */ "GPIODV_9 (PWM_C)",
+ /* 31 */ "GPIODV_24",
+ /* 32 */ "GPIODV_25",
+ /* 33 */ "GPIODV_26",
+ /* 34 */ "GPIODV_27",
+ /* 35 */ "VCC_CPU_PWM (GPIODV_28)",
+ /* 36 */ "GPIODV_29",
+
+ // 37-39 Bank GPIOH 0-2
+ "HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL",
+ // 40-46 Bank GPIOH 3-9
+ "ETH_PHY_INTR", "ETH_PHY_NRST",
+ "ETH_TXD1", "ETH_TXD0",
+ "ETH_TXD3", "ETH_TXD2",
+ "ETH_RGMII_TX_CLK",
+ /* 37 */ "HDMI_HPD (GPIOH_0)",
+ /* 38 */ "HDMI_SDA (GPIOH_1)",
+ /* 39 */ "HDMI_SCL (GPIOH_2)",
+ /* 40 */ "ETH_PHY_INTR (GPIOH_3)",
+ /* 41 */ "ETH_PHY_nRST (GPIOH_4)",
+ /* 42 */ "ETH_TXD1 (GPIOH_5)",
+ /* 43 */ "ETH_TXD0 (GPIOH_6)",
+ /* 44 */ "ETH_TXD3 (GPIOH_7)",
+ /* 45 */ "ETH_TXD2 (GPIOH_8)",
+ /* 46 */ "ETH_TX_CLK (GPIOH_9)",
+
+ // 47-53 Bank CARD 0-6
+ "SD_D1", "SD_D0",
+ "SD_CLK", "SD_CMD",
+ "SD_D3", "SD_D2",
+ "SD_CD",
+ /* 47 */ "SDCARD_D1 (CARD_0)",
+ /* 48 */ "SDCARD_D0 (CARD_1)",
+ /* 49 */ "SDCARD_CLK (CARD_2)",
+ /* 50 */ "SDCARD_CMD (CARD_3)",
+ /* 51 */ "SDCARD_D3 (CARD_4)",
+ /* 52 */ "SDCARD_D2 (CARD_5)",
+ /* 53 */ "SDCARD_CD (CARD_6)",
+
+ // 54-65 Bank BOOT 0-11
+ "EMMC_D0", "EMMC_D1",
+ "EMMC_D2", "EMMC_D3",
+ "EMMC_D4", "EMMC_D5",
+ "EMMC_D6", "EMMC_D7",
+ "EMMC_CLK", "EMMC_RSTn",
+ "EMMC_CMD", "BOOT_SEL",
+ // 66-72 Bank BOOT 12-18
+ "", "",
+ "", "",
+ "", "",
+ "",
+ /* 54 */ "EMMC_D0 (BOOT_0)",
+ /* 55 */ "EMMC_D1 (BOOT_1)",
+ /* 56 */ "EMMC_D2 (BOOT_2)",
+ /* 57 */ "EMMC_D3 (BOOT_3)",
+ /* 58 */ "EMMC_D4 (BOOT_4)",
+ /* 59 */ "EMMC_D5 (BOOT_5)",
+ /* 60 */ "EMMC_D6 (BOOT_6)",
+ /* 61 */ "EMMC_D7 (BOOT_7)",
+ /* 62 */ "EMMC_CLK (BOOT_8)",
+ /* 63 */ "EMMC_nRST (BOOT_9)",
+ /* 64 */ "EMMC_CMD (BOOT_10)",
+ /* 65 */ "BOOT_11",
+ /* 66 */ "BOOT_12",
+ /* 67 */ "BOOT_13",
+ /* 68 */ "BOOT_14",
+ /* 69 */ "BOOT_15",
+ /* 70 */ "BOOT_16",
+ /* 71 */ "BOOT_17",
+ /* 72 */ "BOOT_18",
+
+ // 73-74 Bank DIF 0P 0N
+ "ETH_RXD1", "ETH_RXD0",
+ // 75-76 Bank DIF 1P 1N
+ "ETH_RX_DV", "RGMII_RX_CLK",
+ // 77-78 Bank DIF 2P 2N
+ "ETH_RXD3", "ETH_RXD2",
+ // 79-80 Bank DIF 3P 3N
+ "ETH_TXEN", "ETH_PHY_REF_CLK_25MOUT",
+ // 81-82 Bank DIF 4P 4N
+ "ETH_MDC", "ETH_MDIO";
+ /* 73 */ "ETH_RXD1 (DIF_0_P)",
+ /* 74 */ "ETH_RXD0 (DIF_0_N)",
+ /* 75 */ "ETH_RX_DV (DIF_1_P)",
+ /* 76 */ "ETH_RX_CLK (DIF_1_N)",
+ /* 77 */ "ETH_RXD3 (DIF_2_P)",
+ /* 78 */ "ETH_RXD2 (DIF_2_N)",
+ /* 79 */ "ETH_TX_EN (DIF_3_P)",
+ /* 80 */ "ETH_REF_CLK (DIF_3_N)",
+ /* 81 */ "ETH_MDC (DIF_4_P)",
+ /* 82 */ "ETH_MDIO_EN (DIF_4_N)";
+};
+
+&gpio_ao {
+ gpio-line-names =
+ // 0-1 Band GPIOAO 0-1
+ "UART TX", "UART RX",
+ // 2-4 Band GPIOAO 2-4
+ "RED_LED", "GREEN_LED", "BLUE_LED",
+ // 5 Band GPIOAO 5
+ "BUTTON",
+ // 6 Band GPIOAO 6
+ "",
+ // 7 Band GPIOAO 7
+ "IR_IN",
+ // 8 Band GPIOAO 8-13
+ "", "",
+ "", "",
+ "", "",
+ /* 0 */ "UART TX (GPIOAO_0)",
+ /* 1 */ "UART RX (GPIOAO_1)",
+ /* 2 */ "RED_LED (GPIOAO_2)",
+ /* 3 */ "GREEN_LED (GPIOAO_3)",
+ /* 4 */ "BLUE_LED (GPIOAO_4)",
+ /* 5 */ "BUTTON (GPIOAO_5)",
+ /* 6 */ "GPIOAO_6",
+ /* 7 */ "IR_IN (GPIOAO_7)",
+ /* 8 */ "GPIOAO_8",
+ /* 9 */ "GPIOAO_9",
+ /* 10 */ "GPIOAO_10",
+ /* 11 */ "GPIOAO_11",
+ /* 12 */ "GPIOAO_12",
+ /* 13 */ "GPIOAO_13",
+
+ // 14 Band GPIO_BSD_EN
+ "",
+ // 15 GPIO_TEST_N
+ "";
+ /* 14 */ "GPIO_BSD_EN",
+ /* 15 */ "GPIO_TEST_N";
+};
+
+// eMMC

View File

@@ -1,4 +1,4 @@
From 46f132f1889e54080612d044f8a053dbe5d210e4 Mon Sep 17 00:00:00 2001
From b4c0a303f45a14b3a355126598b4983d2664e61f Mon Sep 17 00:00:00 2001
From: hzy <hzyitc@outlook.com>
Date: Sat, 1 Apr 2023 10:26:14 +0800
Subject: [PATCH 2/2] ARM: dts: meson8b: onecloud: Support HDMI
@@ -9,7 +9,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
1 file changed, 58 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-onecloud.dts b/arch/arm/boot/dts/meson8b-onecloud.dts
index 77ffb139..bf69afc2 100644
index 1bb8bd1d..585d9e86 100644
--- a/arch/arm/boot/dts/meson8b-onecloud.dts
+++ b/arch/arm/boot/dts/meson8b-onecloud.dts
@@ -80,6 +80,48 @@ blue {
@@ -71,8 +71,8 @@ index 77ffb139..bf69afc2 100644
+
&gpio {
gpio-line-names =
// 0-3 Bank GPIOX 0-3
@@ -396,6 +442,18 @@ &usb1_phy {
/* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
@@ -403,6 +449,18 @@ &usb1_phy {
status = "okay";
};