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fix build kernel media legacy\curren\edge (#4617)

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This commit is contained in:
Oleg
2022-12-27 23:10:15 +03:00
committed by GitHub
parent 36d9420d65
commit 94b921ff2b
81 changed files with 9334 additions and 14690 deletions
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37
config/kernel/linux-media-current.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.0.9 Kernel Configuration
# Linux/arm64 6.0.12 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@@ -1117,6 +1117,7 @@ CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
# CONFIG_INET_ESPINTCP is not set
CONFIG_INET_IPCOMP=m
CONFIG_INET_TABLE_PERTURB_ORDER=16
CONFIG_INET_XFRM_TUNNEL=m
CONFIG_INET_TUNNEL=m
CONFIG_INET_DIAG=m
@@ -6922,36 +6923,6 @@ CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y
#
# end of STMicroelectronics STM32 SOC audio support
CONFIG_SND_SOC_TEGRA=m
CONFIG_SND_SOC_TEGRA20_AC97=m
CONFIG_SND_SOC_TEGRA20_DAS=m
CONFIG_SND_SOC_TEGRA20_I2S=m
CONFIG_SND_SOC_TEGRA20_SPDIF=m
CONFIG_SND_SOC_TEGRA30_AHUB=m
CONFIG_SND_SOC_TEGRA30_I2S=m
CONFIG_SND_SOC_TEGRA210_AHUB=m
CONFIG_SND_SOC_TEGRA210_DMIC=m
CONFIG_SND_SOC_TEGRA210_I2S=m
CONFIG_SND_SOC_TEGRA210_OPE=m
CONFIG_SND_SOC_TEGRA186_ASRC=m
CONFIG_SND_SOC_TEGRA186_DSPK=m
CONFIG_SND_SOC_TEGRA210_ADMAIF=m
CONFIG_SND_SOC_TEGRA210_MVC=m
CONFIG_SND_SOC_TEGRA210_SFC=m
CONFIG_SND_SOC_TEGRA210_AMX=m
CONFIG_SND_SOC_TEGRA210_ADX=m
CONFIG_SND_SOC_TEGRA210_MIXER=m
CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m
CONFIG_SND_SOC_TEGRA_MACHINE_DRV=m
CONFIG_SND_SOC_TEGRA_RT5640=m
CONFIG_SND_SOC_TEGRA_WM8753=m
CONFIG_SND_SOC_TEGRA_WM8903=m
CONFIG_SND_SOC_TEGRA_WM9712=m
CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
CONFIG_SND_SOC_TEGRA_ALC5632=m
CONFIG_SND_SOC_TEGRA_MAX98090=m
CONFIG_SND_SOC_TEGRA_RT5677=m
CONFIG_SND_SOC_TEGRA_SGTL5000=m
CONFIG_SND_SOC_XILINX_I2S=m
CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m
CONFIG_SND_SOC_XILINX_SPDIF=m
@@ -7636,7 +7607,7 @@ CONFIG_USB_CHIPIDEA_PCI=y
CONFIG_USB_CHIPIDEA_MSM=y
CONFIG_USB_CHIPIDEA_IMX=y
CONFIG_USB_CHIPIDEA_GENERIC=y
CONFIG_USB_CHIPIDEA_TEGRA=m
CONFIG_USB_CHIPIDEA_TEGRA=y
CONFIG_USB_ISP1760=y
CONFIG_USB_ISP1760_HCD=y
CONFIG_USB_ISP1761_UDC=y
@@ -7746,7 +7717,7 @@ CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=m
CONFIG_USB_ISP1301=m
CONFIG_USB_TEGRA_PHY=m
CONFIG_USB_TEGRA_PHY=y
CONFIG_USB_ULPI=y
CONFIG_USB_ULPI_VIEWPORT=y
# end of USB Physical Layer drivers

3
config/kernel/linux-media-edge.config
View File

@@ -3769,8 +3769,7 @@ CONFIG_RTL8192C_COMMON=m
CONFIG_RTL8723_COMMON=m
CONFIG_RTLBTCOEXIST=m
CONFIG_RTL8XXXU=m
# CONFIG_RTL8XXXU_UNTESTED is not set
# CONFIG_RTL8723CS is not set
CONFIG_RTL8XXXU_UNTESTED=y
CONFIG_RTW88=m
CONFIG_RTW88_CORE=m
CONFIG_RTW88_PCI=m

259
config/kernel/linux-station-m3-legacy.config → config/kernel/linux-media-legacy.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.10.66 Kernel Configuration
# Linux/arm64 5.10.110 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0"
CONFIG_CC_IS_GCC=y
@@ -218,6 +218,7 @@ CONFIG_BPF_SYSCALL=y
CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
# CONFIG_BPF_JIT_ALWAYS_ON is not set
CONFIG_BPF_JIT_DEFAULT_ON=y
# CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set
# CONFIG_BPF_PRELOAD is not set
# CONFIG_USERFAULTFD is not set
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
@@ -352,6 +353,10 @@ CONFIG_ARM64_ERRATUM_1286807=y
CONFIG_ARM64_ERRATUM_1463225=y
CONFIG_ARM64_ERRATUM_1542419=y
CONFIG_ARM64_ERRATUM_1508412=y
# CONFIG_ARM64_ERRATUM_2051678 is not set
CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
CONFIG_ARM64_ERRATUM_2054223=y
CONFIG_ARM64_ERRATUM_2067961=y
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
CONFIG_CAVIUM_ERRATUM_27456=y
@@ -407,6 +412,7 @@ CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
# CONFIG_XEN is not set
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
CONFIG_ARM64_TAGGED_ADDR_ABI=y
@@ -469,6 +475,7 @@ CONFIG_ARM64_PSEUDO_NMI=y
# CONFIG_ARM64_DEBUG_PRIORITY_MASKING is not set
CONFIG_RELOCATABLE=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
# end of Kernel Features
#
@@ -546,15 +553,17 @@ CONFIG_CPU_FREQ_TIMES=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_INTERACTIVE=m
#
# CPU frequency scaling drivers
@@ -1002,6 +1011,12 @@ CONFIG_ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT=y
CONFIG_SPECULATIVE_PAGE_FAULT=y
# CONFIG_GUP_BENCHMARK is not set
CONFIG_ARCH_HAS_PTE_SPECIAL=y
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options
CONFIG_NET=y
@@ -1249,6 +1264,7 @@ CONFIG_NETFILTER_XT_TARGET_NETMAP=m
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
# CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD is not set
CONFIG_NETFILTER_XT_TARGET_RATEEST=m
CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m
@@ -1699,7 +1715,10 @@ CONFIG_NET_NSH=m
CONFIG_HSR=m
# CONFIG_NET_SWITCHDEV is not set
CONFIG_NET_L3_MASTER_DEV=y
# CONFIG_QRTR is not set
CONFIG_QRTR=m
# CONFIG_QRTR_SMD is not set
# CONFIG_QRTR_TUN is not set
CONFIG_QRTR_MHI=m
# CONFIG_NET_NCSI is not set
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
@@ -1790,16 +1809,16 @@ CONFIG_CAN_DEBUG_DEVICES=y
CONFIG_BT=y
CONFIG_BT_BREDR=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
CONFIG_BT_HIDP=m
CONFIG_BT_HS=y
CONFIG_BT_LE=y
# CONFIG_BT_6LOWPAN is not set
# CONFIG_BT_LEDS is not set
CONFIG_BT_6LOWPAN=m
CONFIG_BT_LEDS=y
# CONFIG_BT_MSFTEXT is not set
CONFIG_BT_DEBUGFS=y
# CONFIG_BT_SELFTEST is not set
@@ -1807,39 +1826,39 @@ CONFIG_BT_DEBUGFS=y
#
# Bluetooth device drivers
#
CONFIG_BT_RTKBTUSB=m
CONFIG_BT_INTEL=m
CONFIG_BT_BCM=m
CONFIG_BT_RTL=m
CONFIG_BT_HCIBTUSB=m
# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
CONFIG_BT_HCIBTUSB_BCM=y
# CONFIG_BT_HCIBTUSB_MTK is not set
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIBTUSB_RTL=y
# CONFIG_BT_HCIBTSDIO is not set
CONFIG_BT_HCIBTSDIO=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_SERDEV=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_NOKIA=m
# CONFIG_BT_HCIUART_BCSP is not set
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_LL=y
CONFIG_BT_HCIUART_3WIRE=y
# CONFIG_BT_HCIUART_INTEL is not set
CONFIG_BT_HCIUART_INTEL=y
CONFIG_BT_HCIUART_BCM=y
# CONFIG_BT_HCIUART_RTL is not set
# CONFIG_BT_HCIUART_QCA is not set
# CONFIG_BT_HCIUART_AG6XX is not set
CONFIG_BT_HCIUART_AG6XX=y
CONFIG_BT_HCIUART_MRVL=y
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIVHCI=m
CONFIG_BT_MRVL=m
CONFIG_BT_MRVL_SDIO=m
# CONFIG_BT_ATH3K is not set
# CONFIG_BT_MTKSDIO is not set
CONFIG_BT_ATH3K=m
CONFIG_BT_MTKSDIO=m
CONFIG_BT_MTKUART=m
CONFIG_BT_HCIBTUSB_RTLBTUSB=m
# end of Bluetooth device drivers
CONFIG_AF_RXRPC=m
@@ -1976,6 +1995,7 @@ CONFIG_PCIE_DW_HOST=y
# CONFIG_PCIE_DW_PLAT_HOST is not set
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PCIE_RK_THREADED_INIT=y
CONFIG_PCIE_DW_DMATEST=y
# CONFIG_PCI_HISI is not set
# CONFIG_PCIE_KIRIN is not set
# CONFIG_PCI_MESON is not set
@@ -2065,7 +2085,8 @@ CONFIG_BRCMSTB_GISB_ARB=y
# CONFIG_MOXTET is not set
# CONFIG_SIMPLE_PM_BUS is not set
# CONFIG_VEXPRESS_CONFIG is not set
# CONFIG_MHI_BUS is not set
CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_DEBUG is not set
# end of Bus devices
CONFIG_CONNECTOR=m
@@ -2247,6 +2268,7 @@ CONFIG_NVME_TARGET_TCP=m
#
# Misc devices
#
CONFIG_RK803=m
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
@@ -2271,7 +2293,6 @@ CONFIG_MISC_RTSX=m
# CONFIG_UID_SYS_STATS is not set
# CONFIG_PVPANIC is not set
# CONFIG_HISI_HIKEY_USB is not set
CONFIG_RK803=m
# CONFIG_C2PORT is not set
#
@@ -2782,7 +2803,6 @@ CONFIG_STMMAC_ETH=y
# CONFIG_STMMAC_SELFTESTS is not set
CONFIG_STMMAC_ETHTOOL=y
CONFIG_STMMAC_FULL=y
CONFIG_STMMAC_PTP=y
CONFIG_STMMAC_PLATFORM=y
# CONFIG_DWMAC_DWC_QOS_ETH is not set
CONFIG_DWMAC_GENERIC=y
@@ -2967,9 +2987,22 @@ CONFIG_ATH5K_PCI=y
# CONFIG_ATH6KL is not set
# CONFIG_AR5523 is not set
# CONFIG_WIL6210 is not set
# CONFIG_ATH10K is not set
CONFIG_ATH10K=m
CONFIG_ATH10K_CE=y
CONFIG_ATH10K_PCI=m
CONFIG_ATH10K_AHB=y
CONFIG_ATH10K_SDIO=m
CONFIG_ATH10K_USB=m
# CONFIG_ATH10K_DEBUG is not set
# CONFIG_ATH10K_DEBUGFS is not set
# CONFIG_ATH10K_TRACING is not set
# CONFIG_WCN36XX is not set
# CONFIG_ATH11K is not set
CONFIG_ATH11K=m
CONFIG_ATH11K_AHB=m
CONFIG_ATH11K_PCI=m
# CONFIG_ATH11K_DEBUG is not set
# CONFIG_ATH11K_DEBUGFS is not set
# CONFIG_ATH11K_TRACING is not set
CONFIG_WLAN_VENDOR_ATMEL=y
# CONFIG_ATMEL is not set
CONFIG_AT76C50X_USB=m
@@ -3081,22 +3114,48 @@ CONFIG_WLAN_VENDOR_MICROCHIP=y
# CONFIG_WILC1000_SDIO is not set
# CONFIG_WILC1000_SPI is not set
CONFIG_WLAN_VENDOR_RALINK=y
# CONFIG_RT2X00 is not set
CONFIG_RT2X00=m
# CONFIG_RT2400PCI is not set
# CONFIG_RT2500PCI is not set
# CONFIG_RT61PCI is not set
# CONFIG_RT2800PCI is not set
# CONFIG_RT2500USB is not set
# CONFIG_RT73USB is not set
# CONFIG_RT2800USB is not set
CONFIG_WLAN_VENDOR_REALTEK=y
# CONFIG_RTL8180 is not set
# CONFIG_RTL8187 is not set
CONFIG_RTL_CARDS=y
CONFIG_RTL8187=m
CONFIG_RTL8187_LEDS=y
CONFIG_RTL_CARDS=m
# CONFIG_RTL8192CE is not set
# CONFIG_RTL8192SE is not set
# CONFIG_RTL8192DE is not set
# CONFIG_RTL8723AE is not set
# CONFIG_RTL8723BE is not set
CONFIG_RTL8723BE=m
# CONFIG_RTL8188EE is not set
# CONFIG_RTL8192EE is not set
# CONFIG_RTL8821AE is not set
# CONFIG_RTL8192CU is not set
# CONFIG_RTL8XXXU is not set
# CONFIG_RTW88 is not set
CONFIG_RTL8192CU=m
CONFIG_RTLWIFI=m
CONFIG_RTLWIFI_PCI=m
CONFIG_RTLWIFI_USB=m
CONFIG_RTLWIFI_DEBUG=y
CONFIG_RTL8192C_COMMON=m
CONFIG_RTL8723_COMMON=m
CONFIG_RTLBTCOEXIST=m
CONFIG_RTL8XXXU=m
# CONFIG_RTL8XXXU_UNTESTED is not set
CONFIG_RTW88=m
CONFIG_RTW88_CORE=m
CONFIG_RTW88_PCI=m
CONFIG_RTW88_8822C=m
CONFIG_RTW88_8821C=m
# CONFIG_RTW88_8822BE is not set
CONFIG_RTW88_8822CE=m
# CONFIG_RTW88_8723DE is not set
CONFIG_RTW88_8821CE=m
# CONFIG_RTW88_DEBUG is not set
# CONFIG_RTW88_DEBUGFS is not set
CONFIG_WLAN_VENDOR_RSI=y
# CONFIG_RSI_91X is not set
CONFIG_WLAN_VENDOR_ST=y
@@ -3112,13 +3171,13 @@ CONFIG_WLAN_VENDOR_TI=y
# CONFIG_RTL8822CS is not set
# CONFIG_RTL8822BU is not set
# CONFIG_RTL8188EU is not set
CONFIG_RTL8821CU=m
# CONFIG_RTL8821CU is not set
# CONFIG_88XXAU is not set
# CONFIG_RTL8192EU is not set
# CONFIG_RTL8189FS is not set
# CONFIG_RTL8189ES is not set
CONFIG_WLAN_VENDOR_ZYDAS=y
# CONFIG_USB_ZD1201 is not set
CONFIG_USB_ZD1201=m
# CONFIG_ZD1211RW is not set
CONFIG_WLAN_VENDOR_QUANTENNA=y
# CONFIG_QTNFMAC_PCIE is not set
@@ -3134,8 +3193,12 @@ CONFIG_BCMDHD_FW_PATH="/lib/firmware/fw_bcmdhd.bin"
CONFIG_BCMDHD_NVRAM_PATH="/lib/firmware/nvram.txt"
# CONFIG_BCMDHD_STATIC_IF is not set
# CONFIG_CYW_BCMDHD is not set
# CONFIG_INFINEON_DHD is not set
CONFIG_RTL8852BE=m
CONFIG_RTL8852BU=m
CONFIG_RTL8821CU_RK=m
CONFIG_RTL8723DS_RK=m
CONFIG_RTL8723DU_RK=m
# CONFIG_MAC80211_HWSIM is not set
CONFIG_USB_NET_RNDIS_WLAN=y
# CONFIG_VIRT_WIFI is not set
@@ -3318,10 +3381,11 @@ CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
CONFIG_TOUCHSCREEN_EXC3000=m
# CONFIG_TOUCHSCREEN_FTS is not set
CONFIG_TOUCHSCREEN_FUJITSU=m
CONFIG_TOUCHSCREEN_GOODIX=m
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_GSL3673 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
# CONFIG_TOUCHSCREEN_GT1X is not set
# CONFIG_TOUCHSCREEN_GT9XX is not set
CONFIG_TOUCHSCREEN_HIDEEP=m
CONFIG_TOUCHSCREEN_ILI210X=m
CONFIG_TOUCHSCREEN_S6SY761=m
@@ -3388,6 +3452,7 @@ CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
# CONFIG_TOUCHSCREEN_IQS5XX is not set
# CONFIG_TOUCHSCREEN_ZINITIX is not set
CONFIG_TOUCHSCREEN_FE_PANELS=y
CONFIG_ROCKCHIP_REMOTECTL=y
CONFIG_ROCKCHIP_REMOTECTL_PWM=y
@@ -3614,7 +3679,6 @@ CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_BA431 is not set
# CONFIG_HW_RANDOM_VIRTIO is not set
CONFIG_HW_RANDOM_HISI_V2=y
CONFIG_HW_RANDOM_CAVIUM=y
CONFIG_HW_RANDOM_OPTEE=y
# CONFIG_HW_RANDOM_CCTRNG is not set
# CONFIG_HW_RANDOM_XIPHERA is not set
@@ -3898,6 +3962,7 @@ CONFIG_GPIO_AMD_FCH=m
#
CONFIG_GPIO_ADP5588=m
CONFIG_GPIO_ADNP=m
CONFIG_GPIO_AW9110=m
CONFIG_GPIO_GW_PLD=m
CONFIG_GPIO_MAX7300=m
CONFIG_GPIO_MAX732X=m
@@ -4007,6 +4072,7 @@ CONFIG_GENERIC_ADC_BATTERY=m
CONFIG_CHARGER_ADP5061=m
CONFIG_BATTERY_CW2015=m
# CONFIG_BATTERY_CW2017 is not set
# CONFIG_BATTERY_CW221X is not set
CONFIG_BATTERY_DS2760=m
CONFIG_BATTERY_DS2780=m
CONFIG_BATTERY_DS2781=m
@@ -4028,7 +4094,10 @@ CONFIG_CHARGER_ISP1704=m
# CONFIG_CHARGER_LP8727 is not set
CONFIG_CHARGER_GPIO=m
# CONFIG_CHARGER_MANAGER is not set
CONFIG_ROCKCHIP_CHARGER_MANAGER=m
CONFIG_CHARGER_LT3651=m
CONFIG_CHARGER_SC8551=m
CONFIG_CHARGER_SC89890=m
CONFIG_CHARGER_DETECTOR_MAX14656=m
CONFIG_CHARGER_MAX77650=m
# CONFIG_CHARGER_BQ2415X is not set
@@ -4049,8 +4118,9 @@ CONFIG_CHARGER_UCS1002=m
CONFIG_BATTERY_RK816=m
CONFIG_BATTERY_RK817=m
CONFIG_CHARGER_RK817=m
CONFIG_BATTERY_RK818=m
CONFIG_CHARGER_RK818=m
# CONFIG_BATTERY_RK818 is not set
# CONFIG_CHARGER_RK818 is not set
CONFIG_CHARGER_SGM41542=m
CONFIG_HWMON=y
CONFIG_HWMON_VID=m
# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -4267,12 +4337,11 @@ CONFIG_MAX77620_THERMAL=m
CONFIG_ROCKCHIP_THERMAL=y
# CONFIG_GENERIC_ADC_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_PC9202_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=0
# CONFIG_WATCHDOG_SYSFS is not set
CONFIG_WATCHDOG_SYSFS=y
#
# Watchdog Pretimeout Governors
@@ -4385,6 +4454,7 @@ CONFIG_MFD_MAX77650=m
CONFIG_MFD_MAX96745=m
CONFIG_MFD_MAX96752F=m
# CONFIG_MFD_MAX96755F is not set
CONFIG_MFD_MAX96776=m
# CONFIG_MFD_MT6360 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
@@ -4397,6 +4467,7 @@ CONFIG_MFD_MAX96752F=m
CONFIG_MFD_RDC321X=m
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RC5T583 is not set
CONFIG_MFD_RK618=m
CONFIG_MFD_RK628=y
# CONFIG_MFD_RK630 is not set
# CONFIG_MFD_RK630_I2C is not set
@@ -4801,6 +4872,14 @@ CONFIG_ROCKCHIP_CIF_WORKMODE_PINGPONG=y
# CONFIG_ROCKCHIP_CIF_WORKMODE_ONEFRAME is not set
CONFIG_ROCKCHIP_CIF_USE_DUMMY_BUF=y
# CONFIG_ROCKCHIP_CIF_USE_NONE_DUMMY_BUF is not set
CONFIG_ROCKCHIP_CIF_USE_MONITOR=y
CONFIG_ROCKCHIP_CIF_MONITOR_MODE=0x1
CONFIG_ROCKCHIP_CIF_MONITOR_START_FRAME=0x0
CONFIG_ROCKCHIP_CIF_MONITOR_CYCLE=0x8
CONFIG_ROCKCHIP_CIF_MONITOR_KEEP_TIME=0x3e8
CONFIG_ROCKCHIP_CIF_MONITOR_ERR_CNT=0x5
CONFIG_ROCKCHIP_CIF_RESET_BY_USER=y
CONFIG_VIDEO_ROCKCHIP_RKISP1=m
CONFIG_VIDEO_ROCKCHIP_ISP=y
CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V1X=y
# CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V20 is not set
@@ -4880,8 +4959,10 @@ CONFIG_VIDEO_SONY_BTF_MPX=m
# CONFIG_VIDEO_BT866 is not set
# CONFIG_VIDEO_EP9461E is not set
# CONFIG_VIDEO_KS0127 is not set
# CONFIG_VIDEO_IT6616 is not set
CONFIG_VIDEO_LT6911UXC=y
CONFIG_VIDEO_LT7911D=y
CONFIG_VIDEO_LT7911UXC=m
# CONFIG_VIDEO_LT8619C is not set
# CONFIG_VIDEO_ML86V7667 is not set
# CONFIG_VIDEO_NVP6158 is not set
@@ -4895,6 +4976,7 @@ CONFIG_VIDEO_RK628_BT1120=y
CONFIG_VIDEO_SAA711X=m
# CONFIG_VIDEO_TC358743 is not set
CONFIG_VIDEO_TC35874X=y
CONFIG_VIDEO_THCV244=m
# CONFIG_VIDEO_TVP514X is not set
# CONFIG_VIDEO_TVP5150 is not set
# CONFIG_VIDEO_TVP7002 is not set
@@ -4905,6 +4987,7 @@ CONFIG_VIDEO_TC35874X=y
# CONFIG_VIDEO_VPX3220 is not set
# CONFIG_VIDEO_MAX9286 is not set
# CONFIG_VIDEO_MAX96714 is not set
CONFIG_VIDEO_MAX96722=m
#
# Video and audio decoders
@@ -4972,6 +5055,7 @@ CONFIG_VIDEO_GC2093=y
# CONFIG_VIDEO_GC4663 is not set
# CONFIG_VIDEO_GC4C33 is not set
# CONFIG_VIDEO_GC5025 is not set
# CONFIG_VIDEO_GC5035 is not set
CONFIG_VIDEO_GC8034=y
# CONFIG_VIDEO_HI556 is not set
# CONFIG_VIDEO_IMX214 is not set
@@ -5042,11 +5126,22 @@ CONFIG_VIDEO_OV13850=y
# CONFIG_VIDEO_MT9V011 is not set
# CONFIG_VIDEO_MT9V032 is not set
# CONFIG_VIDEO_MT9V111 is not set
# CONFIG_VIDEO_SC031GS is not set
# CONFIG_VIDEO_SC035GS is not set
# CONFIG_VIDEO_SC132GS is not set
# CONFIG_VIDEO_SC200AI is not set
# CONFIG_VIDEO_SC210IOT is not set
# CONFIG_VIDEO_SC2232 is not set
# CONFIG_VIDEO_SC2239 is not set
# CONFIG_VIDEO_SC230AI is not set
# CONFIG_VIDEO_SC2310 is not set
# CONFIG_VIDEO_SC301IOT is not set
# CONFIG_VIDEO_SC3336 is not set
# CONFIG_VIDEO_SC3338 is not set
# CONFIG_VIDEO_SC401AI is not set
# CONFIG_VIDEO_SC4210 is not set
# CONFIG_VIDEO_SC4238 is not set
# CONFIG_VIDEO_SC430CS is not set
# CONFIG_VIDEO_SC4336 is not set
# CONFIG_VIDEO_SC500AI is not set
# CONFIG_VIDEO_SC530AI is not set
@@ -5388,6 +5483,8 @@ CONFIG_ROCKCHIP_RGB=y
# CONFIG_ROCKCHIP_RK3066_HDMI is not set
# CONFIG_ROCKCHIP_VCONN is not set
# CONFIG_DRM_ROCKCHIP_VVOP is not set
CONFIG_ROCKCHIP_DW_HDCP2=m
CONFIG_DRM_ROCKCHIP_RK618=m
CONFIG_DRM_ROCKCHIP_RK628=m
# CONFIG_DRM_UDL is not set
# CONFIG_DRM_AST is not set
@@ -5425,6 +5522,7 @@ CONFIG_DRM_PANEL_SIMPLE=y
# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set
# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set
CONFIG_DRM_PANEL_MAXIM_DESERIALIZER=m
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
@@ -5454,6 +5552,7 @@ CONFIG_DRM_PANEL_SIMPLE=y
# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
# CONFIG_DRM_PANEL_FRIENDLYELEC is not set
# end of Display Panels
CONFIG_DRM_BRIDGE=y
@@ -5471,6 +5570,7 @@ CONFIG_DRM_LVDS_CODEC=m
CONFIG_DRM_MAXIM_MAX96745=m
CONFIG_DRM_MAXIM_MAX96752F=m
# CONFIG_DRM_MAXIM_MAX96755F is not set
CONFIG_DRM_MAXIM_MAX96776=m
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
CONFIG_DRM_NWL_MIPI_DSI=m
# CONFIG_DRM_NXP_PTN3460 is not set
@@ -5675,9 +5775,10 @@ CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
# end of Console display driver support
CONFIG_LOGO=y
@@ -5894,8 +5995,10 @@ CONFIG_SND_SOC_IMG_SPDIF_OUT=m
CONFIG_SND_SOC_IMG_PISTACHIO_INTERNAL_DAC=m
CONFIG_SND_SOC_MTK_BTCVSD=m
CONFIG_SND_SOC_ROCKCHIP=y
CONFIG_SND_SOC_ROCKCHIP_DLP=m
CONFIG_SND_SOC_ROCKCHIP_I2S=y
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=m
CONFIG_SND_SOC_ROCKCHIP_PDM=y
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=y
@@ -6132,6 +6235,7 @@ CONFIG_SND_SOC_NAU8822=m
CONFIG_SND_SOC_NAU8824=m
CONFIG_SND_SOC_TPA6130A2=m
CONFIG_SND_SOC_AW87XXX=m
CONFIG_SND_SOC_AW883XX=m
# end of CODEC drivers
CONFIG_SND_SIMPLE_CARD_UTILS=m
@@ -6341,7 +6445,7 @@ CONFIG_USB_HCD_TEST_MODE=y
#
# USB Device Class drivers
#
CONFIG_USB_ACM=y
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_WDM=m
CONFIG_USB_TMC=m
@@ -6369,7 +6473,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m
CONFIG_USB_STORAGE_KARMA=m
CONFIG_USB_STORAGE_CYPRESS_ATACB=m
CONFIG_USB_STORAGE_ENE_UB6250=m
CONFIG_USB_UAS=y
CONFIG_USB_UAS=m
#
# USB Imaging devices
@@ -6412,7 +6516,6 @@ CONFIG_USB_DWC3_DUAL_ROLE=y
CONFIG_USB_DWC3_PCI=y
CONFIG_USB_DWC3_HAPS=y
CONFIG_USB_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3_ROCKCHIP_INNO=y
CONFIG_USB_DWC2=y
# CONFIG_USB_DWC2_HOST is not set
@@ -6521,7 +6624,7 @@ CONFIG_USB_TEST=m
CONFIG_USB_EHSET_TEST_FIXTURE=m
CONFIG_USB_ISIGHTFW=m
CONFIG_USB_YUREX=m
CONFIG_USB_EZUSB_FX2=y
CONFIG_USB_EZUSB_FX2=m
CONFIG_USB_HUB_USB251XB=m
CONFIG_USB_HSIC_USB3503=y
CONFIG_USB_HSIC_USB4604=m
@@ -6546,7 +6649,7 @@ CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
CONFIG_USB_GADGET_DEBUG_FILES=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
@@ -6574,32 +6677,32 @@ CONFIG_USB_GR_UDC=m
# CONFIG_USB_DUMMY_HCD is not set
# end of USB Peripheral Controller
CONFIG_USB_LIBCOMPOSITE=y
CONFIG_USB_F_ACM=y
CONFIG_USB_F_SS_LB=y
CONFIG_USB_U_SERIAL=y
CONFIG_USB_U_ETHER=y
CONFIG_USB_U_AUDIO=y
CONFIG_USB_F_SERIAL=y
CONFIG_USB_F_OBEX=y
CONFIG_USB_F_NCM=y
CONFIG_USB_F_ECM=y
CONFIG_USB_LIBCOMPOSITE=m
CONFIG_USB_F_ACM=m
CONFIG_USB_F_SS_LB=m
CONFIG_USB_U_SERIAL=m
CONFIG_USB_U_ETHER=m
CONFIG_USB_U_AUDIO=m
CONFIG_USB_F_SERIAL=m
CONFIG_USB_F_OBEX=m
CONFIG_USB_F_NCM=m
CONFIG_USB_F_ECM=m
CONFIG_USB_F_PHONET=m
CONFIG_USB_F_EEM=y
CONFIG_USB_F_SUBSET=y
CONFIG_USB_F_RNDIS=y
CONFIG_USB_F_MASS_STORAGE=y
CONFIG_USB_F_FS=y
CONFIG_USB_F_UAC1=y
CONFIG_USB_F_UAC1_LEGACY=y
CONFIG_USB_F_UAC2=y
CONFIG_USB_F_UVC=y
CONFIG_USB_F_MIDI=y
CONFIG_USB_F_HID=y
CONFIG_USB_F_PRINTER=y
CONFIG_USB_F_EEM=m
CONFIG_USB_F_SUBSET=m
CONFIG_USB_F_RNDIS=m
CONFIG_USB_F_MASS_STORAGE=m
CONFIG_USB_F_FS=m
CONFIG_USB_F_UAC1=m
CONFIG_USB_F_UAC1_LEGACY=m
CONFIG_USB_F_UAC2=m
CONFIG_USB_F_UVC=m
CONFIG_USB_F_MIDI=m
CONFIG_USB_F_HID=m
CONFIG_USB_F_PRINTER=m
CONFIG_USB_F_TCM=m
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS=m
# CONFIG_USB_CONFIGFS_UEVENT is not set
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_ACM=y
CONFIG_USB_CONFIGFS_OBEX=y
@@ -7305,6 +7408,7 @@ CONFIG_ROCKCHIP_DDRCLK_SIP_V2=y
CONFIG_ROCKCHIP_PLL_RK3399=y
CONFIG_ROCKCHIP_PLL_RK3588=y
CONFIG_COMMON_CLK_ROCKCHIP_REGMAP=y
CONFIG_CLK_RK618=m
CONFIG_CLK_RK628=y
# CONFIG_HWSPINLOCK is not set
@@ -7422,6 +7526,7 @@ CONFIG_SOC_BRCMSTB=y
#
# Qualcomm SoC drivers
#
CONFIG_QCOM_QMI_HELPERS=m
# end of Qualcomm SoC drivers
#
@@ -7441,11 +7546,13 @@ CONFIG_NO_GKI=y
# CONFIG_ROCKCHIP_AMP is not set
CONFIG_ROCKCHIP_CPUINFO=y
CONFIG_ROCKCHIP_GRF=y
# CONFIG_ROCKCHIP_HW_DECOMPRESS is not set
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_ROCKCHIP_HW_DECOMPRESS_USER=m
CONFIG_ROCKCHIP_IODOMAIN=y
# CONFIG_ROCKCHIP_IOMUX is not set
CONFIG_ROCKCHIP_IPA=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_OPTIMIZE_RT_PRIO=y
# CONFIG_ROCKCHIP_PERFORMANCE is not set
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ROCKCHIP_PVTM=y
@@ -7471,6 +7578,8 @@ CONFIG_RK_DMABUF_PROCFS=y
#
# CONFIG_XILINX_VCU is not set
# end of Xilinx SoC drivers
CONFIG_VENDOR_FRIENDLYELEC=y
# end of SOC (System On Chip) specific Drivers
CONFIG_PM_DEVFREQ=y
@@ -7795,6 +7904,7 @@ CONFIG_IIO_SIMPLE_DUMMY=m
# CONFIG_INV_ICM42600_SPI is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_IIO_ST_LSM6DSR is not set
# CONFIG_IIO_ST_LSM6DSX is not set
# end of Inertial measurement units
@@ -7843,6 +7953,7 @@ CONFIG_SENSORS_TSL2563=y
CONFIG_TSL2583=y
# CONFIG_TSL2772 is not set
# CONFIG_TSL4531 is not set
# CONFIG_UCS12CM0 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VCNL4035 is not set
@@ -8091,7 +8202,8 @@ CONFIG_ANDROID=y
# CONFIG_ANDROID_BINDER_IPC is not set
# CONFIG_ANDROID_DEBUG_SYMBOLS is not set
# CONFIG_ANDROID_VENDOR_HOOKS is not set
# CONFIG_ANDROID_STRUCT_PADDING is not set
# CONFIG_ANDROID_KABI_RESERVE is not set
# CONFIG_ANDROID_VENDOR_OEM_DATA is not set
# end of Android
# CONFIG_LIBNVDIMM is not set
@@ -8166,6 +8278,7 @@ CONFIG_ROCKCHIP_RKNPU=y
CONFIG_ROCKCHIP_RKNPU_DEBUG_FS=y
# CONFIG_ROCKCHIP_RKNPU_PROC_FS is not set
# CONFIG_ROCKCHIP_RKNPU_FENCE is not set
# CONFIG_ROCKCHIP_RKNPU_SRAM is not set
CONFIG_ROCKCHIP_RKNPU_DRM_GEM=y
# end of RKNPU
# end of Device Drivers
@@ -8416,7 +8529,7 @@ CONFIG_PSTORE_CONSOLE=y
# CONFIG_PSTORE_PMSG is not set
# CONFIG_PSTORE_FTRACE is not set
CONFIG_PSTORE_RAM=m
# CONFIG_PSTORE_MCU_LOG is not set
# CONFIG_PSTORE_BOOT_LOG is not set
CONFIG_SYSV_FS=m
CONFIG_UFS_FS=m
CONFIG_UFS_FS_WRITE=y
@@ -9106,6 +9219,8 @@ CONFIG_DEBUG_CREDENTIALS=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_REF_SCALE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=60
# CONFIG_BOOTPARAM_RCU_STALL_PANIC is not set
CONFIG_BOOTPARAM_RCU_STALL_PANIC_VALUE=0
CONFIG_RCU_TRACE=y
# CONFIG_RCU_EQS_DEBUG is not set
# end of RCU Debugging

25
config/sources/families/media.conf
View File

@@ -36,13 +36,6 @@ case $BRANCH in
LINUXCONFIG='linux-station-p2-'$BRANCH
EXTRAWIFI="no"
WIREGUARD="no"
elif [[ $BOARD == station-m3 ]]; then
KERNELSOURCE='https://github.com/150balbes/rockchip-kernel'
KERNELBRANCH='branch:kernel-5.10'
LINUXFAMILY=station-m3
LINUXCONFIG='linux-station-m3-'$BRANCH
KERNELPATCHDIR='media-'$BRANCH
AUFS="no"
elif [[ $BOARD == jetson-nano ]]; then
KERNELDIR='linux-nano'
KERNELSOURCE='https://github.com/150balbes/Jetson-Nano'
@@ -55,19 +48,11 @@ case $BRANCH in
SRC_CMDLINE='console=ttyS0,115200n8 console=tty0 tegraid=21.1.2.0.0 ddr_die=4096M@2048M section=512M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63 video=tegrafb debug_uartport=lsport,4 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff780000 core_edp_mv=1075 core_edp_ma=4000 tegra_fbmem=0x800000@0x92ca9000 is_hdmi_initialised=1 earlycon=uart8250,mmio32,0x70006000 fbcon=map:0'
MODULES_INITRD="jetson-nano-legacy"
else
if [[ $BOARD == nanopct4 ]]; then
KERNELSOURCE='https://github.com/friendlyarm/kernel-rockchip'
KERNELBRANCH='branch:nanopi4-linux-v4.4.y'
KERNELPATCHDIR='rk3399-'$BRANCH
LINUXFAMILY=rk3399
LINUXCONFIG='linux-rk3399-'$BRANCH
else
KERNELSOURCE='https://github.com/ayufan-rock64/linux-kernel'
KERNELBRANCH='tag:4.4.202-1237-rockchip-ayufan'
KERNELPATCHDIR='rockchip64-'$BRANCH
LINUXFAMILY=rockchip64
LINUXCONFIG='linux-rockchip64-'$BRANCH
fi
KERNELSOURCE='https://github.com/150balbes/rockchip-kernel'
KERNELBRANCH='branch:kernel-5.10'
LINUXFAMILY=media
LINUXCONFIG='linux-media-'$BRANCH
KERNELPATCHDIR='media-'$BRANCH
fi
;;

28
patch/kernel/archive/station-p2-5.19/010-v2-1-5-arm64-dts-rockchip-set-display-regulators-to-always-on-on-BPI-R2-Pro.patch
View File

@@ -1,28 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 7e5b3947e28f..5bb49bc2630f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -215,6 +215,7 @@ regulator-state-mem {
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
+ regulator-always-on;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
@@ -264,6 +265,7 @@ regulator-state-mem {
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
+ regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
@@ -359,6 +361,7 @@ regulator-state-mem {
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
+ regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;

76
patch/kernel/archive/station-p2-5.19/020-v2-2-5-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-BPI-R2-Pro.patch
View File

@@ -1,76 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 5bb49bc2630f..eeaf02461f9b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
@@ -54,6 +55,17 @@ dc_12v: dc-12v {
regulator-max-microvolt = <12000000>;
};
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -174,6 +186,24 @@ &gmac1m1_rgmii_clk
status = "okay";
};
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -613,3 +643,20 @@ &usb2phy0_otg {
phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};

27
patch/kernel/archive/station-p2-5.19/030-v2-3-5-arm64-dts-rockchip-Enable-HDMI-audio-on-BPI-R2-Pro.patch
View File

@@ -1,27 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index eeaf02461f9b..57ddb7608976 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -204,6 +204,10 @@ hdmi_out_con: endpoint {
};
};
+&hdmi_sound {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -444,6 +448,11 @@ &i2c5 {
status = "disabled";
};
+&i2s0_8ch {
+ /* hdmi sound */
+ status = "okay";
+};
+
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";

13
patch/kernel/archive/station-p2-5.19/040-v2-4-5-arm64-dts-rockchip-configure-thermal-shutdown-for-BPI-R2-Pro.patch
View File

@@ -1,13 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 57ddb7608976..75ddca1561e0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -588,6 +588,8 @@ &spi3 {
};
&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
status = "okay";
};

16
patch/kernel/archive/station-p2-5.19/050-v2-5-5-arm64-dts-rockchip-enable-the-gpu-on-BPI-R2-Pro.patch
View File

@@ -1,16 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 75ddca1561e0..77cf6b435007 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -186,6 +186,11 @@ &gmac1m1_rgmii_clk
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;

205
patch/kernel/archive/station-p2-5.19/060-v91-dw_hdmi-rockchip.patch
View File

@@ -1,205 +0,0 @@
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -91,80 +91,88 @@
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
{
- 27000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
- },
- }, {
- 36000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
- },
- }, {
- 40000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
- },
- }, {
- 54000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
- },
- }, {
- 65000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
- },
- }, {
- 66000000, {
- { 0x013e, 0x0003},
- { 0x217e, 0x0002},
- { 0x4061, 0x0002}
- },
- }, {
- 74250000, {
- { 0x0072, 0x0001},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
- },
- }, {
- 83500000, {
- { 0x0072, 0x0001},
- },
- }, {
- 108000000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
- },
- }, {
- 106500000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
- },
- }, {
- 146250000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
- },
- }, {
- 148500000, {
- { 0x0051, 0x0003},
- { 0x214c, 0x0003},
- { 0x4064, 0x0003}
- },
- }, {
+ 30666000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40f3, 0x0000 },
+ },
+ }, {
+ 36800000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40a2, 0x0001 },
+ },
+ }, {
+ 46000000, {
+ { 0x00b3, 0x0000 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
+ },
+ }, {
+ 61333000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
+ },
+ }, {
+ 73600000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x4061, 0x0002 },
+ },
+ }, {
+ 92000000, {
+ { 0x0072, 0x0001 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
+ },
+ }, {
+ 122666000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
+ },
+ }, {
+ 147200000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4064, 0x0003 },
+ },
+ }, {
+ 184000000, {
+ { 0x0051, 0x0002 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
+ },
+ }, {
+ 226666000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
+ },
+ }, {
+ 272000000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x5a64, 0x0003 },
+ },
+ }, {
+ 340000000, {
+ { 0x0040, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
+ },
+ }, {
+ 600000000, {
+ { 0x1a40, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
+ },
+ }, {
~0UL, {
- { 0x00a0, 0x000a },
- { 0x2001, 0x000f },
- { 0x4002, 0x000f },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
},
}
};
@@ -172,20 +180,8 @@
static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
/* pixelclk bpp8 bpp10 bpp12 */
{
- 40000000, { 0x0018, 0x0018, 0x0018 },
- }, {
- 65000000, { 0x0028, 0x0028, 0x0028 },
- }, {
- 66000000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 74250000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 83500000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 146250000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 148500000, { 0x0000, 0x0038, 0x0038 },
- }, {
+ 600000000, { 0x0000, 0x0000, 0x0000 },
+ }, {
~0UL, { 0x0000, 0x0000, 0x0000},
}
};
@@ -195,6 +191,7 @@
{ 74250000, 0x8009, 0x0004, 0x0272},
{ 148500000, 0x802b, 0x0004, 0x028d},
{ 297000000, 0x8039, 0x0005, 0x028d},
+ { 594000000, 0x8039, 0x0000, 0x019d},
{ ~0UL, 0x0000, 0x0000, 0x0000}
};
@@ -251,7 +248,7 @@
int i;
for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
- if (pclk == mpll_cfg[i].mpixelclock) {
+ if (pclk <= mpll_cfg[i].mpixelclock) {
valid = true;
break;
}

84
patch/kernel/archive/station-p2-5.19/070-v91-i2s-mclk.patch
View File

@@ -1,84 +0,0 @@
diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c
index 606ae6cd918b..ee8924ac0093 100644
--- a/drivers/clk/rockchip/clk-rk3568.c
+++ b/drivers/clk/rockchip/clk-rk3568.c
@@ -13,6 +13,8 @@
#include <dt-bindings/clock/rk3568-cru.h>
#include "clk.h"
+#define RK3568_GRF_SOC_CON1 0x504
+#define RK3568_GRF_SOC_CON2 0x508
#define RK3568_GRF_SOC_STATUS0 0x580
enum rk3568_pmu_plls {
@@ -247,13 +249,13 @@ PNAME(dpll_gpll_cpll_p) = { "dpll", "gpll", "cpll" };
PNAME(clk_ddr1x_p) = { "clk_ddrphy1x_src", "dpll" };
PNAME(gpll200_gpll150_gpll100_xin24m_p) = { "gpll_200m", "gpll_150m", "gpll_100m", "xin24m" };
PNAME(gpll100_gpll75_gpll50_p) = { "gpll_100m", "gpll_75m", "cpll_50m" };
-PNAME(i2s0_mclkout_tx_p) = { "clk_i2s0_8ch_tx", "xin_osc0_half" };
-PNAME(i2s0_mclkout_rx_p) = { "clk_i2s0_8ch_rx", "xin_osc0_half" };
-PNAME(i2s1_mclkout_tx_p) = { "clk_i2s1_8ch_tx", "xin_osc0_half" };
-PNAME(i2s1_mclkout_rx_p) = { "clk_i2s1_8ch_rx", "xin_osc0_half" };
-PNAME(i2s2_mclkout_p) = { "clk_i2s2_2ch", "xin_osc0_half" };
-PNAME(i2s3_mclkout_tx_p) = { "clk_i2s3_2ch_tx", "xin_osc0_half" };
-PNAME(i2s3_mclkout_rx_p) = { "clk_i2s3_2ch_rx", "xin_osc0_half" };
+PNAME(i2s0_mclkout_tx_p) = { "mclk_i2s0_8ch_tx", "xin_osc0_half" };
+PNAME(i2s0_mclkout_rx_p) = { "mclk_i2s0_8ch_rx", "xin_osc0_half" };
+PNAME(i2s1_mclkout_tx_p) = { "mclk_i2s1_8ch_tx", "xin_osc0_half" };
+PNAME(i2s1_mclkout_rx_p) = { "mclk_i2s1_8ch_rx", "xin_osc0_half" };
+PNAME(i2s2_mclkout_p) = { "mclk_i2s2_2ch", "xin_osc0_half" };
+PNAME(i2s3_mclkout_tx_p) = { "mclk_i2s3_2ch_tx", "xin_osc0_half" };
+PNAME(i2s3_mclkout_rx_p) = { "mclk_i2s3_2ch_rx", "xin_osc0_half" };
PNAME(mclk_pdm_p) = { "gpll_300m", "cpll_250m", "gpll_200m", "gpll_100m" };
PNAME(clk_i2c_p) = { "gpll_200m", "gpll_100m", "xin24m", "cpll_100m" };
PNAME(gpll200_gpll150_gpll100_p) = { "gpll_200m", "gpll_150m", "gpll_100m" };
@@ -307,6 +309,12 @@ PNAME(clk_mac_2top_p) = { "cpll_125m", "cpll_50m", "cpll_25m", "ppll" };
PNAME(clk_pwm0_p) = { "xin24m", "clk_pdpmu" };
PNAME(aclk_rkvdec_pre_p) = { "gpll", "cpll" };
PNAME(clk_rkvdec_core_p) = { "gpll", "cpll", "dummy_npll", "dummy_vpll" };
+PNAME(i2s1_mclkout_p) = { "i2s1_mclkout_rx", "i2s1_mclkout_tx" };
+PNAME(i2s3_mclkout_p) = { "i2s3_mclkout_rx", "i2s3_mclkout_tx" };
+PNAME(i2s1_mclk_rx_ioe_p) = { "i2s1_mclkin_rx", "i2s1_mclkout_rx" };
+PNAME(i2s1_mclk_tx_ioe_p) = { "i2s1_mclkin_tx", "i2s1_mclkout_tx" };
+PNAME(i2s2_mclk_ioe_p) = { "i2s2_mclkin", "i2s2_mclkout" };
+PNAME(i2s3_mclk_ioe_p) = { "i2s3_mclkin", "i2s3_mclkout" };
static struct rockchip_pll_clock rk3568_pmu_pll_clks[] __initdata = {
[ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
@@ -704,6 +712,19 @@ static struct rockchip_clk_branch rk3568_clk_branches[] __initdata = {
RK3568_CLKSEL_CON(83), 15, 1, MFLAGS,
RK3568_CLKGATE_CON(7), 11, GFLAGS),
+ MUXGRF(I2S1_MCLKOUT, "i2s1_mclkout", i2s1_mclkout_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ RK3568_GRF_SOC_CON1, 5, 1, MFLAGS),
+ MUXGRF(I2S3_MCLKOUT, "i2s3_mclkout", i2s3_mclkout_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ RK3568_GRF_SOC_CON2, 15, 1, MFLAGS),
+ MUXGRF(I2S1_MCLK_RX_IOE, "i2s1_mclk_rx_ioe", i2s1_mclk_rx_ioe_p, 0,
+ RK3568_GRF_SOC_CON2, 0, 1, MFLAGS),
+ MUXGRF(I2S1_MCLK_TX_IOE, "i2s1_mclk_tx_ioe", i2s1_mclk_tx_ioe_p, 0,
+ RK3568_GRF_SOC_CON2, 1, 1, MFLAGS),
+ MUXGRF(I2S2_MCLK_IOE, "i2s2_mclk_ioe", i2s2_mclk_ioe_p, 0,
+ RK3568_GRF_SOC_CON2, 2, 1, MFLAGS),
+ MUXGRF(I2S3_MCLK_IOE, "i2s3_mclk_ioe", i2s3_mclk_ioe_p, 0,
+ RK3568_GRF_SOC_CON2, 3, 1, MFLAGS),
+
GATE(HCLK_PDM, "hclk_pdm", "hclk_gic_audio", 0,
RK3568_CLKGATE_CON(5), 14, GFLAGS),
COMPOSITE_NODIV(MCLK_PDM, "mclk_pdm", mclk_pdm_p, 0,
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index d29890865150..251445cf7632 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -479,6 +479,12 @@
#define CPLL_25M 416
#define CPLL_100M 417
#define SCLK_DDRCLK 418
+#define I2S1_MCLKOUT 419
+#define I2S3_MCLKOUT 420
+#define I2S1_MCLK_RX_IOE 421
+#define I2S1_MCLK_TX_IOE 422
+#define I2S2_MCLK_IOE 423
+#define I2S3_MCLK_IOE 424
#define PCLK_CORE_PVTM 450

192
patch/kernel/archive/station-p2-5.19/080--v91-irq-gic-v3-its.patch
View File

@@ -1,192 +0,0 @@
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -45,6 +45,7 @@
#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
+#define RDIST_FLAGS_FORCE_NO_LOCAL_CACHE (1 << 2)
#define RD_LOCAL_LPI_ENABLED BIT(0)
#define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1)
@@ -2176,6 +2177,11 @@
{
struct page *prop_page;
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE) {
+ pr_err("ITS ALLOCATE PROP WORKAROUND\n");
+ gfp_flags |= GFP_DMA;
+ }
+
prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ));
if (!prop_page)
return NULL;
@@ -2299,6 +2305,7 @@
u32 alloc_pages, psz;
struct page *page;
void *base;
+ gfp_t gfp_flags;
psz = baser->psz;
alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz);
@@ -2310,7 +2317,10 @@
order = get_order(GITS_BASER_PAGES_MAX * psz);
}
- page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order);
+ gfp_flags = GFP_KERNEL | __GFP_ZERO;
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+ gfp_flags |= GFP_DMA;
+ page = alloc_pages_node(its->numa_node, gfp_flags, order);
if (!page)
return -ENOMEM;
@@ -2356,6 +2366,13 @@
its_write_baser(its, baser, val);
tmp = baser->val;
+
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE) {
+ if (tmp & GITS_BASER_SHAREABILITY_MASK)
+ tmp &= ~GITS_BASER_SHAREABILITY_MASK;
+ else
+ gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order));
+ }
if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) {
/*
@@ -2939,6 +2956,10 @@
{
struct page *pend_page;
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE) {
+ gfp_flags |= GFP_DMA;
+ }
+
pend_page = alloc_pages(gfp_flags | __GFP_ZERO,
get_order(LPI_PENDBASE_SZ));
if (!pend_page)
@@ -3083,6 +3104,9 @@
gicr_write_propbaser(val, rbase + GICR_PROPBASER);
tmp = gicr_read_propbaser(rbase + GICR_PROPBASER);
+
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+ tmp &= ~GICR_PROPBASER_SHAREABILITY_MASK;
if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) {
@@ -3108,6 +3132,9 @@
gicr_write_pendbaser(val, rbase + GICR_PENDBASER);
tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER);
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+ tmp &= ~GICR_PENDBASER_SHAREABILITY_MASK;
+
if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
/*
* The HW reports non-shareable, we must remove the
@@ -3271,7 +3298,12 @@
/* Allocate memory for 2nd level table */
if (!table[idx]) {
- page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO,
+ gfp_t gfp_flags = GFP_KERNEL | __GFP_ZERO;
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE) {
+ gfp_flags |= GFP_DMA;
+ }
+
+ page = alloc_pages_node(its->numa_node, gfp_flags,
get_order(baser->psz));
if (!page)
return false;
@@ -3360,6 +3392,7 @@
int nr_lpis;
int nr_ites;
int sz;
+ gfp_t gfp_flags;
if (!its_alloc_device_table(its, dev_id))
return NULL;
@@ -3367,7 +3400,11 @@
if (WARN_ON(!is_power_of_2(nvecs)))
nvecs = roundup_pow_of_two(nvecs);
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ gfp_flags = GFP_KERNEL;
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+ gfp_flags |= GFP_DMA;
+
+ dev = kzalloc(sizeof(*dev), gfp_flags);
/*
* Even if the device wants a single LPI, the ITT must be
* sized as a power of two (and you need at least one bit...).
@@ -3375,7 +3412,8 @@
nr_ites = max(2, nvecs);
sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
- itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node);
+
+ itt = kzalloc_node(sz, gfp_flags, its->numa_node);
if (alloc_lpis) {
lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis);
if (lpi_map)
@@ -4695,6 +4733,13 @@
* page. Trick it into doing the right thing...
*/
its->vlpi_redist_offset = SZ_128K;
+ return true;
+}
+
+static bool __maybe_unused its_enable_quirk_rk3568(void *data)
+{
+ gic_rdists->flags |= RDIST_FLAGS_FORCE_NO_LOCAL_CACHE;
+
return true;
}
@@ -4745,6 +4790,13 @@
},
#endif
{
+ .desc = "ITS: Rockchip RK3568 force no_local_cache",
+ .iidr = 0x0201743b,
+ .mask = 0xffffffff,
+ .init = its_enable_quirk_rk3568,
+ },
+
+ {
}
};
@@ -4999,6 +5051,7 @@
struct page *page;
u32 ctlr;
int err;
+ gfp_t gfp_flags;
its_base = its_map_one(res, &err);
if (!its_base)
@@ -5052,7 +5105,11 @@
its->numa_node = numa_node;
- page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO,
+ gfp_flags = GFP_KERNEL | __GFP_ZERO | GFP_DMA;
+// if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+// gfp_flags |= GFP_DMA;
+
+ page = alloc_pages_node(its->numa_node, gfp_flags,
get_order(ITS_CMD_QUEUE_SZ));
if (!page) {
err = -ENOMEM;
@@ -5082,6 +5139,9 @@
gits_write_cbaser(baser, its->base + GITS_CBASER);
tmp = gits_read_cbaser(its->base + GITS_CBASER);
+
+ if (gic_rdists->flags & RDIST_FLAGS_FORCE_NO_LOCAL_CACHE)
+ tmp &= ~GITS_CBASER_SHAREABILITY_MASK;
if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) {
if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) {

32
patch/kernel/archive/station-p2-5.19/090-v91-rk356x-vpu.patch
View File

@@ -1,32 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -617,6 +617,28 @@
#cooling-cells = <2>;
power-domains = <&power RK3568_PD_GPU>;
status = "disabled";
+ };
+
+ vpu: video-codec@fdea0400 {
+ compatible = "rockchip,rk3328-vpu";
+ reg = <0x0 0xfdea0000 0x0 0x800>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vdpu";
+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ clock-names = "aclk", "hclk";
+ iommus = <&vdpu_mmu>;
+ power-domains = <&power RK3568_PD_VPU>;
+ };
+
+ vdpu_mmu: iommu@fdea0800 {
+ compatible = "rockchip,rk3568-iommu";
+ reg = <0x0 0xfdea0800 0x0 0x40>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vdpu_mmu";
+ clock-names = "aclk", "iface";
+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ power-domains = <&power RK3568_PD_VPU>;
+ #iommu-cells = <0>;
};
sdmmc2: mmc@fe000000 {

101
patch/kernel/archive/station-p2-5.19/0980-builddeb.patch
View File

@@ -1,101 +0,0 @@
--- a/scripts/package/builddeb
+++ b/scripts/package/builddeb
@@ -64,25 +64,6 @@
chmod -R a+rX "$pdir"
# in case we build in a setuid/setgid directory
chmod -R ug-s "$pdir"
-
- # Create preinstall and post install script to remove dtb
- if [ "$3" = "dtb" ]; then
-
- cat >> $pdir/DEBIAN/preinst <<- EOT
- rm -rf /boot/dtb
- rm -rf /boot/dtb-$version
- exit 0
- EOT
-
- cat >> $pdir/DEBIAN/postinst <<- EOT
- cd /boot
- ln -sfT dtb-$version dtb 2> /dev/null || mv dtb-$version dtb
- exit 0
- EOT
-
- chmod 775 $pdir/DEBIAN/preinst
- chmod 775 $pdir/DEBIAN/postinst
- fi
# Create postinst prerm script for headers
if [ "$3" = "headers" ]; then
@@ -187,10 +168,8 @@
kernel_headers_dir="debian/hdrtmp"
libc_headers_dir="debian/headertmp"
dbg_dir="debian/dbgtmp"
-dtb_dir="debian/dtbtmp"
packagename=linux-image-"$BRANCH$LOCALVERSION"
kernel_headers_packagename=linux-headers-"$BRANCH$LOCALVERSION"
-dtb_packagename=linux-dtb-"$BRANCH$LOCALVERSION"
libc_headers_packagename=linux-libc-dev
dbg_packagename=$packagename-dbg
@@ -225,11 +204,9 @@
BUILD_DEBUG=$(if_enabled_echo CONFIG_DEBUG_INFO Yes)
# Setup the directory structure
-rm -rf "$tmpdir" "$dbg_dir" "$dtb_dir" debian/files
+rm -rf "$tmpdir" "$dbg_dir" debian/files
mkdir -m 755 -p "$tmpdir/DEBIAN"
mkdir -p "$tmpdir/lib" "$tmpdir/boot"
-mkdir -m 755 -p "$dtb_dir/DEBIAN"
-mkdir -p "$dtb_dir/boot/dtb-$version" "$dtb_dir/usr/share/doc/$dtb_packagename"
mkdir -m 755 -p "$kernel_headers_dir/lib/modules/$version/"
mkdir -m 755 -p "$libc_headers_dir/DEBIAN"
@@ -249,13 +226,8 @@
if is_enabled CONFIG_OF_EARLY_FLATTREE; then
# Only some architectures with OF support have this target
if [ -d "${srctree}/arch/$SRCARCH/boot/dts" ]; then
- $MAKE -f $srctree/Makefile INSTALL_DTBS_PATH="$tmpdir/usr/lib/linux-image-$version" dtbs_install
- fi
-fi
-
-if grep -q '^CONFIG_OF=y' $KCONFIG_CONFIG; then
- #mkdir -p "$tmpdir/boot/dtb"
- INSTALL_DTBS_PATH="$dtb_dir/boot/dtb-$version" $MAKE KBUILD_SRC= dtbs_install
+ $MAKE -f $srctree/Makefile INSTALL_DTBS_PATH="$tmpdir/boot/linux-image-$version" dtbs_install
+ fi
fi
if is_enabled CONFIG_MODULES; then
@@ -318,6 +290,8 @@
sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
cat >> $tmpdir/DEBIAN/postinst <<- EOT
ln -sf $(basename $installed_image_path) /boot/$image_name 2> /dev/null || cp /$installed_image_path /boot/$image_name
+ cd /boot
+ ln -sfT linux-image-$version dtb 2> /dev/null || mv linux-image-$version dtb
touch /boot/.next
exit 0
EOT
@@ -346,6 +320,10 @@
rm -f /boot/System.map* /boot/config* /boot/vmlinuz* /boot/$image_name /boot/uImage
fi
}
+# if [ -d /boot/dtb ]; then
+ rm -rf /boot/dtb
+ rm -rf /boot/linux-image-$version
+# fi
mountpoint -q /boot && check_boot_dev
exit 0
EOT
@@ -353,11 +331,6 @@
create_package "$packagename" "$tmpdir"
if [ "$ARCH" != "um" ]; then
-
- if [ "$(cat debian/arch)" != "amd64" ]; then # No DTB for amd64 target
- create_package "$dtb_packagename" "$dtb_dir" "dtb"
- fi
-
deploy_libc_headers $libc_headers_dir
create_package $libc_headers_packagename $libc_headers_dir

24
patch/kernel/archive/station-p2-5.19/0981-mkdebian.patch
View File

@@ -1,24 +0,0 @@
--- a/scripts/package/mkdebian
+++ b/scripts/package/mkdebian
@@ -98,7 +98,6 @@
packagename=linux-image-"$BRANCH$LOCALVERSION"
kernel_headers_packagename=linux-headers-"$BRANCH$LOCALVERSION"
libc_headers_packagename=linux-libc-dev
-dtb_packagename=linux-dtb-"$BRANCH$LOCALVERSION"
dbg_packagename=$packagename-dbg
if [ "$ARCH" = "um" ] ; then
@@ -198,12 +197,6 @@
This package provides userspaces headers from the Linux kernel. These headers
are used by the installed headers for GNU glibc and other system libraries.
Multi-Arch: same
-
-Package: $dtb_packagename
-Architecture: $debarch
-Provides: linux-dtb, linux-dtb-armbian, armbian-$BRANCH
-Description: Armbian Linux DTB, version $version $BRANCH
- This package contains device blobs from the Linux kernel, version $version
EOF
if is_enabled CONFIG_MODULES; then

9
patch/kernel/archive/station-p2-5.19/100-v95-make.patch
View File

@@ -1,9 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,4 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-firefly-roc-pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-firefly-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb

790
patch/kernel/archive/station-p2-5.19/110-v95-rk3566-firefly-roc-pc.patch
View File

@@ -1,790 +0,0 @@
new file mode 100644
index 000000000..fac2db500
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-firefly-roc-pc.dts
@@ -0,0 +1,784 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3566.dtsi"
+
+/ {
+ model = "Firefly rk3566-roc-pc";
+ compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566";
+
+ aliases {
+ ethernet0 = &gmac1;
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ mmc2 = &sdmmc1;
+ };
+
+ chosen: chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ vcc5v0_in: vcc5v0_in {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_in";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ gmac1_clkin: external-gmac1-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac1_clkin";
+ #clock-cells = <0>;
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "c";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_sys: vcc5v0_sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_in>;
+ };
+
+ vcc5v0_usb30_host: vcc5v0_usb30_host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb30_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_otg: vcc5v0_usb_otg {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_otg";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ pcie30_3v3: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "pcie30_3v3";
+ regulator-min-microvolt = <100000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <100000 0x0
+ 3300000 0x1>;
+ };
+
+ firefly_leds: leds {
+ compatible = "gpio-leds";
+ power_led: power {
+ label = "firefly:blue:power";
+ linux,default-trigger = "ir-power-click";
+ default-state = "on";
+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_power>;
+ };
+
+ user_led: user {
+ label = "firefly:yellow:user";
+ linux,default-trigger = "ir-user-click";
+ default-state = "off";
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_user>;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ status = "okay";
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk809 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+ };
+
+ rk809-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "Analog RK809";
+ simple-audio-card,mclk-fs = <256>;
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
+ rk_headset: rk-headset {
+ compatible = "rockchip_headset";
+ headset_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ io-channels = <&saradc 2>; //HP_HOOK pin
+ };
+};
+
+&combphy1 {
+ status = "okay";
+};
+
+&combphy2 {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_thermal {
+ trips {
+ cpu_hot: cpu_hot {
+ temperature = <55000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+ };
+};
+
+&gmac1 {
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_3v3>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1m0_miim
+ &gmac1m0_tx_bus2
+ &gmac1m0_rx_bus2
+ &gmac1m0_rgmii_clk
+ &gmac1m0_clkinout
+ &gmac1m0_rgmii_bus>;
+ snps,reset-gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ /* Reset time is 20ms, 100ms for rtl8211f */
+ snps,reset-delays-us = <0 20000 100000>;
+ tx_delay = <0x4e>;
+ rx_delay = <0x2c>;
+ phy-handle = <&rgmii_phy1>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint@0 {
+// reg = <0>;
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-boot-on;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
+ assigned-clock-rates = <12288000>;
+ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT>;
+ pinctrl-names = "default", "pmic-sleep",
+ "pmic-power-off", "pmic-reset";
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
+
+ rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+ //fb-inner-reg-idxs = <2>;
+ /* 1: rst regs (default in codes), 0: rst the pmic */
+ pmic-reset-func = <0>;
+ /* not save the PMIC_POWER_EN register in uboot */
+ not-save-power-en = <1>;
+
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd_gpu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-name = "vdda0v9_image";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vccio_acodec";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+
+ codec {
+ mic-in-differential;
+ };
+ };
+};
+
+&i2s0_8ch {
+ status = "okay";
+};
+
+&i2s1_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1m0_sclktx
+ &i2s1m0_lrcktx
+ &i2s1m0_sdi0
+ &i2s1m0_sdo0>;
+ rockchip,trcm-sync-tx-only;
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ };
+};
+
+&pcie2x1 {
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_gpio>;
+ vpcie3v3-supply = <&pcie30_3v3>;
+ status = "okay";
+};
+
+&pcie30_3v3 {
+ status = "okay";
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+};
+
+&pinctrl {
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ bt {
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_host_wake_l: bt-host-wake-l {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ bt_wake_l: bt-wake-l {
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins =
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+
+
+ pcie {
+ pcie_reset_gpio: pcie-reset-gpio {
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ led_power: led-power {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ led_user: led-user {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_1v8>;
+ vccio7-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sdmmc1 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ vmmc-supply = <&vcc3v3_sys>;
+ vqmmc-supply = <&vcca1v8_pmu>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &uart9m1_xfer &uart8m1_xfer>;
+ status = "okay";
+};
+
+&sdmmc2 {
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ bus-width = <4>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcca1v8_pmu>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
+ status = "okay";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&rk809 1>;
+ clock-names = "lpo";
+ device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+ vbat-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcca1v8_pmu>;
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb30_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ vbus-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb30_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb30_host>;
+ status = "okay";
+};
+
+//&usbdrd30 {
+// status = "okay";
+//};
+
+//&usbhost30 {
+// status = "okay";
+//};
+
+&vop {
+ compatible = "rockchip,rk3568-vop";
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};

309
patch/kernel/archive/station-p2-5.19/120-v95-rk3566-quartz64-a.patch
View File

@@ -1,309 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3566.dtsi"
/ {
@@ -32,7 +33,20 @@
gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0
4500 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fan_en_h>;
#cooling-cells = <2>;
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
};
leds {
@@ -161,6 +175,28 @@
vin-supply = <&dcdc_boost>;
};
+ vcc3v3_pcie_p: vcc3v3_pcie_p {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_enable_h>;
+ regulator-name = "vcc3v3_pcie_p";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_usb20_otg: vcc5v0_usb20_otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc5v0_usb20_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dcdc_boost>;
+ };
+
vcc3v3_sd: vcc3v3_sd {
compatible = "regulator-fixed";
enable-active-low;
@@ -195,9 +231,30 @@
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_sys>;
};
+
+ vcc_lcd_en: vcc_lcd_en {
+ compatible = "regulator-fixed";
+ gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_lcd_en_h>;
+ regulator-name = "vcc_lcd_en";
+ vin-supply = <&vcc_3v3>;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm14 0 1000000 0>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ };
};
&combphy1 {
+ status = "okay";
+};
+
+&combphy2 {
status = "okay";
};
@@ -259,6 +316,28 @@
&gpu {
mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vdda_0v9>;
+ avdd-1v8-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
status = "okay";
};
@@ -492,6 +571,10 @@
status = "okay";
};
+&i2s0_8ch {
+ status = "okay";
+};
+
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
@@ -509,6 +592,14 @@
};
};
+&pcie2x1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_h>;
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ vpcie3v3-supply = <&vcc3v3_pcie_p>;
+};
+
&pinctrl {
bt {
bt_enable_h: bt-enable-h {
@@ -524,6 +615,12 @@
};
};
+ fan {
+ fan_en_h: fan-en-h {
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
work_led_enable_h: work-led-enable-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -534,6 +631,16 @@
};
};
+ pcie {
+ pcie_enable_h: pcie-enable-h {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie_reset_h: pcie-reset-h {
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -549,6 +656,12 @@
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ vcc_lcd_en {
+ vcc_lcd_en_h: vcc-lcd-en-h {
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -572,10 +685,23 @@
status = "okay";
};
+/* sata1 is muxed with the usb3 port */
+&sata1 {
+ status = "disabled";
+};
+
+/* sata2 is muxed with the pcie2 slot*/
+&sata2 {
+ target-supply = <&vcc3v3_pcie_p>;
+ status = "disabled";
+};
+
&sdhci {
bus-width = <8>;
mmc-hs200-1_8v;
non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
@@ -588,6 +714,7 @@
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+ sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
@@ -597,6 +724,7 @@
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
+ disable-wp;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
@@ -606,6 +734,21 @@
vmmc-supply = <&vcc_wl>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
+};
+
+&sfc {
+ pinctrl-0 = <&fspi_pins>;
+ pinctrl-names = "default";
+ rockchip,sfc-no-dma;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <1>;
+ spi-tx-bus-width = <1>;
+ };
};
/* spdif is exposed on con40 pin 18 */
@@ -709,6 +852,29 @@
status = "okay";
};
+&usb_host0_xhci {
+ status = "okay";
+};
+
+/* usb3 controller is muxed with sata1 */
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb20_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_usb20_otg>;
+ status = "okay";
+};
+
&usb2phy1 {
status = "okay";
};
@@ -722,3 +888,26 @@
phy-supply = <&vcc5v0_usb20_host>;
status = "okay";
};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
+
+&pwm14 {
+ status = "okay";
+ pinctrl-0 = <&pwm14m1_pins>;
+ pinctrl-names = "default";
+};

310
patch/kernel/archive/station-p2-5.19/130-v95-rk3568-bpi-r2-pro.patch
View File

@@ -1,310 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
@@ -53,6 +54,14 @@
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
+ };
+
+ fan: gpio_fan {
+ compatible = "gpio-fan";
+ gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
+ gpio-fan,speed-map = <0 0
+ 4500 1>;
+ #cooling-cells = <2>;
};
hdmi-con {
@@ -79,6 +88,72 @@
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ pcie30_avdd0v9: pcie30-avdd0v9 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ pcie30_avdd1v8: pcie30-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ /* pi6c pcie clock generator feeds both ports */
+ vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <200000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
+ vcc3v3_minipcie: vcc3v3-minipcie-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_minipcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc3v3_pi6c_05>;
+ };
+
+ /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
+ vcc3v3_ngff: vcc3v3-ngff-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_ngff";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc3v3_pi6c_05>;
+ };
+
+ vbus: vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
@@ -119,6 +194,28 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usb>;
};
+
+ rk809-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "Analog RK809";
+ simple-audio-card,mclk-fs = <256>;
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
+ rk_headset: rk-headset {
+ compatible = "rockchip_headset";
+ headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ io-channels = <&saradc 2>; //HP_HOOK pin
+ };
};
&combphy0 {
@@ -134,6 +231,39 @@
&combphy2 {
/* used for SATA */
status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_thermal {
+ trips {
+ cpu_hot: cpu_hot {
+ temperature = <55000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+ };
+
+ cooling-maps {
+ map1 {
+ trip = <&cpu_hot>;
+ cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
&gmac0 {
@@ -216,15 +346,49 @@
&i2c0 {
status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "fan53555-reg";
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1390000>;
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-boot-on;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
+ assigned-clock-rates = <12288000>;
+ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
#clock-cells = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT>;
+ pinctrl-names = "default", "pmic-sleep",
+ "pmic-power-off", "pmic-reset";
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
+
rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+ //fb-inner-reg-idxs = <2>;
+ /* 1: rst regs (default in codes), 0: rst the pmic */
+ pmic-reset-func = <0>;
+ /* not save the PMIC_POWER_EN register in uboot */
+ not-save-power-en = <1>;
+
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
@@ -427,6 +591,10 @@
regulator-off-in-suspend;
};
};
+ };
+
+ codec {
+ mic-in-differential;
};
};
};
@@ -458,6 +626,17 @@
status = "okay";
};
+&i2s1_8ch {
+ /* headphone */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1m0_sclktx
+ &i2s1m0_lrcktx
+ &i2s1m0_sdi0
+ &i2s1m0_sdo0>;
+ rockchip,trcm-sync-tx-only;
+ status = "okay";
+};
+
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -465,6 +644,27 @@
};
};
+&pcie30phy {
+ lane-map = /bits/ 8 <1 2>;
+ status = "okay";
+};
+
+&pcie3x1 {
+ /* M.2 slot */
+ num-lanes = <1>;
+ reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_ngff>;
+ status = "okay";
+};
+
+&pcie3x2 {
+ /* mPCIe slot */
+ num-lanes = <1>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_minipcie>;
+ status = "okay";
+};
+
&pinctrl {
leds {
blue_led_pin: blue-led-pin {
@@ -495,6 +695,12 @@
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
@@ -660,6 +866,19 @@
status = "okay";
};
+&usb2phy1 {
+ /* USB for PCIe/M2 */
+ status = "okay";
+};
+
+&usb2phy1_host {
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ status = "okay";
+};
+
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;

1006
patch/kernel/archive/station-p2-5.19/140-v95-rk3568-firefly-roc-pc.patch
View File

File diff suppressed because it is too large Load Diff

146
patch/kernel/archive/station-p2-5.19/150-v96-rk356x.patch
View File

@@ -1,146 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -129,6 +129,11 @@
};
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -175,6 +180,22 @@
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1000000>;
+ };
+ };
+
+ hdmi_sound: hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "HDMI";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ status = "disabled";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0_8ch>;
};
};
@@ -654,6 +675,83 @@
};
};
+ vop: vop@fe040000 {
+ reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
+ reg-names = "vop", "gamma-lut";
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
+ <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+ clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
+ iommus = <&vop_mmu>;
+ power-domains = <&power RK3568_PD_VO>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ vop_out: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vp0: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ vp1: port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ vp2: port@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ vop_mmu: iommu@fe043e00 {
+ compatible = "rockchip,rk3568-iommu";
+ reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+ clock-names = "aclk", "iface";
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ hdmi: hdmi@fe0a0000 {
+ compatible = "rockchip,rk3568-dw-hdmi";
+ reg = <0x0 0xfe0a0000 0x0 0x20000>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_HDMI_HOST>,
+ <&cru CLK_HDMI_SFR>,
+ <&cru CLK_HDMI_CEC>,
+ <&pmucru CLK_HDMI_REF>;
+ clock-names = "iahb", "isfr", "cec", "ref";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
+ power-domains = <&power RK3568_PD_VO>;
+ reg-io-width = <4>;
+ rockchip,grf = <&grf>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
qos_gpu: qos@fe128000 {
compatible = "rockchip,rk3568-qos", "syscon";
reg = <0x0 0xfe128000 0x0 0x20>;
@@ -836,6 +934,23 @@
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdifm0_tx>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ i2s0_8ch: i2s@fe400000 {
+ compatible = "rockchip,rk3568-i2s-tdm";
+ reg = <0x0 0xfe400000 0x0 0x1000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>;
+ assigned-clock-rates = <1188000000>, <1188000000>;
+ clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
+ clock-names = "mclk_tx", "mclk_rx", "hclk";
+ dmas = <&dmac1 0>;
+ dma-names = "tx";
+ resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
+ reset-names = "tx-m", "rx-m";
+ rockchip,grf = <&grf>;
#sound-dai-cells = <0>;
status = "disabled";
};

11
patch/kernel/archive/station-p2-5.19/160-v96-rk3566.patch
View File

@@ -1,11 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
@@ -29,3 +29,7 @@
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
};
+
+&vop {
+ compatible = "rockchip,rk3566-vop";
+};

11
patch/kernel/archive/station-p2-5.19/170-v96-rk3568.patch
View File

@@ -1,11 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -137,3 +137,7 @@
phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
};
+
+&vop {
+ compatible = "rockchip,rk3568-vop";
+};

112
patch/kernel/archive/station-p2-5.19/180-v97-rk356x.patch
View File

@@ -1,112 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -319,10 +319,17 @@
<0x0 0xfd460000 0 0x80000>; /* GICR */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
+ ranges;
#interrupt-cells = <3>;
- mbi-alias = <0x0 0xfd410000>;
- mbi-ranges = <296 24>;
- msi-controller;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ its: interrupt-controller@fd440000 {
+ compatible = "arm,gic-v3-its";
+ reg = <0x0 0xfd440000 0x0 0x20000>;
+ msi-controller;
+ #msi-cells = <1>;
+ };
};
usb_host0_ehci: usb@fd800000 {
@@ -872,6 +879,61 @@
reg = <0x0 0xfe1a8100 0x0 0x20>;
};
+ pcie2x1: pcie@fe260000 {
+ compatible = "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xf>;
+ assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
+ <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
+ <&cru CLK_PCIE20_AUX_NDFT>;
+ clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
+ <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
+ <&cru CLK_PCIE20_AUX_NDFT>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk", "aux";
+ device_type = "pci";
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "sys", "pmc", "msi", "legacy", "err";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
+ linux,pci-domain = <0>;
+ num-ib-windows = <6>;
+ num-ob-windows = <2>;
+ max-link-speed = <2>;
+ msi-map = <0x0 &its 0x0 0x1000>;
+ num-lanes = <1>;
+ phys = <&combphy2 PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy";
+ power-domains = <&power RK3568_PD_PIPE>;
+ reg = <0x3 0xc0000000 0x0 0x00400000>,
+ <0x0 0xfe260000 0x0 0x00010000>,
+ <0x3 0x00000000 0x0 0x01000000>;
+ ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000
+ 0x02000000 0x0 0x02000000 0x3 0x02000000 0x0 0x3e000000>;
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE20_POWERUP>;
+ reset-names = "pipe";
+ status = "disabled";
+
+ pcie_intc: legacy-interrupt-controller {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ };
+
sdmmc0: mmc@fe2b0000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe2b0000 0x0 0x4000>;
@@ -976,6 +1038,25 @@
&i2s1m0_sdi2 &i2s1m0_sdi3
&i2s1m0_sdo0 &i2s1m0_sdo1
&i2s1m0_sdo2 &i2s1m0_sdo3>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ i2s2_2ch: i2s@fe420000 {
+ compatible = "rockchip,rk3568-i2s-tdm";
+ reg = <0x0 0xfe420000 0x0 0x1000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
+ clock-names = "mclk_tx", "mclk_rx", "hclk";
+ dmas = <&dmac1 4>, <&dmac1 5>;
+ dma-names = "tx", "rx";
+ rockchip,cru = <&cru>;
+ rockchip,grf = <&grf>;
+ pinctrl-0 = <&i2s2m0_sclktx
+ &i2s2m0_lrcktx
+ &i2s2m0_sdi
+ &i2s2m0_sdo>;
+ pinctrl-names = "default";
#sound-dai-cells = <0>;
status = "disabled";
};

12
patch/kernel/archive/station-p2-5.19/181-v97-rk356x.patch
View File

@@ -1,12 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -287,7 +287,7 @@
<&cru ACLK_USB3OTG0>;
clock-names = "ref_clk", "suspend_clk",
"bus_clk";
- dr_mode = "otg";
+ dr_mode = "host";
phy_type = "utmi_wide";
power-domains = <&power RK3568_PD_PIPE>;
resets = <&cru SRST_USB3OTG0>;

132
patch/kernel/archive/station-p2-5.19/190-v97-rk3568.patch
View File

@@ -1,132 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -40,6 +40,128 @@
qos_sata0: qos@fe190200 {
compatible = "rockchip,rk3568-qos", "syscon";
reg = <0x0 0xfe190200 0x0 0x20>;
+ };
+
+ pcie30_phy_grf: syscon@fdcb8000 {
+ compatible = "rockchip,rk3568-pcie3-phy-grf", "syscon";
+ reg = <0x0 0xfdcb8000 0x0 0x10000>;
+ };
+
+ pcie30phy: phy@fe8c0000 {
+ compatible = "rockchip,rk3568-pcie3-phy";
+ reg = <0x0 0xfe8c0000 0x0 0x20000>;
+ #phy-cells = <0>;
+ clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
+ <&cru PCLK_PCIE30PHY>;
+ clock-names = "refclk_m", "refclk_n", "pclk";
+ resets = <&cru SRST_PCIE30PHY>;
+ reset-names = "phy";
+ rockchip,phy-grf = <&pcie30_phy_grf>;
+ status = "disabled";
+ };
+
+ pcie3x1: pcie@fe270000 {
+ compatible = "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xf>;
+ clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
+ <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
+ <&cru CLK_PCIE30X1_AUX_NDFT>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk", "aux";
+ device_type = "pci";
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3x1_intc 0>,
+ <0 0 0 2 &pcie3x1_intc 1>,
+ <0 0 0 3 &pcie3x1_intc 2>,
+ <0 0 0 4 &pcie3x1_intc 3>;
+ linux,pci-domain = <1>;
+ num-ib-windows = <6>;
+ num-ob-windows = <2>;
+ max-link-speed = <3>;
+ msi-map = <0x0 &gic 0x1000 0x1000>;
+ num-lanes = <1>;
+ phys = <&pcie30phy>;
+ phy-names = "pcie-phy";
+ power-domains = <&power RK3568_PD_PIPE>;
+ reg = <0x3 0xc0400000 0x0 0x00400000>,
+ <0x0 0xfe270000 0x0 0x00010000>,
+ <0x3 0x40000000 0x0 0x01000000>;
+ ranges = <0x01000000 0x0 0x01000000 0x3 0x41000000 0x0 0x00100000>,
+ <0x02000000 0x0 0x02000000 0x3 0x41100000 0x0 0x3ef00000>;
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE30X1_POWERUP>;
+ reset-names = "pipe";
+ /* bifurcation; lane1 when using 1+1 */
+ status = "disabled";
+
+ pcie3x1_intc: legacy-interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ pcie3x2: pcie@fe280000 {
+ compatible = "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xf>;
+ clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
+ <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
+ <&cru CLK_PCIE30X2_AUX_NDFT>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk", "aux";
+ device_type = "pci";
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
+ <0 0 0 2 &pcie3x2_intc 1>,
+ <0 0 0 3 &pcie3x2_intc 2>,
+ <0 0 0 4 &pcie3x2_intc 3>;
+ linux,pci-domain = <2>;
+ num-ib-windows = <6>;
+ num-ob-windows = <2>;
+ max-link-speed = <3>;
+ msi-map = <0x0 &gic 0x2000 0x1000>;
+ num-lanes = <2>;
+ phys = <&pcie30phy>;
+ phy-names = "pcie-phy";
+ power-domains = <&power RK3568_PD_PIPE>;
+ reg = <0x3 0xc0800000 0x0 0x00400000>,
+ <0x0 0xfe280000 0x0 0x00010000>,
+ <0x3 0x80000000 0x0 0x01000000>;
+ ranges = <0x01000000 0x0 0x01000000 0x3 0x81000000 0x0 0x00100000>,
+ <0x02000000 0x0 0x02000000 0x3 0x81100000 0x0 0x3ef00000>;
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE30X2_POWERUP>;
+ reset-names = "pipe";
+ /* bifurcation; lane0 when using 1+1 */
+ status = "disabled";
+
+ pcie3x2_intc: legacy-interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
+ };
};
gmac0: ethernet@fe2a0000 {

28
patch/kernel/archive/station-p2-5.19/200-usb-dwc3-fix.patch
View File

@@ -1,28 +0,0 @@
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -274,8 +274,7 @@
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg |= DWC3_DCTL_CSFTRST;
- reg &= ~DWC3_DCTL_RUN_STOP;
- dwc3_gadget_dctl_write_safe(dwc, reg);
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
/*
* For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit
@@ -1378,10 +1377,10 @@
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
- u8 rx_thr_num_pkt_prd = 0;
- u8 rx_max_burst_prd = 0;
- u8 tx_thr_num_pkt_prd = 0;
- u8 tx_max_burst_prd = 0;
+ u8 rx_thr_num_pkt_prd;
+ u8 rx_max_burst_prd;
+ u8 tx_thr_num_pkt_prd;
+ u8 tx_max_burst_prd;
u8 tx_fifo_resize_max_num;
const char *usb_psy_name;
int ret;

378
patch/kernel/archive/station-p2-5.19/210-linux-0002-rockchip-from-list.patch
View File

@@ -1,378 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:18 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: use correct vco_div_5 macro on
rk3328
inno_hdmi_phy_rk3328_clk_set_rate() is using the RK3228 macro
when configuring vco_div_5 on RK3328.
Fix this by using correct vco_div_5 macro for RK3328.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 80acca4e9e14..15339338aae3 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -790,8 +790,8 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw,
RK3328_PRE_PLL_POWER_DOWN);
/* Configure pre-pll */
- inno_update_bits(inno, 0xa0, RK3228_PCLK_VCO_DIV_5_MASK,
- RK3228_PCLK_VCO_DIV_5(cfg->vco_div_5_en));
+ inno_update_bits(inno, 0xa0, RK3328_PCLK_VCO_DIV_5_MASK,
+ RK3328_PCLK_VCO_DIV_5(cfg->vco_div_5_en));
inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv));
val = RK3328_SPREAD_SPECTRUM_MOD_DISABLE;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Zheng Yang <zhengyang@rock-chips.com>
Date: Sat, 10 Oct 2020 15:32:18 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: round fractal pixclock in rk3328
recalc_rate
inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found
in the pre pll config table when the fractal divider is used.
This can prevent proper power_on because a tmdsclock for the new rate
is not found in the pre pll config table.
Fix this by saving and returning a rounded pixel rate that exist
in the pre pll config table.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 15339338aae3..15a008a1ac7b 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -745,10 +745,12 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
}
- inno->pixclock = vco;
- dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);
+ inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000;
- return vco;
+ dev_dbg(inno->dev, "%s rate %lu vco %llu\n",
+ __func__, inno->pixclock, vco);
+
+ return inno->pixclock;
}
static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:19 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: remove unused no_c from rk3328
recalc_rate
no_c is not used in any calculation, lets remove it.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 15a008a1ac7b..4b936ca19920 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -714,7 +714,7 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
{
struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw);
unsigned long frac;
- u8 nd, no_a, no_b, no_c, no_d;
+ u8 nd, no_a, no_b, no_d;
u64 vco;
u16 nf;
@@ -737,9 +737,6 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK;
no_b >>= RK3328_PRE_PLL_PCLK_DIV_B_SHIFT;
no_b += 2;
- no_c = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_C_MASK;
- no_c >>= RK3328_PRE_PLL_PCLK_DIV_C_SHIFT;
- no_c = 1 << no_c;
no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK;
do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:19 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: do not power on rk3328 post pll on
reg write
inno_write is used to configure 0xaa reg, that also hold the
POST_PLL_POWER_DOWN bit.
When POST_PLL_REFCLK_SEL_TMDS is configured the power down bit is not
taken into consideration.
Fix this by keeping the power down bit until configuration is complete.
Also reorder the reg write order for consistency.
Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 4b936ca19920..620961fcfc1d 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -1020,9 +1020,10 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno,
inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv));
if (cfg->postdiv == 1) {
- inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS);
inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) |
RK3328_POST_PLL_PRE_DIV(cfg->prediv));
+ inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS |
+ RK3328_POST_PLL_POWER_DOWN);
} else {
v = (cfg->postdiv / 2) - 1;
v &= RK3328_POST_PLL_POST_DIV_MASK;
@@ -1030,7 +1031,8 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno,
inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) |
RK3328_POST_PLL_PRE_DIV(cfg->prediv));
inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE |
- RK3328_POST_PLL_REFCLK_SEL_TMDS);
+ RK3328_POST_PLL_REFCLK_SEL_TMDS |
+ RK3328_POST_PLL_POWER_DOWN);
}
for (v = 0; v < 14; v++)
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Huicong Xu <xhc@rock-chips.com>
Date: Sat, 10 Oct 2020 15:32:20 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: force set_rate on power_on
Regular 8-bit and Deep Color video formats mainly differ in TMDS rate and
not in pixel clock rate.
When the hdmiphy clock is configured with the same pixel clock rate using
clk_set_rate() the clock framework do not signal the hdmi phy driver
to set_rate when switching between 8-bit and Deep Color.
This result in pre/post pll not being re-configured when switching between
regular 8-bit and Deep Color video formats.
Fix this by calling set_rate in power_on to force pre pll re-configuration.
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 620961fcfc1d..2f01259823ea 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -245,6 +245,7 @@ struct inno_hdmi_phy {
struct clk_hw hw;
struct clk *phyclk;
unsigned long pixclock;
+ unsigned long tmdsclock;
};
struct pre_pll_config {
@@ -485,6 +486,8 @@ static int inno_hdmi_phy_power_on(struct phy *phy)
dev_dbg(inno->dev, "Inno HDMI PHY Power On\n");
+ inno->plat_data->clk_ops->set_rate(&inno->hw, inno->pixclock, 24000000);
+
ret = clk_prepare_enable(inno->phyclk);
if (ret)
return ret;
@@ -509,6 +512,8 @@ static int inno_hdmi_phy_power_off(struct phy *phy)
clk_disable_unprepare(inno->phyclk);
+ inno->tmdsclock = 0;
+
dev_dbg(inno->dev, "Inno HDMI PHY Power Off\n");
return 0;
@@ -628,6 +633,9 @@ static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw,
dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n",
__func__, rate, tmdsclock);
+ if (inno->pixclock == rate && inno->tmdsclock == tmdsclock)
+ return 0;
+
cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate);
if (IS_ERR(cfg))
return PTR_ERR(cfg);
@@ -670,6 +678,7 @@ static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw,
}
inno->pixclock = rate;
+ inno->tmdsclock = tmdsclock;
return 0;
}
@@ -781,6 +790,9 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw,
dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n",
__func__, rate, tmdsclock);
+ if (inno->pixclock == rate && inno->tmdsclock == tmdsclock)
+ return 0;
+
cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate);
if (IS_ERR(cfg))
return PTR_ERR(cfg);
@@ -820,6 +832,7 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw,
}
inno->pixclock = rate;
+ inno->tmdsclock = tmdsclock;
return 0;
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 17 Feb 2019 22:14:38 +0000
Subject: [PATCH] mmc: core: set initial signal voltage on power off
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. If the card has not been power cycled, it may still be
using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling
will fail to boot from a UHS card that continue to use 1.8V signaling.
Set initial signal voltage in mmc_power_off() to allow re-boot to function.
This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288),
same issue have been seen on some Rockchip RK3399 boards.
I am sending this as a RFC because I have no insights into SD/MMC subsystem,
this change fix a re-boot issue on my boards and does not break emmc/sdio.
Is this an acceptable workaround? Any advice is appreciated.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/mmc/core/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 368f10405e13..238d70df6c80 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1356,6 +1356,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
+ mmc_set_initial_signal_voltage(host);
+
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ mmc_delay(host->ios.power_delay_ms);
+
mmc_pwrseq_power_off(host);
host->ios.clock = 0;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 23 Jun 2021 16:59:18 +0200
Subject: [PATCH] arm64: dts: rockchip: Add sdmmc_ext for RK3328
RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some
boards have sdio wifi connected to it. In order to use it
one would have to add the pinctrls from sdmmc0ext group which
is done on board level.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 39db0b85b4da..d0410ae4def2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -975,6 +975,20 @@ usb_host0_ohci: usb@ff5d0000 {
status = "disabled";
};
+ sdmmc_ext: mmc@ff5f0000 {
+ compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x0 0xff5f0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ fifo-depth = <0x100>;
+ max-frequency = <150000000>;
+ resets = <&cru SRST_SDMMCEXT>;
+ reset-names = "reset";
+ status = "disabled";
+ };
+
usbdrd3: usb@ff600000 {
compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
reg = <0x0 0xff600000 0x0 0x100000>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 23 Jun 2021 17:02:08 +0200
Subject: [PATCH] arm64: dts: rockchip: Add sdmmc/sdio/emmc reset controls for
RK3328
The DW MCI controller driver will use them to reset the IP block before
initialisation.
Fixes: d717f7352ec6 ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index d0410ae4def2..cc46855aba46 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -853,6 +853,8 @@ sdmmc: mmc@ff500000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
+ resets = <&cru SRST_MMC0>;
+ reset-names = "reset";
status = "disabled";
};
@@ -865,6 +867,8 @@ sdio: mmc@ff510000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
+ resets = <&cru SRST_SDIO>;
+ reset-names = "reset";
status = "disabled";
};
@@ -877,6 +881,8 @@ emmc: mmc@ff520000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
+ resets = <&cru SRST_EMMC>;
+ reset-names = "reset";
status = "disabled";
};

25
patch/kernel/archive/station-p2-5.19/220-linux-90100-add-clock.patch
View File

@@ -1,25 +0,0 @@
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index ce1d2446f..38447441b 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -620,7 +620,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
GATE(SCLK_I2S2_8CH, "clk_i2s2", "clk_i2s2_mux", CLK_SET_RATE_PARENT,
RK3399_CLKGATE_CON(8), 11, GFLAGS),
- MUX(0, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,
+ MUX(SCLK_I2SOUT_SRC, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,
RK3399_CLKSEL_CON(31), 0, 2, MFLAGS),
COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_p, CLK_SET_RATE_PARENT,
RK3399_CLKSEL_CON(31), 2, 1, MFLAGS,
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 44e0a319f..b7b07dfda 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -19,6 +19,7 @@
#define ARMCLKB 9
/* sclk gates (special clocks) */
+#define SCLK_I2SOUT_SRC 64
#define SCLK_I2C1 65
#define SCLK_I2C2 66
#define SCLK_I2C3 67

19
patch/kernel/archive/station-p2-5.19/230-linux-90101-add-rt5651-konf.patch
View File

@@ -1,19 +0,0 @@
--- a/sound/soc/rockchip/Kconfig
+++ b/sound/soc/rockchip/Kconfig
@@ -54,6 +54,15 @@
Say Y or M here if you want to add support for SoC audio on Rockchip
boards using the RT5645/RT5650 codec, such as Veyron.
+config SND_SOC_ROCKCHIP_RT5651
+ tristate "ASoC support for Rockchip boards using a RT5651 codec"
+ depends on SND_SOC_ROCKCHIP && I2C && GPIOLIB && CLKDEV_LOOKUP
+ select SND_SOC_ROCKCHIP_I2S
+ select SND_SOC_RT5651
+ help
+ Say Y or M here if you want to add support for SoC audio on Rockchip
+ boards using the RT5651 codec, such as FriendlyARM's Nano{Pi,PC} family.
+
config SND_SOC_RK3288_HDMI_ANALOG
tristate "ASoC support multiple codecs for Rockchip RK3288 boards"
depends on SND_SOC_ROCKCHIP && I2C && GPIOLIB && CLKDEV_LOOKUP

60
patch/kernel/archive/station-p2-5.19/240-linux-90102-rt5651.patch
View File

@@ -1,60 +0,0 @@
diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c
index c506c9305..41a08b320 100644
--- a/sound/soc/codecs/rt5651.c
+++ b/sound/soc/codecs/rt5651.c
@@ -24,6 +24,7 @@
#include <sound/initval.h>
#include <sound/tlv.h>
#include <sound/jack.h>
+#include <linux/clk.h>
#include "rl6231.h"
#include "rt5651.h"
@@ -1511,6 +1512,7 @@ static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
static int rt5651_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
+ struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
switch (level) {
case SND_SOC_BIAS_PREPARE:
if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
@@ -1518,6 +1520,13 @@ static int rt5651_set_bias_level(struct snd_soc_component *component,
snd_soc_component_update_bits(component, RT5651_D_MISC,
0xc00, 0xc00);
}
+ if (!IS_ERR(rt5651->mclk)){
+ if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
+ clk_disable_unprepare(rt5651->mclk);
+ } else {
+ clk_prepare_enable(rt5651->mclk);
+ }
+ }
break;
case SND_SOC_BIAS_STANDBY:
if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
@@ -2059,6 +2068,13 @@ static int rt5651_probe(struct snd_soc_component *component)
{
struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
+ /* Check if MCLK provided */
+ rt5651->mclk = devm_clk_get(component->dev, "mclk");
+ if (PTR_ERR(rt5651->mclk) == -EPROBE_DEFER){
+ dev_err(component->dev, "unable to get mclk\n");
+ return -EPROBE_DEFER;
+ }
+
rt5651->component = component;
snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
diff --git a/sound/soc/codecs/rt5651.h b/sound/soc/codecs/rt5651.h
index 20c33a3ec..17524fa9f 100644
--- a/sound/soc/codecs/rt5651.h
+++ b/sound/soc/codecs/rt5651.h
@@ -2097,6 +2097,7 @@ struct rt5651_priv {
int dmic_en;
bool hp_mute;
+ struct clk *mclk;
};
#endif /* __RT5651_H__ */

222
patch/kernel/archive/station-p2-5.19/250-linux-90103-nanopc-t4-5651.patch
View File

@@ -1,222 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -21,6 +21,10 @@
stdout-path = "serial2:1500000n8";
};
+ aliases {
+ uart0 = &uart0;
+ };
+
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@@ -133,6 +137,46 @@
pinctrl-names = "default";
pinctrl-0 = <&wifi_reg_on_h>;
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ rt5651-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "realtek,rt5651-codec";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Mic Jack", "micbias1",
+ "IN1P", "Mic Jack",
+ "Headphone Jack", "HPOL",
+ "Headphone Jack", "HPOR";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&rt5651>;
+ };
+ };
+
+ spdif-sound {
+ status = "okay";
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "ROCKCHIP,SPDIF";
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ status = "okay";
};
};
@@ -190,6 +234,31 @@
reset-deassert-us = <30000>;
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "ap6359sa";
+ sdio_vref = <1800>;
+ WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "rts_gpio";
+ pinctrl-0 = <&uart0_rts>;
+ pinctrl-1 = <&uart0_gpios>;
+ // wifi-bt-power-toggle;
+ // BT,power_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+ status = "okay";
};
};
@@ -453,10 +522,19 @@
};
&i2c1 {
- clock-frequency = <200000>;
i2c-scl-rising-time-ns = <150>;
i2c-scl-falling-time-ns = <30>;
status = "okay";
+
+ rt5651: rt5651@1a {
+ #sound-dai-cells = <0>;
+ compatible = "realtek,rt5651";
+ reg = <0x1a>;
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_8ch_mclk>;
+ };
};
&i2c2 {
@@ -484,7 +562,23 @@
status = "okay";
};
+&i2s0{
+ assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
+// assigned-clock-parents = <&cru SCLK_I2S0_8CH>;
+ rockchip,i2s-broken-burst-len;
+ rockchip,playback-channels = <2>;
+ rockchip,capture-channels = <2>;
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&i2s1 {
+ assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
+ assigned-clock-parents = <&cru SCLK_I2S1_8CH>;
+};
+
&i2s2 {
+ #sound-dai-cells = <0>;
status = "okay";
};
@@ -496,6 +590,11 @@
status = "okay";
};
+&pmu_io_domains {
+ status = "okay";
+ pmu1830-supply = <&vcc_3v0>;
+};
+
&pcie_phy {
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
assigned-clock-rates = <100000000>;
@@ -535,6 +634,39 @@
};
};
+ i2s0 {
+ i2s0_2ch_bus: i2s0-2ch-bus {
+ rockchip,pins =
+ <3 RK_PD0 1 &pcfg_pull_none>,
+ <3 RK_PD1 1 &pcfg_pull_none>,
+ <3 RK_PD2 1 &pcfg_pull_none>,
+ <3 RK_PD3 1 &pcfg_pull_none>,
+ <3 RK_PD7 1 &pcfg_pull_none>;
+ };
+
+ i2s0_8ch_bus: i2s0-8ch-bus {
+ rockchip,pins =
+ <3 RK_PD0 1 &pcfg_pull_none>,
+ <3 RK_PD1 1 &pcfg_pull_none>,
+ <3 RK_PD2 1 &pcfg_pull_none>,
+ <3 RK_PD3 1 &pcfg_pull_none>,
+ <3 RK_PD4 1 &pcfg_pull_none>,
+ <3 RK_PD5 1 &pcfg_pull_none>,
+ <3 RK_PD6 1 &pcfg_pull_none>,
+ <3 RK_PD7 1 &pcfg_pull_none>;
+ };
+
+ i2s_8ch_mclk: i2s-8ch-mclk {
+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
cpu_b_sleep: cpu-b-sleep {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
@@ -581,6 +713,19 @@
sdmmc0_pwr_h: sdmmc0-pwr-h {
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-wlan {
+ wifi_pwr: wifi-pwr {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins =
+ <2 RK_PC3 1 &pcfg_pull_up>;
};
};
};
@@ -747,11 +892,3 @@
&vopb_mmu {
status = "okay";
};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};

10
patch/kernel/archive/station-p2-5.19/260-linux-90104-all-codec.patch
View File

@@ -1,10 +0,0 @@
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -13,7 +13,6 @@
config SND_SOC_ALL_CODECS
tristate "Build all ASoC CODEC drivers"
- depends on COMPILE_TEST
imply SND_SOC_88PM860X
imply SND_SOC_L3
imply SND_SOC_AB8500_CODEC

176
patch/kernel/archive/station-p2-5.19/270-linux-90117-add-rk3399-roc-pc-plus-sound.patch
View File

@@ -1,176 +0,0 @@
--- a/sound/soc/codecs/es8328.c
+++ b/sound/soc/codecs/es8328.c
@@ -21,8 +21,13 @@
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/tlv.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
#include "es8328.h"
+#define INVALID_GPIO -1
+#define ES8328_CODEC_SET_HP 1
+
static const unsigned int rates_12288[] = {
8000, 12000, 16000, 24000, 32000, 48000, 96000,
};
@@ -86,8 +91,18 @@ struct es8328_priv {
const int *mclk_ratios;
bool master;
struct regulator_bulk_data supplies[ES8328_SUPPLY_NUM];
+
+ int hp_ctl_gpio;
+ int hp_det_gpio;
+
+ bool muted;
+ bool hp_inserted;
+ bool hp_gpio_level;
+ bool hp_det_level;
};
+static struct es8328_priv *es8328_private;
+
/*
* ES8328 Controls
*/
@@ -112,6 +127,42 @@ static const struct {
{ 48000, ES8328_DACCONTROL6_DEEMPH_48k },
};
+static int es8328_set_gpio(int gpio, bool level)
+{
+ struct es8328_priv *es8328 = es8328_private;
+
+ if (!es8328) {
+ return 0;
+ }
+
+ if ((gpio & ES8328_CODEC_SET_HP) && es8328
+ && es8328->hp_ctl_gpio != INVALID_GPIO) {
+ gpio_set_value(es8328->hp_ctl_gpio, level);
+ }
+
+ return 0;
+}
+
+static irqreturn_t hp_det_irq_handler(int irq, void *dev_id)
+{
+ struct es8328_priv *es8328 = es8328_private;
+
+ if(gpio_get_value(es8328->hp_det_gpio)) {
+ es8328->hp_inserted = 1;
+ } else {
+ es8328->hp_inserted = 0;
+ }
+
+ if(!es8328->muted && es8328->hp_inserted) {
+ es8328_set_gpio(ES8328_CODEC_SET_HP, es8328->hp_gpio_level);
+ } else {
+ es8328_set_gpio(ES8328_CODEC_SET_HP, !es8328->hp_gpio_level);
+ }
+ return IRQ_HANDLED;
+}
+
+
+
static int es8328_set_deemph(struct snd_soc_component *component)
{
struct es8328_priv *es8328 = snd_soc_component_get_drvdata(component);
@@ -451,6 +502,14 @@ static const struct snd_soc_dapm_route es8328_dapm_routes[] = {
static int es8328_mute(struct snd_soc_dai *dai, int mute, int direction)
{
+ struct es8328_priv *es8328 = snd_soc_component_get_drvdata(dai->component);
+ es8328->muted = mute;
+ if (!mute && es8328->hp_inserted) {
+ es8328_set_gpio(ES8328_CODEC_SET_HP, es8328->hp_gpio_level);
+ } else {
+ es8328_set_gpio(ES8328_CODEC_SET_HP, !es8328->hp_gpio_level);
+ }
+
return snd_soc_component_update_bits(dai->component, ES8328_DACCONTROL3,
ES8328_DACCONTROL3_DACMUTE,
mute ? ES8328_DACCONTROL3_DACMUTE : 0);
@@ -795,6 +854,21 @@ static int es8328_component_probe(struct snd_soc_component *component)
goto clk_fail;
}
+ if (es8328->hp_det_gpio != INVALID_GPIO) {
+ if (gpio_get_value(es8328->hp_det_gpio) == es8328->hp_det_level)
+ es8328->hp_inserted = 1;
+ } else {
+ es8328->hp_inserted = 1;
+ }
+
+
+ if (!strncmp(component->dev->of_node->name, "es8388", 6)) {
+ usleep_range(18000, 20000);
+ snd_soc_component_update_bits(component, ES8328_DACCONTROL17,
+ ES8328_DACCONTROL17_LD2LO, ES8328_DACCONTROL17_LD2LO);
+ snd_soc_component_update_bits(component, ES8328_DACCONTROL20,
+ ES8328_DACCONTROL20_RD2RO, ES8328_DACCONTROL20_RD2RO);
+ }
return 0;
clk_fail:
@@ -850,6 +924,8 @@ int es8328_probe(struct device *dev, struct regmap *regmap)
struct es8328_priv *es8328;
int ret;
int i;
+ int hp_irq = 0;
+ enum of_gpio_flags flags;
if (IS_ERR(regmap))
return PTR_ERR(regmap);
@@ -859,6 +935,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap)
return -ENOMEM;
es8328->regmap = regmap;
+ es8328_private = es8328;
for (i = 0; i < ARRAY_SIZE(es8328->supplies); i++)
es8328->supplies[i].supply = supply_names[i];
@@ -870,6 +947,43 @@ int es8328_probe(struct device *dev, struct regmap *regmap)
return ret;
}
+ es8328->hp_ctl_gpio = of_get_named_gpio_flags(dev->of_node, "hp-ctl-gpio", 0, &flags);
+ if (es8328->hp_ctl_gpio < 0) {
+ dev_info(dev, "Can not read property hp_ctl_gpio\n");
+ es8328->hp_ctl_gpio = INVALID_GPIO;
+ } else {
+ es8328->hp_gpio_level = (flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1;
+ ret = devm_gpio_request_one(dev, es8328->hp_ctl_gpio, GPIOF_DIR_OUT, "hp_ctl_gpio");
+ if (ret != 0) {
+ dev_err(dev, "Failed to request hp_ctl_gpio\n");
+ return ret;
+ }
+ es8328_set_gpio(ES8328_CODEC_SET_HP, !es8328->hp_gpio_level);
+ }
+
+ es8328->hp_det_gpio = of_get_named_gpio_flags(dev->of_node, "hp-det-gpio", 0, &flags);
+ if (es8328->hp_det_gpio < 0) {
+ dev_info(dev, "Can not read property hp_det_gpio\n");
+ es8328->hp_det_gpio = INVALID_GPIO;
+ } else {
+ es8328->hp_det_level = (flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1;
+ ret = devm_gpio_request_one(dev, es8328->hp_det_gpio, GPIOF_IN, NULL);
+ if (ret != 0) {
+ dev_err(dev, "Failed to request hp_det_gpio\n");
+ return ret;
+ }
+ hp_irq = gpio_to_irq(es8328->hp_det_gpio);
+
+ if (hp_irq) {
+ ret = devm_request_threaded_irq(dev, hp_irq, NULL, hp_det_irq_handler,
+ IRQ_TYPE_EDGE_BOTH | IRQF_ONESHOT, "ES8323", NULL);
+ if (ret < 0) {
+ dev_err(dev, "request_irq failed: %d\n", ret);
+ return ret;
+ }
+ }
+ }
+
dev_set_drvdata(dev, es8328);
return devm_snd_soc_register_component(dev,

33
patch/kernel/archive/station-p2-5.19/280-linux-90200-rk3328-roc-pc-wifi-fix.patch
View File

@@ -1,33 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
@@ -28,7 +28,7 @@
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
- linux,rc-map-name = "rc-khadas";
+ linux,rc-map-name = "rc-station";
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@@ -81,6 +81,20 @@
};
};
+&sdmmc_ext {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0ext_bus4 &sdmmc0ext_cmd &sdmmc0ext_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
&pmic_int_l {
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};

287
patch/kernel/archive/station-p2-5.19/290-Revert-net-Remove-net-ipx.h-and-uapi-linux-ipx.h-hea.patch
View File

@@ -1,287 +0,0 @@
From 3ec70749ae3cb072f19d886981a217121f776415 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h header
files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000000..9d1342807b59
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000000..3168137adae8
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.25.1

4047
patch/kernel/archive/station-p2-5.19/300-add-fusb30x-driver.patch
View File

File diff suppressed because it is too large Load Diff

1456
patch/kernel/archive/station-p2-5.19/310-add-rk3328-usb3-phy-driver.patch
View File

File diff suppressed because it is too large Load Diff

22
patch/kernel/archive/station-p2-5.19/330-board-roc-rk3399-pc-fix-fusb302-compatible.patch
View File

@@ -1,22 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index 9f225e9c3..057c938be 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -506,7 +506,7 @@
status = "okay";
fusb1: usb-typec@22 {
- compatible = "fcs,fusb302";
+ compatible = "fairchild,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
@@ -523,7 +523,7 @@
status = "okay";
fusb0: usb-typec@22 {
- compatible = "fcs,fusb302";
+ compatible = "fairchild,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;

145
patch/kernel/archive/station-p2-5.19/340-general-add-dwc3-xhci-usb-trb-quirk.patch
View File

@@ -1,145 +0,0 @@
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 841daec70..48825b870 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1340,6 +1340,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
"snps,dis-del-phy-power-chg-quirk");
dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev,
"snps,dis-tx-ipgap-linecheck-quirk");
+ dwc->xhci_trb_ent_quirk = device_property_read_bool(dev,
+ "snps,xhci-trb-ent-quirk");
dwc->resume_hs_terminations = device_property_read_bool(dev,
"snps,resume-hs-terminations");
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 1b241f937..e1ded14fd 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1049,6 +1049,9 @@ struct dwc3_scratchpad_array {
* change quirk.
* @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate
* check during HS transmit.
+ * @xhci_trb_ent_quirk: set if need to enable the Evaluate Next TRB(ENT)
+ * flag in the TRB data structure to force xHC to
+ * pre-fetch the next TRB of a TD.
* @resume-hs-terminations: Set if we enable quirk for fixing improper crc
* generation after resume from suspend.
* @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
@@ -1245,6 +1248,7 @@ struct dwc3 {
unsigned dis_tx_ipgap_linecheck_quirk:1;
unsigned resume_hs_terminations:1;
+ unsigned xhci_trb_ent_quirk:1;
unsigned parkmode_disable_ss_quirk:1;
unsigned gfladj_refclk_lpm_sel:1;
unsigned tx_de_emphasis_quirk:1;
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
index e19517658..19d48703d 100644
--- a/drivers/usb/dwc3/host.c
+++ b/drivers/usb/dwc3/host.c
@@ -44,7 +44,7 @@ static int dwc3_host_get_irq(struct dwc3 *dwc)
int dwc3_host_init(struct dwc3 *dwc)
{
- struct property_entry props[4];
+ struct property_entry props[5];
struct platform_device *xhci;
int ret, irq;
struct resource *res;
@@ -92,6 +92,9 @@ int dwc3_host_init(struct dwc3 *dwc)
if (dwc->usb3_lpm_capable)
props[prop_idx++] = PROPERTY_ENTRY_BOOL("usb3-lpm-capable");
+ if (dwc->xhci_trb_ent_quirk)
+ props[prop_idx++] = PROPERTY_ENTRY_BOOL("xhci-trb-ent-quirk");
+
if (dwc->usb2_lpm_disable)
props[prop_idx++] = PROPERTY_ENTRY_BOOL("usb2-lpm-disable");
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 4d34f6005..6972cb5b2 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -312,6 +312,9 @@ static int xhci_plat_probe(struct platform_device *pdev)
if (device_property_read_bool(tmpdev, "quirk-broken-port-ped"))
xhci->quirks |= XHCI_BROKEN_PORT_PED;
+ if (device_property_read_bool(tmpdev, "xhci-trb-ent-quirk"))
+ xhci->quirks |= XHCI_TRB_ENT_QUIRK;
+
device_property_read_u32(tmpdev, "imod-interval-ns",
&xhci->imod_interval);
}
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 167dae117..b1bc3bd03 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -3312,6 +3312,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
bool more_trbs_coming = true;
bool need_zero_pkt = false;
bool first_trb = true;
+ bool en_trb_ent = true;
unsigned int num_trbs;
unsigned int start_cycle, num_sgs = 0;
unsigned int enqd_len, block_len, trb_buff_len, full_len;
@@ -3348,6 +3349,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
need_zero_pkt = true;
+ /*
+ * Don't enable the ENT flag in the TRB if
+ * the EP support bulk streaming protocol.
+ */
+ if (urb->stream_id)
+ en_trb_ent = false;
+
td = &urb_priv->td[0];
/*
@@ -3376,6 +3384,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
first_trb = false;
if (start_cycle == 0)
field |= TRB_CYCLE;
+ /*
+ * Don't enable the ENT flag in the TRB if the
+ * transfer length of the first TRB isn't an
+ * integer multiple of the EP maxpacket.
+ */
+ if (trb_buff_len % usb_endpoint_maxp(&urb->ep->desc))
+ en_trb_ent = false;
} else
field |= ring->cycle_state;
@@ -3384,6 +3399,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
*/
if (enqd_len + trb_buff_len < full_len) {
field |= TRB_CHAIN;
+ if (xhci->quirks & XHCI_TRB_ENT_QUIRK && en_trb_ent)
+ field |= TRB_ENT;
if (trb_is_link(ring->enqueue + 1)) {
if (xhci_align_td(xhci, urb, enqd_len,
&trb_buff_len,
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d01241f1d..357217751 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1512,7 +1512,11 @@ static inline const char *xhci_trb_type_string(u8 type)
#define TRB_SEGMENT_SIZE (TRBS_PER_SEGMENT*16)
#define TRB_SEGMENT_SHIFT (ilog2(TRB_SEGMENT_SIZE))
/* TRB buffer pointers can't cross 64KB boundaries */
+#ifdef CONFIG_ARCH_ROCKCHIP
+#define TRB_MAX_BUFF_SHIFT 12
+#else
#define TRB_MAX_BUFF_SHIFT 16
+#endif
#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
/* How much data is left before the 64KB boundary? */
#define TRB_BUFF_LEN_UP_TO_BOUNDARY(addr) (TRB_MAX_BUFF_SIZE - \
@@ -1828,6 +1832,7 @@ struct xhci_hcd {
#define XHCI_STATE_HALTED (1 << 1)
#define XHCI_STATE_REMOVING (1 << 2)
unsigned long long quirks;
+#define XHCI_TRB_ENT_QUIRK BIT_ULL(63)
#define XHCI_LINK_TRB_QUIRK BIT_ULL(0)
#define XHCI_RESET_EP_QUIRK BIT_ULL(1)
#define XHCI_NEC_HOST BIT_ULL(2)

73
patch/kernel/archive/station-p2-5.19/350-general-add-miniDP-dt-doc.patch
View File

@@ -1,73 +0,0 @@
diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml b/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
new file mode 100644
index 000000000000..8110fbe2ddc2
--- /dev/null
+++ b/Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/extcon/extcon-usbc-virtual-pd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Type-C Virtual PD extcon
+
+maintainers:
+ - Jagan Teki <jagan@amarulasolutions.com>
+
+description: |
+ USB Type-C protocol supports various modes of operations includes PD,
+ USB3, and Altmode. If the platform design supports a Type-C connector
+ then configuring these modes can be done via enumeration.
+
+ However, there are some platforms that design these modes as separate
+ protocol connectors like design Display Port from on-chip USB3 controller.
+ So we can access Type-C Altmode Display Port via onboard Display Port
+ connector instead of a Type-C connector. These kinds of platforms require
+ an explicit extcon driver in order to handle Power Delivery and
+ Port Detection.
+
+properties:
+ compatible:
+ const: linux,extcon-usbc-virtual-pd
+
+ det-gpios:
+ description: Detect GPIO pin. Pin can be Display Port Detect or USB ID.
+ maxItems: 1
+
+ vpd-polarity:
+ description: USB Type-C Polarity. false for Normal and true for Flip.
+ type: boolean
+
+ vpd-super-speed:
+ description: USB Super Speed. false for USB2 and true for USB3.
+ type: boolean
+
+ vpd-data-role:
+ description: USB Data roles for Virtual Type-C.
+ $ref: /schemas/types.yaml#definitions/string
+
+ enum:
+ - host
+ - device
+ - display-port
+
+required:
+ - compatible
+ - det-gpios
+ - vpd-data-role
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/pinctrl/rockchip.h>
+
+ virtual_pd: virtual-pd {
+ compatible = "linux,extcon-usbc-virtual-pd";
+ det-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
+ vpd-data-role = "display-port";
+ vpd-super-speed;
+ };

337
patch/kernel/archive/station-p2-5.19/360-general-add-miniDP-virtual-extcon.patch
View File

@@ -1,337 +0,0 @@
diff --git a/MAINTAINERS b/MAINTAINERS
index 68f21d46614c..aeb161b19dae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6466,6 +6466,12 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4.git
F: Documentation/filesystems/ext4/
F: fs/ext4/
+EXTCON DRIVER FOR TYPE-C VIRTUAL PD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: Documentation/devicetree/bindings/extcon/extcon-usbc-virtual-pd.yaml
+F: drivers/extcon/extcon-usbc-virtual-pd.c
+
Extended Verification Module (EVM)
M: Mimi Zohar <zohar@linux.ibm.com>
L: linux-integrity@vger.kernel.org
diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
index aac507bff135..edd6c3c52699 100644
--- a/drivers/extcon/Kconfig
+++ b/drivers/extcon/Kconfig
@@ -186,4 +186,14 @@ config EXTCON_USBC_CROS_EC
Say Y here to enable USB Type C cable detection extcon support when
using Chrome OS EC based USB Type-C ports.
+config EXTCON_USBC_VIRTUAL_PD
+ tristate "Virtual Type-C PD EXTCON support"
+ depends on GPIOLIB || COMPILE_TEST
+ help
+ Say Y here to enable Virtual Type-C PD extcon driver support, if
+ hardware platform designed Type-C modes separately.
+
+ Example, of designing Display Port separately from Type-C Altmode
+ instead of accessing Altmode Display Port in Type-C connector.
+
endif
diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile
index 52096fd8a216..c35191eef0e1 100644
--- a/drivers/extcon/Makefile
+++ b/drivers/extcon/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_EXTCON_RT8973A) += extcon-rt8973a.o
obj-$(CONFIG_EXTCON_USB_GPIO) += extcon-usb-gpio.o
obj-$(CONFIG_EXTCON_USBC_CROS_EC) += extcon-usbc-cros-ec.o
obj-$(CONFIG_EXTCON_USBC_TUSB320) += extcon-usbc-tusb320.o
+obj-$(CONFIG_EXTCON_USBC_VIRTUAL_PD) += extcon-usbc-virtual-pd.o
diff --git a/drivers/extcon/extcon-usbc-virtual-pd.c b/drivers/extcon/extcon-usbc-virtual-pd.c
new file mode 100644
index 000000000000..e0713670e33d
--- /dev/null
+++ b/drivers/extcon/extcon-usbc-virtual-pd.c
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Type-C Virtual PD Extcon driver
+ *
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include <linux/extcon-provider.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+static const unsigned int vpd_cable[] = {
+ EXTCON_USB,
+ EXTCON_USB_HOST,
+ EXTCON_DISP_DP,
+ EXTCON_NONE,
+};
+
+enum vpd_data_role {
+ DR_NONE,
+ DR_HOST,
+ DR_DEVICE,
+ DR_DISPLAY_PORT,
+};
+
+enum vpd_polarity {
+ POLARITY_NORMAL,
+ POLARITY_FLIP,
+};
+
+enum vpd_usb_ss {
+ USB_SS_USB2,
+ USB_SS_USB3,
+};
+
+struct vpd_extcon {
+ struct device *dev;
+ struct extcon_dev *extcon;
+ struct gpio_desc *det_gpio;
+
+ u8 polarity;
+ u8 usb_ss;
+ enum vpd_data_role data_role;
+
+ int irq;
+ bool enable_irq;
+ struct work_struct work;
+ struct delayed_work irq_work;
+};
+
+static void vpd_extcon_irq_work(struct work_struct *work)
+{
+ struct vpd_extcon *vpd = container_of(work, struct vpd_extcon, irq_work.work);
+ bool host_connected = false, device_connected = false, dp_connected = false;
+ union extcon_property_value property;
+ int det;
+
+ det = vpd->det_gpio ? gpiod_get_raw_value(vpd->det_gpio) : 0;
+ if (det) {
+ device_connected = (vpd->data_role == DR_DEVICE) ? true : false;
+ host_connected = (vpd->data_role == DR_HOST) ? true : false;
+ dp_connected = (vpd->data_role == DR_DISPLAY_PORT) ? true : false;
+ }
+
+ extcon_set_state(vpd->extcon, EXTCON_USB, host_connected);
+ extcon_set_state(vpd->extcon, EXTCON_USB_HOST, device_connected);
+ extcon_set_state(vpd->extcon, EXTCON_DISP_DP, dp_connected);
+
+ property.intval = vpd->polarity;
+ extcon_set_property(vpd->extcon, EXTCON_USB,
+ EXTCON_PROP_USB_TYPEC_POLARITY, property);
+ extcon_set_property(vpd->extcon, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_TYPEC_POLARITY, property);
+ extcon_set_property(vpd->extcon, EXTCON_DISP_DP,
+ EXTCON_PROP_USB_TYPEC_POLARITY, property);
+
+ property.intval = vpd->usb_ss;
+ extcon_set_property(vpd->extcon, EXTCON_USB,
+ EXTCON_PROP_USB_SS, property);
+ extcon_set_property(vpd->extcon, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_SS, property);
+ extcon_set_property(vpd->extcon, EXTCON_DISP_DP,
+ EXTCON_PROP_USB_SS, property);
+
+ extcon_sync(vpd->extcon, EXTCON_USB);
+ extcon_sync(vpd->extcon, EXTCON_USB_HOST);
+ extcon_sync(vpd->extcon, EXTCON_DISP_DP);
+}
+
+static irqreturn_t vpd_extcon_irq_handler(int irq, void *dev_id)
+{
+ struct vpd_extcon *vpd = dev_id;
+
+ schedule_delayed_work(&vpd->irq_work, msecs_to_jiffies(10));
+
+ return IRQ_HANDLED;
+}
+
+static enum vpd_data_role vpd_extcon_data_role(struct vpd_extcon *vpd)
+{
+ const char *const data_roles[] = {
+ [DR_NONE] = "NONE",
+ [DR_HOST] = "host",
+ [DR_DEVICE] = "device",
+ [DR_DISPLAY_PORT] = "display-port",
+ };
+ struct device *dev = vpd->dev;
+ int ret;
+ const char *dr;
+
+ ret = device_property_read_string(dev, "vpd-data-role", &dr);
+ if (ret < 0)
+ return DR_NONE;
+
+ ret = match_string(data_roles, ARRAY_SIZE(data_roles), dr);
+
+ return (ret < 0) ? DR_NONE : ret;
+}
+
+static int vpd_extcon_parse_dts(struct vpd_extcon *vpd)
+{
+ struct device *dev = vpd->dev;
+ bool val = false;
+ int ret;
+
+ val = device_property_read_bool(dev, "vpd-polarity");
+ if (val)
+ vpd->polarity = POLARITY_FLIP;
+ else
+ vpd->polarity = POLARITY_NORMAL;
+
+ val = device_property_read_bool(dev, "vpd-super-speed");
+ if (val)
+ vpd->usb_ss = USB_SS_USB3;
+ else
+ vpd->usb_ss = USB_SS_USB2;
+
+ vpd->data_role = vpd_extcon_data_role(vpd);
+
+ vpd->det_gpio = devm_gpiod_get_optional(dev, "det", GPIOD_OUT_LOW);
+ if (IS_ERR(vpd->det_gpio)) {
+ ret = PTR_ERR(vpd->det_gpio);
+ dev_warn(dev, "failed to get det gpio: %d\n", ret);
+ return ret;
+ }
+
+ vpd->irq = gpiod_to_irq(vpd->det_gpio);
+ if (vpd->irq < 0) {
+ dev_err(dev, "failed to get irq for gpio: %d\n", vpd->irq);
+ return vpd->irq;
+ }
+
+ ret = devm_request_threaded_irq(dev, vpd->irq, NULL,
+ vpd_extcon_irq_handler,
+ IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ NULL, vpd);
+ if (ret)
+ dev_err(dev, "failed to request gpio irq\n");
+
+ return ret;
+}
+
+static int vpd_extcon_probe(struct platform_device *pdev)
+{
+ struct vpd_extcon *vpd;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ vpd = devm_kzalloc(dev, sizeof(*vpd), GFP_KERNEL);
+ if (!vpd)
+ return -ENOMEM;
+
+ vpd->dev = dev;
+ ret = vpd_extcon_parse_dts(vpd);
+ if (ret)
+ return ret;
+
+ INIT_DELAYED_WORK(&vpd->irq_work, vpd_extcon_irq_work);
+
+ vpd->extcon = devm_extcon_dev_allocate(dev, vpd_cable);
+ if (IS_ERR(vpd->extcon)) {
+ dev_err(dev, "allocat extcon failed\n");
+ return PTR_ERR(vpd->extcon);
+ }
+
+ ret = devm_extcon_dev_register(dev, vpd->extcon);
+ if (ret) {
+ dev_err(dev, "register extcon failed: %d\n", ret);
+ return ret;
+ }
+
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB,
+ EXTCON_PROP_USB_VBUS);
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_VBUS);
+
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB,
+ EXTCON_PROP_USB_TYPEC_POLARITY);
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_TYPEC_POLARITY);
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB,
+ EXTCON_PROP_USB_SS);
+ extcon_set_property_capability(vpd->extcon, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_SS);
+
+ extcon_set_property_capability(vpd->extcon, EXTCON_DISP_DP,
+ EXTCON_PROP_USB_SS);
+ extcon_set_property_capability(vpd->extcon, EXTCON_DISP_DP,
+ EXTCON_PROP_USB_TYPEC_POLARITY);
+
+ platform_set_drvdata(pdev, vpd);
+
+ vpd_extcon_irq_work(&vpd->irq_work.work);
+
+ return 0;
+}
+
+static int vpd_extcon_remove(struct platform_device *pdev)
+{
+ struct vpd_extcon *vpd = platform_get_drvdata(pdev);
+
+ cancel_delayed_work_sync(&vpd->irq_work);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int vpd_extcon_suspend(struct device *dev)
+{
+ struct vpd_extcon *vpd = dev_get_drvdata(dev);
+
+ if (!vpd->enable_irq) {
+ disable_irq_nosync(vpd->irq);
+ vpd->enable_irq = true;
+ }
+
+ return 0;
+}
+
+static int vpd_extcon_resume(struct device *dev)
+{
+ struct vpd_extcon *vpd = dev_get_drvdata(dev);
+
+ if (vpd->enable_irq) {
+ enable_irq(vpd->irq);
+ vpd->enable_irq = false;
+ }
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(vpd_extcon_pm_ops,
+ vpd_extcon_suspend, vpd_extcon_resume);
+
+static const struct of_device_id vpd_extcon_dt_match[] = {
+ { .compatible = "linux,extcon-usbc-virtual-pd", },
+ { /* sentinel */ }
+};
+
+static struct platform_driver vpd_extcon_driver = {
+ .probe = vpd_extcon_probe,
+ .remove = vpd_extcon_remove,
+ .driver = {
+ .name = "extcon-usbc-virtual-pd",
+ .pm = &vpd_extcon_pm_ops,
+ .of_match_table = vpd_extcon_dt_match,
+ },
+};
+
+module_platform_driver(vpd_extcon_driver);
+
+MODULE_AUTHOR("Jagan Teki <jagan@amarulasolutions.com>");
+MODULE_DESCRIPTION("Type-C Virtual PD extcon driver");
+MODULE_LICENSE("GPL v2");

82
patch/kernel/archive/station-p2-5.19/370-general-add-overlay-compilation-support.patch
View File

@@ -1,82 +0,0 @@
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index 3c79f859..4e5c1d59 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,5 @@ zImage
xipImage
bootpImage
uImage
+*.dtb*
+*.scr
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 50d580d77..94bd15617 100644
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
@@ -18,9 +18,12 @@ include scripts/Kbuild.include
include $(src)/Makefile
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
+dtbos := $(addprefix $(dst)/, $(dtbo-y))
+scrs := $(addprefix $(dst)/, $(scr-y))
+readmes := $(addprefix $(dst)/, $(dtbotxt-y))
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
-__dtbs_install: $(dtbs) $(subdirs)
+__dtbs_install: $(dtbs) $(dtbos) $(scrs) $(readmes) $(subdirs)
@:
quiet_cmd_dtb_install = INSTALL $@
@@ -29,6 +32,15 @@ quiet_cmd_dtb_install = INSTALL $@
$(dst)/%.dtb: $(obj)/%.dtb
$(call cmd,dtb_install)
+$(dst)/%.dtbo: $(obj)/%.dtbo
+ $(call cmd,dtb_install)
+
+$(dst)/%.scr: $(obj)/%.scr
+ $(call cmd,dtb_install)
+
+$(dst)/README.rockchip-overlays: $(src)/README.rockchip-overlays
+ $(call cmd,dtb_install)
+
PHONY += $(subdirs)
$(subdirs):
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 58c05e5d..2b95dda9 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -278,6 +278,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
# ---------------------------------------------------------------------------
DTC ?= $(objtree)/scripts/dtc/dtc
+# Overlay support
+DTC_FLAGS += -@ -Wno-unit_address_format -Wno-simple_bus_reg
+
# Disable noisy checks by default
ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
DTC_FLAGS += -Wno-unit_address_vs_reg \
@@ -324,6 +327,23 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
$(obj)/%.dtb: $(src)/%.dts FORCE
$(call if_changed_dep,dtc)
+quiet_cmd_dtco = DTCO $@
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
+ $(DTC) -O dtb -o $@ -b 0 \
+ -i $(dir $<) $(DTC_FLAGS) \
+ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
+ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+ $(call if_changed_dep,dtco)
+
+quiet_cmd_scr = MKIMAGE $@
+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@
+
+$(obj)/%.scr: $(src)/%.scr-cmd FORCE
+ $(call if_changed,scr)
+
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
# Bzip2

430
patch/kernel/archive/station-p2-5.19/380-general-add-overlay-configfs.patch
View File

@@ -1,430 +0,0 @@
Below patch is a squash of following 4 commits borrowed from ayufan's
https://github.com/ayufan-rock64/linux-mainline-kernel repo:
From cc22206776d61948f6984a4f03d8013eb4f92984 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Wed, 3 Dec 2014 13:23:28 +0200
Subject: [PATCH] OF: DT-Overlay configfs interface
This is a port of Pantelis Antoniou's v3 port that makes use of the
new upstreamed configfs support for binary attributes.
Original commit message:
Add a runtime interface to using configfs for generic device tree overlay
usage. With it its possible to use device tree overlays without having
to use a per-platform overlay manager.
Please see Documentation/devicetree/configfs-overlays.txt for more info.
Changes since v2:
- Removed ifdef CONFIG_OF_OVERLAY (since for now it's required)
- Created a documentation entry
- Slight rewording in Kconfig
Changes since v1:
- of_resolve() -> of_resolve_phandles().
Originally-signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
DT configfs: Fix build errors on other platforms
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
DT configfs: fix build error
There is an error when compiling rpi-4.6.y branch:
CC drivers/of/configfs.o
drivers/of/configfs.c:291:21: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.default_groups = of_cfs_def_groups,
^
drivers/of/configfs.c:291:21: note: (near initialization for 'of_cfs_subsys.su_group.default_groups.next')
The .default_groups is linked list since commit
1ae1602de028acaa42a0f6ff18d19756f8e825c6.
This commit uses configfs_add_default_group to fix this problem.
Change-Id: Id4903c9725ebc355aadd067bbc32047db622ce61
Signed-off-by: Slawomir Stepien <sst@poczta.fm>
From 7cfb967c52d374ddcb0fc9194f38d1d5f9d8cdd8 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Sun, 3 Dec 2017 21:43:03 +0000
Subject: [PATCH] configfs: New of_overlay API
From 8637321fabb045fe8617360ef1b058978b0d8457 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Dec 2017 14:07:40 +0000
Subject: [PATCH] SQUASH: config_fs: of_overlay_apply takes a pointer
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
From 274dfabb947ca32116a429c582c74aaee6ff1b5b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= <ayufan@ayufan.eu>
Date: Mon, 14 May 2018 11:28:09 +0200
Subject: [PATCH] ayufan: fix overlayfs to compile on 4.17 kernel
Change-Id: I421887697d2ba6e52aba9100100b7664760e2001
diff --git a/Documentation/devicetree/configfs-overlays.txt b/Documentation/devicetree/configfs-overlays.txt
new file mode 100644
index 0000000000000..5fa43e0643072
--- /dev/null
+++ b/Documentation/devicetree/configfs-overlays.txt
@@ -0,0 +1,31 @@
+Howto use the configfs overlay interface.
+
+A device-tree configfs entry is created in /config/device-tree/overlays
+and and it is manipulated using standard file system I/O.
+Note that this is a debug level interface, for use by developers and
+not necessarily something accessed by normal users due to the
+security implications of having direct access to the kernel's device tree.
+
+* To create an overlay you mkdir the directory:
+
+ # mkdir /config/device-tree/overlays/foo
+
+* Either you echo the overlay firmware file to the path property file.
+
+ # echo foo.dtbo >/config/device-tree/overlays/foo/path
+
+* Or you cat the contents of the overlay to the dtbo file
+
+ # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo
+
+The overlay file will be applied, and devices will be created/destroyed
+as required.
+
+To remove it simply rmdir the directory.
+
+ # rmdir /config/device-tree/overlays/foo
+
+The rationalle of the dual interface (firmware & direct copy) is that each is
+better suited to different use patterns. The firmware interface is what's
+intended to be used by hardware managers in the kernel, while the copy interface
+make sense for developers (since it avoids problems with namespaces).
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 37c2ccbefecdc..d3fc81a40c0e7 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -103,4 +103,11 @@ config OF_OVERLAY
config OF_NUMA
bool
+config OF_CONFIGFS
+ bool "Device Tree Overlay ConfigFS interface"
+ select CONFIGFS_FS
+ select OF_OVERLAY
+ help
+ Enable a simple user-space driven DT overlay interface.
+
endif # OF
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 663a4af0cccd5..b00a95adf5199 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-y = base.o device.o platform.o property.o
obj-$(CONFIG_OF_KOBJ) += kobj.o
+obj-$(CONFIG_OF_CONFIGFS) += configfs.o
obj-$(CONFIG_OF_DYNAMIC) += dynamic.o
obj-$(CONFIG_OF_FLATTREE) += fdt.o
obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o
diff --git a/drivers/of/configfs.c b/drivers/of/configfs.c
new file mode 100644
index 000000000..5dd509e8f
--- /dev/null
+++ b/drivers/of/configfs.c
@@ -0,0 +1,290 @@
+/*
+ * Configfs entries for device-tree
+ *
+ * Copyright (C) 2013 - Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/ctype.h>
+#include <linux/cpu.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/proc_fs.h>
+#include <linux/configfs.h>
+#include <linux/types.h>
+#include <linux/stat.h>
+#include <linux/limits.h>
+#include <linux/file.h>
+#include <linux/vmalloc.h>
+#include <linux/firmware.h>
+#include <linux/sizes.h>
+
+#include "of_private.h"
+
+struct cfs_overlay_item {
+ struct config_item item;
+
+ char path[PATH_MAX];
+
+ const struct firmware *fw;
+ struct device_node *overlay;
+ int ov_id;
+
+ void *dtbo;
+ int dtbo_size;
+};
+
+static int create_overlay(struct cfs_overlay_item *overlay, void *blob, u32 blob_size)
+{
+ int err;
+
+ err = of_overlay_fdt_apply(blob, blob_size, &overlay->ov_id);
+ if (err < 0) {
+ pr_err("%s: Failed to create overlay (err=%d)\n",
+ __func__, err);
+ goto out_err;
+ }
+
+out_err:
+ return err;
+}
+
+static inline struct cfs_overlay_item *to_cfs_overlay_item(
+ struct config_item *item)
+{
+ return item ? container_of(item, struct cfs_overlay_item, item) : NULL;
+}
+
+static ssize_t cfs_overlay_item_path_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ return sprintf(page, "%s\n", overlay->path);
+}
+
+static ssize_t cfs_overlay_item_path_store(struct config_item *item,
+ const char *page, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ const char *p = page;
+ char *s;
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy to path buffer (and make sure it's always zero terminated */
+ count = snprintf(overlay->path, sizeof(overlay->path) - 1, "%s", p);
+ overlay->path[sizeof(overlay->path) - 1] = '\0';
+
+ /* strip trailing newlines */
+ s = overlay->path + strlen(overlay->path);
+ while (s > overlay->path && *--s == '\n')
+ *s = '\0';
+
+ pr_debug("%s: path is '%s'\n", __func__, overlay->path);
+
+ err = request_firmware(&overlay->fw, overlay->path, NULL);
+ if (err != 0)
+ goto out_err;
+
+ err = create_overlay(overlay, (void *)overlay->fw->data, overlay->fw->size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+
+ release_firmware(overlay->fw);
+ overlay->fw = NULL;
+
+ overlay->path[0] = '\0';
+ return err;
+}
+
+static ssize_t cfs_overlay_item_status_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ return sprintf(page, "%s\n",
+ overlay->ov_id >= 0 ? "applied" : "unapplied");
+}
+
+CONFIGFS_ATTR(cfs_overlay_item_, path);
+CONFIGFS_ATTR_RO(cfs_overlay_item_, status);
+
+static struct configfs_attribute *cfs_overlay_attrs[] = {
+ &cfs_overlay_item_attr_path,
+ &cfs_overlay_item_attr_status,
+ NULL,
+};
+
+ssize_t cfs_overlay_item_dtbo_read(struct config_item *item,
+ void *buf, size_t max_count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ pr_debug("%s: buf=%p max_count=%zu\n", __func__,
+ buf, max_count);
+
+ if (overlay->dtbo == NULL)
+ return 0;
+
+ /* copy if buffer provided */
+ if (buf != NULL) {
+ /* the buffer must be large enough */
+ if (overlay->dtbo_size > max_count)
+ return -ENOSPC;
+
+ memcpy(buf, overlay->dtbo, overlay->dtbo_size);
+ }
+
+ return overlay->dtbo_size;
+}
+
+ssize_t cfs_overlay_item_dtbo_write(struct config_item *item,
+ const void *buf, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy the contents */
+ overlay->dtbo = kmemdup(buf, count, GFP_KERNEL);
+ if (overlay->dtbo == NULL)
+ return -ENOMEM;
+
+ overlay->dtbo_size = count;
+
+ err = create_overlay(overlay, overlay->dtbo, overlay->dtbo_size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+ kfree(overlay->dtbo);
+ overlay->dtbo = NULL;
+ overlay->dtbo_size = 0;
+
+ return err;
+}
+
+CONFIGFS_BIN_ATTR(cfs_overlay_item_, dtbo, NULL, SZ_1M);
+
+static struct configfs_bin_attribute *cfs_overlay_bin_attrs[] = {
+ &cfs_overlay_item_attr_dtbo,
+ NULL,
+};
+
+static void cfs_overlay_release(struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ if (overlay->ov_id >= 0)
+ of_overlay_remove(&overlay->ov_id);
+ if (overlay->fw)
+ release_firmware(overlay->fw);
+ /* kfree with NULL is safe */
+ kfree(overlay->dtbo);
+ kfree(overlay);
+}
+
+static struct configfs_item_operations cfs_overlay_item_ops = {
+ .release = cfs_overlay_release,
+};
+
+static struct config_item_type cfs_overlay_type = {
+ .ct_item_ops = &cfs_overlay_item_ops,
+ .ct_attrs = cfs_overlay_attrs,
+ .ct_bin_attrs = cfs_overlay_bin_attrs,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct config_item *cfs_overlay_group_make_item(
+ struct config_group *group, const char *name)
+{
+ struct cfs_overlay_item *overlay;
+
+ overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
+ if (!overlay)
+ return ERR_PTR(-ENOMEM);
+ overlay->ov_id = -1;
+
+ config_item_init_type_name(&overlay->item, name, &cfs_overlay_type);
+ return &overlay->item;
+}
+
+static void cfs_overlay_group_drop_item(struct config_group *group,
+ struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ config_item_put(&overlay->item);
+}
+
+static struct configfs_group_operations overlays_ops = {
+ .make_item = cfs_overlay_group_make_item,
+ .drop_item = cfs_overlay_group_drop_item,
+};
+
+static struct config_item_type overlays_type = {
+ .ct_group_ops = &overlays_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct configfs_group_operations of_cfs_ops = {
+ /* empty - we don't allow anything to be created */
+};
+
+static struct config_item_type of_cfs_type = {
+ .ct_group_ops = &of_cfs_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+struct config_group of_cfs_overlay_group;
+
+static struct configfs_subsystem of_cfs_subsys = {
+ .su_group = {
+ .cg_item = {
+ .ci_namebuf = "device-tree",
+ .ci_type = &of_cfs_type,
+ },
+ },
+ .su_mutex = __MUTEX_INITIALIZER(of_cfs_subsys.su_mutex),
+};
+
+static int __init of_cfs_init(void)
+{
+ int ret;
+
+ pr_info("%s\n", __func__);
+
+ config_group_init(&of_cfs_subsys.su_group);
+ config_group_init_type_name(&of_cfs_overlay_group, "overlays",
+ &overlays_type);
+ configfs_add_default_group(&of_cfs_overlay_group,
+ &of_cfs_subsys.su_group);
+
+ ret = configfs_register_subsystem(&of_cfs_subsys);
+ if (ret != 0) {
+ pr_err("%s: failed to register subsys\n", __func__);
+ goto out;
+ }
+ pr_info("%s: OK\n", __func__);
+out:
+ return ret;
+}
+late_initcall(of_cfs_init);

82
patch/kernel/archive/station-p2-5.19/390-general-add-pll-hdmi-timings.patch
View File

@@ -1,82 +0,0 @@
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 9ca20c947..ca91a01f3 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -316,6 +316,77 @@ static const struct pre_pll_config pre_pll_cfg_table[] = {
{594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0},
{593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B},
{594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0},
+ { 25175000, 25175000, 30, 1007, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 31500000, 31500000, 1, 21, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 33750000, 33750000, 1, 45, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 35500000, 35500000, 3, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 36000000, 36000000, 1, 12, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 49500000, 49500000, 1, 33, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 50000000, 50000000, 3, 50, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 56250000, 56250000, 1, 75, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 65000000, 65000000, 3, 65, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 68250000, 68250000, 1, 91, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 71000000, 71000000, 3, 71, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 72000000, 72000000, 1, 24, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 73250000, 73250000, 3, 293, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 75000000, 75000000, 1, 25, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 78750000, 78750000, 1, 105, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 79500000, 79500000, 1, 53, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 83500000, 83500000, 3, 167, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 85500000, 85500000, 1, 57, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 88750000, 88750000, 3, 355, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 94500000, 94500000, 1, 63, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {101000000, 101000000, 3, 101, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {102250000, 102250000, 3, 409, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {106500000, 106500000, 1, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {115500000, 115500000, 1, 77, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {117500000, 117500000, 3, 235, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {119000000, 119000000, 3, 119, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {121750000, 121750000, 3, 487, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {122500000, 122500000, 3, 245, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {136750000, 136750000, 3, 547, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {140250000, 140250000, 1, 187, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {146250000, 146250000, 1, 195, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {148250000, 148250000, 3, 593, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {154000000, 154000000, 3, 154, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {156750000, 156750000, 1, 209, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {157000000, 157000000, 3, 157, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {157500000, 157500000, 1, 105, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {175500000, 175500000, 1, 117, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {179500000, 179500000, 3, 359, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {182750000, 182750000, 3, 731, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {187000000, 187000000, 3, 187, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {187250000, 187250000, 3, 749, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {193250000, 193250000, 3, 773, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {202500000, 202500000, 1, 135, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {204750000, 204750000, 1, 273, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {208000000, 208000000, 3, 208, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {214750000, 214750000, 3, 859, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {218250000, 218250000, 1, 291, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {229500000, 229500000, 1, 153, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {234000000, 234000000, 1, 78, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {241500000, 241500000, 1, 161, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {245250000, 245250000, 1, 327, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {245500000, 245500000, 3, 491, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {268250000, 268250000, 3, 1073, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {268500000, 268500000, 1, 179, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {281250000, 281250000, 1, 375, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {288000000, 288000000, 1, 96, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {312250000, 312250000, 3, 1249, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {333250000, 333250000, 3, 1333, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {348500000, 348500000, 3, 697, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {356500000, 356500000, 3, 713, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {380500000, 380500000, 3, 761, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {443250000, 443250000, 1, 591, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {505250000, 505250000, 3, 2021, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {552750000, 552750000, 1, 737, 1, 2, 2, 1, 2, 3, 4, 0, 0},
{ /* sentinel */ }
};

266
patch/kernel/archive/station-p2-5.19/400-general-bluetooth-02-add-support-for-RTL8723CS.patch
View File

@@ -1,266 +0,0 @@
From 26e61cffb09c1f5519a4eeb9d9e99239d58b6c2d Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Thu, 1 Jul 2021 11:22:23 +0200
Subject: [PATCH 302/467] Bluetooth: btrtl: add support for the RTL8723CS
The Realtek RTL8723CS is SDIO WiFi chip. It also contains a Bluetooth
module which is connected via UART to the host.
It shares lmp subversion with 8703B, so Realtek's userspace
initialization tool (rtk_hciattach) differentiates varieties of RTL8723CS
(CG, VF, XX) with RTL8703B using vendor's command to read chip type.
Also this chip declares support for some features it doesn't support
so add a quirk to indicate that these features are broken.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
drivers/bluetooth/btrtl.c | 119 +++++++++++++++++++++++++++++++++++++-
drivers/bluetooth/btrtl.h | 5 ++
2 files changed, 121 insertions(+), 3 deletions(-)
diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c
index 1f8afa024..fd293a9c4 100644
--- a/drivers/bluetooth/btrtl.c
+++ b/drivers/bluetooth/btrtl.c
@@ -17,7 +17,12 @@
#define VERSION "0.1"
+#define RTL_CHIP_8723CS_CG 3
+#define RTL_CHIP_8723CS_VF 4
+#define RTL_CHIP_8723CS_XX 5
#define RTL_EPATCH_SIGNATURE "Realtech"
+#define RTL_ROM_LMP_3499 0x3499
+#define RTL_ROM_LMP_8703B 0x8703
#define RTL_ROM_LMP_8723A 0x1200
#define RTL_ROM_LMP_8723B 0x8723
#define RTL_ROM_LMP_8821A 0x8821
@@ -30,6 +35,7 @@
#define IC_MATCH_FL_HCIREV (1 << 1)
#define IC_MATCH_FL_HCIVER (1 << 2)
#define IC_MATCH_FL_HCIBUS (1 << 3)
+#define IC_MATCH_FL_CHIP_TYPE (1 << 4)
#define IC_INFO(lmps, hcir, hciv, bus) \
.match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_HCIREV | \
IC_MATCH_FL_HCIVER | IC_MATCH_FL_HCIBUS, \
@@ -57,6 +63,7 @@ struct id_table {
__u16 hci_rev;
__u8 hci_ver;
__u8 hci_bus;
+ __u8 chip_type;
bool config_needed;
bool has_rom_version;
char *fw_name;
@@ -96,6 +103,39 @@ static const struct id_table ic_id_table[] = {
.fw_name = "rtl_bt/rtl8723b_fw.bin",
.cfg_name = "rtl_bt/rtl8723b_config" },
+ /* 8723CS-CG */
+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
+ IC_MATCH_FL_HCIBUS,
+ .lmp_subver = RTL_ROM_LMP_8703B,
+ .chip_type = RTL_CHIP_8723CS_CG,
+ .hci_bus = HCI_UART,
+ .config_needed = true,
+ .has_rom_version = true,
+ .fw_name = "rtl_bt/rtl8723cs_cg_fw.bin",
+ .cfg_name = "rtl_bt/rtl8723cs_cg_config" },
+
+ /* 8723CS-VF */
+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
+ IC_MATCH_FL_HCIBUS,
+ .lmp_subver = RTL_ROM_LMP_8703B,
+ .chip_type = RTL_CHIP_8723CS_VF,
+ .hci_bus = HCI_UART,
+ .config_needed = true,
+ .has_rom_version = true,
+ .fw_name = "rtl_bt/rtl8723cs_vf_fw.bin",
+ .cfg_name = "rtl_bt/rtl8723cs_vf_config" },
+
+ /* 8723CS-XX */
+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
+ IC_MATCH_FL_HCIBUS,
+ .lmp_subver = RTL_ROM_LMP_8703B,
+ .chip_type = RTL_CHIP_8723CS_XX,
+ .hci_bus = HCI_UART,
+ .config_needed = true,
+ .has_rom_version = true,
+ .fw_name = "rtl_bt/rtl8723cs_xx_fw.bin",
+ .cfg_name = "rtl_bt/rtl8723cs_xx_config" },
+
/* 8723D */
{ IC_INFO(RTL_ROM_LMP_8723B, 0xd, 0x8, HCI_USB),
.config_needed = true,
@@ -175,7 +215,8 @@ static const struct id_table ic_id_table[] = {
};
static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev,
- u8 hci_ver, u8 hci_bus)
+ u8 hci_ver, u8 hci_bus,
+ u8 chip_type)
{
int i;
@@ -192,6 +233,9 @@ static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev,
if ((ic_id_table[i].match_flags & IC_MATCH_FL_HCIBUS) &&
(ic_id_table[i].hci_bus != hci_bus))
continue;
+ if ((ic_id_table[i].match_flags & IC_MATCH_FL_CHIP_TYPE) &&
+ (ic_id_table[i].chip_type != chip_type))
+ continue;
break;
}
@@ -274,6 +318,7 @@ static int rtlbt_parse_firmware(struct hci_dev *hdev,
{ RTL_ROM_LMP_8723B, 1 },
{ RTL_ROM_LMP_8821A, 2 },
{ RTL_ROM_LMP_8761A, 3 },
+ { RTL_ROM_LMP_8703B, 7 },
{ RTL_ROM_LMP_8822B, 8 },
{ RTL_ROM_LMP_8723B, 9 }, /* 8723D */
{ RTL_ROM_LMP_8821A, 10 }, /* 8821C */
@@ -552,6 +597,48 @@ static int btrtl_setup_rtl8723b(struct hci_dev *hdev,
return ret;
}
+static bool rtl_has_chip_type(u16 lmp_subver)
+{
+ switch (lmp_subver) {
+ case RTL_ROM_LMP_8703B:
+ return true;
+ default:
+ break;
+ }
+
+ return false;
+}
+
+static int rtl_read_chip_type(struct hci_dev *hdev, u8 *type)
+{
+ struct rtl_chip_type_evt *chip_type;
+ struct sk_buff *skb;
+ const unsigned char cmd_buf[] = {0x00, 0x94, 0xa0, 0x00, 0xb0};
+
+ /* Read RTL chip type command */
+ skb = __hci_cmd_sync(hdev, 0xfc61, 5, cmd_buf, HCI_INIT_TIMEOUT);
+ if (IS_ERR(skb)) {
+ rtl_dev_err(hdev, "Read chip type failed (%ld)",
+ PTR_ERR(skb));
+ return PTR_ERR(skb);
+ }
+
+ if (skb->len != sizeof(*chip_type)) {
+ rtl_dev_err(hdev, "RTL chip type event length mismatch");
+ kfree_skb(skb);
+ return -EIO;
+ }
+
+ chip_type = (struct rtl_chip_type_evt *)skb->data;
+ rtl_dev_info(hdev, "chip_type status=%x type=%x",
+ chip_type->status, chip_type->type);
+
+ *type = chip_type->type & 0x0f;
+
+ kfree_skb(skb);
+ return 0;
+}
+
void btrtl_free(struct btrtl_device_info *btrtl_dev)
{
kvfree(btrtl_dev->fw_data);
@@ -568,7 +655,7 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
struct hci_rp_read_local_version *resp;
char cfg_name[40];
u16 hci_rev, lmp_subver;
- u8 hci_ver;
+ u8 hci_ver, chip_type = 0;
int ret;
u16 opcode;
u8 cmd[2];
@@ -638,8 +725,14 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
out_free:
kfree_skb(skb);
+ if (rtl_has_chip_type(lmp_subver)) {
+ ret = rtl_read_chip_type(hdev, &chip_type);
+ if (ret)
+ goto err_free;
+ }
+
btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
- hdev->bus);
+ hdev->bus, chip_type);
if (!btrtl_dev->ic_info) {
rtl_dev_info(hdev, "unknown IC info, lmp subver %04x, hci rev %04x, hci ver %04x",
@@ -757,7 +757,7 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev,
lmp_subver = le16_to_cpu(resp->lmp_subver);
btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver,
- hdev->bus);
+ hdev->bus, chip_type);
}
out_free:
kfree_skb(skb);
@@ -722,6 +815,7 @@ int btrtl_download_firmware(struct hci_dev *hdev,
case RTL_ROM_LMP_8761A:
case RTL_ROM_LMP_8822B:
case RTL_ROM_LMP_8852A:
+ case RTL_ROM_LMP_8703B:
return btrtl_setup_rtl8723b(hdev, btrtl_dev);
default:
rtl_dev_info(hdev, "assuming no firmware upload needed");
@@ -752,6 +846,19 @@ void btrtl_set_quirks(struct hci_dev *hdev, struct btrtl_device_info *btrtl_dev)
rtl_dev_dbg(hdev, "WBS supported not enabled.");
break;
}
+
+ switch (btrtl_dev->ic_info->lmp_subver) {
+ case RTL_ROM_LMP_8703B:
+ /* 8723CS reports two pages for local ext features,
+ * but it doesn't support any features from page 2 -
+ * it either responds with garbage or with error status
+ */
+ set_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
+ &hdev->quirks);
+ break;
+ default:
+ break;
+ }
}
EXPORT_SYMBOL_GPL(btrtl_set_quirks);
@@ -910,6 +1017,12 @@ MODULE_FIRMWARE("rtl_bt/rtl8723b_fw.bin");
MODULE_FIRMWARE("rtl_bt/rtl8723b_config.bin");
MODULE_FIRMWARE("rtl_bt/rtl8723bs_fw.bin");
MODULE_FIRMWARE("rtl_bt/rtl8723bs_config.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_fw.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_config.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_fw.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_config.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_fw.bin");
+MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_config.bin");
MODULE_FIRMWARE("rtl_bt/rtl8723ds_fw.bin");
MODULE_FIRMWARE("rtl_bt/rtl8723ds_config.bin");
MODULE_FIRMWARE("rtl_bt/rtl8761a_fw.bin");
diff --git a/drivers/bluetooth/btrtl.h b/drivers/bluetooth/btrtl.h
index 2c441bda3..1c6282241 100644
--- a/drivers/bluetooth/btrtl.h
+++ b/drivers/bluetooth/btrtl.h
@@ -14,6 +14,11 @@
struct btrtl_device_info;
+struct rtl_chip_type_evt {
+ __u8 status;
+ __u8 type;
+} __packed;
+
struct rtl_download_cmd {
__u8 index;
__u8 data[RTL_FRAG_LEN];
--
2.34.0

31
patch/kernel/archive/station-p2-5.19/410-general-bluetooth-03-hci_h5-add-binding-RTL8723CS.patch
View File

@@ -1,31 +0,0 @@
From 8fc0422773dc5274fa32e2a5a6ce2e1f0a96d78c Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:07:41 -0700
Subject: [PATCH 304/467] Bluetooth: hci_h5: Add support for binding RTL8723CS
with device tree
RTL8723CS is often used in ARM boards, so add ability to bind it
using device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
drivers/bluetooth/hci_h5.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/bluetooth/hci_h5.c b/drivers/bluetooth/hci_h5.c
index d49a39d17..c9b54335a 100644
--- a/drivers/bluetooth/hci_h5.c
+++ b/drivers/bluetooth/hci_h5.c
@@ -1100,6 +1100,8 @@ static const struct of_device_id rtl_bluetooth_of_match[] = {
.data = (const void *)&h5_data_rtl8723bs },
{ .compatible = "realtek,rtl8723ds-bt",
.data = (const void *)&h5_data_rtl8723bs },
+ { .compatible = "realtek,rtl8723cs-bt",
+ .data = (const void *)&h5_data_rtl8723bs },
#endif
{ },
};
--
2.34.0

42
patch/kernel/archive/station-p2-5.19/420-general-bluetooth-04-add-rtl8703bs.patch
View File

@@ -1,42 +0,0 @@
From f0c05140b92cca447cd55a93ad4de141d0f117f1 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Thu, 9 Dec 2021 22:47:36 +0000
Subject: [PATCH] rtl8703bs: add chip type to list and info block
---
drivers/bluetooth/btrtl.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c
index ad4085eede4..2c227bf4e00 100644
--- a/drivers/bluetooth/btrtl.c
+++ b/drivers/bluetooth/btrtl.c
@@ -20,6 +20,7 @@
#define RTL_CHIP_8723CS_CG 3
#define RTL_CHIP_8723CS_VF 4
#define RTL_CHIP_8723CS_XX 5
+#define RTL_CHIP_8703BS 7
#define RTL_EPATCH_SIGNATURE "Realtech"
#define RTL_ROM_LMP_3499 0x3499
#define RTL_ROM_LMP_8703B 0x8703
@@ -136,6 +137,17 @@ static const struct id_table ic_id_table[] = {
.fw_name = "rtl_bt/rtl8723cs_xx_fw.bin",
.cfg_name = "rtl_bt/rtl8723cs_xx_config" },
+ /* 8703BS */
+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE |
+ IC_MATCH_FL_HCIBUS,
+ .lmp_subver = RTL_ROM_LMP_8703B,
+ .chip_type = RTL_CHIP_8703BS,
+ .hci_bus = HCI_UART,
+ .config_needed = true,
+ .has_rom_version = true,
+ .fw_name = "rtl_bt/rtl8723cs_xx_fw.bin",
+ .cfg_name = "rtl_bt/rtl8723cs_xx_config" },
+
/* 8723D */
{ IC_INFO(RTL_ROM_LMP_8723B, 0xd, 0x8, HCI_USB),
.config_needed = true,
--
2.30.2

53
patch/kernel/archive/station-p2-5.19/430-general-bluetooth-add-new-quirk.patch
View File

@@ -1,53 +0,0 @@
From f60f1605f5056d543e49fc625ffeeb05621f2ad3 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick
Date: Wed, 31 Oct 2018 19:40:18 -0700
Subject: Bluetooth: Add new quirk for broken local ext features max_page
Some adapters (e.g. RTL8723CS) advertise that they have more than
2 pages for local ext features, but they don't support any features
declared in these pages. RTL8723CS reports max_page = 2 and declares
support for sync train and secure connection, but it responds with
either garbage or with error in status on corresponding commands.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
include/net/bluetooth/hci.h | 7 +++++++
net/bluetooth/hci_event.c | 4 +++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
index 16ab6ce87883..8e4c16210d18 100644
--- a/include/net/bluetooth/hci.h
+++ b/include/net/bluetooth/hci.h
@@ -238,6 +238,13 @@ enum {
* HCI after resume.
*/
HCI_QUIRK_NO_SUSPEND_NOTIFIER,
+
+ /* When this quirk is set, max_page for local extended features
+ * is set to 1, even if controller reports higher number. Some
+ * controllers (e.g. RTL8723CS) report more pages, but they
+ * don't actually support features declared there.
+ */
+ HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
/*
* When this quirk is set, LE tx power is not queried on startup
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index cfeaee347db3..df3232828978 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -700,7 +700,9 @@ static void hci_cc_read_local_ext_features(struct hci_dev *hdev,
if (rp->status)
return;
- if (hdev->max_page < rp->max_page)
+ if (!test_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE,
+ &hdev->quirks) &&
+ hdev->max_page < rp->max_page)
hdev->max_page = rp->max_page;
if (rp->page < HCI_MAX_PAGES)
--
cgit v1.2.3

51
patch/kernel/archive/station-p2-5.19/440-general-disable-mtu-validation.patch
View File

@@ -1,51 +0,0 @@
From bf80eaa34a1b9f503a779b13deed2fda642a1e87 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Wed, 21 Jul 2021 20:59:39 +0000
Subject: [PATCH] Disable MTU validation
This patch reverts: https://github.com/torvalds/linux/commit/eaf4fac478077d4ed57cbca2c044c4b58a96bd98
It works around following issues:
- no way to change MTU (tx_fifo_size is reported as 0 for Rockchip's dwmac)
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 91cd5073d..b409a7598 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -5435,14 +5435,8 @@ static void stmmac_set_rx_mode(struct net_device *dev)
static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
{
struct stmmac_priv *priv = netdev_priv(dev);
- int txfifosz = priv->plat->tx_fifo_size;
const int mtu = new_mtu;
- if (txfifosz == 0)
- txfifosz = priv->dma_cap.tx_fifo_size;
-
- txfifosz /= priv->plat->tx_queues_to_use;
-
if (netif_running(dev)) {
netdev_err(priv->dev, "must be stopped to change its MTU\n");
return -EBUSY;
@@ -5453,12 +5447,6 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
return -EINVAL;
}
- new_mtu = STMMAC_ALIGN(new_mtu);
-
- /* If condition true, FIFO is too small or MTU too large */
- if ((txfifosz < new_mtu) || (new_mtu > BUF_SIZE_16KiB))
- return -EINVAL;
-
dev->mtu = mtu;
netdev_update_features(dev);
--
Created with Armbian build tools https://github.com/armbian/build

11
patch/kernel/archive/station-p2-5.19/450-general-fix-es8316-kernel-panic.patch
View File

@@ -1,11 +0,0 @@
--- a/sound/soc/codecs/es8316.c 2020-04-09 19:13:08.268473737 +0000
+++ b/sound/soc/codecs/es8316.c 2020-04-09 19:14:00.535995842 +0000
@@ -687,7 +687,7 @@
snd_soc_component_update_bits(component, ES8316_GPIO_DEBOUNCE,
ES8316_GPIO_ENABLE_INTERRUPT, 0);
- if (es8316->jack->status & SND_JACK_MICROPHONE) {
+ if (es8316->jack && (es8316->jack->status & SND_JACK_MICROPHONE)) {
es8316_disable_micbias_for_mic_gnd_short_detect(component);
snd_soc_jack_report(es8316->jack, 0, SND_JACK_BTN_0);
}

21
patch/kernel/archive/station-p2-5.19/470-general-increasing_DMA_block_memory_allocation_to_2048.patch
View File

@@ -1,21 +0,0 @@
diff --git a/kernel/dma/pool.c b/kernel/dma/pool.c
index 6bc74a2d5..e3827da51 100644
--- a/kernel/dma/pool.c
+++ b/kernel/dma/pool.c
@@ -164,13 +164,11 @@ static int __init dma_atomic_pool_init(void)
int ret = 0;
/*
- * If coherent_pool was not used on the command line, default the pool
- * sizes to 128KB per 1GB of memory, min 128KB, max MAX_ORDER-1.
+ * Always use 2MiB as default pool size.
+ * See: https://forum.armbian.com/topic/4811-uas-mainline-kernel-coherent-pool-memory-size/
*/
if (!atomic_pool_size) {
- unsigned long pages = totalram_pages() / (SZ_1G / SZ_128K);
- pages = min_t(unsigned long, pages, MAX_ORDER_NR_PAGES);
- atomic_pool_size = max_t(size_t, pages << PAGE_SHIFT, SZ_128K);
+ atomic_pool_size = SZ_2M;
}
INIT_WORK(&atomic_pool_work, atomic_pool_work_fn);

51
patch/kernel/archive/station-p2-5.19/480-general-possibility-of-disabling-rk808-rtc.patch
View File

@@ -1,51 +0,0 @@
From 2fbbbde230c0c488412f2a376b13adbcbcbae28b Mon Sep 17 00:00:00 2001
From: Piotr Szczepanik <piter75@gmail.com>
Date: Sun, 24 Jan 2021 16:14:06 +0100
Subject: [PATCH] add possibility of disabling rk808-rtc
To disable rk808-rtc driver from loading for specific board
add the following stanza to rk808 node in device tree:
rtc {
compatible = "rk808-rtc";
status = "disabled";
}
This is needed for roc-rk3399-pc plus (a.k.a. Station P1).
Without the change rk808's rtc is initialised and used for time keeping
although there is another rtc (hym8563) that should be actually used.
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
---
drivers/mfd/mfd-core.c | 2 +-
drivers/mfd/rk808.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
index fc00aaccb..5c13cc9e2 100644
--- a/drivers/mfd/mfd-core.c
+++ b/drivers/mfd/mfd-core.c
@@ -225,7 +225,7 @@ static int mfd_add_device(struct device *parent, int id,
}
if (!pdev->dev.of_node)
- pr_warn("%s: Failed to locate of_node [id: %d]\n",
+ pr_debug("%s: Failed to locate of_node [id: %d]\n",
cell->name, platform_id);
}
diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index d109b9f14..d90c45cd5 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -145,6 +145,7 @@ static const struct mfd_cell rk808s[] = {
{ .name = "rk808-regulator", },
{
.name = "rk808-rtc",
+ .of_compatible = "rk808-rtc",
.num_resources = ARRAY_SIZE(rtc_resources),
.resources = rtc_resources,
},
--
Created with Armbian build tools https://github.com/armbian/build

91
patch/kernel/archive/station-p2-5.19/490-general-rk808-configurable-switch-voltage-steps.patch
View File

@@ -1,91 +0,0 @@
This patch allows to change the way that BUCK1 and BUCK2 of rk808 PMIC set voltage.
It allows to change the hardcoded max. 100mV per one change
to any multiple of 12.5mV while keeping the 100mV default.
It was observed that making the steps smaller (eg. 50mV = 4 * 12.5mV)
makes the NanoPi M4V2 running stable.
One can configure the max number of steps per single change using
the "max-buck-steps-per-change" property of rk808 node in device tree.
Below example ensures that voltage is not changed in jumps larger than 50mV:
&rk808 {
max-buck-steps-per-change = <4>;
}
Be aware that changing this parameter affects the time taken to switch between
OPPs of LiTTLE cores of rk3399.
For overclocked LiTTLE cores with base 408MHz @ 0.825V
and max. 1.5GHz @ 1.2V it will take 7 steps of 50mV (at least 65uS each - caused by i2c),
the final 25mV step and 1uS to settle: 7 x 65uS + 1uS = 456uS.
With default setting it would be 3 steps of 100mV (at least 65uS each - caused by i2c),
the final 75mV step and 1uS to settle: 3 x 65uS + 1uS = 196uS.
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c
index e926c1a85..cc3ec4803 100644
--- a/drivers/regulator/rk808-regulator.c
+++ b/drivers/regulator/rk808-regulator.c
@@ -156,6 +156,7 @@
struct rk808_regulator_data {
struct gpio_desc *dvs_gpio[2];
+ unsigned max_buck_steps_per_change;
};
static const int rk808_buck_config_regs[] = {
@@ -239,7 +240,8 @@ static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev)
}
static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev,
- unsigned sel)
+ unsigned sel,
+ int max_steps)
{
int ret, delta_sel;
unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask;
@@ -258,8 +260,8 @@ static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev,
* the risk of overshoot. Put it into a multi-step, can effectively
* avoid this problem, a step is 100mv here.
*/
- while (delta_sel > MAX_STEPS_ONE_TIME) {
- old_sel += MAX_STEPS_ONE_TIME;
+ while (delta_sel > max_steps) {
+ old_sel += max_steps;
val = old_sel << (ffs(mask) - 1);
val |= tmp;
@@ -293,12 +295,13 @@ static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev,
struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);
int id = rdev_get_id(rdev);
struct gpio_desc *gpio = pdata->dvs_gpio[id];
+ int max_steps = pdata->max_buck_steps_per_change;
unsigned int reg = rdev->desc->vsel_reg;
unsigned old_sel;
int ret, gpio_level;
if (!gpio)
- return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel);
+ return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel, max_steps);
gpio_level = gpiod_get_value(gpio);
if (gpio_level == 0) {
@@ -1292,6 +1295,12 @@ static int rk808_regulator_dt_parse_pdata(struct device *dev,
0 : tmp);
}
+ tmp = of_property_read_u32(client_dev->of_node, "max-buck-steps-per-change", &pdata->max_buck_steps_per_change);
+ if (tmp) {
+ pdata->max_buck_steps_per_change = MAX_STEPS_ONE_TIME;
+ }
+ dev_info(dev, "max buck steps per change: %d\n", pdata->max_buck_steps_per_change);
+
dt_parse_end:
of_node_put(np);
return ret;

26
patch/kernel/archive/station-p2-5.19/500-general-workaround-broadcom-bt-serdev.patch
View File

@@ -1,26 +0,0 @@
From e5c9702bd2ffd09e48c118ab40c2764590af7929 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sat, 1 May 2021 12:41:14 +0000
Subject: [PATCH] Workaround to make several broadcom bluetooth serdev devices
work even without proper MAC address
---
drivers/bluetooth/btbcm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c
index 1b9743b7f..b274f1cdd 100644
--- a/drivers/bluetooth/btbcm.c
+++ b/drivers/bluetooth/btbcm.c
@@ -87,7 +87,7 @@ int btbcm_check_bdaddr(struct hci_dev *hdev)
!bacmp(&bda->bdaddr, BDADDR_BCM43341B)) {
bt_dev_info(hdev, "BCM: Using default device address (%pMR)",
&bda->bdaddr);
- set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
+ //set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
}
kfree_skb(skb);
--
2.25.1

25
patch/kernel/archive/station-p2-5.19/510-rk3328-dtsi-usb3-reset-properties.patch
View File

@@ -1,25 +0,0 @@
From 2cc5008e97eacc69e4f4d42b733e84caa048ef9f Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sat, 25 Sep 2021 13:39:40 +0000
Subject: [PATCH 4/4] usb3 reset properties
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 48b170c63..b79c67df5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1054,6 +1054,8 @@ usbdrd3: usb@ff600000 {
<&cru ACLK_USB3OTG>;
clock-names = "ref_clk", "suspend_clk",
"bus_clk";
+ resets = <&cru SRST_USB3OTG>;
+ reset-names = "usb3-otg";
dr_mode = "otg";
phy_type = "utmi_wide";
snps,dis-del-phy-power-chg-quirk;
--
2.30.2

25
patch/kernel/archive/station-p2-5.19/520-rk3328-roc-pc-bt.patch
View File

@@ -1,25 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts
@@ -109,6 +109,21 @@
status = "okay";
};
+&uart1 {
+ status = "disabled";
+};
+
+&uart2 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723ds-bt";
+ enable-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+
&usb20_host_drv {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};

20
patch/kernel/archive/station-p2-5.19/530-rk3399-enable-dwc3-xhci-usb-trb-quirk.patch
View File

@@ -1,20 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index bcd31e9d6..91f1aa809 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -396,6 +396,7 @@ usbdrd_dwc3_0: usb@fe800000 {
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
+ snps,xhci-trb-ent-quirk;
power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};
@@ -461,6 +462,7 @@ usbdrd_dwc3_1: usb@fe900000 {
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
+ snps,xhci-trb-ent-quirk;
power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};

18
patch/kernel/archive/station-p2-5.19/540-rk3399-nanopc-t4-emmc.patch
View File

@@ -1,18 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts
@@ -109,10 +109,10 @@
};
};
-&sdhci {
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
-};
+//&sdhci {
+// mmc-hs400-1_8v;
+// mmc-hs400-enhanced-strobe;
+//};
&u2phy0_host {
phy-supply = <&vcc5v0_host0>;

28
patch/kernel/archive/station-p2-5.19/550-rk3399-pci-rockchip-support-ep-gpio-undefined-case.patch
View File

@@ -1,28 +0,0 @@
From 9de42a7ce7b821596a151cfaa0aca79d53c2170f Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sun, 7 Mar 2021 15:24:02 +0100
Subject: [PATCH] oo
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Changed by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
drivers/pci/controller/pcie-rockchip.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
index 990a00e08..193d26562 100644
--- a/drivers/pci/controller/pcie-rockchip.c
+++ b/drivers/pci/controller/pcie-rockchip.c
@@ -118,8 +118,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
}
if (rockchip->is_rc) {
- rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep",
- GPIOD_OUT_HIGH);
+ rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", GPIOD_OUT_HIGH);
if (IS_ERR(rockchip->ep_gpio))
return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio),
"failed to get ep GPIO\n");
--
Created with Armbian build tools https://github.com/armbian/build

106
patch/kernel/archive/station-p2-5.19/560-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
View File

@@ -1,106 +0,0 @@
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 1396fd2d9..4d583446c 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -4079,6 +4079,14 @@
nomsi Do not use MSI for native PCIe PME signaling (this makes
all PCIe root ports use INTx for all services).
+ pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before
+ scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
+ cards seem to need delays that can be several hundred ms.
+ If set to greater than or equal to 0 this parameter will
+ override delay that can be set in device tree.
+ Values less than 0 mean that this parameter is ignored.
+ default=-1
+
pcmv= [HW,PCMCIA] BadgePAD 4
pd_ignore_unused
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index c52316d0b..a7974007d 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -24,6 +24,7 @@
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/of_pci.h>
@@ -39,6 +40,9 @@
#include "../pci.h"
#include "pcie-rockchip.h"
+static int bus_scan_delay = -1;
+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
+
static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
{
u32 status;
@@ -935,6 +939,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct pci_host_bridge *bridge;
int err;
+ u32 delay = 0;
if (!dev->of_node)
return -ENODEV;
@@ -984,6 +989,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
bridge->sysdata = rockchip;
bridge->ops = &rockchip_pcie_ops;
+ /* Checking if bus scan delay was given from command line and prefer
+ * that over the value in device tree (which defaults to 0 if not set).
+ */
+ if (bus_scan_delay >= 0) {
+ delay = bus_scan_delay;
+ dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
+ } else {
+ delay = rockchip->bus_scan_delay;
+ dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
+ }
+ /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
+ * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
+ * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
+ * before panicing. I have no idea why this works or what causes the panic. I just
+ * found this hack by luck when trying to "make it break differently if possible".
+ */
+ if (delay > 0) {
+ msleep(delay);
+ }
+
err = rockchip_pcie_setup_irq(rockchip);
if (err)
goto err_remove_irq_domain;
diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
index 193d26562..ec6cbaadd 100644
--- a/drivers/pci/controller/pcie-rockchip.c
+++ b/drivers/pci/controller/pcie-rockchip.c
@@ -148,6 +148,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
return PTR_ERR(rockchip->clk_pcie_pm);
}
+ err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
+ if (err) {
+ dev_info(dev, "no bus scan delay, default to 0 ms\n");
+ rockchip->bus_scan_delay = 0;
+ }
+
return 0;
}
EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 1650a5087..35a8cf157 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -300,6 +300,8 @@ struct rockchip_pcie {
phys_addr_t msg_bus_addr;
bool is_rc;
struct resource *mem_res;
+ /* Bus scan delay is a workaround for some pcie devices causing crashes */
+ u32 bus_scan_delay;
};
static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)

49
patch/kernel/archive/station-p2-5.19/570-rk3399-sd-drive-level-8ma.patch
View File

@@ -1,49 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6eb9dda..d6fc676 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2285,35 +2285,35 @@
sdmmc {
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up>;
+ <4 RK_PB0 1 &pcfg_pull_up_8ma>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up>,
- <4 RK_PB1 1 &pcfg_pull_up>,
- <4 RK_PB2 1 &pcfg_pull_up>,
- <4 RK_PB3 1 &pcfg_pull_up>;
+ <4 RK_PB0 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB1 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB2 1 &pcfg_pull_up_8ma>,
+ <4 RK_PB3 1 &pcfg_pull_up_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins =
- <4 RK_PB4 1 &pcfg_pull_none>;
+ <4 RK_PB4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins =
- <4 RK_PB5 1 &pcfg_pull_up>;
+ <4 RK_PB5 1 &pcfg_pull_up_8ma>;
};
sdmmc_cd: sdmmc-cd {
rockchip,pins =
- <0 RK_PA7 1 &pcfg_pull_up>;
+ <0 RK_PA7 1 &pcfg_pull_up>;
};
sdmmc_wp: sdmmc-wp {
rockchip,pins =
- <0 RK_PB0 1 &pcfg_pull_up>;
+ <0 RK_PB0 1 &pcfg_pull_up_8ma>;
};
};

25
patch/kernel/archive/station-p2-5.19/580-rk3399-unlock-temperature.patch
View File

@@ -1,25 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8a8cf0e..6cef1e3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -722,17 +722,17 @@
trips {
cpu_alert0: cpu_alert0 {
- temperature = <70000>;
+ temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
- temperature = <75000>;
+ temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
- temperature = <95000>;
+ temperature = <100000>;
hysteresis = <2000>;
type = "critical";
};

19
patch/kernel/archive/station-p2-5.19/590-v2-net-dsa-tag_mtk-add-padding-for-tx-packets.patch
View File

@@ -1,19 +0,0 @@
diff --git a/net/dsa/tag_mtk.c b/net/dsa/tag_mtk.c
index 415d8ece242a..1d1f9dbd9e93 100644
--- a/net/dsa/tag_mtk.c
+++ b/net/dsa/tag_mtk.c
@@ -25,6 +25,14 @@ static struct sk_buff *mtk_tag_xmit(struct sk_buff *skb,
u8 xmit_tpid;
u8 *mtk_tag;
+ /* The Ethernet switch we are interfaced with needs packets to be at
+ * least 64 bytes (including FCS) otherwise their padding might be
+ * corrupted. With tags enabled, we need to make sure that packets are
+ * at least 68 bytes (including FCS and tag).
+ */
+ if (__skb_put_padto(skb, ETH_ZLEN + MTK_HDR_LEN, false))
+ return NULL;
+
/* Build the special tag after the MAC Source Address. If VLAN header
* is present, it's required that VLAN header and special tag is
* being combined. Only in this way we can allow the switch can parse

63
patch/kernel/media-current/00210-linux-1000-drm-rockchip.patch
View File

@@ -2112,69 +2112,6 @@ index a2d101ebf7a7..7f6ffbc3e7b2 100644
}
/*
@@ -2732,40 +2744,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
*/
if (max_bpc >= 16 && info->bpc == 16) {
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV16_1X48))
output_fmts[i++] = MEDIA_BUS_FMT_YUV16_1X48;
- output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB161616_1X48))
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
}
if (max_bpc >= 12 && info->bpc >= 12) {
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY12_1X24))
output_fmts[i++] = MEDIA_BUS_FMT_UYVY12_1X24;
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV12_1X36))
output_fmts[i++] = MEDIA_BUS_FMT_YUV12_1X36;
- output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB121212_1X36))
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
}
if (max_bpc >= 10 && info->bpc >= 10) {
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY10_1X20))
output_fmts[i++] = MEDIA_BUS_FMT_UYVY10_1X20;
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV10_1X30))
output_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
- output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB101010_1X30))
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
}
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY8_1X16))
output_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV8_1X24))
output_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
/* Default 8bit RGB fallback */
- output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB888_1X24))
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
*num_output_fmts = i;
@@ -2946,11 +2969,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
struct dw_hdmi *hdmi = bridge->driver_private;
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;

12
patch/kernel/media-current/00980-builddeb.patch → patch/kernel/media-current/09980-builddeb.patch
View File

@@ -26,7 +26,7 @@
# Create postinst prerm script for headers
if [ "$3" = "headers" ]; then
@@ -187,10 +168,8 @@
@@ -194,10 +175,8 @@
kernel_headers_dir="debian/hdrtmp"
libc_headers_dir="debian/headertmp"
dbg_dir="debian/dbgtmp"
@@ -37,7 +37,7 @@
libc_headers_packagename=linux-libc-dev
dbg_packagename=$packagename-dbg
@@ -225,11 +204,9 @@
@@ -232,11 +211,9 @@
BUILD_DEBUG=$(if_enabled_echo CONFIG_DEBUG_INFO Yes)
# Setup the directory structure
@@ -50,7 +50,7 @@
mkdir -m 755 -p "$kernel_headers_dir/lib/modules/$version/"
mkdir -m 755 -p "$libc_headers_dir/DEBIAN"
@@ -249,13 +226,8 @@
@@ -256,13 +233,8 @@
if is_enabled CONFIG_OF_EARLY_FLATTREE; then
# Only some architectures with OF support have this target
if [ -d "${srctree}/arch/$SRCARCH/boot/dts" ]; then
@@ -66,7 +66,7 @@
fi
if is_enabled CONFIG_MODULES; then
@@ -318,6 +290,8 @@
@@ -325,6 +297,8 @@
sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
cat >> $tmpdir/DEBIAN/postinst <<- EOT
ln -sf $(basename $installed_image_path) /boot/$image_name 2> /dev/null || cp /$installed_image_path /boot/$image_name
@@ -75,7 +75,7 @@
touch /boot/.next
exit 0
EOT
@@ -346,6 +320,10 @@
@@ -353,6 +327,10 @@
rm -f /boot/System.map* /boot/config* /boot/vmlinuz* /boot/$image_name /boot/uImage
fi
}
@@ -86,7 +86,7 @@
mountpoint -q /boot && check_boot_dev
exit 0
EOT
@@ -353,11 +331,6 @@
@@ -360,11 +338,6 @@
create_package "$packagename" "$tmpdir"
if [ "$ARCH" != "um" ]; then

2
patch/kernel/media-current/00981-mkdebian.patch → patch/kernel/media-current/09981-mkdebian.patch
View File

@@ -8,7 +8,7 @@
dbg_packagename=$packagename-dbg
if [ "$ARCH" = "um" ] ; then
@@ -198,12 +197,6 @@
@@ -199,12 +198,6 @@
This package provides userspaces headers from the Linux kernel. These headers
are used by the installed headers for GNU glibc and other system libraries.
Multi-Arch: same

16
patch/kernel/media-edge/00180-linux-0002-rockchip-from-list.patch
View File

@@ -270,10 +270,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 368f10405e13..238d70df6c80 100644
index ef53a2578824..d4c53074154a 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1356,6 +1356,14 @@ void mmc_power_off(struct mmc_host *host)
@@ -1358,6 +1358,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
@@ -305,10 +305,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 39db0b85b4da..d0410ae4def2 100644
index 49ae15708a0b..60348d517efb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -975,6 +975,20 @@ usb_host0_ohci: usb@ff5d0000 {
@@ -993,6 +993,20 @@ usb_host0_ohci: usb@ff5d0000 {
status = "disabled";
};
@@ -346,10 +346,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index d0410ae4def2..cc46855aba46 100644
index 60348d517efb..d7e44d174d7b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -853,6 +853,8 @@ sdmmc: mmc@ff500000 {
@@ -871,6 +871,8 @@ sdmmc: mmc@ff500000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
@@ -358,7 +358,7 @@ index d0410ae4def2..cc46855aba46 100644
status = "disabled";
};
@@ -865,6 +867,8 @@ sdio: mmc@ff510000 {
@@ -883,6 +885,8 @@ sdio: mmc@ff510000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
@@ -367,7 +367,7 @@ index d0410ae4def2..cc46855aba46 100644
status = "disabled";
};
@@ -877,6 +881,8 @@ emmc: mmc@ff520000 {
@@ -895,6 +899,8 @@ emmc: mmc@ff520000 {
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;

659
patch/kernel/media-edge/00181-linux-0011-v4l2-from-list.patch Normal file
View File

@@ -0,0 +1,659 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: v4l2-common: Add helpers to calculate bytesperline and
sizeimage
Add helper functions to calculate plane bytesperline and sizeimage, these
new helpers consider block width and height when calculating plane
bytesperline and sizeimage.
This prepare support for new pixel formats added in next patch that make
use of block width and height.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/media/v4l2-core/v4l2-common.c | 77 +++++++++++++--------------
1 file changed, 38 insertions(+), 39 deletions(-)
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
index e0fbe6ba4b6c..cb2f1acab7cf 100644
--- a/drivers/media/v4l2-core/v4l2-common.c
+++ b/drivers/media/v4l2-core/v4l2-common.c
@@ -338,6 +338,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf
return info->block_h[plane];
}
+static inline unsigned int v4l2_format_plane_width(const struct v4l2_format_info *info, int plane,
+ unsigned int width)
+{
+ unsigned int hdiv = plane ? info->hdiv : 1;
+ unsigned int bytes = DIV_ROUND_UP(width * info->bpp[plane],
+ v4l2_format_block_width(info, plane) *
+ v4l2_format_block_height(info, plane));
+
+ return DIV_ROUND_UP(bytes, hdiv);
+}
+
+static inline unsigned int v4l2_format_plane_height(const struct v4l2_format_info *info, int plane,
+ unsigned int height)
+{
+ unsigned int vdiv = plane ? info->vdiv : 1;
+ unsigned int lines = ALIGN(height, v4l2_format_block_height(info, plane));
+
+ return DIV_ROUND_UP(lines, vdiv);
+}
+
+static inline unsigned int v4l2_format_plane_size(const struct v4l2_format_info *info, int plane,
+ unsigned int width, unsigned int height)
+{
+ return v4l2_format_plane_width(info, plane, width) *
+ v4l2_format_plane_height(info, plane, height);
+}
+
void v4l2_apply_frmsize_constraints(u32 *width, u32 *height,
const struct v4l2_frmsize_stepwise *frmsize)
{
@@ -373,37 +400,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt,
if (info->mem_planes == 1) {
plane = &pixfmt->plane_fmt[0];
- plane->bytesperline = ALIGN(width, v4l2_format_block_width(info, 0)) * info->bpp[0];
+ plane->bytesperline = v4l2_format_plane_width(info, 0, width);
plane->sizeimage = 0;
- for (i = 0; i < info->comp_planes; i++) {
- unsigned int hdiv = (i == 0) ? 1 : info->hdiv;
- unsigned int vdiv = (i == 0) ? 1 : info->vdiv;
- unsigned int aligned_width;
- unsigned int aligned_height;
-
- aligned_width = ALIGN(width, v4l2_format_block_width(info, i));
- aligned_height = ALIGN(height, v4l2_format_block_height(info, i));
-
- plane->sizeimage += info->bpp[i] *
- DIV_ROUND_UP(aligned_width, hdiv) *
- DIV_ROUND_UP(aligned_height, vdiv);
- }
+ for (i = 0; i < info->comp_planes; i++)
+ plane->sizeimage +=
+ v4l2_format_plane_size(info, i, width, height);
} else {
for (i = 0; i < info->comp_planes; i++) {
- unsigned int hdiv = (i == 0) ? 1 : info->hdiv;
- unsigned int vdiv = (i == 0) ? 1 : info->vdiv;
- unsigned int aligned_width;
- unsigned int aligned_height;
-
- aligned_width = ALIGN(width, v4l2_format_block_width(info, i));
- aligned_height = ALIGN(height, v4l2_format_block_height(info, i));
-
plane = &pixfmt->plane_fmt[i];
plane->bytesperline =
- info->bpp[i] * DIV_ROUND_UP(aligned_width, hdiv);
- plane->sizeimage =
- plane->bytesperline * DIV_ROUND_UP(aligned_height, vdiv);
+ v4l2_format_plane_width(info, i, width);
+ plane->sizeimage = plane->bytesperline *
+ v4l2_format_plane_height(info, i, height);
}
}
return 0;
@@ -427,22 +436,12 @@ int v4l2_fill_pixfmt(struct v4l2_pix_format *pixfmt, u32 pixelformat,
pixfmt->width = width;
pixfmt->height = height;
pixfmt->pixelformat = pixelformat;
- pixfmt->bytesperline = ALIGN(width, v4l2_format_block_width(info, 0)) * info->bpp[0];
+ pixfmt->bytesperline = v4l2_format_plane_width(info, 0, width);
pixfmt->sizeimage = 0;
- for (i = 0; i < info->comp_planes; i++) {
- unsigned int hdiv = (i == 0) ? 1 : info->hdiv;
- unsigned int vdiv = (i == 0) ? 1 : info->vdiv;
- unsigned int aligned_width;
- unsigned int aligned_height;
-
- aligned_width = ALIGN(width, v4l2_format_block_width(info, i));
- aligned_height = ALIGN(height, v4l2_format_block_height(info, i));
-
- pixfmt->sizeimage += info->bpp[i] *
- DIV_ROUND_UP(aligned_width, hdiv) *
- DIV_ROUND_UP(aligned_height, vdiv);
- }
+ for (i = 0; i < info->comp_planes; i++)
+ pixfmt->sizeimage +=
+ v4l2_format_plane_size(info, i, width, height);
return 0;
}
EXPORT_SYMBOL_GPL(v4l2_fill_pixfmt);
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:36 +0000
Subject: [PATCH] media: v4l2: Add NV15 and NV20 pixel formats
Add NV15 and NV20 pixel formats used by the Rockchip Video Decoder for
10-bit buffers.
NV15 and NV20 is a packed 10-bit 4:2:0/4:2:2 semi-planar Y/CbCr format
similar to P010 and P210 but has no padding between components. Instead,
luminance and chrominance samples are grouped into 4s so that each group is
packed into an integer number of bytes:
YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes
The '15' and '20' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 8 for NV15 and 4 for NV20.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/media/v4l2-core/v4l2-common.c | 3 +++
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 3 +++
3 files changed, 8 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
index cb2f1acab7cf..8446a1deffd8 100644
--- a/drivers/media/v4l2-core/v4l2-common.c
+++ b/drivers/media/v4l2-core/v4l2-common.c
@@ -268,6 +268,9 @@ const struct v4l2_format_info *v4l2_format_info(u32 format)
{ .format = V4L2_PIX_FMT_NV42, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .hdiv = 1, .vdiv = 1 },
{ .format = V4L2_PIX_FMT_P010, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 2, 2, 0, 0 }, .hdiv = 2, .vdiv = 1 },
+ { .format = V4L2_PIX_FMT_NV15, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 5, 5, 0, 0 }, .hdiv = 2, .vdiv = 2, .block_w = { 4, 2, 0, 0 }, .block_h = { 1, 1, 0, 0 } },
+ { .format = V4L2_PIX_FMT_NV20, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 5, 5, 0, 0 }, .hdiv = 2, .vdiv = 1, .block_w = { 4, 2, 0, 0 }, .block_h = { 1, 1, 0, 0 } },
+
{ .format = V4L2_PIX_FMT_YUV410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
{ .format = V4L2_PIX_FMT_YVU410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
{ .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 },
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index e6fd355a2e92..24771edaa4f2 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1354,6 +1354,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_PIX_FMT_NV24: descr = "Y/CbCr 4:4:4"; break;
case V4L2_PIX_FMT_NV42: descr = "Y/CrCb 4:4:4"; break;
case V4L2_PIX_FMT_P010: descr = "10-bit Y/CbCr 4:2:0"; break;
+ case V4L2_PIX_FMT_NV15: descr = "10-bit Y/CbCr 4:2:0 (Packed)"; break;
+ case V4L2_PIX_FMT_NV20: descr = "10-bit Y/CbCr 4:2:2 (Packed)"; break;
case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break;
case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break;
case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break;
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 01e630f2ec78..cea44992aea3 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -628,6 +628,9 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0') /* 24 Y/CbCr 4:2:0 10-bit per component */
+#define V4L2_PIX_FMT_NV15 v4l2_fourcc('N', 'V', '1', '5') /* 15 Y/CbCr 4:2:0 10-bit packed */
+#define V4L2_PIX_FMT_NV20 v4l2_fourcc('N', 'V', '2', '0') /* 20 Y/CbCr 4:2:2 10-bit packed */
+
/* two non contiguous planes - one Y, one Cr + Cb interleaved */
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:36 +0000
Subject: [PATCH] media: rkvdec: h264: Use bytesperline and buffer height to
calculate stride
Use bytesperline and buffer height to calculate the strides configured.
This does not really change anything other than ensuring the bytesperline
that is signaled to userspace matches what is configured in HW.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 4fc167b42cf0..a8635105e387 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -896,9 +896,9 @@ static void config_registers(struct rkvdec_ctx *ctx,
dma_addr_t rlc_addr;
dma_addr_t refer_addr;
u32 rlc_len;
- u32 hor_virstride = 0;
- u32 ver_virstride = 0;
- u32 y_virstride = 0;
+ u32 hor_virstride;
+ u32 ver_virstride;
+ u32 y_virstride;
u32 yuv_virstride = 0;
u32 offset;
dma_addr_t dst_addr;
@@ -909,8 +909,8 @@ static void config_registers(struct rkvdec_ctx *ctx,
f = &ctx->decoded_fmt;
dst_fmt = &f->fmt.pix_mp;
- hor_virstride = (sps->bit_depth_luma_minus8 + 8) * dst_fmt->width / 8;
- ver_virstride = round_up(dst_fmt->height, 16);
+ hor_virstride = dst_fmt->plane_fmt[0].bytesperline;
+ ver_virstride = dst_fmt->height;
y_virstride = hor_virstride * ver_virstride;
if (sps->chroma_format_idc == 0)
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: Extract rkvdec_fill_decoded_pixfmt helper
method
This extract setting decoded pixfmt into a helper method, current code is
replaced with a call to the new helper method.
The helper method is also called from a new function in next patch.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/staging/media/rkvdec/rkvdec.c | 29 ++++++++++++++-------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 7bab7586918c..40cc791aef26 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -27,6 +27,17 @@
#include "rkvdec.h"
#include "rkvdec-regs.h"
+static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
+ struct v4l2_pix_format_mplane *pix_mp)
+{
+ v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat,
+ pix_mp->width, pix_mp->height);
+ pix_mp->plane_fmt[0].sizeimage += 128 *
+ DIV_ROUND_UP(pix_mp->width, 16) *
+ DIV_ROUND_UP(pix_mp->height, 16);
+ pix_mp->field = V4L2_FIELD_NONE;
+}
+
static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
{
struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
@@ -192,13 +203,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
- v4l2_fill_pixfmt_mp(&f->fmt.pix_mp,
- ctx->coded_fmt_desc->decoded_fmts[0],
- ctx->coded_fmt.fmt.pix_mp.width,
- ctx->coded_fmt.fmt.pix_mp.height);
- f->fmt.pix_mp.plane_fmt[0].sizeimage += 128 *
- DIV_ROUND_UP(f->fmt.pix_mp.width, 16) *
- DIV_ROUND_UP(f->fmt.pix_mp.height, 16);
+ f->fmt.pix_mp.width = ctx->coded_fmt.fmt.pix_mp.width;
+ f->fmt.pix_mp.height = ctx->coded_fmt.fmt.pix_mp.height;
+ rkvdec_fill_decoded_pixfmt(ctx, &f->fmt.pix_mp);
}
static int rkvdec_enum_framesizes(struct file *file, void *priv,
@@ -264,13 +271,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
&pix_mp->height,
&coded_desc->frmsize);
- v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat,
- pix_mp->width, pix_mp->height);
- pix_mp->plane_fmt[0].sizeimage +=
- 128 *
- DIV_ROUND_UP(pix_mp->width, 16) *
- DIV_ROUND_UP(pix_mp->height, 16);
- pix_mp->field = V4L2_FIELD_NONE;
+ rkvdec_fill_decoded_pixfmt(ctx, pix_mp);
return 0;
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: Lock capture pixel format in s_ctrl and s_fmt
Add an optional valid_fmt operation that should return the valid
pixelformat of CAPTURE buffers.
This is used in next patch to ensure correct pixelformat is used for 10-bit
and 4:2:2 content.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/staging/media/rkvdec/rkvdec.c | 67 +++++++++++++++++++++++----
drivers/staging/media/rkvdec/rkvdec.h | 2 +
2 files changed, 61 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 40cc791aef26..e93e1cb0f829 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -38,19 +38,56 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
pix_mp->field = V4L2_FIELD_NONE;
}
+static u32 rkvdec_valid_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
+{
+ const struct rkvdec_coded_fmt_desc *coded_desc = ctx->coded_fmt_desc;
+
+ if (coded_desc->ops->valid_fmt)
+ return coded_desc->ops->valid_fmt(ctx, ctrl);
+
+ return ctx->valid_fmt;
+}
+
static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
{
struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc;
- if (desc->ops->try_ctrl)
- return desc->ops->try_ctrl(ctx, ctrl);
+ if (desc->ops->try_ctrl) {
+ int ret;
+ ret = desc->ops->try_ctrl(ctx, ctrl);
+ if (ret)
+ return ret;
+ }
+
+ if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
+ /* Only current valid format */
+ return -EINVAL;
+
+ return 0;
+}
+
+static int rkvdec_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
+
+ if (ctrl->id == V4L2_CID_STATELESS_H264_SPS && !ctx->valid_fmt) {
+ ctx->valid_fmt = rkvdec_valid_fmt(ctx, ctrl);
+ if (ctx->valid_fmt) {
+ struct v4l2_pix_format_mplane *pix_mp;
+
+ pix_mp = &ctx->decoded_fmt.fmt.pix_mp;
+ pix_mp->pixelformat = ctx->valid_fmt;
+ rkvdec_fill_decoded_pixfmt(ctx, pix_mp);
+ }
+ }
return 0;
}
static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = {
.try_ctrl = rkvdec_try_ctrl,
+ .s_ctrl = rkvdec_s_ctrl,
};
static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
@@ -201,6 +238,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
{
struct v4l2_format *f = &ctx->decoded_fmt;
+ ctx->valid_fmt = 0;
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
f->fmt.pix_mp.width = ctx->coded_fmt.fmt.pix_mp.width;
@@ -256,13 +294,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
if (WARN_ON(!coded_desc))
return -EINVAL;
- for (i = 0; i < coded_desc->num_decoded_fmts; i++) {
- if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat)
- break;
- }
+ if (ctx->valid_fmt) {
+ pix_mp->pixelformat = ctx->valid_fmt;
+ } else {
+ for (i = 0; i < coded_desc->num_decoded_fmts; i++) {
+ if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat)
+ break;
+ }
- if (i == coded_desc->num_decoded_fmts)
- pix_mp->pixelformat = coded_desc->decoded_fmts[0];
+ if (i == coded_desc->num_decoded_fmts)
+ pix_mp->pixelformat = coded_desc->decoded_fmts[0];
+ }
/* Always apply the frmsize constraint of the coded end. */
pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
@@ -326,6 +368,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
return ret;
ctx->decoded_fmt = *f;
+ ctx->valid_fmt = f->fmt.pix_mp.pixelformat;
return 0;
}
@@ -429,6 +472,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
if (WARN_ON(!ctx->coded_fmt_desc))
return -EINVAL;
+ if (ctx->valid_fmt) {
+ if (f->index)
+ return -EINVAL;
+
+ f->pixelformat = ctx->valid_fmt;
+ return 0;
+ }
+
if (f->index >= ctx->coded_fmt_desc->num_decoded_fmts)
return -EINVAL;
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
index 633335ebb9c4..b9e219438bc9 100644
--- a/drivers/staging/media/rkvdec/rkvdec.h
+++ b/drivers/staging/media/rkvdec/rkvdec.h
@@ -66,6 +66,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
struct rkvdec_coded_fmt_ops {
int (*adjust_fmt)(struct rkvdec_ctx *ctx,
struct v4l2_format *f);
+ u32 (*valid_fmt)(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl);
int (*start)(struct rkvdec_ctx *ctx);
void (*stop)(struct rkvdec_ctx *ctx);
int (*run)(struct rkvdec_ctx *ctx);
@@ -101,6 +102,7 @@ struct rkvdec_ctx {
struct v4l2_fh fh;
struct v4l2_format coded_fmt;
struct v4l2_format decoded_fmt;
+ u32 valid_fmt;
const struct rkvdec_coded_fmt_desc *coded_fmt_desc;
struct v4l2_ctrl_handler ctrl_hdl;
struct rkvdec_dev *dev;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: h264: Support High 10 and 4:2:2 profiles
Add support and enable decoding of H264 High 10 and 4:2:2 profiles.
Decoded CAPTURE buffer width is aligned to 64 pixels to accommodate HW
requirement on 10-bit format buffers.
The new valid_fmt operation is implemented and return a valid pixelformat
for the provided SPS control.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 33 ++++++++++++++++------
drivers/staging/media/rkvdec/rkvdec.c | 19 +++++++++----
2 files changed, 37 insertions(+), 15 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index a8635105e387..0069d3d198db 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -1031,19 +1031,14 @@ static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
{
unsigned int width, height;
- /*
- * TODO: The hardware supports 10-bit and 4:2:2 profiles,
- * but it's currently broken in the driver.
- * Reject them for now, until it's fixed.
- */
- if (sps->chroma_format_idc > 1)
- /* Only 4:0:0 and 4:2:0 are supported */
+ if (sps->chroma_format_idc > 2)
+ /* Only 4:0:0, 4:2:0 and 4:2:2 are supported */
return -EINVAL;
if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
/* Luma and chroma bit depth mismatch */
return -EINVAL;
- if (sps->bit_depth_luma_minus8 != 0)
- /* Only 8-bit is supported */
+ if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
+ /* Only 8-bit and 10-bit is supported */
return -EINVAL;
width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
@@ -1064,6 +1059,25 @@ static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
return 0;
}
+static u32 rkvdec_h264_valid_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
+{
+ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
+
+ if (sps->bit_depth_luma_minus8 == 0) {
+ if (sps->chroma_format_idc == 2)
+ return V4L2_PIX_FMT_NV16;
+ else
+ return V4L2_PIX_FMT_NV12;
+ } else if (sps->bit_depth_luma_minus8 == 2) {
+ if (sps->chroma_format_idc == 2)
+ return V4L2_PIX_FMT_NV20;
+ else
+ return V4L2_PIX_FMT_NV15;
+ }
+
+ return 0;
+}
+
static int rkvdec_h264_start(struct rkvdec_ctx *ctx)
{
struct rkvdec_dev *rkvdec = ctx->dev;
@@ -1185,6 +1199,7 @@ static int rkvdec_h264_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops = {
.adjust_fmt = rkvdec_h264_adjust_fmt,
+ .valid_fmt = rkvdec_h264_valid_fmt,
.start = rkvdec_h264_start,
.stop = rkvdec_h264_stop,
.run = rkvdec_h264_run,
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index e93e1cb0f829..4f5436c89e08 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -31,7 +31,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
struct v4l2_pix_format_mplane *pix_mp)
{
v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat,
- pix_mp->width, pix_mp->height);
+ ALIGN(pix_mp->width, 64), pix_mp->height);
pix_mp->plane_fmt[0].sizeimage += 128 *
DIV_ROUND_UP(pix_mp->width, 16) *
DIV_ROUND_UP(pix_mp->height, 16);
@@ -136,8 +136,11 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
.num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
};
-static const u32 rkvdec_h264_vp9_decoded_fmts[] = {
+static const u32 rkvdec_h264_decoded_fmts[] = {
V4L2_PIX_FMT_NV12,
+ V4L2_PIX_FMT_NV15,
+ V4L2_PIX_FMT_NV16,
+ V4L2_PIX_FMT_NV20,
};
static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
@@ -160,6 +163,10 @@ static const struct rkvdec_ctrls rkvdec_vp9_ctrls = {
.num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs),
};
+static const u32 rkvdec_vp9_decoded_fmts[] = {
+ V4L2_PIX_FMT_NV12,
+};
+
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_H264_SLICE,
@@ -173,8 +180,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
},
.ctrls = &rkvdec_h264_ctrls,
.ops = &rkvdec_h264_fmt_ops,
- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
+ .decoded_fmts = rkvdec_h264_decoded_fmts,
.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
},
{
@@ -189,8 +196,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
},
.ctrls = &rkvdec_vp9_ctrls,
.ops = &rkvdec_vp9_fmt_ops,
- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
+ .decoded_fmts = rkvdec_vp9_decoded_fmts,
}
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 27 Mar 2022 14:18:07 +0200
Subject: [PATCH] media: rkvdec-h264: Don't hardcode SPS/PPS parameters
Some SPS/PPS parameters are currently hardcoded in the driver
even though so do exist in the uapi which is stable by now.
Use them instead of hardcoding them.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/rkvdec/rkvdec-h264.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 0069d3d198db..2c27acaba85e 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -655,13 +655,14 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
#define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value)
/* write sps */
- WRITE_PPS(0xf, SEQ_PARAMETER_SET_ID);
- WRITE_PPS(0xff, PROFILE_IDC);
- WRITE_PPS(1, CONSTRAINT_SET3_FLAG);
+ WRITE_PPS(sps->seq_parameter_set_id, SEQ_PARAMETER_SET_ID);
+ WRITE_PPS(sps->profile_idc, PROFILE_IDC);
+ WRITE_PPS((sps->constraint_set_flags & 1 << 3) ? 1 : 0, CONSTRAINT_SET3_FLAG);
WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA);
WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA);
- WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
+ WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS),
+ QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG);
WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4);
WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES);
WRITE_PPS(sps->pic_order_cnt_type, PIC_ORDER_CNT_TYPE);
@@ -688,8 +689,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
DIRECT_8X8_INFERENCE_FLAG);
/* write pps */
- WRITE_PPS(0xff, PIC_PARAMETER_SET_ID);
- WRITE_PPS(0x1f, PPS_SEQ_PARAMETER_SET_ID);
+ WRITE_PPS(pps->pic_parameter_set_id, PIC_PARAMETER_SET_ID);
+ WRITE_PPS(pps->seq_parameter_set_id, PPS_SEQ_PARAMETER_SET_ID);
WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE),
ENTROPY_CODING_MODE_FLAG);
WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT),

236
patch/kernel/media-edge/00182-linux-0020-drm-from-list.patch Normal file
View File

@@ -0,0 +1,236 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 22:30:13 +0000
Subject: [PATCH] drm: drm_fourcc: add NV20 and NV30 YUV formats
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled
variant of NV15, a 10-bit 2-plane YUV format that has no padding between
components. Instead, luminance and chrominance samples are grouped into 4s
so that each group is packed into an integer number of bytes:
YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes
The '20' and '30' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 4.
V2: Added NV30 format
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Sandy Huang <hjc@rock-chips.com>
---
drivers/gpu/drm/drm_fourcc.c | 8 ++++++++
include/uapi/drm/drm_fourcc.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index 07741b678798..5ec38456dc5d 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -261,6 +261,14 @@ const struct drm_format_info *__drm_format_info(u32 format)
.num_planes = 2, .char_per_block = { 5, 5, 0 },
.block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
.vsub = 2, .is_yuv = true },
+ { .format = DRM_FORMAT_NV20, .depth = 0,
+ .num_planes = 2, .char_per_block = { 5, 5, 0 },
+ .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
+ .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_NV30, .depth = 0,
+ .num_planes = 2, .char_per_block = { 5, 5, 0 },
+ .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 1,
+ .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Q410, .depth = 0,
.num_planes = 3, .char_per_block = { 2, 2, 2 },
.block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 0206f812c569..fa49ee98f275 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -285,6 +285,8 @@ extern "C" {
* index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
*/
#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */
+#define DRM_FORMAT_NV20 fourcc_code('N', 'V', '2', '0') /* 2x1 subsampled Cr:Cb plane */
+#define DRM_FORMAT_NV30 fourcc_code('N', 'V', '3', '0') /* non-subsampled Cr:Cb plane */
/*
* 2 plane YCbCr MSB aligned
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 22:30:13 +0000
Subject: [PATCH] drm: rockchip: add NV15, NV20 and NV30 support
Add support for displaying 10-bit 4:2:0 and 4:2:2 formats produced by the
Rockchip Video Decoder on RK322X, RK3288, RK3328, RK3368 and RK3399.
Also add support for 10-bit 4:4:4 format while at it.
V2: Added NV30 support
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Sandy Huang <hjc@rock-chips.com>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 29 +++++++++++++++++--
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 32 +++++++++++++++++----
3 files changed, 54 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d32117633efe..9e71263ac770 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -280,6 +280,18 @@ static bool has_uv_swapped(uint32_t format)
}
}
+static bool is_fmt_10(uint32_t format)
+{
+ switch (format) {
+ case DRM_FORMAT_NV15:
+ case DRM_FORMAT_NV20:
+ case DRM_FORMAT_NV30:
+ return true;
+ default:
+ return false;
+ }
+}
+
static enum vop_data_format vop_convert_format(uint32_t format)
{
switch (format) {
@@ -295,12 +307,15 @@ static enum vop_data_format vop_convert_format(uint32_t format)
case DRM_FORMAT_BGR565:
return VOP_FMT_RGB565;
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_NV15:
case DRM_FORMAT_NV21:
return VOP_FMT_YUV420SP;
case DRM_FORMAT_NV16:
+ case DRM_FORMAT_NV20:
case DRM_FORMAT_NV61:
return VOP_FMT_YUV422SP;
case DRM_FORMAT_NV24:
+ case DRM_FORMAT_NV30:
case DRM_FORMAT_NV42:
return VOP_FMT_YUV444SP;
default:
@@ -954,7 +969,12 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start;
dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
- offset = (src->x1 >> 16) * fb->format->cpp[0];
+ if (fb->format->block_w[0])
+ offset = (src->x1 >> 16) * fb->format->char_per_block[0] /
+ fb->format->block_w[0];
+ else
+ offset = (src->x1 >> 16) * fb->format->cpp[0];
+
offset += (src->y1 >> 16) * fb->pitches[0];
dma_addr = rk_obj->dma_addr + offset + fb->offsets[0];
@@ -980,6 +1000,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
}
VOP_WIN_SET(vop, win, format, format);
+ VOP_WIN_SET(vop, win, fmt_10, is_fmt_10(fb->format->format));
VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv);
@@ -996,7 +1017,11 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
uv_obj = fb->obj[1];
rk_uv_obj = to_rockchip_obj(uv_obj);
- offset = (src->x1 >> 16) * bpp / hsub;
+ if (fb->format->block_w[1])
+ offset = (src->x1 >> 16) * bpp /
+ fb->format->block_w[1] / hsub;
+ else
+ offset = (src->x1 >> 16) * bpp / hsub;
offset += (src->y1 >> 16) * fb->pitches[1] / vsub;
dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1];
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 8502849833d9..b6eea31109d5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -181,6 +181,7 @@ struct vop_win_phy {
struct vop_reg enable;
struct vop_reg gate;
struct vop_reg format;
+ struct vop_reg fmt_10;
struct vop_reg rb_swap;
struct vop_reg uv_swap;
struct vop_reg act_info;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 014f99e8928e..16e6aa01e400 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -53,6 +53,23 @@ static const uint32_t formats_win_full[] = {
DRM_FORMAT_NV42,
};
+static const uint32_t formats_win_full_10[] = {
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_BGR565,
+ DRM_FORMAT_NV12,
+ DRM_FORMAT_NV16,
+ DRM_FORMAT_NV24,
+ DRM_FORMAT_NV15,
+ DRM_FORMAT_NV20,
+ DRM_FORMAT_NV30,
+};
+
static const uint64_t format_modifiers_win_full[] = {
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID,
@@ -621,11 +638,12 @@ static const struct vop_scl_regs rk3288_win_full_scl = {
static const struct vop_win_phy rk3288_win01_data = {
.scl = &rk3288_win_full_scl,
- .data_formats = formats_win_full,
- .nformats = ARRAY_SIZE(formats_win_full),
+ .data_formats = formats_win_full_10,
+ .nformats = ARRAY_SIZE(formats_win_full_10),
.format_modifiers = format_modifiers_win_full,
.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+ .fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
@@ -756,11 +774,12 @@ static const struct vop_intr rk3368_vop_intr = {
static const struct vop_win_phy rk3368_win01_data = {
.scl = &rk3288_win_full_scl,
- .data_formats = formats_win_full,
- .nformats = ARRAY_SIZE(formats_win_full),
+ .data_formats = formats_win_full_10,
+ .nformats = ARRAY_SIZE(formats_win_full_10),
.format_modifiers = format_modifiers_win_full,
.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
+ .fmt_10 = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 4),
.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
.uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15),
.x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
@@ -924,11 +943,12 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = {
static const struct vop_win_phy rk3399_win01_data = {
.scl = &rk3288_win_full_scl,
- .data_formats = formats_win_full,
- .nformats = ARRAY_SIZE(formats_win_full),
+ .data_formats = formats_win_full_10,
+ .nformats = ARRAY_SIZE(formats_win_full_10),
.format_modifiers = format_modifiers_win_full_afbc,
.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+ .fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
.x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),

3527
patch/kernel/media-edge/00183-linux-1000-drm-rockchip.patch Normal file
View File

File diff suppressed because it is too large Load Diff

542
patch/kernel/media-edge/00184-linux-1001-v4l2-rockchip.patch Normal file
View File

@@ -0,0 +1,542 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 23 May 2020 10:16:01 +0000
Subject: [PATCH] WIP: media: rkvdec: pm runtime dont use autosuspend before
disable and cleanup
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/staging/media/rkvdec/rkvdec.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 4f5436c89e08..eaf2f133a264 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -1125,9 +1125,9 @@ static int rkvdec_remove(struct platform_device *pdev)
{
struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev);
- rkvdec_v4l2_cleanup(rkvdec);
- pm_runtime_disable(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ rkvdec_v4l2_cleanup(rkvdec);
return 0;
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Randy Li <ayaka@soulik.info>
Date: Sun, 6 Jan 2019 01:48:37 +0800
Subject: [PATCH] soc: rockchip: power-domain: export idle request
We need to put the power status of HEVC IP into IDLE unless
we can't reset that IP or the SoC would crash down.
rockchip_pmu_idle_request(dev, true)---> enter idle
rockchip_pmu_idle_request(dev, false)---> exit idle
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Randy Li <ayaka@soulik.info>
---
drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
include/linux/rockchip_pmu.h | 15 +++++++++++++++
include/soc/rockchip/pm_domains.h | 6 ++++++
3 files changed, 44 insertions(+)
create mode 100644 include/linux/rockchip_pmu.h
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 89795abac951..ffb5d62c9d52 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -309,6 +309,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
return 0;
}
+int rockchip_pmu_idle_request(struct device *dev, bool idle)
+{
+ struct generic_pm_domain *genpd;
+ struct rockchip_pm_domain *pd;
+ int ret;
+
+ if (IS_ERR_OR_NULL(dev))
+ return -EINVAL;
+
+ if (IS_ERR_OR_NULL(dev->pm_domain))
+ return -EINVAL;
+
+ genpd = pd_to_genpd(dev->pm_domain);
+ pd = to_rockchip_pd(genpd);
+
+ mutex_lock(&pd->pmu->mutex);
+ ret = rockchip_pmu_set_idle_request(pd, idle);
+ mutex_unlock(&pd->pmu->mutex);
+
+ return ret;
+}
+EXPORT_SYMBOL(rockchip_pmu_idle_request);
+
static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
{
int i;
diff --git a/include/linux/rockchip_pmu.h b/include/linux/rockchip_pmu.h
new file mode 100644
index 000000000000..720b3314e71a
--- /dev/null
+++ b/include/linux/rockchip_pmu.h
@@ -0,0 +1,15 @@
+/*
+ * pm_domain.h - Definitions and headers related to device power domains.
+ *
+ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
+ *
+ * This file is released under the GPLv2.
+ */
+
+#ifndef _LINUX_ROCKCHIP_PM_H
+#define _LINUX_ROCKCHIP_PM_H
+#include <linux/device.h>
+
+int rockchip_pmu_idle_request(struct device *dev, bool idle);
+
+#endif /* _LINUX_ROCKCHIP_PM_H */
diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
index 7dbd941fc937..c5a59dd71754 100644
--- a/include/soc/rockchip/pm_domains.h
+++ b/include/soc/rockchip/pm_domains.h
@@ -10,6 +10,7 @@
int rockchip_pmu_block(void);
void rockchip_pmu_unblock(void);
+int rockchip_pmu_idle_request(struct device *dev, bool idle);
#else /* CONFIG_ROCKCHIP_PM_DOMAINS */
@@ -20,6 +21,11 @@ static inline int rockchip_pmu_block(void)
static inline void rockchip_pmu_unblock(void) { }
+static inline int rockchip_pmu_idle_request(struct device *dev, bool idle)
+{
+ return -ENOTSUPP;
+}
+
#endif /* CONFIG_ROCKCHIP_PM_DOMAINS */
#endif /* __SOC_ROCKCHIP_PM_DOMAINS_H__ */
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 20 May 2020 17:04:47 +0200
Subject: [PATCH] WIP: media: rkvdec: implement reset controls
---
.../bindings/media/rockchip,vdec.yaml | 19 +++++++
drivers/staging/media/rkvdec/rkvdec-regs.h | 5 ++
drivers/staging/media/rkvdec/rkvdec.c | 53 +++++++++++++++++++
drivers/staging/media/rkvdec/rkvdec.h | 11 +++-
4 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
index 3bcfb8e12333..dd6958df1de8 100644
--- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
@@ -53,6 +53,18 @@ properties:
iommus:
maxItems: 1
+ resets:
+ maxItems: 6
+
+ reset-names:
+ items:
+ - const: video_h
+ - const: video_a
+ - const: video_core
+ - const: video_cabac
+ - const: niu_a
+ - const: niu_h
+
required:
- compatible
- reg
@@ -60,6 +72,8 @@ required:
- clocks
- clock-names
- power-domains
+ - resets
+ - reset-names
additionalProperties: false
@@ -78,6 +92,11 @@ examples:
clock-names = "axi", "ahb", "cabac", "core";
power-domains = <&power RK3399_PD_VDU>;
iommus = <&vdec_mmu>;
+ resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>,
+ <&cru SRST_VDU_CORE>, <&cru SRST_VDU_CA>,
+ <&cru SRST_A_VDU_NOC>, <&cru SRST_H_VDU_NOC>;
+ reset-names = "video_h", "video_a", "video_core", "video_cabac",
+ "niu_a", "niu_h";
};
...
diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
index 15b9bee92016..3acc914888f6 100644
--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
+++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
@@ -28,6 +28,11 @@
#define RKVDEC_SOFTRST_EN_P BIT(20)
#define RKVDEC_FORCE_SOFTRESET_VALID BIT(21)
#define RKVDEC_SOFTRESET_RDY BIT(22)
+#define RKVDEC_ERR_MASK (RKVDEC_BUS_STA \
+ | RKVDEC_ERR_STA \
+ | RKVDEC_TIMEOUT_STA \
+ | RKVDEC_BUF_EMPTY_STA \
+ | RKVDEC_COLMV_REF_ERR_STA )
#define RKVDEC_REG_SYSCTRL 0x008
#define RKVDEC_IN_ENDIAN BIT(0)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index eaf2f133a264..f55abb7c377f 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -10,12 +10,15 @@
*/
#include <linux/clk.h>
+#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <linux/rockchip_pmu.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <linux/workqueue.h>
@@ -717,6 +720,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx,
pm_runtime_mark_last_busy(rkvdec->dev);
pm_runtime_put_autosuspend(rkvdec->dev);
+
+ if (result == VB2_BUF_STATE_ERROR &&
+ rkvdec->reset_mask == RESET_NONE)
+ rkvdec->reset_mask |= RESET_SOFT;
+
rkvdec_job_finish_no_pm(ctx, result);
}
@@ -754,6 +762,33 @@ static void rkvdec_device_run(void *priv)
if (WARN_ON(!desc))
return;
+ if (rkvdec->reset_mask != RESET_NONE) {
+
+ if (rkvdec->reset_mask & RESET_SOFT) {
+ writel(RKVDEC_SOFTRST_EN_P,
+ rkvdec->regs + RKVDEC_REG_INTERRUPT);
+ udelay(RKVDEC_RESET_DELAY);
+ if (readl(rkvdec->regs + RKVDEC_REG_INTERRUPT)
+ & RKVDEC_SOFTRESET_RDY)
+ dev_info_ratelimited(rkvdec->dev,
+ "softreset failed\n");
+ }
+
+ if (rkvdec->reset_mask & RESET_HARD) {
+ rockchip_pmu_idle_request(rkvdec->dev, true);
+ ret = reset_control_assert(rkvdec->rstc);
+ if (!ret) {
+ udelay(RKVDEC_RESET_DELAY);
+ ret = reset_control_deassert(rkvdec->rstc);
+ }
+ rockchip_pmu_idle_request(rkvdec->dev, false);
+ if (ret)
+ dev_notice_ratelimited(rkvdec->dev,
+ "hardreset failed\n");
+ }
+ rkvdec->reset_mask = RESET_NONE;
+ pm_runtime_suspend(rkvdec->dev);
+ }
ret = pm_runtime_resume_and_get(rkvdec->dev);
if (ret < 0) {
@@ -1020,6 +1055,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
if (cancel_delayed_work(&rkvdec->watchdog_work)) {
struct rkvdec_ctx *ctx;
+ if (state == VB2_BUF_STATE_ERROR) {
+ rkvdec->reset_mask |= (status & RKVDEC_ERR_MASK) ?
+ RESET_HARD : RESET_SOFT;
+ }
+
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
rkvdec_job_finish(ctx, state);
}
@@ -1037,6 +1077,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
if (ctx) {
dev_err(rkvdec->dev, "Frame processing timed out!\n");
+ rkvdec->reset_mask |= RESET_HARD;
writel(RKVDEC_IRQ_DIS, rkvdec->regs + RKVDEC_REG_INTERRUPT);
writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL);
rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR);
@@ -1105,6 +1146,18 @@ static int rkvdec_probe(struct platform_device *pdev)
return ret;
}
+
+ rkvdec->rstc = devm_reset_control_array_get(&pdev->dev, false, true);
+ if (IS_ERR(rkvdec->rstc)) {
+ dev_err(&pdev->dev,
+ "get resets failed %ld\n", PTR_ERR(rkvdec->rstc));
+ return PTR_ERR(rkvdec->rstc);
+ } else {
+ dev_dbg(&pdev->dev,
+ "requested %d resets\n",
+ reset_control_get_count(&pdev->dev));
+ }
+
pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_enable(&pdev->dev);
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
index b9e219438bc9..f02f79c405f0 100644
--- a/drivers/staging/media/rkvdec/rkvdec.h
+++ b/drivers/staging/media/rkvdec/rkvdec.h
@@ -11,10 +11,11 @@
#ifndef RKVDEC_H_
#define RKVDEC_H_
+#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/reset.h>
#include <linux/videodev2.h>
#include <linux/wait.h>
-#include <linux/clk.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
@@ -22,6 +23,12 @@
#include <media/videobuf2-core.h>
#include <media/videobuf2-dma-contig.h>
+#define RESET_NONE 0
+#define RESET_SOFT BIT(0)
+#define RESET_HARD BIT(1)
+
+#define RKVDEC_RESET_DELAY 5
+
struct rkvdec_ctx;
struct rkvdec_ctrl_desc {
@@ -96,6 +103,8 @@ struct rkvdec_dev {
void __iomem *regs;
struct mutex vdev_lock; /* serializes ioctls */
struct delayed_work watchdog_work;
+ struct reset_control *rstc;
+ u8 reset_mask;
};
struct rkvdec_ctx {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Tue, 18 Aug 2020 11:38:04 +0200
Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3399
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 980b12cb0a49..6e3149e587c5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1062,7 +1062,10 @@ power-domain@RK3399_PD_VCODEC {
power-domain@RK3399_PD_VDU {
reg = <RK3399_PD_VDU>;
clocks = <&cru ACLK_VDU>,
- <&cru HCLK_VDU>;
+ <&cru HCLK_VDU>,
+ <&cru SCLK_VDU_CA>,
+ <&cru SCLK_VDU_CORE>;
+
pm_qos = <&qos_video_m1_r>,
<&qos_video_m1_w>;
#power-domain-cells = <0>;
@@ -1345,6 +1348,11 @@ vdec: video-codec@ff660000 {
clock-names = "axi", "ahb", "cabac", "core";
iommus = <&vdec_mmu>;
power-domains = <&power RK3399_PD_VDU>;
+ resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>,
+ <&cru SRST_VDU_CORE>, <&cru SRST_VDU_CA>,
+ <&cru SRST_A_VDU_NOC>, <&cru SRST_H_VDU_NOC>;
+ reset-names = "video_h", "video_a", "video_core", "video_cabac",
+ "niu_a", "niu_h";
};
vdec_mmu: iommu@ff660480 {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 1 Jan 2021 12:11:12 +0200
Subject: [PATCH] arm64: dts: rockchip: fix RK3399 vdec register witdh
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6e3149e587c5..093ebe070775 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1341,7 +1341,7 @@ vpu_mmu: iommu@ff650800 {
vdec: video-codec@ff660000 {
compatible = "rockchip,rk3399-vdec";
- reg = <0x0 0xff660000 0x0 0x400>;
+ reg = <0x0 0xff660000 0x0 0x480>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
<&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 21 Aug 2021 16:12:36 +0200
Subject: [PATCH] media: hantro: rockchip: Increase RK3288's max ACLK
Required to proper decode H.264@4K
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
index 8de6fd2e8eef..002b1a600f93 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
@@ -15,7 +15,8 @@
#include "rockchip_vpu2_regs.h"
#define RK3066_ACLK_MAX_FREQ (300 * 1000 * 1000)
-#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
+#define RK3288_ACLK_MAX_FREQ (600 * 1000 * 1000)
+#define RK3399_ACLK_MAX_FREQ (400 * 1000 * 1000)
/*
* Supported formats.
@@ -346,13 +347,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
return 0;
}
-static int rockchip_vpu_hw_init(struct hantro_dev *vpu)
+static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ);
return 0;
}
+static int rockchip_vpu_hw_init(struct hantro_dev *vpu)
+{
+ /* Bump ACLK to max. possible freq. to improve performance. */
+ clk_set_rate(vpu->clocks[0].clk, RK3399_ACLK_MAX_FREQ);
+ return 0;
+}
+
static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx)
{
struct hantro_dev *vpu = ctx->dev;
@@ -592,7 +600,7 @@ const struct hantro_variant rk3288_vpu_variant = {
.codec_ops = rk3288_vpu_codec_ops,
.irqs = rockchip_vpu1_irqs,
.num_irqs = ARRAY_SIZE(rockchip_vpu1_irqs),
- .init = rockchip_vpu_hw_init,
+ .init = rk3288_vpu_hw_init,
.clk_names = rockchip_vpu_clk_names,
.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 4 Jul 2021 15:19:44 +0200
Subject: [PATCH] media: rkvdec: disable QoS for VP9 (corruptions on RK3328
otherwise)
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/rkvdec/rkvdec-regs.h | 2 ++
drivers/staging/media/rkvdec/rkvdec-vp9.c | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
index 3acc914888f6..265f5234f4eb 100644
--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
+++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
@@ -222,6 +222,8 @@
#define RKVDEC_REG_H264_ERR_E 0x134
#define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff)
+#define RKVDEC_QOS_CTRL 0x18C
+
#define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410
#define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450
diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c
index d8c1c0db15c7..a289bc968e91 100644
--- a/drivers/staging/media/rkvdec/rkvdec-vp9.c
+++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c
@@ -802,6 +802,7 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
struct rkvdec_dev *rkvdec = ctx->dev;
struct rkvdec_vp9_run run = { };
int ret;
+ u32 reg;
ret = rkvdec_vp9_run_preamble(ctx, &run);
if (ret) {
@@ -823,6 +824,13 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN);
+
+ /* disable QOS for RK3328 - no effect on other SoCs */
+ reg = readl(rkvdec->regs + RKVDEC_QOS_CTRL);
+ reg |= 0xFFFF;
+ reg &= (~BIT(12));
+ writel(reg, rkvdec->regs + RKVDEC_QOS_CTRL);
+
/* Start decoding! */
writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E |
RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Thu, 16 Jun 2022 13:18:22 +0200
Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3328
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 5519347232f6..431c4ec198be 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -674,6 +674,11 @@ vdec: video-codec@ff360000 {
assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
<&cru SCLK_VDEC_CORE>;
assigned-clock-rates = <400000000>, <400000000>, <300000000>;
+ resets = <&cru SRST_VDEC_H>, <&cru SRST_VDEC_A>,
+ <&cru SRST_VDEC_CORE>, <&cru SRST_VDEC_CABAC>,
+ <&cru SRST_VDEC_NIU_A>, <&cru SRST_VDEC_NIU_H>;
+ reset-names = "video_h", "video_a", "video_core", "video_cabac",
+ "niu_a", "niu_h";
iommus = <&vdec_mmu>;
power-domains = <&power RK3328_PD_VIDEO>;
};

712
patch/kernel/media-edge/00185-linux-1002-for-libreelec.patch Normal file
View File

@@ -0,0 +1,712 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 2 Sep 2020 19:52:02 +0200
Subject: [PATCH] arm64: dts: rockchip: add gpu powerdomain, gpu opp-table and
cooling cell for RK3328
Note: since the regulator that supplies the GPU usually also supplies
other SoC components, we have to make sure voltage is never lower then
1075 mV - also disable 500 MHz for now, since it will crash if rkvdec
is running at the same time (voltage to high)
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
.../arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 +++
.../arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 +++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 35 +++++++++++++++++++
3 files changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
index aa22a0c22265..51c7723d6762 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -166,6 +166,10 @@ &gmac2io {
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_logic>;
+};
+
&hdmi {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index f69a38f42d2d..c198a8a7f95a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -162,6 +162,10 @@ &gmac2io {
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_logic>;
+};
+
&hdmi {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 431c4ec198be..eec03adf0902 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -300,6 +300,11 @@ power: power-controller {
#address-cells = <1>;
#size-cells = <0>;
+ power-domain@RK3328_PD_GPU {
+ reg = <RK3328_PD_GPU>;
+ clocks = <&cru ACLK_GPU>;
+ #power-domain-cells = <0>;
+ };
power-domain@RK3328_PD_HEVC {
reg = <RK3328_PD_HEVC>;
#power-domain-cells = <0>;
@@ -539,6 +544,11 @@ map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
contribution = <4096>;
};
+ map1 {
+ trip = <&target>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <4096>;
+ };
};
};
@@ -620,7 +630,32 @@ gpu: gpu@ff300000 {
"ppmmu1";
clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
clock-names = "bus", "core";
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power RK3328_PD_GPU>;
resets = <&cru SRST_GPU_A>;
+ #cooling-cells = <2>;
+ };
+
+ gpu_opp_table: gpu-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1150000>;
+ status = "disabled";
+ };
};
h265e_mmu: iommu@ff330200 {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Tue, 2 Feb 2021 17:22:21 +0200
Subject: [PATCH] ARM: dts: RK3288 miqi add hdmi sound nodes
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm/boot/dts/rk3288-miqi.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 713f55e143c6..8d30c49f406e 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -78,6 +78,21 @@ vcc_sys: vsys-regulator {
regulator-always-on;
regulator-boot-on;
};
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "HDMI";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ };
};
&cpu0 {
@@ -284,6 +299,11 @@ &i2c5 {
status = "okay";
};
+&i2s {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
&io_domains {
status = "okay";
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 2 Apr 2021 17:54:22 +0200
Subject: [PATCH] ARM/arm64: dts: rockchip: align sound card names
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 09618bb7d872..db9106a3dd22 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -73,7 +73,7 @@ sdio_pwrseq: sdio-pwrseq {
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
- simple-audio-card,name = "rockchip,tinker-codec";
+ simple-audio-card,name = "HDMI";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,codec {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 093ebe070775..a10fe60b7680 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1893,7 +1893,7 @@ hdmi_sound: hdmi-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
- simple-audio-card,name = "hdmi-sound";
+ simple-audio-card,name = "HDMI";
status = "disabled";
simple-audio-card,cpu {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 10 Feb 2021 18:44:56 +0200
Subject: [PATCH] HACK: drm/gem: suppress warning about missing vm_flags
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/gpu/drm/drm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index ad068865ba20..9deb8d1d291d 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -1038,7 +1038,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
ret = obj->funcs->mmap(obj, vma);
if (ret)
goto err_drm_gem_object_put;
- WARN_ON(!(vma->vm_flags & VM_DONTEXPAND));
+ //WARN_ON(!(vma->vm_flags & VM_DONTEXPAND));
} else {
if (!vma->vm_ops) {
ret = -EINVAL;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 25 Mar 2018 22:17:06 +0200
Subject: [PATCH] ASoC: hdmi-codec: fix channel allocation
---
sound/soc/codecs/hdmi-codec.c | 113 ++++++++++++++++------------------
1 file changed, 52 insertions(+), 61 deletions(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index 5679102de91f..f0cd183f7873 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -194,78 +194,69 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
*/
static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
{ .ca_id = 0x00, .n_ch = 2,
- .mask = FL | FR},
- /* 2.1 */
- { .ca_id = 0x01, .n_ch = 4,
- .mask = FL | FR | LFE},
- /* Dolby Surround */
+ .mask = FL | FR },
+ { .ca_id = 0x03, .n_ch = 4,
+ .mask = FL | FR | LFE | FC },
{ .ca_id = 0x02, .n_ch = 4,
.mask = FL | FR | FC },
- /* surround51 */
+ { .ca_id = 0x01, .n_ch = 4,
+ .mask = FL | FR | LFE },
{ .ca_id = 0x0b, .n_ch = 6,
- .mask = FL | FR | LFE | FC | RL | RR},
- /* surround40 */
- { .ca_id = 0x08, .n_ch = 6,
- .mask = FL | FR | RL | RR },
- /* surround41 */
- { .ca_id = 0x09, .n_ch = 6,
- .mask = FL | FR | LFE | RL | RR },
- /* surround50 */
+ .mask = FL | FR | LFE | FC | RL | RR },
{ .ca_id = 0x0a, .n_ch = 6,
.mask = FL | FR | FC | RL | RR },
- /* 6.1 */
- { .ca_id = 0x0f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | RC },
- /* surround71 */
+ { .ca_id = 0x09, .n_ch = 6,
+ .mask = FL | FR | LFE | RL | RR },
+ { .ca_id = 0x08, .n_ch = 6,
+ .mask = FL | FR | RL | RR },
+ { .ca_id = 0x07, .n_ch = 6,
+ .mask = FL | FR | LFE | FC | RC },
+ { .ca_id = 0x06, .n_ch = 6,
+ .mask = FL | FR | FC | RC },
+ { .ca_id = 0x05, .n_ch = 6,
+ .mask = FL | FR | LFE | RC },
+ { .ca_id = 0x04, .n_ch = 6,
+ .mask = FL | FR | RC },
{ .ca_id = 0x13, .n_ch = 8,
.mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
- /* others */
- { .ca_id = 0x03, .n_ch = 8,
- .mask = FL | FR | LFE | FC },
- { .ca_id = 0x04, .n_ch = 8,
- .mask = FL | FR | RC},
- { .ca_id = 0x05, .n_ch = 8,
- .mask = FL | FR | LFE | RC },
- { .ca_id = 0x06, .n_ch = 8,
- .mask = FL | FR | FC | RC },
- { .ca_id = 0x07, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RC },
- { .ca_id = 0x0c, .n_ch = 8,
- .mask = FL | FR | RC | RL | RR },
- { .ca_id = 0x0d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RC },
- { .ca_id = 0x0e, .n_ch = 8,
- .mask = FL | FR | FC | RL | RR | RC },
- { .ca_id = 0x10, .n_ch = 8,
- .mask = FL | FR | RL | RR | RLC | RRC },
- { .ca_id = 0x11, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
{ .ca_id = 0x12, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | RLC | RRC },
- { .ca_id = 0x14, .n_ch = 8,
- .mask = FL | FR | FLC | FRC },
- { .ca_id = 0x15, .n_ch = 8,
- .mask = FL | FR | LFE | FLC | FRC },
- { .ca_id = 0x16, .n_ch = 8,
- .mask = FL | FR | FC | FLC | FRC },
- { .ca_id = 0x17, .n_ch = 8,
- .mask = FL | FR | LFE | FC | FLC | FRC },
- { .ca_id = 0x18, .n_ch = 8,
- .mask = FL | FR | RC | FLC | FRC },
- { .ca_id = 0x19, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FLC | FRC },
- { .ca_id = 0x1a, .n_ch = 8,
- .mask = FL | FR | RC | FC | FLC | FRC },
- { .ca_id = 0x1b, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FC | FLC | FRC },
- { .ca_id = 0x1c, .n_ch = 8,
- .mask = FL | FR | RL | RR | FLC | FRC },
- { .ca_id = 0x1d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | FLC | FRC },
{ .ca_id = 0x1e, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | FLC | FRC },
- { .ca_id = 0x1f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ { .ca_id = 0x11, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ { .ca_id = 0x10, .n_ch = 8,
+ .mask = FL | FR | RL | RR | RLC | RRC },
+ { .ca_id = 0x1c, .n_ch = 8,
+ .mask = FL | FR | RL | RR | FLC | FRC },
+ { .ca_id = 0x0f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | RC },
+ { .ca_id = 0x1b, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+ { .ca_id = 0x0e, .n_ch = 8,
+ .mask = FL | FR | FC | RL | RR | RC },
+ { .ca_id = 0x1a, .n_ch = 8,
+ .mask = FL | FR | RC | FC | FLC | FRC },
+ { .ca_id = 0x0d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RC },
+ { .ca_id = 0x19, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FLC | FRC },
+ { .ca_id = 0x0c, .n_ch = 8,
+ .mask = FL | FR | RC | RL | RR },
+ { .ca_id = 0x18, .n_ch = 8,
+ .mask = FL | FR | RC | FLC | FRC },
+ { .ca_id = 0x17, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | FLC | FRC },
+ { .ca_id = 0x16, .n_ch = 8,
+ .mask = FL | FR | FC | FLC | FRC },
+ { .ca_id = 0x15, .n_ch = 8,
+ .mask = FL | FR | LFE | FLC | FRC },
+ { .ca_id = 0x14, .n_ch = 8,
+ .mask = FL | FR | FLC | FRC },
};
struct hdmi_codec_priv {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 17:52:02 +0100
Subject: [PATCH] arm64: dts: rockchip: add SPDIF nodes for RK3328 A1 board
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
index 40bf808642b9..27a1799027c2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
@@ -57,6 +57,24 @@ ir-receiver {
gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
linux,rc-map-name = "rc-beelink-gs1";
};
+
+ spdif_sound: spdif-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
+ spdif_dit: spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
};
&analog_sound {
@@ -325,6 +343,11 @@ &sdmmc {
status = "okay";
};
+&spdif {
+ pinctrl-0 = <&spdifm0_tx>;
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 18:01:13 +0100
Subject: [PATCH] arm64: dts: rockchip: Add ir-receiver node for RK3328 ROC CC
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
index 51c7723d6762..cf321302daec 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -88,6 +88,13 @@ vcc_phy: vcc-phy-regulator {
regulator-boot-on;
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ };
+
leds {
compatible = "gpio-leds";
@@ -312,6 +319,13 @@ &io_domains {
};
&pinctrl {
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 21:24:15 +0100
Subject: [PATCH] ARM: dts: add cec pinctrl for RK3288 miqi board
---
arch/arm/boot/dts/rk3288-miqi.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 8d30c49f406e..6d90db5a3b75 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -145,6 +145,8 @@ &gpu {
&hdmi {
ddc-i2c-bus = <&i2c5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec_c0>;
status = "okay";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 19:22:15 +0100
Subject: [PATCH] HACK: arm64: dts: enable FE phy for Beelink A1 also
---
arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
index 27a1799027c2..7de9dfa71d89 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
@@ -147,6 +147,14 @@ rtl8211f: ethernet-phy@0 {
};
};
+&gmac2phy {
+ clock_in_out = "output";
+ assigned-clock-rate = <50000000>;
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
+ status = "okay";
+};
+
&gpu {
mali-supply = <&vdd_logic>;
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 26 Feb 2019 20:45:14 +0000
Subject: [PATCH] WIP: dw-hdmi-cec: sleep 100ms on error
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
index c8f44bcb298a..d4280ce4542c 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
@@ -4,6 +4,7 @@
*
* Copyright (C) 2015-2017 Russell King.
*/
+#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -129,8 +130,15 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
dw_hdmi_write(cec, stat, HDMI_IH_CEC_STAT0);
- if (stat & CEC_STAT_ERROR_INIT) {
- cec->tx_status = CEC_TX_STATUS_ERROR;
+ /* Status with both done and error_initiator bits have been seen
+ * on Rockchip RK3328 devices, transmit attempt seems to have failed
+ * when this happens, report as low drive and block cec-framework
+ * 100ms before core retransmits the failed message, this seems to
+ * mitigate the issue with failed transmit attempts.
+ */
+ if ((stat & (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) == (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) {
+ pr_debug("dw_hdmi_cec_hardirq: stat=%02x LOW_DRIVE\n", stat);
+ cec->tx_status = CEC_TX_STATUS_LOW_DRIVE;
cec->tx_done = true;
ret = IRQ_WAKE_THREAD;
} else if (stat & CEC_STAT_DONE) {
@@ -141,6 +149,10 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
cec->tx_status = CEC_TX_STATUS_NACK;
cec->tx_done = true;
ret = IRQ_WAKE_THREAD;
+ } else if (stat & CEC_STAT_ERROR_INIT) {
+ cec->tx_status = CEC_TX_STATUS_ERROR;
+ cec->tx_done = true;
+ ret = IRQ_WAKE_THREAD;
}
if (stat & CEC_STAT_EOM) {
@@ -173,6 +185,8 @@ static irqreturn_t dw_hdmi_cec_thread(int irq, void *data)
if (cec->tx_done) {
cec->tx_done = false;
+ if (cec->tx_status == CEC_TX_STATUS_LOW_DRIVE)
+ msleep(100);
cec_transmit_attempt_done(adap, cec->tx_status);
}
if (cec->rx_done) {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 5 May 2021 19:11:12 +0200
Subject: [PATCH] arm64: boot: dts: Increase ACLK_PERILP0 clock rate for RK3399
As per vendor kernel. Leaving this clock at the lower rate will
result in poor DMA controller performance
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a10fe60b7680..dbe6a9cb98a5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1477,7 +1477,7 @@ cru: clock-controller@ff760000 {
<1000000000>,
<150000000>, <75000000>,
<37500000>,
- <100000000>, <100000000>,
+ <300000000>, <100000000>,
<50000000>, <600000000>,
<100000000>, <50000000>,
<400000000>, <400000000>,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 21 Aug 2021 17:04:46 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable USB3 for rk3328 Beelink A1
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
index 7de9dfa71d89..e857e5a727f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts
@@ -389,6 +389,11 @@ &usb_host0_ehci {
status = "okay";
};
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&vop {
status = "okay";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 30 Oct 2021 12:19:19 +0200
Subject: [PATCH] WIP: drm: bridge: dw-hdmi: switch from .hw_parmas to .prepare
for i2s
Seems to be the only way to get AES bits correctly as set by
userspace.
TODO: check other consequences.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
index a2f0860b20bb..8961f9c7885d 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
@@ -34,9 +34,9 @@ static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
return audio->read(hdmi, offset);
}
-static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
- struct hdmi_codec_daifmt *fmt,
- struct hdmi_codec_params *hparms)
+static int dw_hdmi_i2s_prepare(struct device *dev, void *data,
+ struct hdmi_codec_daifmt *fmt,
+ struct hdmi_codec_params *hparms)
{
struct dw_hdmi_i2s_audio_data *audio = data;
struct dw_hdmi *hdmi = audio->hdmi;
@@ -178,7 +178,7 @@ static int dw_hdmi_i2s_hook_plugged_cb(struct device *dev, void *data,
}
static const struct hdmi_codec_ops dw_hdmi_i2s_ops = {
- .hw_params = dw_hdmi_i2s_hw_params,
+ .prepare = dw_hdmi_i2s_prepare,
.audio_startup = dw_hdmi_i2s_audio_startup,
.audio_shutdown = dw_hdmi_i2s_audio_shutdown,
.get_eld = dw_hdmi_i2s_get_eld,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 18 Sep 2022 10:35:52 +0200
Subject: [PATCH] arm64: dts: rockchip: Disbake fusb for rk3399-roc-pc
As it will lead to an unbootable device in case one if those ports
is used to power up the device.
See https://lkml.org/lkml/2022/6/20/413
---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index 2f4b1b2e3ac7..7217ead94d39 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -215,7 +215,7 @@ vdd_log: vdd-log {
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <450000>;
+ regulator-min-microvolt = <430000>;
regulator-max-microvolt = <1400000>;
pwm-supply = <&vcc3v3_sys>;
};
@@ -536,7 +536,7 @@ fusb1: usb-typec@22 {
pinctrl-names = "default";
pinctrl-0 = <&fusb1_int>;
vbus-supply = <&vcc_vbus_typec1>;
- status = "okay";
+ status = "disabled";
};
};
@@ -553,7 +553,7 @@ fusb0: usb-typec@22 {
pinctrl-names = "default";
pinctrl-0 = <&fusb0_int>;
vbus-supply = <&vcc_vbus_typec0>;
- status = "okay";
+ status = "disabled";
};
mp8859: regulator@66 {

3226
patch/kernel/media-edge/00186-linux-2000-v4l2-wip-rkvdec-hevc.patch Normal file
View File

File diff suppressed because it is too large Load Diff

337
patch/kernel/archive/station-p2-5.19/320-add-rockchip-iep-driver.patch → patch/kernel/media-edge/00187-linux-2001-v4l2-wip-iep-driver.patch
View File

@@ -1,6 +1,17 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 11 Oct 2020 17:03:12 +0200
Subject: [PATCH] dt-bindings: media: Add Rockchip IEP binding
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
.../bindings/media/rockchip-iep.yaml | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-iep.yaml
diff --git a/Documentation/devicetree/bindings/media/rockchip-iep.yaml b/Documentation/devicetree/bindings/media/rockchip-iep.yaml
new file mode 100644
index 000000000..a9efcda13
index 000000000000..a9efcda13fc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-iep.yaml
@@ -0,0 +1,73 @@
@@ -77,105 +88,73 @@ index 000000000..a9efcda13
+ iommus = <&iep_mmu>;
+ power-domains = <&power RK3228_PD_VIO>;
+ };
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 9c5a7791a..13db2ac6b 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -983,6 +983,17 @@ crypto: cypto-controller@ff8a0000 {
status = "okay";
};
+ iep: iep@ff90000 {
+ compatible = "rockchip,rk3288-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff900000 0x0 0x800>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&iep_mmu>;
+ };
+
iep_mmu: iommu@ff900800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff900800 0x0 0x40>;
@@ -990,8 +1001,8 @@ iep_mmu: iommu@ff900800 {
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_VIO>;
#iommu-cells = <0>;
- status = "disabled";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 11 Oct 2020 21:24:10 +0200
Subject: [PATCH] media: rockchip: Add Rockchip IEP driver
isp_mmu: iommu@ff914000 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 8c0bca75e..162e57936 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -829,6 +829,28 @@ vop_mmu: iommu@ff373f00 {
status = "disabled";
};
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/media/platform/rockchip/Kconfig | 1 +
drivers/media/platform/rockchip/Makefile | 1 +
drivers/media/platform/rockchip/iep/Kconfig | 16 +
drivers/media/platform/rockchip/iep/Makefile | 5 +
.../media/platform/rockchip/iep/iep-regs.h | 291 +++++
drivers/media/platform/rockchip/iep/iep.c | 1089 +++++++++++++++++
drivers/media/platform/rockchip/iep/iep.h | 112 ++
7 files changed, 1515 insertions(+)
create mode 100644 drivers/media/platform/rockchip/iep/Kconfig
create mode 100644 drivers/media/platform/rockchip/iep/Makefile
create mode 100644 drivers/media/platform/rockchip/iep/iep-regs.h
create mode 100644 drivers/media/platform/rockchip/iep/iep.c
create mode 100644 drivers/media/platform/rockchip/iep/iep.h
+ iep: iep@ff3a0000 {
+ compatible = "rockchip,rk3328-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff3a0000 0x0 0x800>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3328_PD_VIDEO>;
+ iommus = <&iep_mmu>;
+ };
+
+ iep_mmu: iommu@ff3a0800 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff3a0800 0x0 0x40>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep_mmu";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "aclk", "iface";
+ power-domains = <&power RK3328_PD_VIDEO>;
+ #iommu-cells = <0>;
+ };
+
hdmi: hdmi@ff3c0000 {
compatible = "rockchip,rk3328-dw-hdmi";
reg = <0x0 0xff3c0000 0x0 0x20000>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c39408ccc..f35211810 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1283,6 +1283,18 @@ vdec_mmu: iommu@ff660480 {
#iommu-cells = <0>;
};
diff --git a/drivers/media/platform/rockchip/Kconfig b/drivers/media/platform/rockchip/Kconfig
index b41d3960c1b4..9ff362805ded 100644
--- a/drivers/media/platform/rockchip/Kconfig
+++ b/drivers/media/platform/rockchip/Kconfig
@@ -2,5 +2,6 @@
comment "Rockchip media platform drivers"
+source "drivers/media/platform/rockchip/iep/Kconfig"
source "drivers/media/platform/rockchip/rga/Kconfig"
source "drivers/media/platform/rockchip/rkisp1/Kconfig"
diff --git a/drivers/media/platform/rockchip/Makefile b/drivers/media/platform/rockchip/Makefile
index 4f782b876ac9..c075ecc2fa14 100644
--- a/drivers/media/platform/rockchip/Makefile
+++ b/drivers/media/platform/rockchip/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
+obj-y += iep/
obj-y += rga/
obj-y += rkisp1/
diff --git a/drivers/media/platform/rockchip/iep/Kconfig b/drivers/media/platform/rockchip/iep/Kconfig
new file mode 100644
index 000000000000..d95155a95133
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+ iep: iep@ff670000 {
+ compatible = "rockchip,rk3399-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff670000 0x0 0x800>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3399_PD_IEP>;
+ iommus = <&iep_mmu>;
+ };
+
iep_mmu: iommu@ff670800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff670800 0x0 0x40>;
@@ -1290,6 +1302,7 @@ iep_mmu: iommu@ff670800 {
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3399_PD_IEP>;
#iommu-cells = <0>;
status = "disabled";
};
+config VIDEO_ROCKCHIP_IEP
+ tristate "Rockchip Image Enhancement Processor"
+ depends on V4L_MEM2MEM_DRIVERS
+ depends on VIDEO_DEV
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select VIDEOBUF2_DMA_CONTIG
+ select V4L2_MEM2MEM_DEV
+ help
+ This is a v4l2 driver for Rockchip Image Enhancement Processor (IEP)
+ found in most Rockchip RK3xxx SoCs.
+ Rockchip IEP supports various enhancement operations for RGB and YUV
+ images. The driver currently implements YUV deinterlacing only.
+ To compile this driver as a module, choose M here: the module
+ will be called rockchip-iep
diff --git a/drivers/media/platform/rockchip/iep/Makefile b/drivers/media/platform/rockchip/iep/Makefile
new file mode 100644
index 000000000..5c89b3277
index 000000000000..5c89b3277469
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/Makefile
@@ -0,0 +1,5 @@
@@ -186,7 +165,7 @@ index 000000000..5c89b3277
+obj-$(CONFIG_VIDEO_ROCKCHIP_IEP) += rockchip-iep.o
diff --git a/drivers/media/platform/rockchip/iep/iep-regs.h b/drivers/media/platform/rockchip/iep/iep-regs.h
new file mode 100644
index 000000000..a68685ef3
index 000000000000..a68685ef3604
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/iep-regs.h
@@ -0,0 +1,291 @@
@@ -483,7 +462,7 @@ index 000000000..a68685ef3
+#endif
diff --git a/drivers/media/platform/rockchip/iep/iep.c b/drivers/media/platform/rockchip/iep/iep.c
new file mode 100644
index 000000000..f4b932073
index 000000000000..f4b9320733be
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/iep.c
@@ -0,0 +1,1089 @@
@@ -1578,7 +1557,7 @@ index 000000000..f4b932073
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/rockchip/iep/iep.h b/drivers/media/platform/rockchip/iep/iep.h
new file mode 100644
index 000000000..7d9fc6162
index 000000000000..7d9fc61624b6
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/iep.h
@@ -0,0 +1,112 @@
@@ -1694,43 +1673,133 @@ index 000000000..7d9fc6162
+};
+
+#endif
--
2.30.2
diff --git a/drivers/media/platform/rockchip/iep/Kconfig b/drivers/media/platform/rockchip/iep/Kconfig
new file mode 100644
index 00000000000..e513fa7f45f
--- /dev/null
+++ b/drivers/media/platform/rockchip/iep/Kconfig
@@ -0,0 +1,13 @@
+config VIDEO_ROCKCHIP_IEP
+ tristate "Rockchip Image Enhancement Processor"
+ depends on VIDEO_DEV && VIDEO_V4L2
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select VIDEOBUF2_DMA_CONTIG
+ select V4L2_MEM2MEM_DEV
+ help
+ This is a v4l2 driver for Rockchip Image Enhancement Processor (IEP)
+ found in most Rockchip RK3xxx SoCs.
+ Rockchip IEP supports various enhancement operations for RGB and YUV
+ images. The driver currently implements YUV deinterlacing only.
+ To compile this driver as a module, choose M here: the module
+ will be called rockchip-iep
diff --git a/drivers/media/platform/rockchip/Kconfig b/drivers/media/platform/rockchip/Kconfig
index b41d3960c1b..862590be791 100644
--- a/drivers/media/platform/rockchip/Kconfig
+++ b/drivers/media/platform/rockchip/Kconfig
@@ -4,3 +4,4 @@ comment "Rockchip media platform drivers"
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 20:22:38 +0200
Subject: [PATCH] ARM64: dts: rockchip: Add IEP node for RK3328
source "drivers/media/platform/rockchip/rga/Kconfig"
source "drivers/media/platform/rockchip/rkisp1/Kconfig"
+source "drivers/media/platform/rockchip/iep/Kconfig"
diff --git a/drivers/media/platform/rockchip/Makefile b/drivers/media/platform/rockchip/Makefile
index 4f782b876ac..be8015c6d9e 100644
--- a/drivers/media/platform/rockchip/Makefile
+++ b/drivers/media/platform/rockchip/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += rga/
obj-y += rkisp1/
+obj-y += iep/
while at that also add the mmu required
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index eec03adf0902..5455a46c9a6b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -760,6 +760,28 @@ vop_mmu: iommu@ff373f00 {
status = "disabled";
};
+ iep: iep@ff3a0000 {
+ compatible = "rockchip,rk3328-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff3a0000 0x0 0x800>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3328_PD_VIDEO>;
+ iommus = <&iep_mmu>;
+ };
+
+ iep_mmu: iommu@ff3a0800 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff3a0800 0x0 0x40>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep_mmu";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "aclk", "iface";
+ power-domains = <&power RK3328_PD_VIDEO>;
+ #iommu-cells = <0>;
+ };
+
hdmi: hdmi@ff3c0000 {
compatible = "rockchip,rk3328-dw-hdmi";
reg = <0x0 0xff3c0000 0x0 0x20000>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 20:43:12 +0200
Subject: [PATCH] ARM64: dts: rockchip: Add IEP node for RK3399
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index dbe6a9cb98a5..f0629b7a81c6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1365,14 +1365,25 @@ vdec_mmu: iommu@ff660480 {
#iommu-cells = <0>;
};
+ iep: iep@ff670000 {
+ compatible = "rockchip,rk3399-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff670000 0x0 0x800>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3399_PD_IEP>;
+ iommus = <&iep_mmu>;
+ };
+
iep_mmu: iommu@ff670800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff670800 0x0 0x40>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3399_PD_IEP>;
#iommu-cells = <0>;
- status = "disabled";
};
rga: rga@ff680000 {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 20:53:56 +0200
Subject: [PATCH] ARM: dts: rockchip: Add IEP node for RK3288
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm/boot/dts/rk3288.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 59fba3ac6aae..06545f423de2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -984,14 +984,25 @@ crypto: crypto@ff8a0000 {
reset-names = "crypto-rst";
};
+ iep: iep@ff90000 {
+ compatible = "rockchip,rk3288-iep", "rockchip,rk3228-iep";
+ reg = <0x0 0xff900000 0x0 0x800>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep";
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "axi", "ahb";
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&iep_mmu>;
+ };
+
iep_mmu: iommu@ff900800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff900800 0x0 0x40>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_VIO>;
#iommu-cells = <0>;
- status = "disabled";
};
isp_mmu: iommu@ff914000 {

1736
patch/kernel/media-edge/00280-add-rockchip-iep-driver.patch
View File

File diff suppressed because it is too large Load Diff

82
patch/kernel/media-edge/00350-general-add-pll-hdmi-timings.patch
View File

@@ -1,82 +0,0 @@
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 9ca20c947..ca91a01f3 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -316,6 +316,77 @@ static const struct pre_pll_config pre_pll_cfg_table[] = {
{594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0},
{593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B},
{594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0},
+ { 25175000, 25175000, 30, 1007, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 31500000, 31500000, 1, 21, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 33750000, 33750000, 1, 45, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 35500000, 35500000, 3, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 36000000, 36000000, 1, 12, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 49500000, 49500000, 1, 33, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 50000000, 50000000, 3, 50, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 56250000, 56250000, 1, 75, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 65000000, 65000000, 3, 65, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 68250000, 68250000, 1, 91, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 71000000, 71000000, 3, 71, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 72000000, 72000000, 1, 24, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 73250000, 73250000, 3, 293, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 75000000, 75000000, 1, 25, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ { 78750000, 78750000, 1, 105, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 79500000, 79500000, 1, 53, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 83500000, 83500000, 3, 167, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 85500000, 85500000, 1, 57, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ { 88750000, 88750000, 3, 355, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 94500000, 94500000, 1, 63, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {101000000, 101000000, 3, 101, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {102250000, 102250000, 3, 409, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {106500000, 106500000, 1, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {115500000, 115500000, 1, 77, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {117500000, 117500000, 3, 235, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {119000000, 119000000, 3, 119, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {121750000, 121750000, 3, 487, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {122500000, 122500000, 3, 245, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {136750000, 136750000, 3, 547, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {140250000, 140250000, 1, 187, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {146250000, 146250000, 1, 195, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {148250000, 148250000, 3, 593, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {154000000, 154000000, 3, 154, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {156750000, 156750000, 1, 209, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {157000000, 157000000, 3, 157, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {157500000, 157500000, 1, 105, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {175500000, 175500000, 1, 117, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {179500000, 179500000, 3, 359, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {182750000, 182750000, 3, 731, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {187000000, 187000000, 3, 187, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {187250000, 187250000, 3, 749, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {193250000, 193250000, 3, 773, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {202500000, 202500000, 1, 135, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {204750000, 204750000, 1, 273, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {208000000, 208000000, 3, 208, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {214750000, 214750000, 3, 859, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {218250000, 218250000, 1, 291, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {229500000, 229500000, 1, 153, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {234000000, 234000000, 1, 78, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {241500000, 241500000, 1, 161, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {245250000, 245250000, 1, 327, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {245500000, 245500000, 3, 491, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {268250000, 268250000, 3, 1073, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {268500000, 268500000, 1, 179, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {281250000, 281250000, 1, 375, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {288000000, 288000000, 1, 96, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {312250000, 312250000, 3, 1249, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {333250000, 333250000, 3, 1333, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {348500000, 348500000, 3, 697, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {356500000, 356500000, 3, 713, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {380500000, 380500000, 3, 761, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {443250000, 443250000, 1, 591, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {505250000, 505250000, 3, 2021, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ {552750000, 552750000, 1, 737, 1, 2, 2, 1, 2, 3, 4, 0, 0},
{ /* sentinel */ }
};

12
patch/kernel/media-edge/09980-builddeb.patch
View File

@@ -26,7 +26,7 @@
# Create postinst prerm script for headers
if [ "$3" = "headers" ]; then
@@ -187,10 +168,8 @@
@@ -194,10 +175,8 @@
kernel_headers_dir="debian/hdrtmp"
libc_headers_dir="debian/headertmp"
dbg_dir="debian/dbgtmp"
@@ -37,7 +37,7 @@
libc_headers_packagename=linux-libc-dev
dbg_packagename=$packagename-dbg
@@ -225,11 +204,9 @@
@@ -232,11 +211,9 @@
BUILD_DEBUG=$(if_enabled_echo CONFIG_DEBUG_INFO Yes)
# Setup the directory structure
@@ -50,7 +50,7 @@
mkdir -m 755 -p "$kernel_headers_dir/lib/modules/$version/"
mkdir -m 755 -p "$libc_headers_dir/DEBIAN"
@@ -249,13 +226,8 @@
@@ -256,13 +233,8 @@
if is_enabled CONFIG_OF_EARLY_FLATTREE; then
# Only some architectures with OF support have this target
if [ -d "${srctree}/arch/$SRCARCH/boot/dts" ]; then
@@ -66,7 +66,7 @@
fi
if is_enabled CONFIG_MODULES; then
@@ -318,6 +290,8 @@
@@ -325,6 +297,8 @@
sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
cat >> $tmpdir/DEBIAN/postinst <<- EOT
ln -sf $(basename $installed_image_path) /boot/$image_name 2> /dev/null || cp /$installed_image_path /boot/$image_name
@@ -75,7 +75,7 @@
touch /boot/.next
exit 0
EOT
@@ -346,6 +320,10 @@
@@ -353,6 +327,10 @@
rm -f /boot/System.map* /boot/config* /boot/vmlinuz* /boot/$image_name /boot/uImage
fi
}
@@ -86,7 +86,7 @@
mountpoint -q /boot && check_boot_dev
exit 0
EOT
@@ -353,11 +331,6 @@
@@ -360,11 +338,6 @@
create_package "$packagename" "$tmpdir"
if [ "$ARCH" != "um" ]; then

2
patch/kernel/media-edge/09981-mkdebian.patch
View File

@@ -8,7 +8,7 @@
dbg_packagename=$packagename-dbg
if [ "$ARCH" = "um" ] ; then
@@ -198,12 +197,6 @@
@@ -199,12 +198,6 @@
This package provides userspaces headers from the Linux kernel. These headers
are used by the installed headers for GNU glibc and other system libraries.
Multi-Arch: same

12
patch/kernel/media-legacy/00980-builddeb.patch
View File

@@ -26,7 +26,7 @@
# Create postinst prerm script for headers
if [ "$3" = "headers" ]; then
@@ -187,10 +168,8 @@
@@ -194,10 +175,8 @@
kernel_headers_dir="debian/hdrtmp"
libc_headers_dir="debian/headertmp"
dbg_dir="debian/dbgtmp"
@@ -37,7 +37,7 @@
libc_headers_packagename=linux-libc-dev
dbg_packagename=$packagename-dbg
@@ -225,11 +204,9 @@
@@ -232,11 +211,9 @@
BUILD_DEBUG=$(if_enabled_echo CONFIG_DEBUG_INFO Yes)
# Setup the directory structure
@@ -50,7 +50,7 @@
mkdir -m 755 -p "$kernel_headers_dir/lib/modules/$version/"
mkdir -m 755 -p "$libc_headers_dir/DEBIAN"
@@ -249,13 +226,8 @@
@@ -256,13 +233,8 @@
if is_enabled CONFIG_OF_EARLY_FLATTREE; then
# Only some architectures with OF support have this target
if [ -d "${srctree}/arch/$SRCARCH/boot/dts" ]; then
@@ -66,7 +66,7 @@
fi
if is_enabled CONFIG_MODULES; then
@@ -318,6 +290,8 @@
@@ -325,6 +297,8 @@
sed -e "s/exit 0//g" -i $tmpdir/DEBIAN/postinst
cat >> $tmpdir/DEBIAN/postinst <<- EOT
ln -sf $(basename $installed_image_path) /boot/$image_name 2> /dev/null || cp /$installed_image_path /boot/$image_name
@@ -75,7 +75,7 @@
touch /boot/.next
exit 0
EOT
@@ -346,6 +320,10 @@
@@ -353,6 +327,10 @@
rm -f /boot/System.map* /boot/config* /boot/vmlinuz* /boot/$image_name /boot/uImage
fi
}
@@ -86,7 +86,7 @@
mountpoint -q /boot && check_boot_dev
exit 0
EOT
@@ -353,11 +331,6 @@
@@ -360,11 +338,6 @@
create_package "$packagename" "$tmpdir"
if [ "$ARCH" != "um" ]; then

2
patch/kernel/media-legacy/00981-mkdebian.patch
View File

@@ -8,7 +8,7 @@
dbg_packagename=$packagename-dbg
if [ "$ARCH" = "um" ] ; then
@@ -198,12 +197,6 @@
@@ -199,12 +198,6 @@
This package provides userspaces headers from the Linux kernel. These headers
are used by the installed headers for GNU glibc and other system libraries.
Multi-Arch: same