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SMART AM40: U-Boot: fix DWC DRD could not find phy and thus crashed

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This commit is contained in:
retro98boy
2025-09-14 17:12:08 +08:00
committed by Igor
parent abc67aeea5
commit 903f67e7f3
3 changed files with 26 additions and 2 deletions
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8
patch/kernel/archive/rockchip64-6.12/dt/rk3399-am40.dts
View File

@@ -685,6 +685,10 @@
&u2phy0 { &u2phy0 {
status = "okay"; status = "okay";
u2phy0_otg: otg-port {
status = "okay";
};
u2phy0_host: host-port { u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>; phy-supply = <&vcc5v0_host>;
status = "okay"; status = "okay";
@@ -694,6 +698,10 @@
&u2phy1 { &u2phy1 {
status = "okay"; status = "okay";
u2phy1_otg: otg-port {
status = "okay";
};
u2phy1_host: host-port { u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>; phy-supply = <&vcc5v0_host>;
status = "okay"; status = "okay";

8
patch/kernel/archive/rockchip64-6.16/dt/rk3399-am40.dts
View File

@@ -685,6 +685,10 @@
&u2phy0 { &u2phy0 {
status = "okay"; status = "okay";
u2phy0_otg: otg-port {
status = "okay";
};
u2phy0_host: host-port { u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>; phy-supply = <&vcc5v0_host>;
status = "okay"; status = "okay";
@@ -694,6 +698,10 @@
&u2phy1 { &u2phy1 {
status = "okay"; status = "okay";
u2phy1_otg: otg-port {
status = "okay";
};
u2phy1_host: host-port { u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>; phy-supply = <&vcc5v0_host>;
status = "okay"; status = "okay";

12
patch/u-boot/v2025.04/board_smart-am40/add-board-smart-am40.patch
View File

@@ -94,10 +94,10 @@ index 00000000..8ea5266f
+CONFIG_ERRNO_STR=y +CONFIG_ERRNO_STR=y
diff --git a/dts/upstream/src/arm64/rockchip/rk3399-am40.dts b/dts/upstream/src/arm64/rockchip/rk3399-am40.dts diff --git a/dts/upstream/src/arm64/rockchip/rk3399-am40.dts b/dts/upstream/src/arm64/rockchip/rk3399-am40.dts
new file mode 100644 new file mode 100644
index 00000000..cf667415 index 00000000..555b661b
--- /dev/null --- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3399-am40.dts +++ b/dts/upstream/src/arm64/rockchip/rk3399-am40.dts
@@ -0,0 +1,779 @@ @@ -0,0 +1,787 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/* +/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@@ -785,6 +785,10 @@ index 00000000..cf667415
+&u2phy0 { +&u2phy0 {
+ status = "okay"; + status = "okay";
+ +
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port { + u2phy0_host: host-port {
+ phy-supply = <&vcc5v0_host>; + phy-supply = <&vcc5v0_host>;
+ status = "okay"; + status = "okay";
@@ -794,6 +798,10 @@ index 00000000..cf667415
+&u2phy1 { +&u2phy1 {
+ status = "okay"; + status = "okay";
+ +
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy1_host: host-port { + u2phy1_host: host-port {
+ phy-supply = <&vcc5v0_host>; + phy-supply = <&vcc5v0_host>;
+ status = "okay"; + status = "okay";