From 9cd5c76b2e8c39c558b5aa4b1a5a545c82946d1d Mon Sep 17 00:00:00 2001 From: schwar3kat Date: Wed, 1 Feb 2023 17:52:18 +1300 Subject: [PATCH] Tweak orangepi-r1plus-lts LEDs and networking. Add sys-triggered LED's, fix LAN LEDS, and improve Debian dual network function. --- config/boards/orangepi-r1plus-lts.conf | 57 ++- .../families/include/rockchip64_common.inc | 2 +- .../add-board-orangepi-r1-plus-lts.patch | 32 +- .../add-board-orangepi-r1-plus-lts.patch | 466 ++++++++++++++++++ .../add-board-orangepi-r1-plus-lts.patch | 32 +- .../add-board-orangepi-r1-plus-lts.patch | 32 +- .../add-board-orangepi-r1-plus-lts.patch | 32 +- .../add-board-orangepi-r1-plus-lts.patch | 32 +- 8 files changed, 618 insertions(+), 67 deletions(-) create mode 100644 patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus-lts.patch diff --git a/config/boards/orangepi-r1plus-lts.conf b/config/boards/orangepi-r1plus-lts.conf index 9967d8b0a..8f95b92e0 100644 --- a/config/boards/orangepi-r1plus-lts.conf +++ b/config/boards/orangepi-r1plus-lts.conf @@ -4,8 +4,63 @@ BOARDFAMILY="rockchip64" BOOTCONFIG="orangepi_r1_plus_lts_rk3328_defconfig" KERNEL_TARGET="current,edge" DEFAULT_CONSOLE="serial" -MODULES="g_serial" +MODULES="g_serial ledtrig_netdev" MODULES_BLACKLIST="rockchipdrm analogix_dp dw_mipi_dsi dw_hdmi gpu_sched lima hantro_vpu" SERIALCON="ttyS2:1500000,ttyGS0" HAS_VIDEO_OUTPUT="no" BOOT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb" + +# SYS-TRIGGERED LEDs: + +# NOTE: If LED funcionality is hard coded into an Armbian service for a board or family, it may override one or more of these settings. +# This will add a file /etc/armbian-leds.conf to the build to configure the three board LEDs. +# Green lan LED will flicker on lan0 RX. Green eth LED will flicker on eth0 RX. +# Red status led will display heartbeat pattern. +# For netdev trigger to work, ledtrig-netdev must be enabled in kernel. +# either in the board config file: e.g. MODULES="...,ledtrig_netdev" +# or in the family config file: e.g. CONFIG_LEDS_TRIGGER_NETDEV=y in linux-rockchip64-current.config + +# Content: +function post_family_tweaks_bsp__enable_leds_orangepi_r1_plus_lts() { +display_alert "Creating board support LEDs config for orangepi-r1-plus-lts" +cat <<- EOF > "${destination}"/etc/armbian-leds.conf + [/sys/class/leds/orangepi-r1-plus-lts:green:lan] + trigger=netdev + interval=52 + brightness=1 + link=1 + tx=0 + rx=1 + device_name=eth0 + + [/sys/class/leds/orangepi-r1-plus-lts:green:wan] + trigger=netdev + interval=52 + brightness=1 + link=1 + tx=0 + rx=1 + device_name=lan0 + + [/sys/class/leds/orangepi-r1-plus-lts:red:status] + trigger=heartbeat + brightness=0 + invert=0 +EOF + +# add a network rule to work-around Debian issues with two NICs on one network. +mkdir -p "${destination}"/etc/udev/rules.d/ +cat <<- EOF > "${destination}"/etc/udev/rules.d/70-rename-lan.rules + SUBSYSTEM=="net", ACTION=="add", DRIVERS=="r8152", KERNEL=="eth*", NAME="lan0", \ + RUN+="/usr/sbin/ip link set lan0 down", \ + RUN+="/usr/sbin/ip link set eth0 down", \ + RUN+="/usr/bin/sleep 5s ", \ + RUN+="/usr/sbin/ip link set eth0 up", \ + RUN+="/usr/bin/sleep 10s ", \ + RUN+="/usr/sbin/ip link set lan0 up" +EOF +} + +# Call the hook function above +post_family_tweaks_bsp__enable_leds_orangepi_r1_plus_lts + diff --git a/config/sources/families/include/rockchip64_common.inc b/config/sources/families/include/rockchip64_common.inc index f448c0372..24ef86152 100644 --- a/config/sources/families/include/rockchip64_common.inc +++ b/config/sources/families/include/rockchip64_common.inc @@ -278,7 +278,7 @@ family_tweaks() { chroot $SDCARD /bin/bash -c "systemctl --no-reload enable z28pro-bluetooth.service >/dev/null 2>&1" - elif [[ $BOARD == nanopi-r2s || $BOARD == nanopi-r2c || $BOARD == orangepi-r1plus || $BOARD == orangepi-r1plus-lts ]]; then + elif [[ $BOARD == nanopi-r2s || $BOARD == nanopi-r2c || $BOARD == orangepi-r1plus ]]; then # rename USB based network to lan0 mkdir -p $SDCARD/etc/udev/rules.d/ diff --git a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus-lts.patch index 10951c0e4..4d5ebc9d2 100644 --- a/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus-lts.patch +++ b/patch/kernel/archive/rockchip64-5.15/add-board-orangepi-r1-plus-lts.patch @@ -1,19 +1,20 @@ -From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> -Date: Sun, 10 Jul 2022 22:20:00 +1300 -Subject: rk3328-orangepi-r1-plus-lts.dts +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch -Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com> +Signed-off-by: schwar3kat --- - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 444 ++++++++++++ - 1 files changed, 444 insertions(+) + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 -index 000000000..10d50ebd4 +index 000000000..2bc432168 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -0,0 +1,444 @@ +@@ -0,0 +1,446 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* Copyright (c) 2020 David Bauer + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited @@ -63,18 +64,18 @@ index 000000000..10d50ebd4 + + leds { + compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + lan_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:green:lan"; ++ label = "orangepi-r1-plus-lts:green:lan"; + }; + + sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:red:sys"; -+ default-state = "on"; ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; + }; + + wan_led: led-2 { @@ -413,11 +414,13 @@ index 000000000..10d50ebd4 + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + }; +}; + @@ -458,3 +461,6 @@ index 000000000..10d50ebd4 + status = "disabled"; + }; +}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus-lts.patch new file mode 100644 index 000000000..4d5ebc9d2 --- /dev/null +++ b/patch/kernel/archive/rockchip64-5.17/add-board-orangepi-r1-plus-lts.patch @@ -0,0 +1,466 @@ +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch + +Signed-off-by: schwar3kat +--- + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +new file mode 100644 +index 000000000..2bc432168 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +@@ -0,0 +1,446 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* Copyright (c) 2020 David Bauer ++ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited ++ * Copyright (c) 2021 AmadeusGhost ++ * Revised for Orange Pi R1 Plus LTS (c) 2022 schwar3kat ++ * Based on Orange Pi R1 plus ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi R1 Plus LTS"; ++ compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; ++ ++ aliases { ++ ethernet1 = &rtl8153; ++ mmc0 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&reset_button_pin>; ++ pinctrl-names = "default"; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <50>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:green:wan"; ++ }; ++ }; ++ ++ vcc_io_sdio: sdmmcio-regulator { ++ compatible = "regulator-gpio"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&sdio_vcc_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_io_sdio"; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-settling-time-us = <5000>; ++ regulator-type = "voltage"; ++ startup-delay-us = <2000>; ++ states = <1800000 0x1>, ++ <3300000 0x0>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vdd_5v_lan: vdd-5v-lan { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&lan_vdd_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vdd_5v_lan"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vdd_5v>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ snps,aal; ++ status = "okay"; ++ phy-handle = <&yt8531c>; ++ tx_delay = <0x19>; ++ rx_delay = <0x05>; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ yt8531c: ethernet-phy@0 { ++ compatible = "ethernet-phy-id4f51.e91b", ++ "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <15000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_sdio>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ button { ++ reset_button_pin: reset-button-pin { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ gmac2io { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lan { ++ lan_vdd_pin: lan-vdd-pin { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sd { ++ sdio_vcc_pin: sdio-vcc-pin { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vcc_io_sdio>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3 { ++ dr_mode = "host"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; ++ ++ /* Second port is for USB 3.0 */ ++ rtl8153: device@2 { ++ compatible = "usbbda,8153"; ++ reg = <2>; ++ realtek,led-data = <0x87>; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&spi0 { ++ max-freq = <48000000>; ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <10000000>; ++ }; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&dmc_opp_table { ++ opp-798000000 { ++ status = "disabled"; ++ }; ++ opp-840000000 { ++ status = "disabled"; ++ }; ++ opp-924000000 { ++ status = "disabled"; ++ }; ++ opp-1056000000 { ++ status = "disabled"; ++ }; ++}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus-lts.patch index 10951c0e4..4d5ebc9d2 100644 --- a/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus-lts.patch +++ b/patch/kernel/archive/rockchip64-5.18/add-board-orangepi-r1-plus-lts.patch @@ -1,19 +1,20 @@ -From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> -Date: Sun, 10 Jul 2022 22:20:00 +1300 -Subject: rk3328-orangepi-r1-plus-lts.dts +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch -Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com> +Signed-off-by: schwar3kat --- - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 444 ++++++++++++ - 1 files changed, 444 insertions(+) + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 -index 000000000..10d50ebd4 +index 000000000..2bc432168 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -0,0 +1,444 @@ +@@ -0,0 +1,446 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* Copyright (c) 2020 David Bauer + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited @@ -63,18 +64,18 @@ index 000000000..10d50ebd4 + + leds { + compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + lan_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:green:lan"; ++ label = "orangepi-r1-plus-lts:green:lan"; + }; + + sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:red:sys"; -+ default-state = "on"; ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; + }; + + wan_led: led-2 { @@ -413,11 +414,13 @@ index 000000000..10d50ebd4 + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + }; +}; + @@ -458,3 +461,6 @@ index 000000000..10d50ebd4 + status = "disabled"; + }; +}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus-lts.patch index 10951c0e4..4d5ebc9d2 100644 --- a/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus-lts.patch +++ b/patch/kernel/archive/rockchip64-5.19/add-board-orangepi-r1-plus-lts.patch @@ -1,19 +1,20 @@ -From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> -Date: Sun, 10 Jul 2022 22:20:00 +1300 -Subject: rk3328-orangepi-r1-plus-lts.dts +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch -Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com> +Signed-off-by: schwar3kat --- - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 444 ++++++++++++ - 1 files changed, 444 insertions(+) + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 -index 000000000..10d50ebd4 +index 000000000..2bc432168 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -0,0 +1,444 @@ +@@ -0,0 +1,446 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* Copyright (c) 2020 David Bauer + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited @@ -63,18 +64,18 @@ index 000000000..10d50ebd4 + + leds { + compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + lan_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:green:lan"; ++ label = "orangepi-r1-plus-lts:green:lan"; + }; + + sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:red:sys"; -+ default-state = "on"; ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; + }; + + wan_led: led-2 { @@ -413,11 +414,13 @@ index 000000000..10d50ebd4 + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + }; +}; + @@ -458,3 +461,6 @@ index 000000000..10d50ebd4 + status = "disabled"; + }; +}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/rockchip64-6.0/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-6.0/add-board-orangepi-r1-plus-lts.patch index 10951c0e4..4d5ebc9d2 100644 --- a/patch/kernel/archive/rockchip64-6.0/add-board-orangepi-r1-plus-lts.patch +++ b/patch/kernel/archive/rockchip64-6.0/add-board-orangepi-r1-plus-lts.patch @@ -1,19 +1,20 @@ -From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> -Date: Sun, 10 Jul 2022 22:20:00 +1300 -Subject: rk3328-orangepi-r1-plus-lts.dts +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch -Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com> +Signed-off-by: schwar3kat --- - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 444 ++++++++++++ - 1 files changed, 444 insertions(+) + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 -index 000000000..10d50ebd4 +index 000000000..2bc432168 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -0,0 +1,444 @@ +@@ -0,0 +1,446 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* Copyright (c) 2020 David Bauer + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited @@ -63,18 +64,18 @@ index 000000000..10d50ebd4 + + leds { + compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + lan_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:green:lan"; ++ label = "orangepi-r1-plus-lts:green:lan"; + }; + + sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:red:sys"; -+ default-state = "on"; ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; + }; + + wan_led: led-2 { @@ -413,11 +414,13 @@ index 000000000..10d50ebd4 + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + }; +}; + @@ -458,3 +461,6 @@ index 000000000..10d50ebd4 + status = "disabled"; + }; +}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-r1-plus-lts.patch b/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-r1-plus-lts.patch index 10951c0e4..4d5ebc9d2 100644 --- a/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-r1-plus-lts.patch +++ b/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-r1-plus-lts.patch @@ -1,19 +1,20 @@ -From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> -Date: Sun, 10 Jul 2022 22:20:00 +1300 -Subject: rk3328-orangepi-r1-plus-lts.dts +From c163dea909a2900a78ad8041de42b6509c8e3910 Mon Sep 17 00:00:00 2001 +From: schwar3kat +Date: Mon, 30 Jan 2023 18:48:33 +1300 +Subject: [PATCH] add-board-orangepi-r1-plus-lts.patch -Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com> +Signed-off-by: schwar3kat --- - .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 444 ++++++++++++ - 1 files changed, 444 insertions(+) + .../rockchip/rk3328-orangepi-r1-plus-lts.dts | 446 ++++++++++++++++++ + 1 file changed, 446 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 -index 000000000..10d50ebd4 +index 000000000..2bc432168 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -0,0 +1,444 @@ +@@ -0,0 +1,446 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* Copyright (c) 2020 David Bauer + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited @@ -63,18 +64,18 @@ index 000000000..10d50ebd4 + + leds { + compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + lan_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:green:lan"; ++ label = "orangepi-r1-plus-lts:green:lan"; + }; + + sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus-lts:red:sys"; -+ default-state = "on"; ++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; ++ label = "orangepi-r1-plus-lts:red:status"; ++ linux,default-trigger = "heartbeat"; + }; + + wan_led: led-2 { @@ -413,11 +414,13 @@ index 000000000..10d50ebd4 + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; ++ snps,xhci-trb-ent-quirk; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; ++ realtek,led-data = <0x87>; + }; +}; + @@ -458,3 +461,6 @@ index 000000000..10d50ebd4 + status = "disabled"; + }; +}; +-- +Created with Armbian build tools https://github.com/armbian/build +