From 6c5ea268973e7559f8b8e056e7e9e987c5b49dfe Mon Sep 17 00:00:00 2001 From: Lane Jennison Date: Mon, 8 Jan 2024 01:57:50 +0000 Subject: [PATCH] RK3588-edge: add SATA1 overlay for rock5b --- .../rockchip-rk3588-edge/overlay/Makefile | 1 + .../overlay/rockchip-rk3588-sata1.dts | 20 +++++++++++++++++++ 2 files changed, 21 insertions(+) create mode 100644 patch/kernel/rockchip-rk3588-edge/overlay/rockchip-rk3588-sata1.dts diff --git a/patch/kernel/rockchip-rk3588-edge/overlay/Makefile b/patch/kernel/rockchip-rk3588-edge/overlay/Makefile index 80f9bcdb7..71d5292bf 100644 --- a/patch/kernel/rockchip-rk3588-edge/overlay/Makefile +++ b/patch/kernel/rockchip-rk3588-edge/overlay/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ + rockchip-rk3588-sata1.dtbo \ rockchip-rk3588-sata2.dtbo targets += $(dtbo-y) diff --git a/patch/kernel/rockchip-rk3588-edge/overlay/rockchip-rk3588-sata1.dts b/patch/kernel/rockchip-rk3588-edge/overlay/rockchip-rk3588-sata1.dts new file mode 100644 index 000000000..2759ab9cf --- /dev/null +++ b/patch/kernel/rockchip-rk3588-edge/overlay/rockchip-rk3588-sata1.dts @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pcie2x1l0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@1 { + target = <&sata1>; + + __overlay__ { + status = "okay"; + }; + }; +};